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| author | yongari <yongari@FreeBSD.org> | 2011-05-07 00:25:12 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2011-05-07 00:25:12 +0000 |
| commit | e97ce6dc83fc8850d25f1c57197b68ff3586254e (patch) | |
| tree | f204d7610cfb1e1340124f191635e986bfd4c28e /sys/dev/xl | |
| parent | 3a014bc50fc152226a313ec5ce203034b68f1d96 (diff) | |
| download | FreeBSD-src-e97ce6dc83fc8850d25f1c57197b68ff3586254e.zip FreeBSD-src-e97ce6dc83fc8850d25f1c57197b68ff3586254e.tar.gz | |
XL_DMACTL is 32bit register, use 32bit write macro.
While I'm here add more bits for the register.
Diffstat (limited to 'sys/dev/xl')
| -rw-r--r-- | sys/dev/xl/if_xl.c | 2 | ||||
| -rw-r--r-- | sys/dev/xl/if_xlreg.h | 5 |
2 files changed, 6 insertions, 1 deletions
diff --git a/sys/dev/xl/if_xl.c b/sys/dev/xl/if_xl.c index 03a7114..51e01f2 100644 --- a/sys/dev/xl/if_xl.c +++ b/sys/dev/xl/if_xl.c @@ -2969,7 +2969,7 @@ xl_init_locked(struct xl_softc *sc) /* Set the RX early threshold */ CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_RX_SET_THRESH|(XL_PACKET_SIZE >>2)); - CSR_WRITE_2(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY); + CSR_WRITE_4(sc, XL_DMACTL, XL_DMACTL_UP_RX_EARLY); /* Enable receiver and transmitter. */ CSR_WRITE_2(sc, XL_COMMAND, XL_CMD_TX_ENABLE); diff --git a/sys/dev/xl/if_xlreg.h b/sys/dev/xl/if_xlreg.h index 28b956b..f5494f5 100644 --- a/sys/dev/xl/if_xlreg.h +++ b/sys/dev/xl/if_xlreg.h @@ -124,6 +124,11 @@ #define XL_DMACTL_DOWN_INPROG 0x00000080 #define XL_DMACTL_COUNTER_SPEED 0x00000100 #define XL_DMACTL_DOWNDOWN_MODE 0x00000200 +#define XL_DMACTL_UP_ALTSEQ_DIS 0x00010000 /* 3c90xB/3c90xC */ +#define XL_DMACTL_DOWN_ALTSEQ_DIS 0x00020000 /* 3c90xC only */ +#define XL_DMACTL_DEFEAT_MWI 0x00100000 /* 3c90xB/3c90xC */ +#define XL_DMACTL_DEFEAT_MRL 0x00100000 /* 3c90xB/3c90xC */ +#define XL_DMACTL_UP_OVERRUN_DISC_DIS 0x00200000 /* 3c90xB/3c90xC */ #define XL_DMACTL_TARGET_ABORT 0x40000000 #define XL_DMACTL_MASTER_ABORT 0x80000000 |
