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authoryongari <yongari@FreeBSD.org>2009-12-20 19:11:32 +0000
committeryongari <yongari@FreeBSD.org>2009-12-20 19:11:32 +0000
commitd7fc8c3ed3e3340ccb60233ff6fe86cb3b63bb10 (patch)
tree9b0b05ce8b62373830ad06ab2125b0107aa2786e /sys/dev/vge
parent8af5f7e769af4c1a0e6e0c231f031b842287d0b2 (diff)
downloadFreeBSD-src-d7fc8c3ed3e3340ccb60233ff6fe86cb3b63bb10.zip
FreeBSD-src-d7fc8c3ed3e3340ccb60233ff6fe86cb3b63bb10.tar.gz
VT6130 datasheet was wrong. If VT6130 receive a jumbo frame the
controller will split the jumbo frame into multiple RX buffers. However it seems the hardware always dma the frame to 8 bytes boundary for the split frames. Only the first part of the fragment can have 4 byte alignment and subsequent buffers should be 8 bytes aligned. Change RX buffer the alignment requirement to 8 bytes from 4 bytes.
Diffstat (limited to 'sys/dev/vge')
-rw-r--r--sys/dev/vge/if_vgevar.h2
1 files changed, 1 insertions, 1 deletions
diff --git a/sys/dev/vge/if_vgevar.h b/sys/dev/vge/if_vgevar.h
index 7af0328..da8f6c5 100644
--- a/sys/dev/vge/if_vgevar.h
+++ b/sys/dev/vge/if_vgevar.h
@@ -39,7 +39,7 @@
#define VGE_TX_RING_ALIGN 64
#define VGE_RX_RING_ALIGN 64
#define VGE_MAXTXSEGS 6
-#define VGE_RX_BUF_ALIGN sizeof(uint32_t)
+#define VGE_RX_BUF_ALIGN sizeof(uint64_t)
/*
* VIA Velocity allows 64bit DMA addressing but high 16bits
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