diff options
| author | n_hibma <n_hibma@FreeBSD.org> | 1999-02-18 21:03:10 +0000 |
|---|---|---|
| committer | n_hibma <n_hibma@FreeBSD.org> | 1999-02-18 21:03:10 +0000 |
| commit | b07c793b87aca1cb3098315e3a148fe4bc0b320a (patch) | |
| tree | 03bbb164970b25722b4564d7a19098321a746277 /sys/dev/usb/uhci.c | |
| parent | 03d8f2679e6755d5bcc87875b221e9748b1cc090 (diff) | |
| download | FreeBSD-src-b07c793b87aca1cb3098315e3a148fe4bc0b320a.zip FreeBSD-src-b07c793b87aca1cb3098315e3a148fe4bc0b320a.tar.gz | |
Moved busreset in uhci_init up to avoid clearing of FLBASE in Via 83572
(PR1)
Diffstat (limited to 'sys/dev/usb/uhci.c')
| -rw-r--r-- | sys/dev/usb/uhci.c | 19 |
1 files changed, 8 insertions, 11 deletions
diff --git a/sys/dev/usb/uhci.c b/sys/dev/usb/uhci.c index 319e510..e56832e 100644 --- a/sys/dev/usb/uhci.c +++ b/sys/dev/usb/uhci.c @@ -314,6 +314,9 @@ uhci_init(sc) uhci_run(sc, 0); /* stop the controller */ UWRITE2(sc, UHCI_INTR, 0); /* disable interrupts */ + /* PR1 The VIA 823C572 reset FLBASEADDR as well */ + uhci_busreset(sc); + /* Allocate and initialize real frame array. */ r = usb_allocmem(sc->sc_dmatag, UHCI_FRAMELIST_COUNT * sizeof(uhci_physaddr_t), @@ -324,18 +327,12 @@ uhci_init(sc) UWRITE2(sc, UHCI_FRNUM, 0); /* set frame number to 0 */ UWRITE4(sc, UHCI_FLBASEADDR, DMAADDR(&dma)); /* set frame list */ + /* PR1 moved uhci_busreset up */ + #ifdef USB_DEBUG /* PR1 */ - if ( UREAD4(sc, UHCI_FLBASEADDR) != DMAADDR(&dma) ) - printf("PR1:before busreset: FLBASEADDR = 0x%08x != DMADDR(&dma) = 0x%08x\n", - UREAD4(sc, UHCI_FLBASEADDR), DMAADDR(&dma)); -#endif - uhci_busreset(sc); -#ifdef USB_DEBUG - /* PR1 */ - if ( UREAD4(sc, UHCI_FLBASEADDR) != DMAADDR(&dma) ) - printf("PR1:after busreset: FLBASEADDR = 0x%08x != DMADDR(&dma) = 0x%08x\n", - UREAD4(sc, UHCI_FLBASEADDR), DMAADDR(&dma)); + printf("PR1:after busreset: FLBASEADDR=0x%08x, DMADDR(&dma)=0x%08x\n", + UREAD4(sc, UHCI_FLBASEADDR), DMAADDR(&dma)); #endif /* Allocate the dummy QH where bulk traffic will be queued. */ bsqh = uhci_alloc_sqh(sc); @@ -888,7 +885,7 @@ uhci_waitintr(sc, reqh) int usecs; uhci_intr_info_t *ii; - DPRINTFN(10,("uhci_waitintr: timeout = %ds\n", timo)); + DPRINTFN(15,("uhci_waitintr: timeout = %ds\n", timo)); reqh->status = USBD_IN_PROGRESS; for (usecs = timo * 1000000 / hz; usecs > 0; usecs -= 1000) { |
