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author | hselasky <hselasky@FreeBSD.org> | 2014-07-14 07:30:04 +0000 |
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committer | hselasky <hselasky@FreeBSD.org> | 2014-07-14 07:30:04 +0000 |
commit | f954fcf135f4a9d9197ed1c1294fad01b481237e (patch) | |
tree | aeb22cd0811a7d0c3578f2db561f50bec13aefcd /sys/dev/usb/controller | |
parent | c2ba3c92e6ab96e2f4967cecb432721dd36b991b (diff) | |
download | FreeBSD-src-f954fcf135f4a9d9197ed1c1294fad01b481237e.zip FreeBSD-src-f954fcf135f4a9d9197ed1c1294fad01b481237e.tar.gz |
MFC r268354:
Improve support for Intel Lynx Point USB 3.0 controllers by masking
the port routing bits like done in Linux.
Diffstat (limited to 'sys/dev/usb/controller')
-rw-r--r-- | sys/dev/usb/controller/xhci_pci.c | 3 | ||||
-rw-r--r-- | sys/dev/usb/controller/xhcireg.h | 2 |
2 files changed, 5 insertions, 0 deletions
diff --git a/sys/dev/usb/controller/xhci_pci.c b/sys/dev/usb/controller/xhci_pci.c index dc5a6e9..3d18d34 100644 --- a/sys/dev/usb/controller/xhci_pci.c +++ b/sys/dev/usb/controller/xhci_pci.c @@ -157,6 +157,9 @@ xhci_pci_port_route(device_t self, uint32_t set, uint32_t clear) temp |= set; temp &= ~clear; + /* Don't set bits which the hardware doesn't support */ + temp &= pci_read_config(self, PCI_XHCI_INTEL_USB3PRM, 4); + pci_write_config(self, PCI_XHCI_INTEL_USB3_PSSEN, temp, 4); pci_write_config(self, PCI_XHCI_INTEL_XUSB2PR, temp, 4); diff --git a/sys/dev/usb/controller/xhcireg.h b/sys/dev/usb/controller/xhcireg.h index bd1d635..a0b7397 100644 --- a/sys/dev/usb/controller/xhcireg.h +++ b/sys/dev/usb/controller/xhcireg.h @@ -35,7 +35,9 @@ #define PCI_XHCI_FLADJ 0x61 /* RW frame length adjust */ #define PCI_XHCI_INTEL_XUSB2PR 0xD0 /* Intel USB2 Port Routing */ +#define PCI_XHCI_INTEL_USB2PRM 0xD4 /* Intel USB2 Port Routing Mask */ #define PCI_XHCI_INTEL_USB3_PSSEN 0xD8 /* Intel USB3 Port SuperSpeed Enable */ +#define PCI_XHCI_INTEL_USB3PRM 0xDC /* Intel USB3 Port Routing Mask */ /* XHCI capability registers */ #define XHCI_CAPLENGTH 0x00 /* RO capability */ |