Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.

The PQ3 is a high performance integrated communications processing system
based on the e500 core, which is an embedded RISC processor that implements
the 32-bit Book E definition of the PowerPC architecture. For details refer
to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E

This port was tested and successfully run on the following members of the PQ3
family: MPC8533, MPC8541, MPC8548, MPC8555.

The following major integrated peripherals are supported:

  * On-chip peripherals bus
  * OpenPIC interrupt controller
  * UART
  * Ethernet (TSEC)
  * Host/PCI bridge
  * QUICC engine (SCC functionality)

This commit brings the main functionality and will be followed by individual
drivers that are logically separate from this base.

Approved by:	cognet (mentor)
Obtained from:	Juniper, Semihalf
MFp4:		e500

3 files changed, 115 insertions, 0 deletions

diff --git a/sys/dev/uart/uart.h b/sys/dev/uart/uart.h
index f4320d4..bcb8cd8 100644
--- a/sys/dev/uart/uart.h
+++ b/sys/dev/uart/uart.h
@@ -65,6 +65,7 @@ struct uart_bas {
 struct uart_class;
 
 extern struct uart_class uart_ns8250_class __attribute__((weak));
+extern struct uart_class uart_quicc_class __attribute__((weak));
 extern struct uart_class uart_sab82532_class __attribute__((weak));
 extern struct uart_class uart_z8530_class __attribute__((weak));
 
diff --git a/sys/dev/uart/uart_bus_ocp.c b/sys/dev/uart/uart_bus_ocp.c
new file mode 100644
index 0000000..e7f0971
--- /dev/null
+++ b/sys/dev/uart/uart_bus_ocp.c
@@ -0,0 +1,88 @@
+/*-
+ * Copyright 2006 by Juniper Networks.
+ * All rights reserved.
+ *
+ * Redistribution and use in source and binary forms, with or without
+ * modification, are permitted provided that the following conditions
+ * are met:
+ * 1. Redistributions of source code must retain the above copyright
+ *    notice, this list of conditions and the following disclaimer.
+ * 2. Redistributions in binary form must reproduce the above copyright
+ *    notice, this list of conditions and the following disclaimer in the
+ *    documentation and/or other materials provided with the distribution.
+ * 3. The name of the author may not be used to endorse or promote products
+ *    derived from this software without specific prior written permission.
+ *
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED WARRANTIES
+ * OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE DISCLAIMED.
+ * IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT, INDIRECT,
+ * INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES (INCLUDING,
+ * BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR SERVICES;
+ * LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION) HOWEVER CAUSED
+ * AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT, STRICT LIABILITY,
+ * OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN ANY WAY
+ * OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE POSSIBILITY OF
+ * SUCH DAMAGE.
+ */
+
+#include <sys/cdefs.h>
+__FBSDID("$FreeBSD$");
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/bus.h>
+#include <sys/conf.h>
+#include <sys/kernel.h>
+#include <sys/lock.h>
+#include <sys/malloc.h>
+#include <sys/module.h>
+#include <sys/tty.h>
+#include <machine/bus.h>
+
+#include <machine/ocpbus.h>
+
+#include <dev/uart/uart.h>
+#include <dev/uart/uart_bus.h>
+
+static int uart_ocp_probe(device_t);
+
+static device_method_t uart_ocp_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		uart_ocp_probe),
+	DEVMETHOD(device_attach,	uart_bus_attach),
+	DEVMETHOD(device_detach,	uart_bus_detach),
+	{ 0, 0 }
+};
+
+static driver_t uart_ocp_driver = {
+	uart_driver_name,
+	uart_ocp_methods,
+	sizeof(struct uart_softc),
+};
+
+static int
+uart_ocp_probe(device_t dev)
+{
+	device_t parent;
+	struct uart_softc *sc;
+	uintptr_t clock, devtype;
+	int error;
+
+	parent = device_get_parent(dev);
+
+	error = BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_DEVTYPE, &devtype);
+	if (error)
+		return (error);
+	if (devtype != OCPBUS_DEVTYPE_UART)
+		return (ENXIO);
+
+	sc = device_get_softc(dev);
+	sc->sc_class = &uart_ns8250_class;
+
+	if (BUS_READ_IVAR(parent, dev, OCPBUS_IVAR_CLOCK, &clock))
+		clock = 0;
+	return (uart_bus_probe(dev, 0, clock, 0, 0));
+}
+
+DRIVER_MODULE(uart, ocpbus, uart_ocp_driver, uart_devclass, 0, 0);
diff --git a/sys/dev/uart/uart_cpu_powerpc.c b/sys/dev/uart/uart_cpu_powerpc.c
index de6af2b..0945970 100644
--- a/sys/dev/uart/uart_cpu_powerpc.c
+++ b/sys/dev/uart/uart_cpu_powerpc.c
@@ -27,19 +27,28 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+#include "opt_platform.h"
+
 #include <sys/param.h>
 #include <sys/systm.h>
 
 #include <machine/bus.h>
 
+#ifndef MPC85XX
 #include <dev/ofw/openfirm.h>
 #include <machine/ofw_machdep.h>
+#endif
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
 
+#ifdef MPC85XX
+bus_space_tag_t uart_bus_space_io = &bs_be_tag;
+bus_space_tag_t uart_bus_space_mem = &bs_be_tag;
+#else
 bus_space_tag_t uart_bus_space_io = &bs_le_tag;
 bus_space_tag_t uart_bus_space_mem = &bs_le_tag;
+#endif
 
 int
 uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
@@ -48,6 +57,22 @@ uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
 	return ((b1->bsh == b2->bsh) ? 1 : 0);
 }
 
+#ifdef MPC85XX
+int
+uart_cpu_getdev(int devtype, struct uart_devinfo *di)
+{
+	struct uart_class *class;
+
+	class = &uart_ns8250_class;
+	if (class == NULL)
+		class = &uart_quicc_class;
+	if (class == NULL)
+		return (ENXIO);
+
+	/* Check the environment. */
+	return (uart_getenv(devtype, di, class));
+}
+#else
 int
 uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 {
@@ -110,3 +135,4 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	di->parity = UART_PARITY_NONE;
 	return (0);
 }
+#endif