Initial support for Freescale PowerQUICC III MPC85xx system-on-chip family.

The PQ3 is a high performance integrated communications processing system
based on the e500 core, which is an embedded RISC processor that implements
the 32-bit Book E definition of the PowerPC architecture. For details refer
to: http://www.freescale.com/webapp/sps/site/prod_summary.jsp?code=MPC8555E

This port was tested and successfully run on the following members of the PQ3
family: MPC8533, MPC8541, MPC8548, MPC8555.

The following major integrated peripherals are supported:

  * On-chip peripherals bus
  * OpenPIC interrupt controller
  * UART
  * Ethernet (TSEC)
  * Host/PCI bridge
  * QUICC engine (SCC functionality)

This commit brings the main functionality and will be followed by individual
drivers that are logically separate from this base.

Approved by:	cognet (mentor)
Obtained from:	Juniper, Semihalf
MFp4:		e500

1 files changed, 26 insertions, 0 deletions

diff --git a/sys/dev/uart/uart_cpu_powerpc.c b/sys/dev/uart/uart_cpu_powerpc.c
index de6af2b..0945970 100644
--- a/sys/dev/uart/uart_cpu_powerpc.c
+++ b/sys/dev/uart/uart_cpu_powerpc.c
@@ -27,19 +27,28 @@
 #include <sys/cdefs.h>
 __FBSDID("$FreeBSD$");
 
+#include "opt_platform.h"
+
 #include <sys/param.h>
 #include <sys/systm.h>
 
 #include <machine/bus.h>
 
+#ifndef MPC85XX
 #include <dev/ofw/openfirm.h>
 #include <machine/ofw_machdep.h>
+#endif
 
 #include <dev/uart/uart.h>
 #include <dev/uart/uart_cpu.h>
 
+#ifdef MPC85XX
+bus_space_tag_t uart_bus_space_io = &bs_be_tag;
+bus_space_tag_t uart_bus_space_mem = &bs_be_tag;
+#else
 bus_space_tag_t uart_bus_space_io = &bs_le_tag;
 bus_space_tag_t uart_bus_space_mem = &bs_le_tag;
+#endif
 
 int
 uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
@@ -48,6 +57,22 @@ uart_cpu_eqres(struct uart_bas *b1, struct uart_bas *b2)
 	return ((b1->bsh == b2->bsh) ? 1 : 0);
 }
 
+#ifdef MPC85XX
+int
+uart_cpu_getdev(int devtype, struct uart_devinfo *di)
+{
+	struct uart_class *class;
+
+	class = &uart_ns8250_class;
+	if (class == NULL)
+		class = &uart_quicc_class;
+	if (class == NULL)
+		return (ENXIO);
+
+	/* Check the environment. */
+	return (uart_getenv(devtype, di, class));
+}
+#else
 int
 uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 {
@@ -110,3 +135,4 @@ uart_cpu_getdev(int devtype, struct uart_devinfo *di)
 	di->parity = UART_PARITY_NONE;
 	return (0);
 }
+#endif