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| author | raj <raj@FreeBSD.org> | 2008-03-03 18:20:17 +0000 |
|---|---|---|
| committer | raj <raj@FreeBSD.org> | 2008-03-03 18:20:17 +0000 |
| commit | ddcbd7a1c933343caf6997ea48416ce7af082d83 (patch) | |
| tree | 4bfcfaef6ba2a3d7ebf036eb0d0325e2431535cc /sys/dev/uart/uart_bus_scc.c | |
| parent | 0757a4afb5d18c5b874cc918eb56d7264456bd20 (diff) | |
| download | FreeBSD-src-ddcbd7a1c933343caf6997ea48416ce7af082d83.zip FreeBSD-src-ddcbd7a1c933343caf6997ea48416ce7af082d83.tar.gz | |
Support for Freescale QUad Integrated Communications Controller.
The QUICC engine is found on various Freescale parts including MPC85xx, and
provides multiple generic time-division serial channel resources, which are in
turn muxed/demuxed by the Serial Communications Controller (SCC).
Along with core QUICC/SCC functionality a uart(4)-compliant device driver is
provided which allows for serial ports over QUICC/SCC.
Approved by: cognet (mentor)
Obtained from: Juniper
MFp4: e500
Diffstat (limited to 'sys/dev/uart/uart_bus_scc.c')
| -rw-r--r-- | sys/dev/uart/uart_bus_scc.c | 3 |
1 files changed, 3 insertions, 0 deletions
diff --git a/sys/dev/uart/uart_bus_scc.c b/sys/dev/uart/uart_bus_scc.c index 9fdcb8b..07808e6 100644 --- a/sys/dev/uart/uart_bus_scc.c +++ b/sys/dev/uart/uart_bus_scc.c @@ -95,6 +95,9 @@ uart_scc_probe(device_t dev) if (md != SCC_MODE_ASYNC) return (ENXIO); switch (cl) { + case SCC_CLASS_QUICC: + sc->sc_class = &uart_quicc_class; + break; case SCC_CLASS_SAB82532: sc->sc_class = &uart_sab82532_class; break; |
