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authordelphij <delphij@FreeBSD.org>2010-06-09 21:40:38 +0000
committerdelphij <delphij@FreeBSD.org>2010-06-09 21:40:38 +0000
commitc1095acf561cb6c7c8211dfcaa7e7d5c71bd054b (patch)
tree60c8bb8ffe52055f003054cbaac9ead81b48b520 /sys/dev/twa/tw_cl_init.c
parent5d64b894b6296859e4c90f22c946659d7f71886c (diff)
downloadFreeBSD-src-c1095acf561cb6c7c8211dfcaa7e7d5c71bd054b.zip
FreeBSD-src-c1095acf561cb6c7c8211dfcaa7e7d5c71bd054b.tar.gz
Apply driver update from LSI. Many thanks to LSI for continuing to
support FreeBSD. 1) Timeout ioctl command timeouts. Do not reset the controller if ioctl command completed successfully. 2) Remove G66_WORKAROUND code (this bug never shipped). 3) Remove unnecessary interrupt lock (intr_lock). 4) Timeout firmware handshake for PChip reset (don't wait forever). 5) Handle interrupts inline. 6) Unmask command interrupt ONLY when adding a command to the pending queue. 7) Mask command interrupt ONLY after removing the last command from the pending queue. 8) Remove TW_OSLI_DEFERRED_INTR_USED code. 9) Replace controller "state" with separate data fields to avoid races: TW_CLI_CTLR_STATE_ACTIVE ctlr->active TW_CLI_CTLR_STATE_INTR_ENABLED ctlr->interrupts_enabled TW_CLI_CTLR_STATE_INTERNAL_REQ_BUSY ctlr->internal_req_busy TW_CLI_CTLR_STATE_GET_MORE_AENS ctlr->get_more_aens TW_CLI_CTLR_STATE_RESET_IN_PROGRESS ctlr->reset_in_progress TW_CLI_CTLR_STATE_RESET_PHASE1_IN_PROGRESS ctlr->reset_phase1_in_progress 10) Fix "req" leak in twa_action() when simq is frozen and req is NOT null. 11) Replace softc "state" with separate data fields to avoid races: TW_OSLI_CTLR_STATE_OPEN sc->open TW_OSLI_CTLR_STATE_SIMQ_FROZEN sc->simq_frozen 12) Fix reference to TW_OSLI_REQ_FLAGS_IN_PROGRESS in tw_osl_complete_passthru() 13) Use correct CAM status values. Change CAM_REQ_CMP_ERR to CAM_REQ_INVALID. Remove use of CAM_RELEASE_SIMQ for physical data addresses. 14) Do not freeze/ release the simq with non I/O commands. When it is appropriate to temporarily freeze the simq with an I/O command use: xpt_freeze_simq(sim, 1); ccb->ccb_h.status |= CAM_RELEASE_SIMQ; otherwise use: xpt_freeze_simq(sim, 1); xpt_release_simq(sim, 1); Submitted by: Tom Couch <tom.couch lsi.com> PR: kern/147695 MFC after: 3 days
Diffstat (limited to 'sys/dev/twa/tw_cl_init.c')
-rw-r--r--sys/dev/twa/tw_cl_init.c60
1 files changed, 13 insertions, 47 deletions
diff --git a/sys/dev/twa/tw_cl_init.c b/sys/dev/twa/tw_cl_init.c
index ca282fa..0b7daa5 100644
--- a/sys/dev/twa/tw_cl_init.c
+++ b/sys/dev/twa/tw_cl_init.c
@@ -208,7 +208,7 @@ tw_cl_get_mem_requirements(struct tw_cl_ctlr_handle *ctlr_handle,
*/
*non_dma_mem_size = sizeof(struct tw_cli_ctlr_context) +
- (sizeof(struct tw_cli_req_context) * (max_simult_reqs + 1)) +
+ (sizeof(struct tw_cli_req_context) * max_simult_reqs) +
(sizeof(struct tw_cl_event_packet) * max_aens);
@@ -220,7 +220,7 @@ tw_cl_get_mem_requirements(struct tw_cl_ctlr_handle *ctlr_handle,
*/
*dma_mem_size = (sizeof(struct tw_cl_command_packet) *
- (max_simult_reqs + 1)) + (TW_CLI_SECTOR_SIZE);
+ (max_simult_reqs)) + (TW_CLI_SECTOR_SIZE);
return(0);
}
@@ -287,12 +287,12 @@ tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags,
}
tw_osl_memzero(non_dma_mem, sizeof(struct tw_cli_ctlr_context) +
- (sizeof(struct tw_cli_req_context) * (max_simult_reqs + 1)) +
+ (sizeof(struct tw_cli_req_context) * max_simult_reqs) +
(sizeof(struct tw_cl_event_packet) * max_aens));
tw_osl_memzero(dma_mem,
(sizeof(struct tw_cl_command_packet) *
- (max_simult_reqs + 1)) +
+ max_simult_reqs) +
TW_CLI_SECTOR_SIZE);
free_non_dma_mem = (TW_UINT8 *)non_dma_mem;
@@ -307,7 +307,7 @@ tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags,
ctlr->arch_id = TWA_ARCH_ID(device_id);
ctlr->flags = flags;
ctlr->sg_size_factor = TWA_SG_ELEMENT_SIZE_FACTOR(device_id);
- ctlr->max_simult_reqs = max_simult_reqs + 1;
+ ctlr->max_simult_reqs = max_simult_reqs;
ctlr->max_aens_supported = max_aens;
/* Initialize queues of CL internal request context packets. */
@@ -321,55 +321,23 @@ tw_cl_init_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags,
tw_osl_init_lock(ctlr_handle, "tw_cl_gen_lock", ctlr->gen_lock);
ctlr->io_lock = &(ctlr->io_lock_handle);
tw_osl_init_lock(ctlr_handle, "tw_cl_io_lock", ctlr->io_lock);
- /*
- * If 64 bit cmd pkt addresses are used, we will need to serialize
- * writes to the hardware (across registers), since existing (G66)
- * hardware will get confused if, for example, we wrote the low 32 bits
- * of the cmd pkt address, followed by a response interrupt mask to the
- * control register, followed by the high 32 bits of the cmd pkt
- * address. It will then interpret the value written to the control
- * register as the low cmd pkt address. So, for this case, we will
- * make a note that we will need to synchronize control register writes
- * with command register writes.
- */
- if ((ctlr->flags & TW_CL_64BIT_ADDRESSES) &&
- ((ctlr->device_id == TW_CL_DEVICE_ID_9K) ||
- (ctlr->device_id == TW_CL_DEVICE_ID_9K_X) ||
- (ctlr->device_id == TW_CL_DEVICE_ID_9K_E) ||
- (ctlr->device_id == TW_CL_DEVICE_ID_9K_SA))) {
- ctlr->state |= TW_CLI_CTLR_STATE_G66_WORKAROUND_NEEDED;
- ctlr->intr_lock = ctlr->io_lock;
- } else {
- ctlr->intr_lock = &(ctlr->intr_lock_handle);
- tw_osl_init_lock(ctlr_handle, "tw_cl_intr_lock",
- ctlr->intr_lock);
- }
/* Initialize CL internal request context packets. */
ctlr->req_ctxt_buf = (struct tw_cli_req_context *)free_non_dma_mem;
free_non_dma_mem += (sizeof(struct tw_cli_req_context) *
- (
- max_simult_reqs +
- 1));
+ max_simult_reqs);
ctlr->cmd_pkt_buf = (struct tw_cl_command_packet *)dma_mem;
ctlr->cmd_pkt_phys = dma_mem_phys;
ctlr->internal_req_data = (TW_UINT8 *)
(ctlr->cmd_pkt_buf +
- (
- max_simult_reqs +
- 1));
+ max_simult_reqs);
ctlr->internal_req_data_phys = ctlr->cmd_pkt_phys +
(sizeof(struct tw_cl_command_packet) *
- (
- max_simult_reqs +
- 1));
-
- for (i = 0;
- i < (
- max_simult_reqs +
- 1); i++) {
+ max_simult_reqs);
+
+ for (i = 0; i < max_simult_reqs; i++) {
req = &(ctlr->req_ctxt_buf[i]);
req->cmd_pkt = &(ctlr->cmd_pkt_buf[i]);
@@ -421,8 +389,8 @@ start_ctlr:
/* Notify some info about the controller to the OSL. */
tw_cli_notify_ctlr_info(ctlr);
- /* Mark the controller as active. */
- ctlr->state |= TW_CLI_CTLR_STATE_ACTIVE;
+ /* Mark the controller active. */
+ ctlr->active = TW_CL_TRUE;
return(error);
}
@@ -597,7 +565,7 @@ tw_cl_shutdown_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags)
* Mark the controller as inactive, disable any further interrupts,
* and notify the controller that we are going down.
*/
- ctlr->state &= ~TW_CLI_CTLR_STATE_ACTIVE;
+ ctlr->active = TW_CL_FALSE;
tw_cli_disable_interrupts(ctlr);
@@ -617,8 +585,6 @@ tw_cl_shutdown_ctlr(struct tw_cl_ctlr_handle *ctlr_handle, TW_UINT32 flags)
/* Destroy all locks used by CL. */
tw_osl_destroy_lock(ctlr_handle, ctlr->gen_lock);
tw_osl_destroy_lock(ctlr_handle, ctlr->io_lock);
- if (!(ctlr->flags & TW_CL_64BIT_ADDRESSES))
- tw_osl_destroy_lock(ctlr_handle, ctlr->intr_lock);
ret:
return(error);
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