Add PC-Card/ISA SCSI host adpater drivers from NetBSD/pc98

(a NetBSD port for NEC PC-98x1 machines). They are ncv for NCR 53C500,
nsp for Workbit Ninja SCSI-3, and stg for TMC 18C30 and 18C50.

I thank NetBSD/pc98 and bsd-nomads people.

Obtained from:	NetBSD/pc98

5 files changed, 2158 insertions, 0 deletions

diff --git a/sys/dev/stg/tmc18c30.c b/sys/dev/stg/tmc18c30.c
new file mode 100644
index 0000000..dbfe567
--- /dev/null
+++ b/sys/dev/stg/tmc18c30.c
@@ -0,0 +1,1218 @@
+/*	$FreeBSD$	*/
+/*	$NecBSD: tmc18c30.c,v 1.28 1999/07/23 21:00:06 honda Exp $	*/
+/*	$NetBSD$	*/
+
+#define	STG_DEBUG
+#define	STG_STATICS
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998, 1999
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998, 1999
+ *	Naofumi HONDA. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998, 1999
+ *	Kouichi Matsuda. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+#include "opt_ddb.h"
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/disklabel.h>
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500001
+#include <sys/bio.h>
+#endif
+#include <sys/buf.h>
+#include <sys/queue.h>
+#include <sys/malloc.h>
+#include <sys/device_port.h>
+#include <sys/errno.h>
+
+#include <vm/vm.h>
+
+#ifdef __NetBSD__
+#include <machine/bus.h>
+#include <machine/intr.h>
+
+#include <dev/scsipi/scsi_all.h>
+#include <dev/scsipi/scsipi_all.h>
+#include <dev/scsipi/scsiconf.h>
+#include <dev/scsipi/scsi_disk.h>
+
+#include <machine/dvcfg.h>
+#include <machine/physio_proc.h>
+
+#include <i386/Cbus/dev/scsi_low.h>
+#include <i386/Cbus/dev/tmc18c30reg.h>
+#include <i386/Cbus/dev/tmc18c30var.h>
+#endif /* __NetBSD__ */
+
+#ifdef __FreeBSD__
+#include <machine/clock.h>
+#define delay(time) DELAY(time)
+
+#include <machine/cpu.h>
+#include <machine/bus_pio.h>
+#include <machine/bus.h>
+
+#include <machine/dvcfg.h>
+#include <machine/physio_proc.h>
+
+#include <cam/scsi/scsi_low.h>
+#include <dev/stg/tmc18c30reg.h>
+#include <dev/stg/tmc18c30var.h>
+
+#if __FreeBSD_version < 400001
+#include "stg.h"
+struct	stg_softc *stgdata[NSTG];
+#endif
+#endif /* __FreeBSD__ */
+
+/***************************************************
+ * USER SETTINGS
+ ***************************************************/
+/* DEVICE CONFIGURATION FLAGS (MINOR)
+ *
+ * 0x01   DISCONECT OFF
+ * 0x02   PARITY LINE OFF
+ * 0x04   IDENTIFY MSG OFF ( = single lun)
+ * 0x08   SYNC TRANSFER OFF
+ */
+/* #define	STG_SYNC_SUPPORT */	/* NOT YET but easy */
+
+/* For the 512 fifo type: change below */
+#define	TMC18C30_FIFOSZ	0x800
+#define	TMC18C30_FCB	1
+
+#define	TMC18C50_FIFOSZ	0x2000
+#define	TMC18C50_FCB	2
+
+/***************************************************
+ * PARAMS
+ ***************************************************/
+#define	STG_NTARGETS	8
+#define	STG_NLUNS	8
+
+/***************************************************
+ * DEBUG
+ ***************************************************/
+#ifndef DDB
+#define Debugger() panic("should call debugger here (tmc18c30.c)")
+#else /* ! DDB */
+#ifdef __FreeBSD__
+#define Debugger() Debugger("stg")
+#endif /* __FreeBSD__ */
+#endif
+
+#ifdef	STG_DEBUG
+int stg_debug;
+#endif	/* STG_DEBUG */
+
+#ifdef	STG_STATICS
+struct stg_statics {
+	int disconnect;
+	int reselect;
+	int sprious_arbit_fail_0;
+	int sprious_arbit_fail_1;
+	int sprious_arbit_fail_2;
+} stg_statics[STG_NTARGETS];
+#endif	/* STG_STATICS */
+
+/***************************************************
+ * ISA DEVICE STRUCTURE
+ ***************************************************/
+extern struct cfdriver stg_cd;
+
+/**************************************************************
+ * DECLARE
+ **************************************************************/
+/* static */
+static void stg_pio_read __P((struct stg_softc *, struct targ_info *));
+static void stg_pio_write __P((struct stg_softc *, struct targ_info *));
+static int stg_xfer __P((struct stg_softc *, u_int8_t *, int, int));
+static int stg_msg __P((struct stg_softc *, struct targ_info *, u_int));
+static int stg_reselected __P((struct stg_softc *));
+static __inline int stg_disconnected __P((struct stg_softc *, struct targ_info *));
+static __inline void stg_pdma_end __P((struct stg_softc *, struct targ_info *));
+static int stghw_select_targ_wait __P((struct stg_softc *, int));
+static int stghw_check __P((struct stg_softc *));
+static void stghw_init __P((struct stg_softc *));
+static int stg_negate_signal __P((struct stg_softc *, u_int8_t, u_char *));
+static int stg_expect_signal __P((struct stg_softc *, u_int8_t, u_int8_t));
+static int stg_world_start __P((struct stg_softc *, int));
+static int stghw_start_selection __P((struct stg_softc *sc, struct slccb *));
+static void stghw_bus_reset __P((struct stg_softc *));
+static void stghw_attention __P((struct stg_softc *));
+static int stg_nexus __P((struct stg_softc *, struct targ_info *));
+static int stg_lun_init __P((struct stg_softc *, struct targ_info *, struct lun_info *));
+static __inline void stghw_bcr_write_1 __P((struct stg_softc *, u_int8_t));
+static void settimeout __P((void *));
+
+struct scsi_low_funcs stgfuncs = {
+	SC_LOW_INIT_T stg_world_start,
+	SC_LOW_BUSRST_T stghw_bus_reset,
+	SC_LOW_LUN_INIT_T stg_lun_init,
+
+	SC_LOW_SELECT_T stghw_start_selection,
+	SC_LOW_NEXUS_T stg_nexus,
+
+	SC_LOW_ATTEN_T stghw_attention,
+	SC_LOW_MSG_T stg_msg,
+
+	SC_LOW_POLL_T stgintr,
+
+	NULL,
+};
+
+/****************************************************
+ * hwfuncs
+ ****************************************************/
+static int
+stghw_check(sc)
+	struct stg_softc *sc;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	u_int16_t lsb, msb;
+
+	sc->sc_chip = TMCCHIP_UNK;
+	sc->sc_fsz = TMC18C50_FIFOSZ;
+	sc->sc_fcb = TMC18C50_FCB;
+	sc->sc_fcsp = 0;
+
+	sc->sc_fcRinit = FCTL_INTEN;
+	sc->sc_fcWinit = FCTL_PARENB | FCTL_INTEN;
+
+	if (slp->sl_cfgflags & CFG_NOATTEN)
+		sc->sc_imsg = 0;
+	else
+		sc->sc_imsg = BCTL_ATN;
+	sc->sc_busc = BCTL_BUSEN;
+
+	lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
+	msb = bus_space_read_1(iot, ioh, tmc_idmsb);
+	switch (msb << 8 | lsb)
+	{
+		case 0x6127:
+			/* TMCCHIP_1800 not supported. (it's my policy) */
+			sc->sc_chip = TMCCHIP_1800;
+			return EINVAL;
+
+		case 0x60e9:
+			sc->sc_chip = TMCCHIP_18C50;
+			sc->sc_fcsp |= FCTL_CLRINT;
+			if (bus_space_read_1(iot, ioh, tmc_cfg2) & 0x02)
+			{
+				sc->sc_chip = TMCCHIP_18C30;
+				sc->sc_fsz = TMC18C30_FIFOSZ;
+				sc->sc_fcb = TMC18C30_FCB;
+			}
+			break;
+
+		default:
+			return ENODEV;
+	}
+
+	sc->sc_icinit = ICTL_ALLINT | sc->sc_fcb;
+	return 0;
+}
+
+static void
+stghw_init(sc)
+	struct stg_softc *sc;
+{
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+
+	bus_space_write_1(iot, ioh, tmc_ictl, 0);
+	stghw_bcr_write_1(sc, BCTL_BUSFREE);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcsp | sc->sc_fcRinit |
+					  FCTL_CLRFIFO);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+	bus_space_write_1(iot, ioh, tmc_ictl, sc->sc_icinit);
+
+	bus_space_write_1(iot, ioh, tmc_ssctl, 0);
+}
+
+static int
+stg_lun_init(sc, ti, li)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+	struct lun_info *li;
+{
+	struct stg_lun_info *sli = (void *) li;
+
+	li->li_maxsynch.period = 0;
+	li->li_maxsynch.offset = 8;
+	sli->sli_reg_synch = 0;
+	return 0;
+}	
+
+/****************************************************
+ * scsi low interface
+ ****************************************************/
+static __inline void 
+stghw_bcr_write_1(sc, bcv)
+	struct stg_softc *sc;
+	u_int8_t bcv;
+{
+
+	bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, bcv);
+	sc->sc_busimg = bcv;
+}
+
+static void
+stghw_attention(sc)
+	struct stg_softc *sc;
+{
+
+	sc->sc_busc |= BCTL_ATN;
+	sc->sc_busimg |= BCTL_ATN;
+	bus_space_write_1(sc->sc_iot, sc->sc_ioh, tmc_bctl, sc->sc_busimg);
+}
+
+static void
+stghw_bus_reset(sc)
+	struct stg_softc *sc;
+{
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+
+	bus_space_write_1(iot, ioh, tmc_ictl, 0);
+	bus_space_write_1(iot, ioh, tmc_fctl, 0);
+	stghw_bcr_write_1(sc, BCTL_RST);
+	delay(100000);
+	stghw_bcr_write_1(sc, BCTL_BUSFREE);
+}
+
+static int
+stghw_start_selection(sc, cb)
+	struct stg_softc *sc;
+	struct slccb *cb;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct targ_info *ti = cb->ti;
+	struct lun_info *li = ti->ti_li;
+	register u_int8_t stat;
+	int s;
+
+	if (li->li_flags & SCSI_LOW_NOPARITY)
+		sc->sc_fcRinit &= ~FCTL_PARENB;
+	else
+		sc->sc_fcRinit |= FCTL_PARENB;
+
+	stghw_bcr_write_1(sc, BCTL_BUSFREE);
+
+	s = splhigh();
+	if (slp->sl_disc > 0)
+	{
+		stat = bus_space_read_1(iot, ioh, tmc_bstat);
+		if (stat & (BSTAT_BSY | BSTAT_SEL | BSTAT_IO))
+		{
+			splx(s);
+			return SCSI_LOW_START_FAIL;
+		}
+	}
+
+	bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_ARBIT);
+	splx(s);
+
+	SCSI_LOW_SETUP_PHASE(ti, PH_ARBSTART);
+	return SCSI_LOW_START_OK;
+}
+
+static int
+stg_world_start(sc, fdone)
+	struct stg_softc *sc;
+	int fdone;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	int error;
+	intrmask_t s;
+
+	if ((error = stghw_check(sc)) != 0)
+		return error;
+
+	s = splcam();
+	stghw_init(sc);
+	scsi_low_bus_reset(slp);
+	stghw_init(sc);
+	splx(s);
+
+	SOFT_INTR_REQUIRED(slp);
+	return 0;
+}
+
+static int
+stg_msg(sc, ti, msg)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+	u_int msg;
+{
+	struct lun_info *li = ti->ti_li;
+	struct stg_lun_info *sli = (void *) li;
+	u_int period, offset;
+
+	if (msg != SCSI_LOW_MSG_SYNCH)
+		return EINVAL;
+
+ 	period = li->li_maxsynch.period;
+	offset = li->li_maxsynch.offset;
+	period = period << 2;
+	if (period >= 200)
+	{
+		sli->sli_reg_synch = (period - 200) / 50;
+		if (period % 50)
+			sli->sli_reg_synch ++;
+		sli->sli_reg_synch |= SSCTL_SYNCHEN;
+	}
+	else if (period >= 100)
+	{
+		sli->sli_reg_synch = (period - 100) / 50;
+		if (period % 50)
+			sli->sli_reg_synch ++;
+		sli->sli_reg_synch |= SSCTL_SYNCHEN | SSCTL_FSYNCHEN;
+	}
+	return 0;
+}
+
+/**************************************************************
+ * General probe attach
+ **************************************************************/
+int
+stgprobesubr(iot, ioh, dvcfg)
+	bus_space_tag_t iot;
+	bus_space_handle_t ioh;
+	u_int dvcfg;
+{
+	u_int16_t lsb, msb;
+
+	lsb = bus_space_read_1(iot, ioh, tmc_idlsb);
+	msb = bus_space_read_1(iot, ioh, tmc_idmsb);
+	switch (msb << 8 | lsb)
+	{
+		default:
+			return 0;
+		case 0x6127:
+			/* not support! */
+			return 0;
+		case 0x60e9:
+			return 1;
+	}
+	return 0;
+}
+
+int
+stgprint(aux, name)
+	void *aux;
+	const char *name;
+{
+
+	if (name != NULL)
+		printf("%s: scsibus ", name);
+	return UNCONF;
+}
+
+void
+stgattachsubr(sc)
+	struct stg_softc *sc;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+
+	printf("\n");
+
+	sc->sc_idbit = (1 << slp->sl_hostid); 
+	slp->sl_funcs = &stgfuncs;
+
+	slp->sl_cfgflags |= CFG_ASYNC;	/* XXX */
+
+	if (stghw_check(sc) != 0)
+	{
+		printf("stg: hardware missing\n");
+		return;
+	}
+
+	(void) scsi_low_attach(slp, 2, STG_NTARGETS, STG_NLUNS,
+				sizeof(struct stg_lun_info));
+}
+
+/**************************************************************
+ * PDMA functions
+ **************************************************************/
+static __inline void
+stg_pdma_end(sc, ti)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct slccb *cb = ti->ti_nexus;
+	u_int len, tres;
+
+	slp->sl_flags &= ~HW_PDMASTART;
+
+	if (ti->ti_phase == PH_DATA)
+	{
+		len = bus_space_read_2(iot, ioh, tmc_fdcnt);
+		if (slp->sl_scp.scp_direction == SCSI_LOW_WRITE)
+		{
+			if (len != 0)
+			{
+				tres = len + slp->sl_scp.scp_datalen;
+				if (tres <= (u_int) cb->ccb_scp.scp_datalen)
+				{
+					slp->sl_scp.scp_data -= len;
+					slp->sl_scp.scp_datalen = tres;
+				}
+				else
+				{
+					slp->sl_error |= PDMAERR;
+					printf("%s len %x >= datalen %x\n",
+						slp->sl_xname,
+						len, slp->sl_scp.scp_datalen);
+				}
+			}
+		}
+		else if (slp->sl_scp.scp_direction == SCSI_LOW_READ)
+		{
+			if (len != 0)
+			{
+				slp->sl_error |= PDMAERR;
+				printf("%s: len %x left in fifo\n",
+					slp->sl_xname, len);
+			}
+		}
+	}
+	else
+	{
+
+		printf("%s data phase miss\n", slp->sl_xname);
+		slp->sl_error |= PDMAERR;
+	}
+
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+}
+
+static void
+stg_pio_read(sc, ti)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct sc_p *sp = &slp->sl_scp;
+	int s;
+	int tout = 0;
+#ifdef __FreeBSD__
+	struct callout_handle ch;
+#endif
+	u_int res;
+	u_int8_t stat;
+
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_FIFOEN);
+
+	slp->sl_flags |= HW_PDMASTART;
+#ifdef __FreeBSD__
+	ch = timeout(settimeout, &tout, 2 * hz);
+#else
+	timeout(settimeout, &tout, 2 * hz);
+#endif
+	while (sp->scp_datalen > 0 && tout == 0)
+	{
+		res = bus_space_read_2(iot, ioh, tmc_fdcnt);
+		if (res == 0)
+		{
+			stat = bus_space_read_1(iot, ioh, tmc_bstat);
+			if ((stat & BSTAT_PHMASK) == BSTAT_IO)
+				continue;
+			break; /* phase mismatch */
+		}
+
+		/* XXX */
+		if (res > sp->scp_datalen)
+		{
+			slp->sl_error |= PDMAERR;
+			break;
+		}
+
+		sp->scp_datalen -= res;
+		if (res & 1)
+		{
+			*sp->scp_data = bus_space_read_1(iot, ioh, tmc_rfifo);
+			sp->scp_data ++;
+			res --;
+		}
+
+		bus_space_read_multi_2(iot, ioh, tmc_rfifo,
+				       (u_int16_t *) sp->scp_data, res >> 1);
+		sp->scp_data += res;
+	}
+
+	s = splhigh();
+	if (tout == 0) {
+#ifdef __FreeBSD__
+		untimeout(settimeout, &tout, ch);
+#else
+		untimeout(settimeout, &tout);
+#endif
+		splx(s);
+	} else {
+		splx(s);
+		printf("%s pio read timeout\n", slp->sl_xname);
+	}
+}
+
+#define	WFIFO_CRIT	0x100
+
+static void
+stg_pio_write(sc, ti)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct sc_p *sp = &slp->sl_scp;
+	u_int res;
+	int s;
+	int tout = 0;
+	register u_int8_t stat;
+#ifdef __FreeBSD__
+	struct callout_handle ch;
+#endif
+
+	stat = sc->sc_fcWinit | FCTL_FIFOEN | FCTL_FIFOW;
+	bus_space_write_1(iot, ioh, tmc_fctl, stat | FCTL_CLRFIFO);
+	bus_space_write_1(iot, ioh, tmc_fctl, stat);
+
+	slp->sl_flags |= HW_PDMASTART;
+#ifdef __FreeBSD__
+	ch = timeout(settimeout, &tout, 2 * hz);
+#else
+	timeout(settimeout, &tout, 2 * hz);
+#endif
+	while (sp->scp_datalen > 0 && tout == 0)
+	{
+		stat = bus_space_read_1(iot, ioh, tmc_bstat);
+		if ((stat & BSTAT_PHMASK) != 0)
+			break;
+
+		if (bus_space_read_2(iot, ioh, tmc_fdcnt) >= WFIFO_CRIT)
+			continue;
+
+		res = (sp->scp_datalen > WFIFO_CRIT) ?
+			WFIFO_CRIT : sp->scp_datalen;
+		sp->scp_datalen -= res;
+		if ((res & 0x1) != 0)
+		{
+			bus_space_write_1(iot, ioh, tmc_wfifo, *sp->scp_data);
+			sp->scp_data ++;
+			res --;
+		}
+
+		bus_space_write_multi_2(iot, ioh, tmc_wfifo, 
+					(u_int16_t *) sp->scp_data, res >> 1);
+		sp->scp_data += res;
+	}
+
+	s = splhigh();
+	if (tout == 0) {
+#ifdef __FreeBSD__
+		untimeout(settimeout, &tout, ch);
+#else
+		untimeout(settimeout, &tout);
+#endif
+		splx(s);
+	} else {
+		splx(s);
+		printf("%s pio write timeout\n", slp->sl_xname);
+	}
+}
+
+static int
+stg_negate_signal(sc, mask, s)
+	struct stg_softc *sc;
+	u_int8_t mask;
+	u_char *s;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t bst = sc->sc_iot;
+	bus_space_handle_t bsh = sc->sc_ioh;
+	int s;
+	int tout = 0;
+#ifdef __FreeBSD__
+	struct callout_handle ch;
+#endif
+	u_int8_t regv;
+
+#ifdef __FreeBSD__
+	ch = timeout(settimeout, &tout, 2 * hz);
+#else
+	timeout(settimeout, &tout, 2 * hz);
+#endif
+	do 
+	{
+		regv = bus_space_read_1(bst, bsh, tmc_bstat);
+		if (regv == 0xff) {
+			s = splhigh();
+			if (tout == 0) {
+#ifdef __FreeBSD__
+				untimeout(settimeout, &tout, ch);
+#else
+				untimeout(settimeout, &tout);
+#endif
+			}
+			splx(s);
+			return EIO;
+		}
+	}
+	while ((regv & mask) != 0 && tout == 0);
+
+	s = splhigh();
+	if (tout == 0) {
+#ifdef __FreeBSD__
+		untimeout(settimeout, &tout, ch);
+#else
+		untimeout(settimeout, &tout);
+#endif
+		splx(s);
+	} else {
+		splx(s);
+		printf("%s: %s singal off timeout \n", slp->sl_xname, s);
+		return EIO;
+	}
+	return 0;
+}
+
+static void
+settimeout(arg)
+	void *arg;
+{
+	int *tout = arg;
+
+	*tout = 1;
+}
+
+static int
+stg_expect_signal(sc, phase, mask)
+	struct stg_softc *sc;
+	u_int8_t phase, mask;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t bst = sc->sc_iot;
+	bus_space_handle_t bsh = sc->sc_ioh;
+	int rv = -1;
+	int s;
+	int tout = 0;
+#ifdef __FreeBSD__
+	struct callout_handle ch;
+#endif
+	u_int8_t ph;
+
+	phase &= BSTAT_PHMASK;
+#ifdef __FreeBSD__
+	ch = timeout(settimeout, &tout, hz/2);
+#else
+	timeout(settimeout, &tout, hz/2);
+#endif
+	do 
+	{
+		ph = bus_space_read_1(bst, bsh, tmc_bstat);
+		if (ph == 0xff) {
+			rv = -1;
+			break;
+		}
+		if ((ph & BSTAT_PHMASK) != phase) {
+			rv = 0;
+			break;
+		}
+		if ((ph & mask) != 0) {
+			rv = 1;
+			break;
+		}
+	}
+	while (tout == 0);
+
+	s = splhigh();
+	if (tout == 0) {
+#ifdef __FreeBSD__
+		untimeout(settimeout, &tout, ch);
+#else
+		untimeout(settimeout, &tout);
+#endif
+		splx(s);
+	} else {
+		splx(s);
+		printf("%s: stg_expect_signal timeout\n", slp->sl_xname);
+		rv = -1;
+	}
+	return rv;
+}
+
+static int
+stg_xfer(sc, buf, len, phase)
+	struct stg_softc *sc;
+	u_int8_t *buf;
+	int len;
+	int phase;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	int rv, ptr, atn;
+
+	atn = (scsi_low_is_msgout_continue(slp->sl_nexus) != 0);
+	if (phase & BSTAT_IO)
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+	else
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
+
+	for (ptr = 0; len > 0; len --)
+	{
+		rv = stg_expect_signal(sc, phase, BSTAT_REQ);
+		if (rv <= 0)
+			goto bad;
+
+		if (len == 1 && atn == 0)
+		{
+			sc->sc_busc &= ~BCTL_ATN;
+			stghw_bcr_write_1(sc, sc->sc_busc);
+		}
+
+		if (phase & BSTAT_IO)
+		{
+			buf[ptr ++] = bus_space_read_1(iot, ioh, tmc_rdata);
+		}
+		else
+		{
+			bus_space_write_1(iot, ioh, tmc_wdata, buf[ptr ++]);
+		}
+		stg_negate_signal(sc, BSTAT_ACK, "xfer<ACK>");
+	}
+
+bad:
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+	return len;
+}
+
+/**************************************************************
+ * disconnect & reselect (HW low)
+ **************************************************************/
+static int
+stg_reselected(sc)
+	struct stg_softc *sc;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct targ_info *ti;
+	u_int sid;
+
+	if (slp->sl_selid != NULL)
+	{
+		/* XXX:
+		 * Selection vs Reselection conflicts.
+		 */
+#ifdef	STG_STATICS
+		stg_statics[slp->sl_selid->ti_id].sprious_arbit_fail_0 ++;
+#endif	/* STG_STATICS */
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+		stghw_bcr_write_1(sc, BCTL_BUSFREE);
+	}
+
+	/* XXX:
+	 * We should ack the reselection as soon as possible,
+	 * becuase the target would abort the current reselection seq 
+  	 * due to reselection timeout.
+	 */
+	sid = (u_int) bus_space_read_1(iot, ioh, tmc_scsiid);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcsp |
+				    sc->sc_fcRinit | FCTL_CLRFIFO);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+	stghw_bcr_write_1(sc, sc->sc_busc | BCTL_BSY);
+
+	sid &= ~sc->sc_idbit;
+	sid = ffs(sid) - 1;
+	if ((ti = scsi_low_reselected(slp, sid)) == NULL)
+		return EJUSTRETURN;
+
+#ifdef	STG_STATICS
+	stg_statics[sid].reselect ++;
+#endif	/* STG_STATICS */
+	return EJUSTRETURN;
+}
+
+static __inline int
+stg_disconnected(sc, ti)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+{
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+
+	/* clear bus status & fifo */
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+	stghw_bcr_write_1(sc, BCTL_BUSFREE);
+	sc->sc_fcRinit &= ~FCTL_PARENB;
+	sc->sc_busc &= ~BCTL_ATN;
+
+#ifdef	STG_STATICS
+	if (slp->sl_msgphase == MSGPH_DISC)
+		stg_statics[ti->ti_id].disconnect ++;
+#endif	/* STG_STATICS */
+	scsi_low_disconnected(slp, ti);
+	return 1;
+}
+
+/**************************************************************
+ * SEQUENCER
+ **************************************************************/
+static int
+stg_nexus(sc, ti)
+	struct stg_softc *sc;
+	struct targ_info *ti;
+{
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct lun_info *li = ti->ti_li;
+	struct stg_lun_info *sli = (void *) ti->ti_li;
+
+	if (li->li_flags & SCSI_LOW_NOPARITY)
+		sc->sc_fcRinit &= ~FCTL_PARENB;
+	else
+		sc->sc_fcRinit |= FCTL_PARENB;
+
+	bus_space_write_1(iot, ioh, tmc_ssctl, sli->sli_reg_synch);
+	return 0;
+}
+
+static int
+stghw_select_targ_wait(sc, id)
+	struct stg_softc *sc;
+	int id;
+{
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	int wc, error = EIO;
+
+	bus_space_write_1(iot, ioh, tmc_scsiid, sc->sc_idbit | (1 << id));
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit & (~FCTL_INTEN));
+	stghw_bcr_write_1(sc, sc->sc_busc | sc->sc_imsg | BCTL_SEL);
+
+	for (wc = 50000; wc; wc--)
+	{
+		if (bus_space_read_1(iot, ioh, tmc_bstat) & BSTAT_BSY)
+		{
+			error = 0;
+			break;
+		}
+
+		delay(1);
+	}
+
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit | FCTL_CLRFIFO);
+	bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+	return error;
+}
+
+int
+stgintr(arg)
+	void *arg;
+{
+	struct stg_softc *sc = arg;
+	struct scsi_low_softc *slp = &sc->sc_sclow;
+	bus_space_tag_t iot = sc->sc_iot;
+	bus_space_handle_t ioh = sc->sc_ioh;
+	struct targ_info *ti;
+	struct physio_proc *pp;
+	struct buf *bp;
+	int len;
+	u_int8_t status, astatus, regv;
+
+	/*******************************************
+	 * interrupt check
+	 *******************************************/
+	if (slp->sl_flags & HW_INACTIVE)
+		return 0;
+
+	astatus = bus_space_read_1(iot, ioh, tmc_astat);
+	status = bus_space_read_1(iot, ioh, tmc_bstat);
+
+	if ((astatus & ASTAT_STATMASK) == 0)
+		return 0;
+
+	if (astatus & ASTAT_SCSIRST)
+	{
+		bus_space_write_1(iot, ioh, tmc_fctl,
+				  sc->sc_fcRinit | FCTL_CLRFIFO);
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+
+		scsi_low_restart(slp, SCSI_LOW_RESTART_SOFT, 
+				 "bus reset (power off?)");
+		return 1;
+	}
+
+	/*******************************************
+	 * debug section
+	 *******************************************/
+#ifdef	STG_DEBUG
+	if (stg_debug)
+	{
+		scsi_low_print(slp, NULL);
+		printf("%s st %x ist %x\n\n", slp->sl_xname,
+		       status, astatus);
+		if (stg_debug > 1)
+			Debugger();
+	}
+#endif	/* STG_DEBUG */
+
+	/*******************************************
+	 * reselection & nexus
+	 *******************************************/
+	if ((status & RESEL_PHASE_MASK)== PHASE_RESELECTED)
+	{
+		if (stg_reselected(sc) == EJUSTRETURN)
+			return 1;
+	}
+
+	if ((ti = slp->sl_nexus) == NULL)
+	{
+		status = bus_space_read_1(iot, ioh, tmc_bstat);
+		if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
+			return 1;
+
+		/* XXX:
+		 * Some scsi devices overrun scsi phase.
+		 */
+		if (stg_reselected(sc) == EJUSTRETURN)
+		{
+#ifdef	STG_STATICS
+			if ((ti = slp->sl_nexus) != NULL)
+				stg_statics[ti->ti_id].sprious_arbit_fail_1 ++;
+#endif	/* STG_STATICS */
+			return 1;
+		}
+	}
+
+	if ((astatus & ASTAT_PARERR) != 0 && ti->ti_phase != PH_ARBSTART &&
+	    (sc->sc_fcRinit & FCTL_PARENB) != 0)
+	{
+		slp->sl_error |= PARITYERR;
+		if (ti->ti_phase == PH_MSGIN)
+			scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_PARITY, 1);
+		else
+			scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ERROR, 1);
+	}
+
+	/*******************************************
+	 * aribitration & selection
+	 *******************************************/
+	switch (ti->ti_phase)
+	{
+	case PH_ARBSTART:
+		if ((astatus & ASTAT_ARBIT) == 0)
+			goto arb_fail;
+
+		status = bus_space_read_1(iot, ioh, tmc_bstat);
+		if ((status & BSTAT_IO) != 0)
+		{
+			/* XXX:
+			 * Selection vs Reselection conflicts.
+			 */
+#ifdef	STG_STATICS
+			stg_statics[ti->ti_id].sprious_arbit_fail_2 ++;
+#endif	/* STG_STATICS */
+arb_fail:
+			bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+			stghw_bcr_write_1(sc, BCTL_BUSFREE);
+			SCSI_LOW_SETUP_PHASE(ti, PH_NULL);
+			scsi_low_clear_nexus(slp, ti);
+			return 1;
+		}
+
+		/*
+		 * selection assert start.
+		 */
+		SCSI_LOW_SETUP_PHASE(ti, PH_SELSTART);
+		scsi_low_arbit_win(slp, ti);
+#ifdef	STG_ALT_SELECTION
+		bus_space_write_1(iot, ioh, tmc_scsiid,
+				  sc->sc_idbit | (1 << ti->ti_id));
+		/* assert busy */
+		stghw_bcr_write_1(sc, sc->sc_imsg | BCTL_BSY | sc->sc_busc);
+		/* arb flag clear */
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
+		/* assert sel */
+		stghw_bcr_write_1(sc, sc->sc_imsg | BCTL_BSY | sc->sc_busc | BCTL_SEL);
+		delay(3);
+		/* deassert busy */
+		stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
+#else	/* !STG_ALT_SELECTION */
+		bus_space_write_1(iot, ioh, tmc_scsiid,
+				  sc->sc_idbit | (1 << ti->ti_id));
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcWinit);
+		stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc | BCTL_SEL);
+#endif	/* !STG_ALT_SELECTION */
+		return 1;
+
+	case PH_SELSTART:
+		if ((status & BSTAT_BSY) == 0)
+		{
+			if (stghw_select_targ_wait(sc, ti->ti_id) != 0)
+			{
+				return stg_disconnected(sc, ti);
+			}
+		}
+
+		/*
+		 * attention assert.
+		 */
+		SCSI_LOW_SETUP_PHASE(ti, PH_SELECTED);
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit |
+				  FCTL_CLRFIFO);
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+		stghw_bcr_write_1(sc, sc->sc_imsg | sc->sc_busc);
+		SCSI_LOW_TARGET_ASSERT_ATN(ti);
+		scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_IDENTIFY, 0);
+		return 1;
+
+	case PH_RESEL:
+		/* clear a busy line */
+		bus_space_write_1(iot, ioh, tmc_fctl, sc->sc_fcRinit);
+		stghw_bcr_write_1(sc, sc->sc_busc);
+		if ((status & PHASE_MASK) != MESSAGE_IN_PHASE)
+		{
+			scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_ABORT, 1);
+			return 1;
+		}
+		break;
+	}
+
+	/*******************************************
+	 * scsi seq
+	 *******************************************/
+	if (slp->sl_flags & HW_PDMASTART)
+		stg_pdma_end(sc, ti);
+
+	switch (status & PHASE_MASK)
+	{
+	case COMMAND_PHASE:
+		SCSI_LOW_SETUP_PHASE(ti, PH_CMD);
+		if (scsi_low_cmd(slp, ti) != 0)
+			break;
+
+		if (stg_xfer(sc, slp->sl_scp.scp_cmd,
+		   	     slp->sl_scp.scp_cmdlen, COMMAND_PHASE) != 0)
+		{
+			printf("%s: MSGOUT short\n", slp->sl_xname);
+			scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_RESET, 0);
+		}
+		break;
+
+	case DATA_OUT_PHASE:
+		SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
+		if (scsi_low_data(slp, ti, &bp, SCSI_LOW_WRITE) != 0)
+			break;
+
+		pp = physio_proc_enter(bp);
+		stg_pio_write(sc, ti);
+		physio_proc_leave(pp);
+		break;
+
+	case DATA_IN_PHASE:
+		SCSI_LOW_SETUP_PHASE(ti, PH_DATA);
+		if (scsi_low_data(slp, ti, &bp, SCSI_LOW_READ) != 0)
+			break;
+
+		pp = physio_proc_enter(bp);
+		stg_pio_read(sc, ti);
+		physio_proc_leave(pp);
+		break;
+
+	case STATUS_PHASE:
+		SCSI_LOW_SETUP_PHASE(ti, PH_STAT);
+		ti->ti_status = bus_space_read_1(iot, ioh, tmc_rdata);
+		break;
+
+	case MESSAGE_OUT_PHASE:
+		SCSI_LOW_SETUP_PHASE(ti, PH_MSGOUT);
+		len = scsi_low_msgout(slp, ti);
+		if (stg_xfer(sc, ti->ti_msgoutstr, len, MESSAGE_OUT_PHASE))
+		{
+			scsi_low_assert_msg(slp, ti, SCSI_LOW_MSG_RESET, 0);
+			printf("%s: MSGOUT short\n", slp->sl_xname);
+		}
+		break;
+
+	case MESSAGE_IN_PHASE:
+		SCSI_LOW_SETUP_PHASE(ti, PH_MSGIN);
+
+		/* confirm REQ signal */
+		regv = stg_expect_signal(sc, MESSAGE_IN_PHASE, BSTAT_REQ);
+		if (regv <= 0)
+		{
+			printf("%s: MSGIN: no req\n", slp->sl_xname);
+			break;
+		}
+		/* read data with NOACK */
+		regv = bus_space_read_1(sc->sc_iot, sc->sc_ioh, tmc_sdna);
+
+		scsi_low_msgin(slp, ti, regv);
+
+		/* read data with ACK */
+		if (regv != bus_space_read_1(sc->sc_iot, sc->sc_ioh, tmc_rdata))
+		{
+			printf("%s: MSGIN: data mismatch\n", slp->sl_xname);
+		}
+
+		if (slp->sl_msgphase != 0)
+		{
+			stg_negate_signal(sc, BSTAT_ACK, "discon<ACK>");
+			return stg_disconnected(sc, ti);
+		}
+		break;
+
+	case BUSFREE_PHASE:
+		printf("%s unexpected disconnection\n", slp->sl_xname);
+		return stg_disconnected(sc, ti);
+
+	default:
+		printf("%s unknown phase bus %x intr %x\n",
+			slp->sl_xname, status, astatus);
+		break;
+	}
+
+	return 1;
+}
diff --git a/sys/dev/stg/tmc18c30_isa.c b/sys/dev/stg/tmc18c30_isa.c
new file mode 100644
index 0000000..83ab6a8
--- /dev/null
+++ b/sys/dev/stg/tmc18c30_isa.c
@@ -0,0 +1,298 @@
+/*	$FreeBSD$	*/
+/*	$NecBSD: tmc18c30_pisa.c,v 1.22 1998/11/26 01:59:21 honda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2000
+ *      Noriaki Mitsunaga, Mitsuru Iwasaki and Takanori Watanabe.
+ *      All rights reserved.
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Naofumi HONDA. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Kouichi Matsuda. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/bus.h>
+#include <sys/disklabel.h>
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500001
+#include <sys/bio.h>
+#endif
+#include <sys/buf.h>
+#include <sys/queue.h>
+#include <sys/malloc.h>
+#include <sys/errno.h>
+
+#include <vm/vm.h>
+
+#include <machine/bus_pio.h>
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <sys/rman.h>
+
+#include <isa/isavar.h>
+
+#include <machine/dvcfg.h>
+
+#include <sys/device_port.h>
+
+#include <cam/scsi/scsi_low.h>
+#include <isa/isa_common.h>
+#include <cam/scsi/scsi_low_pisa.h>
+
+#include <dev/stg/tmc18c30reg.h>
+#include <dev/stg/tmc18c30var.h>
+
+#define	STG_HOSTID	7
+
+#include	<sys/kernel.h>
+#include	<sys/module.h>
+#include	<sys/select.h>
+
+static	int	stgprobe(device_t devi);
+static	int	stgattach(device_t devi);
+
+static	void	stg_isa_unload	__P((device_t));
+
+static void
+stg_isa_intr(void * arg)
+{
+	stgintr(arg);
+}
+
+static void
+stg_release_resource(device_t dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+
+	if (sc->stg_intrhand) {
+		bus_teardown_intr(dev, sc->irq_res, sc->stg_intrhand);
+	}
+
+	if (sc->port_res) {
+		bus_release_resource(dev, SYS_RES_IOPORT,
+				     sc->port_rid, sc->port_res);
+	}
+
+	if (sc->irq_res) {
+		bus_release_resource(dev, SYS_RES_IRQ,
+				     sc->irq_rid, sc->irq_res);
+	}
+
+	if (sc->mem_res) {
+		bus_release_resource(dev, SYS_RES_MEMORY,
+				     sc->mem_rid, sc->mem_res);
+	}
+}
+
+static int
+stg_alloc_resource(device_t dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+	u_long			maddr, msize;
+	int			error;
+
+	sc->port_rid = 0;
+	sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
+					  0, ~0, STGIOSZ, RF_ACTIVE);
+	if (sc->port_res == NULL) {
+		stg_release_resource(dev);
+		return(ENOMEM);
+	}
+
+	sc->irq_rid = 0;
+	sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
+					 0, ~0, 1, RF_ACTIVE);
+	if (sc->irq_res == NULL) {
+		stg_release_resource(dev);
+		return(ENOMEM);
+	}
+
+	error = bus_get_resource(dev, SYS_RES_MEMORY, 0, &maddr, &msize);
+	if (error) {
+		return(0);      /* XXX */
+	}
+
+	/* no need to allocate memory if not configured */
+	if (maddr == 0 || msize == 0) {
+		return(0);
+	}
+
+	sc->mem_rid = 0;
+	sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->mem_rid,
+					 0, ~0, msize, RF_ACTIVE);
+	if (sc->mem_res == NULL) {
+		stg_release_resource(dev);
+		return(ENOMEM);
+	}
+
+	return(0);
+}
+
+static int
+stg_isa_probe(device_t dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+	int			error;
+
+	bzero(sc, sizeof(struct stg_softc));
+
+	error = stg_alloc_resource(dev);
+	if (error) {
+		return(error);
+	}
+
+	if (stgprobe(dev) == 0) {
+		stg_release_resource(dev);
+		return(ENXIO);
+	}
+
+	stg_release_resource(dev);
+
+	return(0);
+}
+
+static int
+stg_isa_attach(device_t dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+	int			error;
+
+	error = stg_alloc_resource(dev);
+	if (error) {
+		return(error);
+	}
+
+	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM,
+			       stg_isa_intr, (void *)sc, &sc->stg_intrhand);
+	if (error) {
+		stg_release_resource(dev);
+		return(error);
+	}
+
+	if (stgattach(dev) == 0) {
+		stg_release_resource(dev);
+		return(ENXIO);
+	}
+
+	return(0);
+}
+
+static	void
+stg_isa_detach(device_t dev)
+{
+	stg_isa_unload(dev);
+	stg_release_resource(dev);
+}
+
+static device_method_t stg_isa_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		stg_isa_probe),
+	DEVMETHOD(device_attach,	stg_isa_attach),
+	DEVMETHOD(device_detach,	stg_isa_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t stg_isa_driver = {
+	"stg",
+	stg_isa_methods,
+	sizeof(struct stg_softc),
+};
+
+static devclass_t stg_devclass;
+
+DRIVER_MODULE(stg, isa, stg_isa_driver, stg_devclass, 0, 0);
+
+static	void
+stg_isa_unload(device_t devi)
+{
+	struct stg_softc *sc = device_get_softc(devi);
+
+	printf("%s: unload\n",sc->sc_sclow.sl_xname);
+	scsi_low_deactivate((struct scsi_low_softc *)sc);
+	scsi_low_dettach(&sc->sc_sclow);
+}
+
+static	int
+stgprobe(device_t devi)
+{
+	int rv;
+	struct stg_softc *sc = device_get_softc(devi);
+
+	rv = stgprobesubr(rman_get_bustag(sc->port_res),
+			  rman_get_bushandle(sc->port_res),
+			  device_get_flags(devi));
+
+	return rv;
+}
+
+static	int
+stgattach(device_t devi)
+{
+	struct stg_softc *sc;
+	struct scsi_low_softc *slp;
+	u_int32_t flags = device_get_flags(devi);
+	u_int iobase = bus_get_resource_start(devi, SYS_RES_IOPORT, 0);
+
+	char	dvname[16];
+
+	strcpy(dvname,"stg");
+
+
+	if (iobase == 0)
+	{
+		printf("%s: no ioaddr is given\n", dvname);
+		return (0);
+	}
+
+	sc = device_get_softc(devi);
+	if (sc == NULL) {
+		return(0);
+	}
+
+	slp = &sc->sc_sclow;
+	slp->sl_dev = devi;
+	sc->sc_iot = rman_get_bustag(sc->port_res);
+	sc->sc_ioh = rman_get_bushandle(sc->port_res);
+
+	slp->sl_hostid = STG_HOSTID;
+	slp->sl_cfgflags = flags;
+
+	stgattachsubr(sc);
+
+	sc->sc_ih = stgintr;
+
+	printf("stg%d",device_get_unit(devi));
+	return(STGIOSZ);
+}
diff --git a/sys/dev/stg/tmc18c30_pccard.c b/sys/dev/stg/tmc18c30_pccard.c
new file mode 100644
index 0000000..e9ceef9
--- /dev/null
+++ b/sys/dev/stg/tmc18c30_pccard.c
@@ -0,0 +1,399 @@
+/*	$FreeBSD$	*/
+/*	$NecBSD: tmc18c30_pisa.c,v 1.22 1998/11/26 01:59:21 honda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [Ported for FreeBSD]
+ *  Copyright (c) 2000
+ *      Noriaki Mitsunaga, Mitsuru Iwasaki and Takanori Watanabe.
+ *      All rights reserved.
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Naofumi HONDA. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Kouichi Matsuda. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#include <sys/param.h>
+#include <sys/systm.h>
+#include <sys/disklabel.h>
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500001
+#include <sys/bio.h>
+#endif
+#include <sys/buf.h>
+#include <sys/queue.h>
+#include <sys/malloc.h>
+#include <sys/errno.h>
+
+#include <vm/vm.h>
+
+#include <machine/bus.h>
+
+#include <machine/bus_pio.h>
+#include <i386/isa/isa_device.h>
+
+#include <machine/dvcfg.h>
+
+#if defined(__FreeBSD__) && __FreeBSD_version < 400001
+static struct stg_softc *stg_get_softc(int);
+extern struct stg_softc *stgdata[];
+#define DEVPORT_ALLOCSOFTCFUNC stg_get_softc
+#define DEVPORT_SOFTCARRAY     stgdata
+#endif
+#include <sys/device_port.h>
+
+#include <cam/scsi/scsi_low.h>
+#include <cam/scsi/scsi_low_pisa.h>
+
+#include <dev/stg/tmc18c30reg.h>
+#include <dev/stg/tmc18c30var.h>
+#if defined(__FreeBSD__) && __FreeBSD_version < 400001
+#include "stg.h"
+#endif
+
+#define	STG_HOSTID	7
+
+/* pccard support */
+#include "apm.h"
+#if NAPM > 0
+#include	<machine/apm_bios.h>
+#endif
+
+#include	"card.h"
+#if NCARD > 0
+#include	<sys/kernel.h>
+#include	<sys/module.h>
+#include	<sys/select.h>
+#include	<pccard/cardinfo.h>
+#include	<pccard/slot.h>
+
+static	int	stgprobe(DEVPORT_PDEVICE devi);
+static	int	stgattach(DEVPORT_PDEVICE devi);
+
+static	int	stg_card_intr	__P((DEVPORT_PDEVICE));
+static	void	stg_card_unload	__P((DEVPORT_PDEVICE));
+#if defined(__FreeBSD__) && __FreeBSD_version < 400001
+static	int	stg_card_init	__P((DEVPORT_PDEVICE));
+#endif
+
+#if defined(__FreeBSD__) && __FreeBSD_version >= 400001
+/*
+ * Additional code for FreeBSD new-bus PCCard frontend
+ */
+
+static void
+stg_pccard_intr(void * arg)
+{
+	stgintr(arg);
+}
+
+static void
+stg_release_resource(DEVPORT_PDEVICE dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+
+	if (sc->stg_intrhand) {
+		bus_teardown_intr(dev, sc->irq_res, sc->stg_intrhand);
+	}
+
+	if (sc->port_res) {
+		bus_release_resource(dev, SYS_RES_IOPORT,
+				     sc->port_rid, sc->port_res);
+	}
+
+	if (sc->irq_res) {
+		bus_release_resource(dev, SYS_RES_IRQ,
+				     sc->irq_rid, sc->irq_res);
+	}
+
+	if (sc->mem_res) {
+		bus_release_resource(dev, SYS_RES_MEMORY,
+				     sc->mem_rid, sc->mem_res);
+	}
+}
+
+static int
+stg_alloc_resource(DEVPORT_PDEVICE dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+	u_long			maddr, msize;
+	int			error;
+
+	sc->port_rid = 0;
+	sc->port_res = bus_alloc_resource(dev, SYS_RES_IOPORT, &sc->port_rid,
+					  0, ~0, STGIOSZ, RF_ACTIVE);
+	if (sc->port_res == NULL) {
+		stg_release_resource(dev);
+		return(ENOMEM);
+	}
+
+	sc->irq_rid = 0;
+	sc->irq_res = bus_alloc_resource(dev, SYS_RES_IRQ, &sc->irq_rid,
+					 0, ~0, 1, RF_ACTIVE);
+	if (sc->irq_res == NULL) {
+		stg_release_resource(dev);
+		return(ENOMEM);
+	}
+
+	error = bus_get_resource(dev, SYS_RES_MEMORY, 0, &maddr, &msize);
+	if (error) {
+		return(0);      /* XXX */
+	}
+
+	/* no need to allocate memory if not configured */
+	if (maddr == 0 || msize == 0) {
+		return(0);
+	}
+
+	sc->mem_rid = 0;
+	sc->mem_res = bus_alloc_resource(dev, SYS_RES_MEMORY, &sc->mem_rid,
+					 0, ~0, msize, RF_ACTIVE);
+	if (sc->mem_res == NULL) {
+		stg_release_resource(dev);
+		return(ENOMEM);
+	}
+
+	return(0);
+}
+
+static int
+stg_pccard_probe(DEVPORT_PDEVICE dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+	int			error;
+
+	bzero(sc, sizeof(struct stg_softc));
+
+	error = stg_alloc_resource(dev);
+	if (error) {
+		return(error);
+	}
+
+	if (stgprobe(dev) == 0) {
+		stg_release_resource(dev);
+		return(ENXIO);
+	}
+
+	stg_release_resource(dev);
+
+	return(0);
+}
+
+static int
+stg_pccard_attach(DEVPORT_PDEVICE dev)
+{
+	struct stg_softc	*sc = device_get_softc(dev);
+	int			error;
+
+	error = stg_alloc_resource(dev);
+	if (error) {
+		return(error);
+	}
+
+	error = bus_setup_intr(dev, sc->irq_res, INTR_TYPE_CAM,
+			       stg_pccard_intr, (void *)sc, &sc->stg_intrhand);
+	if (error) {
+		stg_release_resource(dev);
+		return(error);
+	}
+
+	if (stgattach(dev) == 0) {
+		stg_release_resource(dev);
+		return(ENXIO);
+	}
+
+	return(0);
+}
+
+static	void
+stg_pccard_detach(DEVPORT_PDEVICE dev)
+{
+	stg_card_unload(dev);
+	stg_release_resource(dev);
+}
+
+static device_method_t stg_pccard_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		stg_pccard_probe),
+	DEVMETHOD(device_attach,	stg_pccard_attach),
+	DEVMETHOD(device_detach,	stg_pccard_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t stg_pccard_driver = {
+	"stg",
+	stg_pccard_methods,
+	sizeof(struct stg_softc),
+};
+
+static devclass_t stg_devclass;
+
+DRIVER_MODULE(stg, pccard, stg_pccard_driver, stg_devclass, 0, 0);
+
+#else
+
+PCCARD_MODULE(stg, stg_card_init,stg_card_unload, stg_card_intr, 0, cam_imask);
+
+#endif
+
+#if defined(__FreeBSD__) && __FreeBSD_version < 400001
+static struct stg_softc *
+stg_get_softc(int unit)
+{
+	struct stg_softc *sc;
+
+	if (unit >= NSTG) {
+		return(NULL);
+	}
+
+	if (stgdata[unit] == NULL) {
+		sc = malloc(sizeof(struct stg_softc), M_TEMP,M_NOWAIT);
+		if (sc == NULL) {
+			printf("stg_get_softc: cannot malloc!\n");
+			return(NULL);
+		}
+		stgdata[unit] = sc;
+	} else {
+		sc = stgdata[unit];
+	}
+
+	return(sc);
+}
+
+static	int
+stg_card_init(DEVPORT_PDEVICE devi)
+{
+	int unit = DEVPORT_PDEVUNIT(devi);
+
+	if (NSTG <= unit)
+		return (ENODEV);
+
+	printf("probe stg\n");
+	if (stgprobe(devi) == 0)
+		return (ENXIO);
+
+	printf("attach stg\n");
+	if (stgattach(devi) == 0)
+		return (ENXIO);
+
+	return (0);
+}
+#endif
+
+static	void
+stg_card_unload(DEVPORT_PDEVICE devi)
+{
+	struct stg_softc *sc = DEVPORT_PDEVGET_SOFTC(devi);
+
+	printf("%s: unload\n",sc->sc_sclow.sl_xname);
+	scsi_low_deactivate((struct scsi_low_softc *)sc);
+        scsi_low_dettach(&sc->sc_sclow);
+}
+
+static	int
+stg_card_intr(DEVPORT_PDEVICE devi)
+{
+	stgintr(DEVPORT_PDEVGET_SOFTC(devi));
+	return 1;
+}
+
+static	int
+stgprobe(DEVPORT_PDEVICE devi)
+{
+	int rv;
+#if defined(__FreeBSD__) && __FreeBSD_version >= 400001
+	struct stg_softc *sc = device_get_softc(devi);
+
+	rv = stgprobesubr(rman_get_bustag(sc->port_res),
+			  rman_get_bushandle(sc->port_res),
+			  DEVPORT_PDEVFLAGS(devi));
+#else
+	rv = stgprobesubr(I386_BUS_SPACE_IO,
+			  DEVPORT_PDEVIOBASE(devi), DEVPORT_PDEVFLAGS(devi));
+#endif
+
+	return rv;
+}
+
+static	int
+stgattach(DEVPORT_PDEVICE devi)
+{
+	int unit = DEVPORT_PDEVUNIT(devi);
+	struct stg_softc *sc;
+	struct scsi_low_softc *slp;
+	u_int32_t flags = DEVPORT_PDEVFLAGS(devi);
+	u_int iobase = DEVPORT_PDEVIOBASE(devi);
+
+	char	dvname[16];
+
+	strcpy(dvname,"stg");
+
+#if defined(__FreeBSD__) && __FreeBSD_version < 400001
+	if (unit >= NSTG)
+	{
+		printf("%s: unit number too high\n",dvname);
+		return (0);
+	}
+#endif
+
+	if (iobase == 0)
+	{
+		printf("%s: no ioaddr is given\n", dvname);
+		return (0);
+	}
+
+	sc = DEVPORT_PDEVALLOC_SOFTC(devi);
+	if (sc == NULL) {
+		return(0);
+	}
+
+	slp = &sc->sc_sclow;
+#if defined(__FreeBSD__) && __FreeBSD_version >= 400001
+	slp->sl_dev = devi;
+	sc->sc_iot = rman_get_bustag(sc->port_res);
+	sc->sc_ioh = rman_get_bushandle(sc->port_res);
+#else
+	bzero(sc, sizeof(struct stg_softc));
+	strcpy(slp->sl_dev.dv_xname, dvname);
+	slp->sl_dev.dv_unit = unit;
+	sc->sc_iot = I386_BUS_SPACE_IO;
+	sc->sc_ioh = iobase;
+#endif
+
+	slp->sl_hostid = STG_HOSTID;
+	slp->sl_cfgflags = flags;
+
+	stgattachsubr(sc);
+
+	sc->sc_ih = stgintr;
+
+	printf("stg%d",DEVPORT_PDEVUNIT(devi));
+	return(STGIOSZ);
+}
+#endif /* NCARD>0 */
diff --git a/sys/dev/stg/tmc18c30reg.h b/sys/dev/stg/tmc18c30reg.h
new file mode 100644
index 0000000..4a29f60
--- /dev/null
+++ b/sys/dev/stg/tmc18c30reg.h
@@ -0,0 +1,144 @@
+/*	$FreeBSD$	*/
+/*	$NecBSD: tmc18c30reg.h,v 1.4 1998/03/14 07:05:23 kmatsuda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Kouichi Matsuda. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef	_TMC18C30REG_H_
+#define	_TMC18C30REG_H_
+
+#define	tmc_wdata	0x00
+#define	tmc_rdata	0x00
+
+#define	tmc_bctl	0x01
+#define		BCTL_BUSFREE	0x00
+#define		BCTL_RST	0x01
+#define		BCTL_SEL	0x02
+#define		BCTL_BSY	0x04
+#define		BCTL_ATN	0x08
+#define		BCTL_IO		0x10
+#define		BCTL_CD		0x20
+#define		BCTL_MSG	0x40
+#define		BCTL_BUSEN	0x80
+#define	tmc_bstat	0x01
+#define		BSTAT_BSY	0x01
+#define		BSTAT_MSG	0x02
+#define		BSTAT_IO	0x04
+#define		BSTAT_CMD	0x08
+#define		BSTAT_REQ	0x10
+#define		BSTAT_SEL	0x20
+#define		BSTAT_ACK	0x40
+#define		BSTAT_PHMASK	(BSTAT_MSG | BSTAT_IO | BSTAT_CMD)
+
+#define	tmc_ictl	0x02
+#define		ICTL_FIFO	0x10
+#define		ICTL_ARBIT	0x20
+#define		ICTL_SEL	0x40
+#define		ICTL_CD		0x80
+#define		ICTL_ALLINT	(ICTL_ARBIT | ICTL_CD | ICTL_SEL)
+#define	tmc_astat	0x02
+#define		ASTAT_INT	0x01
+#define		ASTAT_ARBIT	0x02
+#define		ASTAT_PARERR	0x04
+#define		ASTAT_SCSIRST	0x08
+#define		ASTAT_STATMASK	0x0f
+#define		ASTAT_FIFODIR	0x10
+#define		ASTAT_FIFOEN	0x20
+#define		ASTAT_PARENB	0x40
+#define		ASTAT_BUSEN	0x80
+
+#define	tmc_ssctl	0x03
+#define		SSCTL_FSYNCHEN	0x40
+#define		SSCTL_SYNCHEN	0x80
+#define	tmc_fstat	0x03
+
+#define	tmc_fctl	0x04
+#define		FCTL_CLRFIFO	0x01
+#define		FCTL_ARBIT	0x04
+#define		FCTL_PARENB	0x08
+#define		FCTL_INTEN	0x10
+#define		FCTL_CLRINT	0x20
+#define		FCTL_FIFOW	0x40
+#define		FCTL_FIFOEN	0x80
+#define	tmc_icnd	0x04
+
+#define	tmc_mctl	0x05
+#define	tmc_idlsb	0x05
+
+#define	tmc_idmsb	0x06
+
+#define	tmc_wlb		0x07
+#define	tmc_rlb		0x07
+
+#define	tmc_scsiid	0x08
+#define	tmc_sdna	0x08
+
+#define	tmc_istat	0x09
+#define		ISTAT_INTEN	0x08
+#define		ISTAT_FIFO	0x10
+#define		ISTAT_ARBIT	0x20
+#define		ISTAT_SEL	0x40
+#define		ISTAT_CD	0x80
+
+#define	tmc_cfg1	0x0a
+
+#define	tmc_ioctl	0x0b
+#define	tmc_cfg2	0x0b
+
+#define	tmc_wfifo	0x0c
+#define	tmc_rfifo	0x0c
+
+#define	tmc_fdcnt	0x0e
+
+/* Information transfer phases */
+#define	BUSFREE_PHASE		0x00
+#define	DATA_OUT_PHASE		(BSTAT_BSY)
+#define	DATA_IN_PHASE		(BSTAT_BSY|BSTAT_IO)
+#define	COMMAND_PHASE		(BSTAT_CMD|BSTAT_BSY)
+#define	STATUS_PHASE		(BSTAT_CMD|BSTAT_BSY|BSTAT_IO)
+#define	MESSAGE_OUT_PHASE	(BSTAT_CMD|BSTAT_MSG|BSTAT_BSY)
+#define	MESSAGE_IN_PHASE	(BSTAT_CMD|BSTAT_MSG|BSTAT_BSY|BSTAT_IO)
+
+#define	PHASE_RESELECTED	(BSTAT_SEL|BSTAT_IO)
+
+#define	PHASE_MASK		0x2f
+#define	RESEL_PHASE_MASK	0x2e
+
+/* chip type */
+#define	TMCCHIP_UNK		0x00
+#define	TMCCHIP_1800		0x01
+#define	TMCCHIP_18C50		0x02
+#define	TMCCHIP_18C30		0x03
+
+#define	STGIOSZ	0x10
+
+#endif	/* !_TMC18C30REG_H_ */
diff --git a/sys/dev/stg/tmc18c30var.h b/sys/dev/stg/tmc18c30var.h
new file mode 100644
index 0000000..46cc986
--- /dev/null
+++ b/sys/dev/stg/tmc18c30var.h
@@ -0,0 +1,99 @@
+/*	$FreeBSD$	*/
+/*	$NecBSD: tmc18c30var.h,v 1.12 1998/11/30 00:08:30 honda Exp $	*/
+/*	$NetBSD$	*/
+
+/*
+ * [NetBSD for NEC PC-98 series]
+ *  Copyright (c) 1996, 1997, 1998
+ *	NetBSD/pc98 porting staff. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Naofumi HONDA. All rights reserved.
+ *  Copyright (c) 1996, 1997, 1998
+ *	Kouichi Matsuda. All rights reserved.
+ * 
+ *  Redistribution and use in source and binary forms, with or without
+ *  modification, are permitted provided that the following conditions
+ *  are met:
+ *  1. Redistributions of source code must retain the above copyright
+ *     notice, this list of conditions and the following disclaimer.
+ *  2. Redistributions in binary form must reproduce the above copyright
+ *     notice, this list of conditions and the following disclaimer in the
+ *     documentation and/or other materials provided with the distribution.
+ *  3. The name of the author may not be used to endorse or promote products
+ *     derived from this software without specific prior written permission.
+ * 
+ * THIS SOFTWARE IS PROVIDED BY THE AUTHOR ``AS IS'' AND ANY EXPRESS OR
+ * IMPLIED WARRANTIES, INCLUDING, BUT NOT LIMITED TO, THE IMPLIED
+ * WARRANTIES OF MERCHANTABILITY AND FITNESS FOR A PARTICULAR PURPOSE ARE
+ * DISCLAIMED.  IN NO EVENT SHALL THE AUTHOR BE LIABLE FOR ANY DIRECT,
+ * INDIRECT, INCIDENTAL, SPECIAL, EXEMPLARY, OR CONSEQUENTIAL DAMAGES
+ * (INCLUDING, BUT NOT LIMITED TO, PROCUREMENT OF SUBSTITUTE GOODS OR
+ * SERVICES; LOSS OF USE, DATA, OR PROFITS; OR BUSINESS INTERRUPTION)
+ * HOWEVER CAUSED AND ON ANY THEORY OF LIABILITY, WHETHER IN CONTRACT,
+ * STRICT LIABILITY, OR TORT (INCLUDING NEGLIGENCE OR OTHERWISE) ARISING IN
+ * ANY WAY OUT OF THE USE OF THIS SOFTWARE, EVEN IF ADVISED OF THE
+ * POSSIBILITY OF SUCH DAMAGE.
+ */
+
+#ifndef	_TMC18C30VAR_H_
+#define	_TMC18C30VAR_H_
+
+/*****************************************************************
+ * Host adapter structure
+ *****************************************************************/
+struct stg_softc {
+	struct scsi_low_softc sc_sclow;	/* generic data */
+
+	bus_space_tag_t sc_iot;
+	bus_space_tag_t sc_memt;
+	bus_space_handle_t sc_ioh;
+
+	void *sc_ih;
+
+	u_int sc_chip;			/* chip type */
+	u_int sc_fsz;			/* fifo size */
+	u_int sc_idbit;			/* host id bit */
+	u_int8_t sc_fcb;		/* fifo intr thread */
+
+	u_int8_t sc_fcWinit;		/* write flags */
+	u_int8_t sc_fcRinit;		/* read flags */
+
+	u_int8_t sc_fcsp;		/* special control flags */
+	u_int8_t sc_icinit;		/* interrupt masks */
+	u_int8_t sc_busc;		/* default bus control register */
+	u_int8_t sc_imsg;		/* identify msg required */
+	u_int8_t sc_busimg;		/* bus control register image */
+#if defined (__FreeBSD__) && __FreeBSD_version >= 400001
+	int port_rid;
+	int irq_rid;
+	int mem_rid;
+	struct resource *port_res;
+	struct resource *irq_res;
+	struct resource *mem_res;
+	void *stg_intrhand;
+#endif
+};
+
+/*****************************************************************
+ * Lun information 
+ *****************************************************************/
+struct stg_lun_info {
+	struct lun_info sli_li;		/* generic data */
+
+	u_int8_t sli_reg_synch;		/* synch register per lun */
+};
+
+/*****************************************************************
+ * Proto
+ *****************************************************************/
+int stgprobesubr __P((bus_space_tag_t, bus_space_handle_t, u_int));
+void stgattachsubr __P((struct stg_softc *));
+int stgprint __P((void *, const char *));
+int stgintr __P((void *));
+
+#if	defined(i386)
+#define	SOFT_INTR_REQUIRED(slp)	(softintr((slp)->sl_irq))
+#else	/* !i386 */
+#define	SOFT_INTR_REQUIRED(slp)
+#endif	/* !i386 */
+#endif	/* !_TMC18C30VAR_H_ */