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| author | dillon <dillon@FreeBSD.org> | 2001-12-23 00:48:37 +0000 |
|---|---|---|
| committer | dillon <dillon@FreeBSD.org> | 2001-12-23 00:48:37 +0000 |
| commit | 94dcf9de7acf4d822394bb1edffc5cd8715b279d (patch) | |
| tree | ef145b2d772075d7b8718e715af412c75f386d08 /sys/dev/sio | |
| parent | 8e7a4ca8a0253ebd426d4c12adfcf4b30e76a8d3 (diff) | |
| download | FreeBSD-src-94dcf9de7acf4d822394bb1edffc5cd8715b279d.zip FreeBSD-src-94dcf9de7acf4d822394bb1edffc5cd8715b279d.tar.gz | |
This problem has been in the serial driver for years, and I occassionally
see people trip over it. Do not set the FIFO trigger to just before it
would otherwise overflow. Give it a little more slop so characters aren't
lost if the interrupt is delayed by other system activities.
MFC maybe: 7 days
Diffstat (limited to 'sys/dev/sio')
| -rw-r--r-- | sys/dev/sio/sio.c | 7 |
1 files changed, 6 insertions, 1 deletions
diff --git a/sys/dev/sio/sio.c b/sys/dev/sio/sio.c index 59bcdad..066abc8 100644 --- a/sys/dev/sio/sio.c +++ b/sys/dev/sio/sio.c @@ -2161,9 +2161,14 @@ comparam(tp, t) * latencies are reasonable for humans. Serial comms * protocols shouldn't expect anything better since modem * latencies are larger. + * + * We have to set the FIFO trigger point such that we + * don't overflow it accidently if a serial interrupt + * is delayed. At high speeds, FIFO_RX_HIGH does not + * leave enough slots free. */ com->fifo_image = t->c_ospeed <= 4800 - ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_HIGH; + ? FIFO_ENABLE : FIFO_ENABLE | FIFO_RX_MEDH; #ifdef COM_ESP /* * The Hayes ESP card needs the fifo DMA mode bit set |
