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author | arybchik <arybchik@FreeBSD.org> | 2016-01-20 08:16:30 +0000 |
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committer | arybchik <arybchik@FreeBSD.org> | 2016-01-20 08:16:30 +0000 |
commit | e3a3a0b3d01ed44529b0144f8eb10a76f4a2aa91 (patch) | |
tree | e807382e2fc77b878d7e3e8ed961882b0a763cdf /sys/dev/sfxge/common | |
parent | 75532d9d50216a059f2693491e77f22063a563a5 (diff) | |
download | FreeBSD-src-e3a3a0b3d01ed44529b0144f8eb10a76f4a2aa91.zip FreeBSD-src-e3a3a0b3d01ed44529b0144f8eb10a76f4a2aa91.tar.gz |
MFC r294094
sfxge: check the RX DMA end padding configuration on Medford
Submitted by: Mark Spender <mspender at solarflare.com>
Reviewed by: gnn
Sponsored by: Solarflare Communications, Inc.
Diffstat (limited to 'sys/dev/sfxge/common')
-rw-r--r-- | sys/dev/sfxge/common/medford_nic.c | 71 |
1 files changed, 67 insertions, 4 deletions
diff --git a/sys/dev/sfxge/common/medford_nic.c b/sys/dev/sfxge/common/medford_nic.c index 8ae4b9b..7c176b5 100644 --- a/sys/dev/sfxge/common/medford_nic.c +++ b/sys/dev/sfxge/common/medford_nic.c @@ -39,6 +39,64 @@ __FBSDID("$FreeBSD$"); #include "ef10_tlv_layout.h" +static __checkReturn efx_rc_t +efx_mcdi_get_rxdp_config( + __in efx_nic_t *enp, + __out uint32_t *end_paddingp) +{ + efx_mcdi_req_t req; + uint8_t payload[MAX(MC_CMD_GET_RXDP_CONFIG_IN_LEN, + MC_CMD_GET_RXDP_CONFIG_OUT_LEN)]; + uint32_t end_padding; + efx_rc_t rc; + + memset(payload, 0, sizeof (payload)); + req.emr_cmd = MC_CMD_GET_RXDP_CONFIG; + req.emr_in_buf = payload; + req.emr_in_length = MC_CMD_GET_RXDP_CONFIG_IN_LEN; + req.emr_out_buf = payload; + req.emr_out_length = MC_CMD_GET_RXDP_CONFIG_OUT_LEN; + + efx_mcdi_execute(enp, &req); + if (req.emr_rc != 0) { + rc = req.emr_rc; + goto fail1; + } + + if (MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, + GET_RXDP_CONFIG_OUT_PAD_HOST_DMA) == 0) { + /* RX DMA end padding is disabled */ + end_padding = 0; + } else { + switch(MCDI_OUT_DWORD_FIELD(req, GET_RXDP_CONFIG_OUT_DATA, + GET_RXDP_CONFIG_OUT_PAD_HOST_LEN)) { + case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_64: + end_padding = 64; + break; + case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_128: + end_padding = 128; + break; + case MC_CMD_SET_RXDP_CONFIG_IN_PAD_HOST_256: + end_padding = 256; + break; + default: + rc = ENOTSUP; + goto fail2; + } + } + + *end_paddingp = end_padding; + + return (0); + +fail2: + EFSYS_PROBE(fail2); +fail1: + EFSYS_PROBE1(fail1, efx_rc_t, rc); + + return (rc); +} + __checkReturn efx_rc_t medford_board_cfg( __in efx_nic_t *enp) @@ -56,6 +114,7 @@ medford_board_cfg( uint32_t flags; uint32_t sysclk; uint32_t base, nvec; + uint32_t end_padding; efx_rc_t rc; /* @@ -161,8 +220,10 @@ medford_board_cfg( /* Alignment for receive packet DMA buffers */ encp->enc_rx_buf_align_start = 1; - /* FIXME: RX DMA end padding is configurable on Medford */ - encp->enc_rx_buf_align_end = 64; + /* Get the RX DMA end padding alignment configuration */ + if ((rc = efx_mcdi_get_rxdp_config(enp, &end_padding)) != 0) + goto fail10; + encp->enc_rx_buf_align_end = end_padding; /* Alignment for WPTR updates */ encp->enc_rx_push_align = EF10_RX_WPTR_ALIGN; @@ -190,13 +251,13 @@ medford_board_cfg( * can result in time-of-check/time-of-use bugs. */ if ((rc = ef10_get_privilege_mask(enp, &mask)) != 0) - goto fail10; + goto fail11; encp->enc_privilege_mask = mask; /* Get interrupt vector limits */ if ((rc = efx_mcdi_get_vector_cfg(enp, &base, &nvec, NULL)) != 0) { if (EFX_PCI_FUNCTION_IS_PF(encp)) - goto fail11; + goto fail12; /* Ignore error (cannot query vector limits from a VF). */ base = 0; @@ -219,6 +280,8 @@ medford_board_cfg( return (0); +fail12: + EFSYS_PROBE(fail12); fail11: EFSYS_PROBE(fail11); fail10: |