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author | ian <ian@FreeBSD.org> | 2015-05-23 17:43:02 +0000 |
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committer | ian <ian@FreeBSD.org> | 2015-05-23 17:43:02 +0000 |
commit | e598358ce4ecd13a6ce840fc40f6845722bade6e (patch) | |
tree | c630c8a352a21398a253712a4be7c3071c518d63 /sys/dev/sdhci/sdhci.c | |
parent | c063f629c5b85ca49413bf3486cf9b5263bbacb8 (diff) | |
download | FreeBSD-src-e598358ce4ecd13a6ce840fc40f6845722bade6e.zip FreeBSD-src-e598358ce4ecd13a6ce840fc40f6845722bade6e.tar.gz |
MFC r279359, r279360:
For new eMMC chips, we must signal controller HC capability in OP_COND command.
Detect, report and use 8-bit bus if is available.
Diffstat (limited to 'sys/dev/sdhci/sdhci.c')
-rw-r--r-- | sys/dev/sdhci/sdhci.c | 20 |
1 files changed, 16 insertions, 4 deletions
diff --git a/sys/dev/sdhci/sdhci.c b/sys/dev/sdhci/sdhci.c index 009decd..47d6340 100644 --- a/sys/dev/sdhci/sdhci.c +++ b/sys/dev/sdhci/sdhci.c @@ -584,6 +584,8 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num) "support voltages.\n"); } slot->host.caps = MMC_CAP_4_BIT_DATA; + if (caps & SDHCI_CAN_DO_8BITBUS) + slot->host.caps |= MMC_CAP_8_BIT_DATA; if (caps & SDHCI_CAN_DO_HISPD) slot->host.caps |= MMC_CAP_HSPEED; /* Decide if we have usable DMA. */ @@ -603,9 +605,11 @@ sdhci_init_slot(device_t dev, struct sdhci_slot *slot, int num) slot->opt &= ~SDHCI_HAVE_DMA; if (bootverbose || sdhci_debug) { - slot_printf(slot, "%uMHz%s 4bits%s%s%s %s\n", + slot_printf(slot, "%uMHz%s %s%s%s%s %s\n", slot->max_clk / 1000000, (caps & SDHCI_CAN_DO_HISPD) ? " HS" : "", + (caps & MMC_CAP_8_BIT_DATA) ? "8bits" : + ((caps & MMC_CAP_4_BIT_DATA) ? "4bits" : "1bit"), (caps & SDHCI_CAN_VDD_330) ? " 3.3V" : "", (caps & SDHCI_CAN_VDD_300) ? " 3.0V" : "", (caps & SDHCI_CAN_VDD_180) ? " 1.8V" : "", @@ -692,11 +696,19 @@ sdhci_generic_update_ios(device_t brdev, device_t reqdev) } /* Configure the bus. */ sdhci_set_clock(slot, ios->clock); - sdhci_set_power(slot, (ios->power_mode == power_off)?0:ios->vdd); - if (ios->bus_width == bus_width_4) + sdhci_set_power(slot, (ios->power_mode == power_off) ? 0 : ios->vdd); + if (ios->bus_width == bus_width_8) { + slot->hostctrl |= SDHCI_CTRL_8BITBUS; + slot->hostctrl &= ~SDHCI_CTRL_4BITBUS; + } else if (ios->bus_width == bus_width_4) { + slot->hostctrl &= ~SDHCI_CTRL_8BITBUS; slot->hostctrl |= SDHCI_CTRL_4BITBUS; - else + } else if (ios->bus_width == bus_width_1) { + slot->hostctrl &= ~SDHCI_CTRL_8BITBUS; slot->hostctrl &= ~SDHCI_CTRL_4BITBUS; + } else { + panic("Invalid bus width: %d", ios->bus_width); + } if (ios->timing == bus_timing_hs && !(slot->quirks & SDHCI_QUIRK_DONT_SET_HISPD_BIT)) slot->hostctrl |= SDHCI_CTRL_HISPD; |