- Make rp(4) 64-bit- and endian-clean as well as work on strict alignment

  archs. [1]
- Instead of bus_space_{read,write}*(rman_get_bustag(), rman_get_bushandle())
  use bus_{read,write}*() for efficiency.

Reported by:	Peter Losher [1]
Tested on:	i386, sparc64
MFC after:	2 weeks

3 files changed, 70 insertions, 74 deletions

diff --git a/sys/dev/rp/rp.c b/sys/dev/rp/rp.c
index f2433b2..6d9690d 100644
--- a/sys/dev/rp/rp.c
+++ b/sys/dev/rp/rp.c
@@ -42,6 +42,7 @@ __FBSDID("$FreeBSD$");
 
 #include <sys/param.h>
 #include <sys/systm.h>
+#include <sys/endian.h>
 #include <sys/fcntl.h>
 #include <sys/malloc.h>
 #include <sys/serial.h>
@@ -210,7 +211,7 @@ int sInitChan(	CONTROLLER_T *CtlP,
       R[1] = RData[i+1] + 0x10 * ChanNum;
       R[2] = RData[i+2];
       R[3] = RData[i+3];
-      rp_writech4(ChP,_INDX_ADDR,*((DWord_t *)&R[0]));
+      rp_writech4(ChP,_INDX_ADDR,le32dec(R));
    }
 
    ChR = ChP->R;
@@ -229,43 +230,43 @@ int sInitChan(	CONTROLLER_T *CtlP,
    ChP->BaudDiv[1] = (Byte_t)((ChOff + _BAUD) >> 8);
    ChP->BaudDiv[2] = (Byte_t)BRD9600;
    ChP->BaudDiv[3] = (Byte_t)(BRD9600 >> 8);
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->BaudDiv[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->BaudDiv));
 
    ChP->TxControl[0] = (Byte_t)(ChOff + _TX_CTRL);
    ChP->TxControl[1] = (Byte_t)((ChOff + _TX_CTRL) >> 8);
    ChP->TxControl[2] = 0;
    ChP->TxControl[3] = 0;
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxControl[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxControl));
 
    ChP->RxControl[0] = (Byte_t)(ChOff + _RX_CTRL);
    ChP->RxControl[1] = (Byte_t)((ChOff + _RX_CTRL) >> 8);
    ChP->RxControl[2] = 0;
    ChP->RxControl[3] = 0;
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->RxControl[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->RxControl));
 
    ChP->TxEnables[0] = (Byte_t)(ChOff + _TX_ENBLS);
    ChP->TxEnables[1] = (Byte_t)((ChOff + _TX_ENBLS) >> 8);
    ChP->TxEnables[2] = 0;
    ChP->TxEnables[3] = 0;
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxEnables[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxEnables));
 
    ChP->TxCompare[0] = (Byte_t)(ChOff + _TXCMP1);
    ChP->TxCompare[1] = (Byte_t)((ChOff + _TXCMP1) >> 8);
    ChP->TxCompare[2] = 0;
    ChP->TxCompare[3] = 0;
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxCompare[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxCompare));
 
    ChP->TxReplace1[0] = (Byte_t)(ChOff + _TXREP1B1);
    ChP->TxReplace1[1] = (Byte_t)((ChOff + _TXREP1B1) >> 8);
    ChP->TxReplace1[2] = 0;
    ChP->TxReplace1[3] = 0;
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxReplace1[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxReplace1));
 
    ChP->TxReplace2[0] = (Byte_t)(ChOff + _TXREP2);
    ChP->TxReplace2[1] = (Byte_t)((ChOff + _TXREP2) >> 8);
    ChP->TxReplace2[2] = 0;
    ChP->TxReplace2[3] = 0;
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxReplace2[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxReplace2));
 
    ChP->TxFIFOPtrs = ChOff + _TXF_OUTP;
    ChP->TxFIFO = ChOff + _TX_FIFO;
@@ -321,7 +322,7 @@ void sStopRxProcessor(CHANNEL_T *ChP)
    R[1] = ChP->R[1];
    R[2] = 0x0a;
    R[3] = ChP->R[3];
-   rp_writech4(ChP, _INDX_ADDR,*(DWord_t *)&R[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(R));
 }
 
 /***************************************************************************
@@ -425,7 +426,6 @@ Warnings: No context switches are allowed while executing this function.
 int sWriteTxPrioByte(CHANNEL_T *ChP, Byte_t Data)
 {
    Byte_t DWBuf[4];		/* buffer for double word writes */
-   Word_t *WordPtr;	     /* must be far because Win SS != DS */
 
    if(sGetTxCnt(ChP) > 1)	       /* write it to Tx priority buffer */
    {
@@ -433,17 +433,16 @@ int sWriteTxPrioByte(CHANNEL_T *ChP, Byte_t Data)
       if(rp_readch1(ChP,_INDX_DATA) & PRI_PEND) /* priority buffer busy */
 	 return(0);		       /* nothing sent */
 
-      WordPtr = (Word_t *)(&DWBuf[0]);
-      *WordPtr = ChP->TxPrioBuf;       /* data byte address */
+      le16enc(DWBuf,ChP->TxPrioBuf);   /* data byte address */
 
       DWBuf[2] = Data;		       /* data byte value */
-      rp_writech4(ChP,_INDX_ADDR,*((DWord_t *)(&DWBuf[0]))); /* write it out */
+      rp_writech4(ChP,_INDX_ADDR,le32dec(DWBuf)); /* write it out */
 
-      *WordPtr = ChP->TxPrioCnt;       /* Tx priority count address */
+      le16enc(DWBuf,ChP->TxPrioCnt);   /* Tx priority count address */
 
       DWBuf[2] = PRI_PEND + 1;	       /* indicate 1 byte pending */
       DWBuf[3] = 0;		       /* priority buffer pointer */
-      rp_writech4(ChP,_INDX_ADDR,*((DWord_t *)(&DWBuf[0]))); /* write it out */
+      rp_writech4(ChP,_INDX_ADDR,le32dec(DWBuf)); /* write it out */
    }
    else 			       /* write it to Tx FIFO */
    {
@@ -491,11 +490,11 @@ void sEnInterrupts(CHANNEL_T *ChP,Word_t Flags)
    ChP->RxControl[2] |=
       ((Byte_t)Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
 
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->RxControl[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->RxControl));
 
    ChP->TxControl[2] |= ((Byte_t)Flags & TXINT_EN);
 
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxControl[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxControl));
 
    if(Flags & CHANINT_EN)
    {
@@ -535,9 +534,9 @@ void sDisInterrupts(CHANNEL_T *ChP,Word_t Flags)
 
    ChP->RxControl[2] &=
 	 ~((Byte_t)Flags & (RXINT_EN | SRCINT_EN | MCINT_EN));
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->RxControl[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->RxControl));
    ChP->TxControl[2] &= ~((Byte_t)Flags & TXINT_EN);
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&ChP->TxControl[0]);
+   rp_writech4(ChP,_INDX_ADDR,le32dec(ChP->TxControl));
 
    if(Flags & CHANINT_EN)
    {
@@ -585,7 +584,7 @@ static void rp_do_receive(struct rp_port *rp, struct tty *tp,
 {
 	int	spl;
 	unsigned	int	CharNStat;
-	int	ToRecv, wRecv, ch, ttynocopy;
+	int	i, ToRecv, wRecv, ch, ttynocopy;
 
 	ToRecv = sGetRxCnt(cp);
 	if(ToRecv == 0)
@@ -645,17 +644,16 @@ static void rp_do_receive(struct rp_port *rp, struct tty *tp,
 			if ( ToRecv > RXFIFO_SIZE ) {
 				ToRecv = RXFIFO_SIZE;
 			}
-			wRecv = ToRecv >> 1;
-			if ( wRecv ) {
-				rp_readmultich2(cp,sGetTxRxDataIO(cp),(u_int16_t *)rp->RxBuf,wRecv);
+			for ( i = 0, wRecv = ToRecv >> 1; wRecv > 0; i += 2, wRecv-- ) {
+				le16enc(rp->RxBuf + i,rp_readch2(cp,sGetTxRxDataIO(cp)));
 			}
 			if ( ToRecv & 1 ) {
-				((unsigned char *)rp->RxBuf)[(ToRecv-1)] = (u_char) rp_readch1(cp,sGetTxRxDataIO(cp));
+				rp->RxBuf[(ToRecv-1)] = rp_readch1(cp,sGetTxRxDataIO(cp));
 			}
 			tk_nin += ToRecv;
 			tk_rawcc += ToRecv;
 			tp->t_rawcc += ToRecv;
-			ttynocopy = b_to_q((char *)rp->RxBuf, ToRecv, &tp->t_rawq);
+			ttynocopy = b_to_q(rp->RxBuf, ToRecv, &tp->t_rawq);
 			ttwakeup(tp);
 		} else {
 			while (ToRecv) {
@@ -892,7 +890,7 @@ rpopen(struct tty *tp, struct cdev *dev)
 		((rp->rp_channel.TxControl[3]
 		& ~(SET_RTS | SET_DTR)) | flags);
 	rp_writech4(&rp->rp_channel,_INDX_ADDR,
-		*(DWord_t *) &(rp->rp_channel.TxControl[0]));
+		le32dec(rp->rp_channel.TxControl));
 	sSetRxTrigger(&rp->rp_channel, TRIG_1);
 	sDisRxStatusMode(&rp->rp_channel);
 	sFlushRxFIFO(&rp->rp_channel);
@@ -996,7 +994,7 @@ rpmodem(struct tty *tp, int sigon, int sigoff)
 		rp->rp_channel.TxControl[3] &= ~i;
 		rp->rp_channel.TxControl[3] |= j;
 		rp_writech4(&rp->rp_channel,_INDX_ADDR,
-			*(DWord_t *) &(rp->rp_channel.TxControl[0]));
+			le32dec(rp->rp_channel.TxControl));
 	} else {
 		i = sGetChanStatusLo(&rp->rp_channel);
 		j = rp->rp_channel.TxControl[3];
@@ -1162,7 +1160,7 @@ rpstart(tp)
 	struct	clist	*qp;
 	char	flags;
 	int	spl, xmit_fifo_room;
-	int	count, wcount;
+	int	i, count, wcount;
 
 
 	rp = tp->t_sc;
@@ -1193,14 +1191,12 @@ rpstart(tp)
 	qp = &tp->t_outq;
 	if(xmit_fifo_room > 0 && qp->c_cc > 0) {
 		tp->t_state |= TS_BUSY;
-		count = q_to_b( qp, (char *)rp->TxBuf, xmit_fifo_room );
-		wcount = count >> 1;
-		if ( wcount ) {
-			rp_writemultich2(cp, sGetTxRxDataIO(cp), (u_int16_t *)rp->TxBuf, wcount);
+		count = q_to_b( qp, rp->TxBuf, xmit_fifo_room );
+		for( i = 0, wcount = count >> 1; wcount > 0; i += 2, wcount-- ) {
+			rp_writech2(cp, sGetTxRxDataIO(cp), le16dec(rp->TxBuf + i));
 		}
 		if ( count & 1 ) {
-			rp_writech1(cp, sGetTxRxDataIO(cp),
-				    ((unsigned char *)(rp->TxBuf))[(count-1)]);
+			rp_writech1(cp, sGetTxRxDataIO(cp), rp->TxBuf[(count-1)]);
 		}
 	}
 	rp->rp_restart = (qp->c_cc > 0) ? rp->rp_fifo_lw : 0;
diff --git a/sys/dev/rp/rpreg.h b/sys/dev/rp/rpreg.h
index 7ab041d..735ba87 100644
--- a/sys/dev/rp/rpreg.h
+++ b/sys/dev/rp/rpreg.h
@@ -36,23 +36,23 @@
  * Begin OS-specific defines -  rpreg.h - for RocketPort FreeBSD
  */
 
-typedef unsigned char Byte_t;
-typedef unsigned int ByteIO_t;
+typedef uint8_t Byte_t;
+typedef uint8_t ByteIO_t;
 
-typedef unsigned int Word_t;
-typedef unsigned int WordIO_t;
+typedef uint16_t Word_t;
+typedef uint16_t WordIO_t;
 
-typedef unsigned long DWord_t;
-typedef unsigned int DWordIO_t;
+typedef uint32_t DWord_t;
+typedef uint32_t DWordIO_t;
 
 #define rp_readio(size, ctlp, rid, offset) \
-	(bus_space_read_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset))
+	(bus_read_##size(ctlp->io[rid], offset))
 #define rp_readmultiio(size, ctlp, rid, offset, addr, count) \
-	(bus_space_read_multi_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset, addr, count))
+	(bus_read_multi_##size(ctlp->io[rid], offset, addr, count))
 #define rp_writeio(size, ctlp, rid, offset, data) \
-	(bus_space_write_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset, data))
+	(bus_write_##size(ctlp->io[rid], offset, data))
 #define rp_writemultiio(size, ctlp, rid, offset, addr, count) \
-	(bus_space_write_multi_##size(rman_get_bustag(ctlp->io[rid]), rman_get_bushandle(ctlp->io[rid]), offset, addr, count))
+	(bus_write_multi_##size(ctlp->io[rid], offset, addr, count))
 
 #define rp_readio1(ctlp, rid, offset)				rp_readio(1, ctlp, rid, offset)
 #define rp_readio2(ctlp, rid, offset)				rp_readio(2, ctlp, rid, offset)
@@ -428,7 +428,7 @@ Call:	  sClrBreak(ChP)
 #define sClrBreak(ChP) \
 { \
    (ChP)->TxControl[3] &= ~SETBREAK; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -440,7 +440,7 @@ Call:	  sClrDTR(ChP)
 #define sClrDTR(ChP) \
 { \
    (ChP)->TxControl[3] &= ~SET_DTR; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -452,7 +452,7 @@ Call:	  sClrRTS(ChP)
 #define sClrRTS(ChP) \
 { \
    (ChP)->TxControl[3] &= ~SET_RTS; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -476,7 +476,7 @@ Call:	  sDisCTSFlowCtl(ChP)
 #define sDisCTSFlowCtl(ChP) \
 { \
    (ChP)->TxControl[2] &= ~CTSFC_EN; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -490,7 +490,7 @@ Comments: Function sSetParity() can be used in place of functions sEnParity(),
 #define sDisParity(ChP) \
 { \
    (ChP)->TxControl[2] &= ~PARITY_EN; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -502,7 +502,7 @@ Call:	  sDisRxFIFO(ChP)
 #define sDisRxFIFO(ChP) \
 { \
    (ChP)->R[0x32] = 0x0a; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0x30]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->R + 0x30)); \
 }
 
 /***************************************************************************
@@ -529,7 +529,7 @@ Call:	  sDisTransmit(ChP)
 #define sDisTransmit(ChP) \
 { \
    (ChP)->TxControl[3] &= ~TX_ENABLE; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -541,7 +541,7 @@ Call:	  sDisTxSoftFlowCtl(ChP)
 #define sDisTxSoftFlowCtl(ChP) \
 { \
    (ChP)->R[0x06] = 0x8a; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0x04]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->R + 0x04)); \
 }
 
 /***************************************************************************
@@ -553,7 +553,7 @@ Call:	  sEnCTSFlowCtl(ChP)
 #define sEnCTSFlowCtl(ChP) \
 { \
    (ChP)->TxControl[2] |= CTSFC_EN; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -570,7 +570,7 @@ Warnings: Before enabling parity odd or even parity should be chosen using
 #define sEnParity(ChP) \
 { \
    (ChP)->TxControl[2] |= PARITY_EN; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -581,9 +581,9 @@ Return: void
 { \
 	(ChP)->TxControl[2] &= ~RTSTOG_EN; \
 	(ChP)->TxControl[3] &= ~SET_RTS; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 	(ChP)->RxControl[2] |= RTSFC_EN; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->RxControl)); \
 }
 
 /***************************************************************************
@@ -593,7 +593,7 @@ Return: void
 #define sDisRTSFlowCtl(ChP) \
 { \
 	(ChP)->RxControl[2] &= ~RTSFC_EN; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->RxControl)); \
 }
 
 /***************************************************************************
@@ -605,7 +605,7 @@ Call:	  sEnRxFIFO(ChP)
 #define sEnRxFIFO(ChP) \
 { \
    (ChP)->R[0x32] = 0x08; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0x30]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->R + 0x30)); \
 }
 
 /***************************************************************************
@@ -626,7 +626,7 @@ Warnings: This function must be called after valid microcode has been
 #define sEnRxProcessor(ChP) \
 { \
    (ChP)->RxControl[2] |= RXPROC_EN; \
-   rp_writech2(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->RxControl)); \
 }
 
 /***************************************************************************
@@ -650,7 +650,7 @@ Call:	  sEnTransmit(ChP)
 #define sEnTransmit(ChP) \
 { \
    (ChP)->TxControl[3] |= TX_ENABLE; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -815,7 +815,7 @@ Call:	  sSendBreak(ChP)
 #define sSendBreak(ChP) \
 { \
    (ChP)->TxControl[3] |= SETBREAK; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -829,7 +829,7 @@ Call:	  sSetBaud(ChP,Divisor)
 { \
    (ChP)->BaudDiv[2] = (Byte_t)(DIVISOR); \
    (ChP)->BaudDiv[3] = (Byte_t)((DIVISOR) >> 8); \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->BaudDiv[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->BaudDiv)); \
 }
 
 /***************************************************************************
@@ -841,7 +841,7 @@ Call:	  sSetData7(ChP)
 #define sSetData7(ChP) \
 { \
    (ChP)->TxControl[2] &= ~DATA8BIT; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -853,7 +853,7 @@ Call:	  sSetData8(ChP)
 #define sSetData8(ChP) \
 { \
    (ChP)->TxControl[2] |= DATA8BIT; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -865,7 +865,7 @@ Call:	  sSetDTR(ChP)
 #define sSetDTR(ChP) \
 { \
    (ChP)->TxControl[3] |= SET_DTR; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -882,7 +882,7 @@ Warnings: This function has no effect unless parity is enabled with function
 #define sSetEvenParity(ChP) \
 { \
    (ChP)->TxControl[2] |= EVEN_PAR; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -899,7 +899,7 @@ Warnings: This function has no effect unless parity is enabled with function
 #define sSetOddParity(ChP) \
 { \
    (ChP)->TxControl[2] &= ~EVEN_PAR; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -911,7 +911,7 @@ Call:	  sSetRTS(ChP)
 #define sSetRTS(ChP) \
 { \
    (ChP)->TxControl[3] |= SET_RTS; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -937,7 +937,7 @@ Comments: An interrupt will be generated when the trigger level is reached
 { \
    (ChP)->RxControl[2] &= ~TRIG_MASK; \
    (ChP)->RxControl[2] |= LEVEL; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->RxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->RxControl)); \
 }
 
 /***************************************************************************
@@ -949,7 +949,7 @@ Call:	  sSetStop1(ChP)
 #define sSetStop1(ChP) \
 { \
    (ChP)->TxControl[2] &= ~STOP2; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -961,7 +961,7 @@ Call:	  sSetStop2(ChP)
 #define sSetStop2(ChP) \
 { \
    (ChP)->TxControl[2] |= STOP2; \
-   rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->TxControl[0]); \
+   rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->TxControl)); \
 }
 
 /***************************************************************************
@@ -974,7 +974,7 @@ Comments: This function is used to start a Rx processor after it was
 	  will restart both the Rx processor and software input flow control.
 
 */
-#define sStartRxProcessor(ChP) rp_writech4(ChP,_INDX_ADDR,*(DWord_t *)&(ChP)->R[0])
+#define sStartRxProcessor(ChP) rp_writech4(ChP,_INDX_ADDR,le32dec((ChP)->R))
 
 /***************************************************************************
 Function: sWriteTxByte
diff --git a/sys/dev/rp/rpvar.h b/sys/dev/rp/rpvar.h
index 9b1790d..7aff0d6 100644
--- a/sys/dev/rp/rpvar.h
+++ b/sys/dev/rp/rpvar.h
@@ -63,8 +63,8 @@ struct rp_port {
 	int			rp_xmit_stopped:1;
 	CONTROLLER_t *		rp_ctlp;
 	CHANNEL_t		rp_channel;
-	unsigned short		TxBuf[TXFIFO_SIZE/2 +1];
-	unsigned short		RxBuf[RXFIFO_SIZE/2 +1];
+	unsigned char		TxBuf[TXFIFO_SIZE];
+	unsigned char		RxBuf[RXFIFO_SIZE];
 };
 
 /* Actually not used */