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| author | yongari <yongari@FreeBSD.org> | 2008-08-04 02:05:09 +0000 |
|---|---|---|
| committer | yongari <yongari@FreeBSD.org> | 2008-08-04 02:05:09 +0000 |
| commit | a36e7d5b67d8bfe0250a789e5c39a2b037658682 (patch) | |
| tree | b1dcbd3450bbae6407dfdcd9e2323b1ff1e8c277 /sys/dev/re/if_re.c | |
| parent | 45f0d08992efea87dbc15433e392afdeabec2270 (diff) | |
| download | FreeBSD-src-a36e7d5b67d8bfe0250a789e5c39a2b037658682.zip FreeBSD-src-a36e7d5b67d8bfe0250a789e5c39a2b037658682.tar.gz | |
The number of bits reserved for MSS in RealTek controllers is
11bits. This limits the maximum interface MTU size in TSO case
as upper stack should not generate TCP segments with MSS greater
than the limit. Armed with this information, disable TSO if
interface MTU is greater than the limit.
Diffstat (limited to 'sys/dev/re/if_re.c')
| -rw-r--r-- | sys/dev/re/if_re.c | 18 |
1 files changed, 18 insertions, 0 deletions
diff --git a/sys/dev/re/if_re.c b/sys/dev/re/if_re.c index ce74b7a..f549bf5 100644 --- a/sys/dev/re/if_re.c +++ b/sys/dev/re/if_re.c @@ -2543,6 +2543,14 @@ re_init_locked(sc) } else cfg |= RL_CPLUSCMD_RXENB | RL_CPLUSCMD_TXENB; CSR_WRITE_2(sc, RL_CPLUS_CMD, cfg); + /* + * Disable TSO if interface MTU size is greater than MSS + * allowed in controller. + */ + if (ifp->if_mtu > RL_TSO_MTU && (ifp->if_capenable & IFCAP_TSO4) != 0) { + ifp->if_capenable &= ~IFCAP_TSO4; + ifp->if_hwassist &= ~CSUM_TSO; + } /* * Init our MAC address. Even though the chipset @@ -2754,6 +2762,11 @@ re_ioctl(ifp, command, data) RL_LOCK(sc); if (ifp->if_mtu != ifr->ifr_mtu) ifp->if_mtu = ifr->ifr_mtu; + if (ifp->if_mtu > RL_TSO_MTU && + (ifp->if_capenable & IFCAP_TSO4) != 0) { + ifp->if_capenable &= ~IFCAP_TSO4; + ifp->if_hwassist &= ~CSUM_TSO; + } RL_UNLOCK(sc); break; case SIOCSIFFLAGS: @@ -2829,6 +2842,11 @@ re_ioctl(ifp, command, data) ifp->if_hwassist |= CSUM_TSO; else ifp->if_hwassist &= ~CSUM_TSO; + if (ifp->if_mtu > RL_TSO_MTU && + (ifp->if_capenable & IFCAP_TSO4) != 0) { + ifp->if_capenable &= ~IFCAP_TSO4; + ifp->if_hwassist &= ~CSUM_TSO; + } } if ((mask & IFCAP_WOL) != 0 && (ifp->if_capabilities & IFCAP_WOL) != 0) { |
