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authornsouch <nsouch@FreeBSD.org>2001-01-25 10:51:41 +0000
committernsouch <nsouch@FreeBSD.org>2001-01-25 10:51:41 +0000
commitfe01c653ba990e326866d151addf65e7acdbf8db (patch)
tree01eabd4a8f65b6fbcf4160dd56a08dbc0cdfe905 /sys/dev/ppc
parentfc25f4c3ead7bbd28f05e197043feaff4c725ac7 (diff)
downloadFreeBSD-src-fe01c653ba990e326866d151addf65e7acdbf8db.zip
FreeBSD-src-fe01c653ba990e326866d151addf65e7acdbf8db.tar.gz
Consider that the chipset may be in ECP mode (from BIOS settings)
even if mode PS/2 is forced with bootflags. As a matter of fact, chipsets needs some extra configuration for accessing PS/2 mode from ECP. The current patch is only relevant for generic chipsets since specific code is supposed to deal with this during detection.
Diffstat (limited to 'sys/dev/ppc')
-rw-r--r--sys/dev/ppc/ppc.c70
-rw-r--r--sys/dev/ppc/ppcreg.h3
2 files changed, 37 insertions, 36 deletions
diff --git a/sys/dev/ppc/ppc.c b/sys/dev/ppc/ppc.c
index 5d0f932..3a30d54 100644
--- a/sys/dev/ppc/ppc.c
+++ b/sys/dev/ppc/ppc.c
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 1997-2000 Nicolas Souchu
+ * Copyright (c) 2001 Alcove - Nicolas Souchu
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -154,7 +154,7 @@ ppc_ecp_sync(device_t dev) {
int i, r;
struct ppc_data *ppc = DEVTOSOFTC(dev);
- if (!(ppc->ppc_avm & PPB_ECP))
+ if (!(ppc->ppc_avm & PPB_ECP) && !(ppc->ppc_dtm & PPB_ECP))
return;
r = r_ecr(ppc);
@@ -337,7 +337,7 @@ ppc_generic_setmode(struct ppc_data *ppc, int mode)
return (EINVAL);
/* if ECP mode, configure ecr register */
- if (ppc->ppc_avm & PPB_ECP) {
+ if ((ppc->ppc_avm & PPB_ECP) || (ppc->ppc_dtm & PPB_ECP)) {
/* return to byte mode (keeping direction bit),
* no interrupt, no DMA to be able to change to
* ECP
@@ -382,7 +382,7 @@ ppc_smclike_setmode(struct ppc_data *ppc, int mode)
return (EINVAL);
/* if ECP mode, configure ecr register */
- if (ppc->ppc_avm & PPB_ECP) {
+ if ((ppc->ppc_avm & PPB_ECP) || (ppc->ppc_dtm & PPB_ECP)) {
/* return to byte mode (keeping direction bit),
* no interrupt, no DMA to be able to change to
* ECP or EPP mode
@@ -1215,47 +1215,47 @@ ppc_generic_detect(struct ppc_data *ppc, int chipset_mode)
if (bootverbose)
printf("ppc%d:", ppc->ppc_unit);
- if (!chipset_mode) {
- /* first, check for ECP */
- w_ecr(ppc, PPC_ECR_PS2);
- if ((r_ecr(ppc) & 0xe0) == PPC_ECR_PS2) {
- ppc->ppc_avm |= PPB_ECP | PPB_SPP;
- if (bootverbose)
- printf(" ECP SPP");
+ /* first, check for ECP */
+ w_ecr(ppc, PPC_ECR_PS2);
+ if ((r_ecr(ppc) & 0xe0) == PPC_ECR_PS2) {
+ ppc->ppc_dtm |= PPB_ECP | PPB_SPP;
+ if (bootverbose)
+ printf(" ECP SPP");
- /* search for SMC style ECP+EPP mode */
- w_ecr(ppc, PPC_ECR_EPP);
- }
+ /* search for SMC style ECP+EPP mode */
+ w_ecr(ppc, PPC_ECR_EPP);
+ }
- /* try to reset EPP timeout bit */
- if (ppc_check_epp_timeout(ppc)) {
- ppc->ppc_avm |= PPB_EPP;
+ /* try to reset EPP timeout bit */
+ if (ppc_check_epp_timeout(ppc)) {
+ ppc->ppc_dtm |= PPB_EPP;
- if (ppc->ppc_avm & PPB_ECP) {
- /* SMC like chipset found */
- ppc->ppc_model = SMC_LIKE;
- ppc->ppc_type = PPC_TYPE_SMCLIKE;
+ if (ppc->ppc_dtm & PPB_ECP) {
+ /* SMC like chipset found */
+ ppc->ppc_model = SMC_LIKE;
+ ppc->ppc_type = PPC_TYPE_SMCLIKE;
- if (bootverbose)
- printf(" ECP+EPP");
- } else {
- if (bootverbose)
- printf(" EPP");
- }
+ if (bootverbose)
+ printf(" ECP+EPP");
} else {
- /* restore to standard mode */
- w_ecr(ppc, PPC_ECR_STD);
+ if (bootverbose)
+ printf(" EPP");
}
+ } else {
+ /* restore to standard mode */
+ w_ecr(ppc, PPC_ECR_STD);
+ }
- /* XXX try to detect NIBBLE and PS2 modes */
- ppc->ppc_avm |= PPB_NIBBLE;
+ /* XXX try to detect NIBBLE and PS2 modes */
+ ppc->ppc_dtm |= PPB_NIBBLE;
- if (bootverbose)
- printf(" SPP");
+ if (bootverbose)
+ printf(" SPP");
- } else {
+ if (chipset_mode)
ppc->ppc_avm = chipset_mode;
- }
+ else
+ ppc->ppc_avm = ppc->ppc_dtm;
if (bootverbose)
printf("\n");
diff --git a/sys/dev/ppc/ppcreg.h b/sys/dev/ppc/ppcreg.h
index 8bd637c..4d5e665 100644
--- a/sys/dev/ppc/ppcreg.h
+++ b/sys/dev/ppc/ppcreg.h
@@ -1,5 +1,5 @@
/*-
- * Copyright (c) 1997 Nicolas Souchu
+ * Copyright (c) 2001 Alcove - Nicolas Souchu
* All rights reserved.
*
* Redistribution and use in source and binary forms, with or without
@@ -63,6 +63,7 @@ struct ppc_data {
int ppc_mode; /* chipset current mode */
int ppc_avm; /* chipset available modes */
+ int ppc_dtm; /* chipset detected modes */
#define PPC_IRQ_NONE 0x0
#define PPC_IRQ_nACK 0x1
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