o Move ISA specific code from ppc.c to ppc_isa.c -- a bus front-

   end for isa(4).
o  Add a seperate bus frontend for acpi(4) and allow ISA DMA for
   it when ISA is configured in the kernel. This allows acpi(4)
   attachments in non-ISA configurations, as is possible for ia64.
o  Add a seperate bus frontend for pci(4) and detect known single
   port parallel cards.
o  Merge PC98 specific changes under pc98/cbus into the MI driver.
   The changes are minor enough for conditional compilation and
   in this form invites better abstraction.
o  Have ppc(4) usabled on all platforms, now that ISA specifics
   are untangled enough.

1 files changed, 9 insertions, 0 deletions

diff --git a/sys/dev/ppc/ppcreg.h b/sys/dev/ppc/ppcreg.h
index ea12ead..6b26ed9 100644
--- a/sys/dev/ppc/ppcreg.h
+++ b/sys/dev/ppc/ppcreg.h
@@ -82,6 +82,7 @@ struct ppc_data {
 	int ppc_dmaflags;	/* dma transfer flags */
 	caddr_t ppc_dmaddr;	/* buffer address */
 	u_int ppc_dmacnt;	/* count of bytes sent with dma */
+	void (*ppc_dmadone)(struct ppc_data*);
 
 #define PPC_PWORD_MASK	0x30
 #define PPC_PWORD_16	0x00
@@ -123,10 +124,18 @@ struct ppc_data {
 #define PPC_SPP_CTR	2	/* SPP control register */
 #define PPC_EPP_ADDR	3	/* EPP address register (8 bit) */
 #define PPC_EPP_DATA	4	/* EPP data register (8, 16 or 32 bit) */
+#if defined(__i386__) && defined(PC98)
+#define PPC_1284_ENABLE	0x09	/* IEEE STD 1284 Enable register */
+#define PPC_ECP_D_FIFO	0x0c	/* ECP Data fifo register */
+#define PPC_ECP_CNFGA	0x0c	/* Configuration register A */
+#define PPC_ECP_CNFGB	0x0d	/* Configuration register B */
+#define PPC_ECP_ECR	0x0e	/* ECP extended control register */
+#else
 #define PPC_ECP_D_FIFO	0x400	/* ECP Data fifo register */
 #define PPC_ECP_CNFGA	0x400	/* Configuration register A */
 #define PPC_ECP_CNFGB	0x401	/* Configuration register B */
 #define PPC_ECP_ECR	0x402	/* ECP extended control register */
+#endif
 
 #define PPC_FIFO_EMPTY	0x1	/* ecr register - bit 0 */
 #define PPC_FIFO_FULL	0x2	/* ecr register - bit 1 */