diff options
| author | jhb <jhb@FreeBSD.org> | 2007-03-05 16:18:31 +0000 |
|---|---|---|
| committer | jhb <jhb@FreeBSD.org> | 2007-03-05 16:18:31 +0000 |
| commit | 343ab2725d574a0b95ba6f977b348691f9758868 (patch) | |
| tree | 2dffbd87eed6c06194026b8bc8abf24f6eafac63 /sys/dev/pci/pcireg.h | |
| parent | 873b029d16e51e2b418f2b47a7dc8599a59bc167 (diff) | |
| download | FreeBSD-src-343ab2725d574a0b95ba6f977b348691f9758868.zip FreeBSD-src-343ab2725d574a0b95ba6f977b348691f9758868.tar.gz | |
- Flesh out list of UART simple comms programming interfaces.
- Add list of PIC base peripheral programming interfaces.
- Add VPD capability register offsets.
MFC after: 3 days
Diffstat (limited to 'sys/dev/pci/pcireg.h')
| -rw-r--r-- | sys/dev/pci/pcireg.h | 16 |
1 files changed, 15 insertions, 1 deletions
diff --git a/sys/dev/pci/pcireg.h b/sys/dev/pci/pcireg.h index f30b39f..136b41a 100644 --- a/sys/dev/pci/pcireg.h +++ b/sys/dev/pci/pcireg.h @@ -252,7 +252,13 @@ #define PCIC_SIMPLECOMM 0x07 #define PCIS_SIMPLECOMM_UART 0x00 +#define PCIP_SIMPLECOMM_UART_8250 0x00 +#define PCIP_SIMPLECOMM_UART_16450A 0x01 #define PCIP_SIMPLECOMM_UART_16550A 0x02 +#define PCIP_SIMPLECOMM_UART_16650A 0x03 +#define PCIP_SIMPLECOMM_UART_16750A 0x04 +#define PCIP_SIMPLECOMM_UART_16850A 0x05 +#define PCIP_SIMPLECOMM_UART_16950A 0x06 #define PCIS_SIMPLECOMM_PAR 0x01 #define PCIS_SIMPLECOMM_MULSER 0x02 #define PCIS_SIMPLECOMM_MODEM 0x03 @@ -260,6 +266,11 @@ #define PCIC_BASEPERIPH 0x08 #define PCIS_BASEPERIPH_PIC 0x00 +#define PCIP_BASEPERIPH_PIC_8259A 0x00 +#define PCIP_BASEPERIPH_PIC_ISA 0x01 +#define PCIP_BASEPERIPH_PIC_EISA 0x02 +#define PCIP_BASEPERIPH_PIC_IO_APIC 0x10 +#define PCIP_BASEPERIPH_PIC_IOX_APIC 0x20 #define PCIS_BASEPERIPH_DMA 0x01 #define PCIS_BASEPERIPH_TIMER 0x02 #define PCIS_BASEPERIPH_RTC 0x03 @@ -339,7 +350,6 @@ #define PCIB_BCR_DISCARD_TIMER_SERREN 0x0800 /* PCI power manangement */ - #define PCIR_POWER_CAP 0x2 #define PCIM_PCAP_SPEC 0x0007 #define PCIM_PCAP_PMEREQCLK 0x0008 @@ -386,6 +396,10 @@ #define PCIR_POWER_DATA 0x7 +/* VPD capability registers */ +#define PCIR_VPD_ADDR 0x2 +#define PCIR_VPD_DATA 0x4 + /* PCI Message Signalled Interrupts (MSI) */ #define PCIR_MSI_CTRL 0x2 #define PCIM_MSICTRL_VECTOR 0x0100 |
