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author | marius <marius@FreeBSD.org> | 2007-09-30 11:05:18 +0000 |
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committer | marius <marius@FreeBSD.org> | 2007-09-30 11:05:18 +0000 |
commit | d60b8a3096c2760d921f7f4b6e99280cb82f8c7b (patch) | |
tree | 8043b70223b1a26b9d8903a04633a168390b18dc /sys/dev/pci/pcib_private.h | |
parent | 9ea9e12f35ecb014cf0a8b5047b850605706741b (diff) | |
download | FreeBSD-src-d60b8a3096c2760d921f7f4b6e99280cb82f8c7b.zip FreeBSD-src-d60b8a3096c2760d921f7f4b6e99280cb82f8c7b.tar.gz |
Make the PCI code aware of PCI domains (aka PCI segments) so we can
support machines having multiple independently numbered PCI domains
and don't support reenumeration without ambiguity amongst the
devices as seen by the OS and represented by PCI location strings.
This includes introducing a function pci_find_dbsf(9) which works
like pci_find_bsf(9) but additionally takes a domain number argument
and limiting pci_find_bsf(9) to only search devices in domain 0 (the
only domain in single-domain systems). Bge(4) and ofw_pcibus(4) are
changed to use pci_find_dbsf(9) instead of pci_find_bsf(9) in order
to no longer report false positives when searching for siblings and
dupe devices in the same domain respectively.
Along with this change the sole host-PCI bridge driver converted to
actually make use of PCI domain support is uninorth(4), the others
continue to use domain 0 only for now and need to be converted as
appropriate later on.
Note that this means that the format of the location strings as used
by pciconf(8) has been changed and that consumers of <sys/pciio.h>
potentially need to be recompiled.
Suggested by: jhb
Reviewed by: grehan, jhb, marcel
Approved by: re (kensmith), jhb (PCI maintainer hat)
Diffstat (limited to 'sys/dev/pci/pcib_private.h')
-rw-r--r-- | sys/dev/pci/pcib_private.h | 1 |
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/dev/pci/pcib_private.h b/sys/dev/pci/pcib_private.h index aea476d..c375e3e 100644 --- a/sys/dev/pci/pcib_private.h +++ b/sys/dev/pci/pcib_private.h @@ -48,6 +48,7 @@ struct pcib_softc #define PCIB_SUBTRACTIVE 0x1 #define PCIB_DISABLE_MSI 0x2 uint16_t command; /* command register */ + uint32_t domain; /* domain number */ uint8_t secbus; /* secondary bus number */ uint8_t subbus; /* subordinate bus number */ pci_addr_t pmembase; /* base address of prefetchable memory */ |