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| author | jhb <jhb@FreeBSD.org> | 2014-02-19 18:34:47 +0000 |
|---|---|---|
| committer | jhb <jhb@FreeBSD.org> | 2014-02-19 18:34:47 +0000 |
| commit | 169a4e8371dd1f60ac3b3e9d6fbb216c7d19accd (patch) | |
| tree | dc277e84571c2b0f6bc689012acba796c548c4f8 /sys/dev/pci/pci_pci.c | |
| parent | 690ab44de324d5cd9aee67eed6f81effd837b070 (diff) | |
| download | FreeBSD-src-169a4e8371dd1f60ac3b3e9d6fbb216c7d19accd.zip FreeBSD-src-169a4e8371dd1f60ac3b3e9d6fbb216c7d19accd.tar.gz | |
MFC 261524,261526,261527:
- Properly set the alignment flags when allocating the initial range for a
BAR. This only really matters when pci_do_realloc_bars is enabled and
the initial allocation of a specific range fails.
- Simplify pci_reserve_map() by calling resource_list_reserve() to allocate
the resource after creating a resource list entry rather than reimplementing
it by hand.
- Add two tunables to ignore certain firmware-assigned resources. These
are mostly useful for debugging.
- hw.pci.clear_bars ignores all firmware-assigned ranges for BARs when
set.
- hw.pci.clear_pcib ignores all firmware-assigned ranges for PCI-PCI
bridge I/O windows when set.
Diffstat (limited to 'sys/dev/pci/pci_pci.c')
| -rw-r--r-- | sys/dev/pci/pci_pci.c | 19 |
1 files changed, 19 insertions, 0 deletions
diff --git a/sys/dev/pci/pci_pci.c b/sys/dev/pci/pci_pci.c index 3fa3d5a..5fa886e 100644 --- a/sys/dev/pci/pci_pci.c +++ b/sys/dev/pci/pci_pci.c @@ -103,6 +103,12 @@ DEFINE_CLASS_0(pcib, pcib_driver, pcib_methods, sizeof(struct pcib_softc)); DRIVER_MODULE(pcib, pci, pcib_driver, pcib_devclass, NULL, NULL); #ifdef NEW_PCIB +SYSCTL_DECL(_hw_pci); + +static int pci_clear_pcib; +TUNABLE_INT("hw.pci.clear_pcib", &pci_clear_pcib); +SYSCTL_INT(_hw_pci, OID_AUTO, clear_pcib, CTLFLAG_RDTUN, &pci_clear_pcib, 0, + "Clear firmware-assigned resources for PCI-PCI bridge I/O windows."); /* * Is a resource from a child device sub-allocated from one of our @@ -416,6 +422,19 @@ pcib_probe_windows(struct pcib_softc *sc) dev = sc->dev; + if (pci_clear_pcib) { + pci_write_config(dev, PCIR_IOBASEL_1, 0xff, 1); + pci_write_config(dev, PCIR_IOBASEH_1, 0xffff, 2); + pci_write_config(dev, PCIR_IOLIMITL_1, 0, 1); + pci_write_config(dev, PCIR_IOLIMITH_1, 0, 2); + pci_write_config(dev, PCIR_MEMBASE_1, 0xffff, 2); + pci_write_config(dev, PCIR_MEMLIMIT_1, 0, 2); + pci_write_config(dev, PCIR_PMBASEL_1, 0xffff, 2); + pci_write_config(dev, PCIR_PMBASEH_1, 0xffffffff, 4); + pci_write_config(dev, PCIR_PMLIMITL_1, 0, 2); + pci_write_config(dev, PCIR_PMLIMITH_1, 0, 4); + } + /* Determine if the I/O port window is implemented. */ val = pci_read_config(dev, PCIR_IOBASEL_1, 1); if (val == 0) { |
