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| author | jimharris <jimharris@FreeBSD.org> | 2012-12-18 23:27:18 +0000 |
|---|---|---|
| committer | jimharris <jimharris@FreeBSD.org> | 2012-12-18 23:27:18 +0000 |
| commit | 99451e9e7417c523343c14e3808924954ae700da (patch) | |
| tree | 886a9cc9a87f93839be0aa638ab9a77cfebcda64 /sys/dev/nvme/nvme_private.h | |
| parent | 8807e65d8f87824ee060b2b82d21ee9259d0de10 (diff) | |
| download | FreeBSD-src-99451e9e7417c523343c14e3808924954ae700da.zip FreeBSD-src-99451e9e7417c523343c14e3808924954ae700da.tar.gz | |
Map BAR 4/5, because NVMe spec says devices may place the MSI-X table
behind BAR 4/5, rather than in BAR 0/1 with the control/doorbell registers.
Sponsored by: Intel
Diffstat (limited to 'sys/dev/nvme/nvme_private.h')
| -rw-r--r-- | sys/dev/nvme/nvme_private.h | 8 |
1 files changed, 8 insertions, 0 deletions
diff --git a/sys/dev/nvme/nvme_private.h b/sys/dev/nvme/nvme_private.h index e811901..a74b876 100644 --- a/sys/dev/nvme/nvme_private.h +++ b/sys/dev/nvme/nvme_private.h @@ -199,6 +199,14 @@ struct nvme_controller { int resource_id; struct resource *resource; + /* + * The NVMe spec allows for the MSI-X table to be placed in BAR 4/5, + * separate from the control registers which are in BAR 0/1. These + * members track the mapping of BAR 4/5 for that reason. + */ + int bar4_resource_id; + struct resource *bar4_resource; + #ifdef CHATHAM2 bus_space_tag_t chatham_bus_tag; bus_space_handle_t chatham_bus_handle; |
