Use generic MII #defines instead of private ones when the registers

are IEEE defined.

Object file comes out the same.

2 files changed, 67 insertions, 169 deletions

diff --git a/sys/dev/mii/nsgphy.c b/sys/dev/mii/nsgphy.c
index 6170fd6..57ff861 100644
--- a/sys/dev/mii/nsgphy.c
+++ b/sys/dev/mii/nsgphy.c
@@ -100,8 +100,8 @@ static void	nsgphy_status(struct mii_softc *);
 static int	nsgphy_mii_phy_auto(struct mii_softc *, int);
 extern void	mii_phy_auto_timeout(void *);
 
-static int nsgphy_probe(dev)
-	device_t		dev;
+static int
+nsgphy_probe(device_t dev)
 {
 	struct mii_attach_args *ma;
 
@@ -121,8 +121,8 @@ static int nsgphy_probe(dev)
 	return(ENXIO);
 }
 
-static int nsgphy_attach(dev)
-	device_t		dev;
+static int
+nsgphy_attach(device_t dev)
 {
 	struct mii_softc *sc;
 	struct mii_attach_args *ma;
@@ -157,23 +157,23 @@ static int nsgphy_attach(dev)
 
 	device_printf(dev, " ");
 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, IFM_FDX, sc->mii_inst),
-	    NSGPHY_S1000|NSGPHY_BMCR_FDX);
+	    BMCR_S1000|BMCR_FDX);
 	PRINT("1000baseTX-FDX");
 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_1000_TX, 0, sc->mii_inst),
-	    NSGPHY_S1000);
+	    BMCR_S1000);
 	PRINT("1000baseTX");
 	sc->mii_capabilities =
 	    (PHY_READ(sc, MII_BMSR) |
 	    (BMSR_10TFDX|BMSR_10THDX)) & ma->mii_capmask;
 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, IFM_FDX, sc->mii_inst),
-	    NSGPHY_S100|NSGPHY_BMCR_FDX);
+	    BMCR_S100|BMCR_FDX);
 	PRINT("100baseTX-FDX");
-	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), NSGPHY_S100);
+	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_100_TX, 0, sc->mii_inst), BMCR_S100);
 	PRINT("100baseTX");
 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, IFM_FDX, sc->mii_inst),
-	    NSGPHY_S10|NSGPHY_BMCR_FDX);
+	    BMCR_S10|BMCR_FDX);
 	PRINT("10baseT-FDX");
-	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), NSGPHY_S10);
+	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_10_T, 0, sc->mii_inst), BMCR_S10);
 	PRINT("10baseT");
 	ADD(IFM_MAKEWORD(IFM_ETHER, IFM_AUTO, 0, sc->mii_inst), 0);
 	PRINT("auto");
@@ -185,8 +185,8 @@ static int nsgphy_attach(dev)
 	return(0);
 }
 
-static int nsgphy_detach(dev)
-	device_t		dev;
+static int
+nsgphy_detach(device_t dev)
 {
 	struct mii_softc *sc;
 	struct mii_data *mii;
@@ -200,11 +200,9 @@ static int nsgphy_detach(dev)
 
 	return(0);
 }
-int
-nsgphy_service(sc, mii, cmd)
-	struct mii_softc *sc;
-	struct mii_data *mii;
-	int cmd;
+
+static int
+nsgphy_service(struct mii_softc *sc, struct mii_data *mii, int cmd)
 {
 	struct ifmedia_entry *ife = mii->mii_media.ifm_cur;
 	int reg;
@@ -242,20 +240,20 @@ nsgphy_service(sc, mii, cmd)
 			/*
 			 * If we're already in auto mode, just return.
 			 */
-			if (PHY_READ(sc, NSGPHY_MII_BMCR) & NSGPHY_BMCR_AUTOEN)
+			if (PHY_READ(sc, MII_BMCR) & BMCR_AUTOEN)
 				return (0);
 #endif
 			(void) nsgphy_mii_phy_auto(sc, 0);
 			break;
 		case IFM_1000_TX:
 			if ((ife->ifm_media & IFM_GMASK) == IFM_FDX) {
-				PHY_WRITE(sc, NSGPHY_MII_BMCR,
-				    NSGPHY_BMCR_FDX|NSGPHY_BMCR_SPD1);
+				PHY_WRITE(sc, MII_BMCR,
+				    BMCR_FDX|BMCR_SPEED1);
 			} else {
-				PHY_WRITE(sc, NSGPHY_MII_BMCR,
-				    NSGPHY_BMCR_SPD1);
+				PHY_WRITE(sc, MII_BMCR,
+				    BMCR_SPEED1);
 			}
-			PHY_WRITE(sc, NSGPHY_MII_ANAR, NSGPHY_SEL_TYPE);
+			PHY_WRITE(sc, MII_ANAR, ANAR_CSMA);
 
 			/*
 			 * When setting the link manually, one side must
@@ -266,11 +264,10 @@ nsgphy_service(sc, mii, cmd)
 			 * be a master, otherwise it's a slave.
 			 */
 			if ((mii->mii_ifp->if_flags & IFF_LINK0)) {
-				PHY_WRITE(sc, NSGPHY_MII_1000CTL,
-				    NSGPHY_1000CTL_MSE|NSGPHY_1000CTL_MSC);
+				PHY_WRITE(sc, MII_100T2CR,
+				    GTCR_MAN_MS|GTCR_ADV_MS);
 			} else {
-				PHY_WRITE(sc, NSGPHY_MII_1000CTL,
-				    NSGPHY_1000CTL_MSE);
+				PHY_WRITE(sc, MII_100T2CR, GTCR_MAN_MS);
 			}
 			break;
 		case IFM_100_T4:
@@ -285,8 +282,7 @@ nsgphy_service(sc, mii, cmd)
 			/*
 			 * BMCR data is stored in the ifmedia entry.
 			 */
-			PHY_WRITE(sc, MII_ANAR,
-			    mii_anar(ife->ifm_media));
+			PHY_WRITE(sc, MII_ANAR, mii_anar(ife->ifm_media));
 			PHY_WRITE(sc, MII_BMCR, ife->ifm_data);
 			break;
 		}
@@ -344,8 +340,7 @@ nsgphy_service(sc, mii, cmd)
 }
 
 static void
-nsgphy_status(sc)
-	struct mii_softc *sc;
+nsgphy_status(struct mii_softc *sc)
 {
 	struct mii_data *mii = sc->mii_pdata;
 	int bmsr, bmcr, physup, anlpar, gstat;
@@ -353,58 +348,64 @@ nsgphy_status(sc)
 	mii->mii_media_status = IFM_AVALID;
 	mii->mii_media_active = IFM_ETHER;
 
-	bmsr = PHY_READ(sc, NSGPHY_MII_BMSR);
+	bmsr = PHY_READ(sc, MII_BMSR);
+
 	physup = PHY_READ(sc, NSGPHY_MII_PHYSUP);
+
 	if (physup & NSGPHY_PHYSUP_LNKSTS)
 		mii->mii_media_status |= IFM_ACTIVE;
 
-	bmcr = PHY_READ(sc, NSGPHY_MII_BMCR);
+	bmcr = PHY_READ(sc, MII_BMCR);
 
-	if (bmcr & NSGPHY_BMCR_LOOP)
+	if (bmcr & BMCR_LOOP)
 		mii->mii_media_active |= IFM_LOOP;
 
-	if (bmcr & NSGPHY_BMCR_AUTOEN) {
-		if ((bmsr & NSGPHY_BMSR_ACOMP) == 0) {
+	if (bmcr & BMCR_AUTOEN) {
+		/*
+		 * The media status bits are only valid if autonegotiation
+		 * has completed (or it's disabled).
+		 */
+		if ((bmsr & BMSR_ACOMP) == 0) {
 			/* Erg, still trying, I guess... */
 			mii->mii_media_active |= IFM_NONE;
 			return;
 		}
-		anlpar = PHY_READ(sc, NSGPHY_MII_ANLPAR);
-		gstat = PHY_READ(sc, NSGPHY_MII_1000STS);
-		if (gstat & NSGPHY_1000STS_LPFD)
+		anlpar = PHY_READ(sc, MII_ANLPAR);
+		gstat = PHY_READ(sc, MII_100T2SR);
+		if (gstat & GTSR_LP_1000TFDX)
 			mii->mii_media_active |= IFM_1000_TX|IFM_FDX;
-		else if (gstat & NSGPHY_1000STS_LPHD)
+		else if (gstat & GTSR_LP_1000THDX)
 			mii->mii_media_active |= IFM_1000_TX|IFM_HDX;
-		else if (anlpar & NSGPHY_ANLPAR_100T4)
+		else if (anlpar & ANLPAR_T4)
 			mii->mii_media_active |= IFM_100_T4;
-		else if (anlpar & NSGPHY_ANLPAR_100FDX)
+		else if (anlpar & ANLPAR_TX_FD)
 			mii->mii_media_active |= IFM_100_TX|IFM_FDX;
-		else if (anlpar & NSGPHY_ANLPAR_100HDX)
+		else if (anlpar & ANLPAR_TX)
 			mii->mii_media_active |= IFM_100_TX;
-		else if (anlpar & NSGPHY_ANLPAR_10FDX)
+		else if (anlpar & ANLPAR_10_FD)
 			mii->mii_media_active |= IFM_10_T|IFM_FDX;
-		else if (anlpar & NSGPHY_ANLPAR_10HDX)
+		else if (anlpar & ANLPAR_10)
 			mii->mii_media_active |= IFM_10_T|IFM_HDX;
 		else
 			mii->mii_media_active |= IFM_NONE;
 		return;
 	}
 
-	switch(bmcr & (NSGPHY_BMCR_SPD1|NSGPHY_BMCR_SPD0)) {
-	case NSGPHY_S1000:
+	switch(bmcr & (BMCR_SPEED1|BMCR_SPEED0)) {
+	case BMCR_S1000:
 		mii->mii_media_active |= IFM_1000_TX;
 		break;
-	case NSGPHY_S100:
+	case BMCR_S100:
 		mii->mii_media_active |= IFM_100_TX;
 		break;
-	case NSGPHY_S10:
+	case BMCR_S10:
 		mii->mii_media_active |= IFM_10_T;
 		break;
 	default:
 		break;
 	}
 
-	if (bmcr & NSGPHY_BMCR_FDX)
+	if (bmcr & BMCR_FDX)
 		mii->mii_media_active |= IFM_FDX;
 	else
 		mii->mii_media_active |= IFM_HDX;
@@ -414,33 +415,30 @@ nsgphy_status(sc)
 
 
 static int
-nsgphy_mii_phy_auto(mii, waitfor)
-	struct mii_softc *mii;
-	int waitfor;
+nsgphy_mii_phy_auto(struct mii_softc *mii, int waitfor)
 {
 	int bmsr, ktcr = 0, i;
 
 	if ((mii->mii_flags & MIIF_DOINGAUTO) == 0) {
 		mii_phy_reset(mii);
-		PHY_WRITE(mii, NSGPHY_MII_BMCR, 0);
+		PHY_WRITE(mii, MII_BMCR, 0);
 		DELAY(1000);
-		ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL);
-		PHY_WRITE(mii, NSGPHY_MII_1000CTL, ktcr |
-		    (NSGPHY_1000CTL_AFD|NSGPHY_1000CTL_AHD));
-		ktcr = PHY_READ(mii, NSGPHY_MII_1000CTL);
+		ktcr = PHY_READ(mii, MII_100T2CR);
+		PHY_WRITE(mii, MII_100T2CR, ktcr |
+		    (GTCR_ADV_1000TFDX|GTCR_ADV_1000THDX));
+		ktcr = PHY_READ(mii, MII_100T2CR);
 		DELAY(1000);
-		PHY_WRITE(mii, NSGPHY_MII_ANAR,
+		PHY_WRITE(mii, MII_ANAR,
 		    BMSR_MEDIA_TO_ANAR(mii->mii_capabilities) | ANAR_CSMA);
 		DELAY(1000);
-		PHY_WRITE(mii, NSGPHY_MII_BMCR,
-		    NSGPHY_BMCR_AUTOEN | NSGPHY_BMCR_STARTNEG);
+		PHY_WRITE(mii, MII_BMCR,
+		    BMCR_AUTOEN | BMCR_STARTNEG);
 	}
 
 	if (waitfor) {
 		/* Wait 500ms for it to complete. */
 		for (i = 0; i < 500; i++) {
-			if ((bmsr = PHY_READ(mii, NSGPHY_MII_BMSR)) &
-			    NSGPHY_BMSR_ACOMP)
+			if ((bmsr = PHY_READ(mii, MII_BMSR)) & BMSR_ACOMP)
 				return (0);
 			DELAY(1000);
 #if 0
diff --git a/sys/dev/mii/nsgphyreg.h b/sys/dev/mii/nsgphyreg.h
index c63cf35..0c6ef4b 100644
--- a/sys/dev/mii/nsgphyreg.h
+++ b/sys/dev/mii/nsgphyreg.h
@@ -40,110 +40,6 @@
  * NatSemi DP83891 registers
  */
 
-#define NSGPHY_MII_BMCR		0x00
-#define NSGPHY_BMCR_RESET	0x8000
-#define NSGPHY_BMCR_LOOP	0x4000
-#define NSGPHY_BMCR_SPD0	0x2000	/* speed select, lower bit */
-#define NSGPHY_BMCR_AUTOEN	0x1000	/* Autoneg enabled */
-#define NSGPHY_BMCR_PDOWN	0x0800	/* Power down */
-#define NSGPHY_BMCR_ISO		0x0400	/* Isolate */
-#define NSGPHY_BMCR_STARTNEG	0x0200	/* Restart autoneg */
-#define NSGPHY_BMCR_FDX		0x0100	/* Duplex mode */
-#define NSGPHY_BMCR_CTEST	0x0080	/* Collision test enable */
-#define NSGPHY_BMCR_SPD1	0x0040	/* Speed select, upper bit */
-
-#define NSGPHY_S1000		NSGPHY_BMCR_SPD1	/* 1000mbps */
-#define NSGPHY_S100		NSGPHY_BMCR_SPD0	/* 100mpbs */
-#define NSGPHY_S10		0			/* 10mbps */
-
-#define NSGPHY_MII_BMSR		0x01
-#define NSGPHY_BMSR_100BT4	0x8000	/* 100baseT4 support */
-#define NSGPHY_BMSR_100FDX	0x4000	/* 100baseTX full duplex */
-#define NSGPHY_BMSR_100HDX	0x2000	/* 100baseTX half duplex */
-#define NSGPHY_BMSR_10FDX	0x1000	/* 10baseT full duplex */
-#define NSGPHY_BMSR_10HDX	0x0800	/* 10baseT half duplex */
-#define NSGPHY_BMSR_100T2FDX	0x0400	/* 100baseT2 full duplex */
-#define NSGPHY_BMSR_100T2HDX	0x0200	/* 100baseT2 full duplex */
-#define NSGPHY_BMSR_EXTSTS	0x0100	/* 1000baseT Extended status present */
-#define NSGPHY_BMSR_PRESUB	0x0040	/* Preamble surpression */
-#define NSGPHY_BMSR_ACOMP	0x0020	/* Autoneg complete */
-#define NSGPHY_BMSR_RFAULT	0x0010	/* Remote fault condition occured */
-#define NSGPHY_BMSR_ANEG	0x0008	/* Autoneg capable */
-#define NSGPHY_BMSR_LINK	0x0004	/* Link status */
-#define NSGPHY_BMSR_JABBER	0x0002	/* Jabber detected */
-#define NSGPHY_BMSR_EXT		0x0001	/* Extended capability */
-
-#define NSGPHY_MII_ANAR		0x04
-#define NSGPHY_ANAR_NP		0x8000	/* Next page */
-#define NSGPHY_ANAR_RF		0x2000	/* Remote fault */
-#define NSGPHY_ANAR_ASP		0x0800	/* Asymetric Pause */
-#define NSGPHY_ANAR_PC		0x0400	/* Pause capable */
-#define NSGPHY_ANAR_100T4	0x0200	/* 100baseT4 support */
-#define NSGPHY_ANAR_100FDX	0x0100	/* 100baseTX full duplex support */
-#define NSGPHY_ANAR_100HDX	0x0080	/* 100baseTX half duplex support */
-#define NSGPHY_ANAR_10FDX	0x0040	/* 10baseT full duplex support */
-#define NSGPHY_ANAR_10HDX	0x0020	/* 10baseT half duplex support */
-#define NSGPHY_ANAR_SEL		0x001F	/* selector field, 00001=Ethernet */
-
-#define NSGPHY_MII_ANLPAR	0x05
-#define NSGPHY_ANLPAR_NP	0x8000	/* Next page */
-#define NSGPHY_ANLPAR_RF	0x2000	/* Remote fault */
-#define NSGPHY_ANLPAR_ASP	0x0800	/* Asymetric Pause */
-#define NSGPHY_ANLPAR_PC	0x0400	/* Pause capable */
-#define NSGPHY_ANLPAR_100T4	0x0200	/* 100baseT4 support */
-#define NSGPHY_ANLPAR_100FDX	0x0100	/* 100baseTX full duplex support */
-#define NSGPHY_ANLPAR_100HDX	0x0080	/* 100baseTX half duplex support */
-#define NSGPHY_ANLPAR_10FDX	0x0040	/* 10baseT full duplex support */
-#define NSGPHY_ANLPAR_10HDX	0x0020	/* 10baseT half duplex support */
-#define NSGPHY_ANLPAR_SEL	0x001F	/* selector field, 00001=Ethernet */
-
-#define NSGPHY_SEL_TYPE		0x0001	/* ethernet */
-
-#define NSGPHY_MII_ANER		0x06
-#define NSGPHY_ANER_PDF		0x0010	/* Parallel detection fault */
-#define NSGPHY_ANER_LPNP	0x0008	/* Link partner can next page */
-#define NSGPHY_ANER_NP		0x0004	/* Local PHY can next page */
-#define NSGPHY_ANER_RX		0x0002	/* Next page received */
-#define NSGPHY_ANER_LPAN	0x0001 	/* Link partner autoneg capable */
-
-#define NSGPHY_MII_NEXTP	0x07	/* Next page */
-#define NSGPHY_NEXTP_NP		0x8000	/* Next page indication */
-#define NSGPHY_NEXTP_MP		0x2000	/* Message page */
-#define NSGPHY_NEXTP_ACK2	0x1000	/* Acknowledge 2 */
-#define NSGPHY_NEXTP_TOGGLE	0x0800	/* Toggle */
-#define NSGPHY_NEXTP_CODE	0x07FF	/* Code field */
-
-#define NSGPHY_MII_NEXTP_LP	0x08	/* Next page of link partner */
-#define NSGPHY_NEXTPLP_NP	0x8000	/* Next page indication */
-#define NSGPHY_NEXTPLP_MP	0x2000	/* Message page */
-#define NSGPHY_NEXTPLP_ACK2	0x1000	/* Acknowledge 2 */
-#define NSGPHY_NEXTPLP_TOGGLE	0x0800	/* Toggle */
-#define NSGPHY_NEXTPLP_CODE	0x07FF	/* Code field */
-
-#define NSGPHY_MII_1000CTL	0x09	/* 1000baseT control */
-#define NSGPHY_1000CTL_TST	0xE000	/* test modes */
-#define NSGPHY_1000CTL_MSE	0x1000	/* Master/Slave config enable */
-#define NSGPHY_1000CTL_MSC	0x0800	/* Master/Slave setting */
-#define NSGPHY_1000CTL_RD	0x0400	/* Port type: Repeater/DTE */
-#define NSGPHY_1000CTL_AFD	0x0200	/* Advertise full duplex */
-#define NSGPHY_1000CTL_AHD	0x0100	/* Advertise half duplex */
-
-#define NSGPHY_MII_1000STS	0x0A	/* 1000baseT status */
-#define NSGPHY_1000STS_MSF	0x8000	/* Master/slave fault */
-#define NSGPHY_1000STS_MSR	0x4000	/* Master/slave result */
-#define NSGPHY_1000STS_LRS	0x2000	/* Local receiver status */
-#define NSGPHY_1000STS_RRS	0x1000	/* Remote receiver status */
-#define NSGPHY_1000STS_LPFD	0x0800	/* Link partner can FD */
-#define NSGPHY_1000STS_LPHD	0x0400	/* Link partner can HD */
-#define NSGPHY_1000STS_ASM_DIR	0x0200	/* Asymetric pause capable */
-#define NSGPHY_1000STS_IEC	0x00FF	/* Idle error count */
-
-#define NSGPHY_MII_EXTSTS	0x0F	/* Extended status */
-#define NSGPHY_EXTSTS_X_FD_CAP	0x8000	/* 1000base-X FD capable */
-#define NSGPHY_EXTSTS_X_HD_CAP	0x4000	/* 1000base-X HD capable */
-#define NSGPHY_EXTSTS_T_FD_CAP	0x2000	/* 1000base-T FD capable */
-#define NSGPHY_EXTSTS_T_HD_CAP	0x1000	/* 1000base-T HD capable */
-
 #define NSGPHY_MII_STRAPOPT	0x10	/* Strap options */
 #define NSGPHY_STRAPOPT_PHYADDR	0xF800	/* PHY address */
 #define NSGPHY_STRAPOPT_COMPAT	0x0400	/* Broadcom compat mode */
@@ -153,10 +49,14 @@
 #define NSGPHY_STRAPOPT_1000HDX	0x0010	/* Advertise 1000 half-duplex */
 #define NSGPHY_STRAPOPT_1000FDX	0x0008	/* Advertise 1000 full-duplex */
 #define NSGPHY_STRAPOPT_100_ADV	0x0004	/* Advertise 100 full/half-duplex */
-#define NSGPHY_STRAPOPT_SPDSEL	0x0003	/* speed selection */
+#define NSGPHY_STRAPOPT_SPEED1	0x0002	/* speed selection */
+#define NSGPHY_STRAPOPT_SPEED0	0x0001	/* speed selection */
+#define NSGPHY_STRAPOPT_SPDSEL  (NSGPHY_STRAPOPT_SPEED1|NSGPHY_STRAPOPT_SPEED0)
 
 #define NSGPHY_MII_PHYSUP	0x11	/* PHY support/current status */
-#define NSGPHY_PHYSUP_SPDSTS	0x0018	/* speed status */
+#define NSGPHY_PHYSUP_SPEED1	0x0010	/* speed status */
+#define NSGPHY_PHYSUP_SPEED0	0x0008	/* speed status */
+#define NSGPHY_PHYSUP_SPDSTS	(NSGPHY_PHYSUP_SPEED1|NSGPHY_PHYSUP_SPEED0)
 #define NSGPHY_PHYSUP_LNKSTS	0x0004	/* link status */
 #define NSGPHY_PHYSUP_DUPSTS	0x0002	/* duplex status 1 == full */
 #define NSGPHY_PHYSUP_10BT	0x0001	/* 10baseT resolved */