Tweak the xmphy driver a little bit based on something I learned about

the built-in 1000baseX interface in the Level 1 LXT1001 chip. The Level 1
PHY comes up with the isolate bit in the control register set by default,
but it also has the autonegotiate bit set. When you tell the xmphy driver
to select IFM_AUTO mode, it sees that the autoneg bit is already on, and
thus doesn't bother updating the control register. However this means that
the isolate bit is never turned off (unless you manually select 1000baseSX
full or half duplex mode, which does result in the control register being
modified and the ISO bit being turned off).

This subtle and unusual behavioral difference stopped me from being able
to receive packets on the SMC9462TX card for several days, since isolating
the PHY disconnects it from the MAC's data interface. The fix is to omit
the 'is the autoneg big set?' test, since it doesn't really provide much
of an optimization anyway.

This commit also updates the xmphy driver to support the Jato/Level 1
internal PHY. (I'm not sure how Jato Technologies is related to Level 1:
all I know is the OUI from the PHY ID registers maps to Jato in the OUI
database.) This will be used once I add the if_lge driver to support
the LXT10010 chip.

1 files changed, 1 insertions, 0 deletions

diff --git a/sys/dev/mii/xmphyreg.h b/sys/dev/mii/xmphyreg.h
index 1dff3a5..51fc4a1 100644
--- a/sys/dev/mii/xmphyreg.h
+++ b/sys/dev/mii/xmphyreg.h
@@ -44,6 +44,7 @@
 #define XMPHY_BMCR_LOOP		0x4000
 #define XMPHY_BMCR_AUTOEN	0x1000	/* Autoneg enabled */
 #define XMPHY_BMCR_PDOWN	0x0800	/* Power down */
+#define XMPHY_BMCR_ISO		0x0400	/* Isolate */
 #define XMPHY_BMCR_STARTNEG	0x0200	/* Restart autoneg */
 #define XMPHY_BMCR_FDX		0x0100	/* Duplex mode */