Add support for newer JMC250/JMC260 revisions.

 o Chip full mask revision 2 or later controllers have to
   set correct Tx MAC and Tx offload clock depending on negotiated
   link speed.
 o JMC260 chip full mask revision 2 has a silicon bug that can't
   handle 64bit DMA addressing. Add workaround to the bug by
   limiting DMA address space to be within 32bit.
 o Valid FIFO space of receive control and status register was
   changed on chip full mask revision 2 or later controllers. For
   these controllers, use default 16QW as it's supposed to be the
   safest value for maximum PCIe compatibility. JMicron confirmed
   performance will not be reduced even if the FIFO space is set
   to 16QW.
 o When interface is put into suspend/shutdown state, remove Tx MAC
   and Tx offload clock to save more power. We don't need Tx clock
   at all in this state.
 o Added new register definition for chip full mask revision 2 or
   later controllers.

Thanks to JMicron for their continuous support of FreeBSD.

1 files changed, 2 insertions, 0 deletions

diff --git a/sys/dev/jme/if_jmevar.h b/sys/dev/jme/if_jmevar.h
index a47db9f..3575dc1 100644
--- a/sys/dev/jme/if_jmevar.h
+++ b/sys/dev/jme/if_jmevar.h
@@ -181,6 +181,8 @@ struct jme_softc {
 #define	JME_FLAG_PMCAP		0x0020
 #define	JME_FLAG_FASTETH	0x0040
 #define	JME_FLAG_NOJUMBO	0x0080
+#define	JME_FLAG_TXCLK		0x0100
+#define	JME_FLAG_DMA32BIT	0x0200
 #define	JME_FLAG_DETACH		0x4000
 #define	JME_FLAG_LINK		0x8000