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author | attilio <attilio@FreeBSD.org> | 2010-12-08 15:32:54 +0000 |
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committer | attilio <attilio@FreeBSD.org> | 2010-12-08 15:32:54 +0000 |
commit | 0da648deac429493c60c6221c407d38603d7a382 (patch) | |
tree | cffdc42c6e92bea66ca5367aae8950f54dc0ea04 /sys/dev/ichwd/ichwd.c | |
parent | 8c8a1240cf3758dcb4b3e2ce20b68150406f0aaa (diff) | |
download | FreeBSD-src-0da648deac429493c60c6221c407d38603d7a382.zip FreeBSD-src-0da648deac429493c60c6221c407d38603d7a382.tar.gz |
Use convenience macro for minimum and maximum value capping when
re-arming the watchdog timeout.
Sponsored by: Sandvine Incorporated
Submitted by: Mark Johnston <mjohnston at sandvine dot com>
Reviewed by: des
MFC after: 10 days
Diffstat (limited to 'sys/dev/ichwd/ichwd.c')
-rw-r--r-- | sys/dev/ichwd/ichwd.c | 23 |
1 files changed, 8 insertions, 15 deletions
diff --git a/sys/dev/ichwd/ichwd.c b/sys/dev/ichwd/ichwd.c index 83ce5a7..c64468a 100644 --- a/sys/dev/ichwd/ichwd.c +++ b/sys/dev/ichwd/ichwd.c @@ -288,30 +288,23 @@ static __inline void ichwd_tmr_set(struct ichwd_softc *sc, unsigned int timeout) { - /* - * If the datasheets are to be believed, the minimum value - * actually varies from chipset to chipset - 4 for ICH5 and 2 for - * all other chipsets. I suspect this is a bug in the ICH5 - * datasheet and that the minimum is uniformly 2, but I'd rather - * err on the side of caution. - */ - if (timeout < 4) - timeout = 4; + if (timeout < TCO_RLD_TMR_MIN) + timeout = TCO_RLD_TMR_MIN; if (sc->ich_version <= 5) { uint8_t tmr_val8 = ichwd_read_tco_1(sc, TCO_TMR1); - tmr_val8 &= 0xc0; - if (timeout > 0x3f) - timeout = 0x3f; + tmr_val8 &= (~TCO_RLD1_TMR_MAX & 0xff); + if (timeout > TCO_RLD1_TMR_MAX) + timeout = TCO_RLD1_TMR_MAX; tmr_val8 |= timeout; ichwd_write_tco_1(sc, TCO_TMR1, tmr_val8); } else { uint16_t tmr_val16 = ichwd_read_tco_2(sc, TCO_TMR2); - tmr_val16 &= 0xfc00; - if (timeout > 0x03ff) - timeout = 0x03ff; + tmr_val16 &= (~TCO_RLD2_TMR_MAX & 0xffff); + if (timeout > TCO_RLD2_TMR_MAX) + timeout = TCO_RLD2_TMR_MAX; tmr_val16 |= timeout; ichwd_write_tco_2(sc, TCO_TMR2, tmr_val16); } |