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authorian <ian@FreeBSD.org>2014-05-14 16:32:27 +0000
committerian <ian@FreeBSD.org>2014-05-14 16:32:27 +0000
commit13afdc288fd9e982249ab19116c195578ff90fa1 (patch)
treea7f1a8aa7e8f1518d3c62bbfe659e0a16f4cb25a /sys/dev/ic/ns16550.h
parentbb1ce472d77ae881d92bd8dbbc84cf2c24edb5e4 (diff)
downloadFreeBSD-src-13afdc288fd9e982249ab19116c195578ff90fa1.zip
FreeBSD-src-13afdc288fd9e982249ab19116c195578ff90fa1.tar.gz
MFC r257170, r257171, r257172, r257240, r257278, r257279, r257280, r257281,
r257282, r257332 Wait for DesignWare UART transfers completion before accessing line control Enable UART busy detection handling for Armada XP - based board Enable SATA interface on Armada XP Run mvs SATA driver on Armada XP instead of old mv_sata Retire arm_remap_nocache() and the data and constants associated with it. Remove hard-coded mappings related to Armada XP support Fix-up DTB for Armada XP registers' base according to the actual settings Change Armada XP kernel load address to the u-boot's end address Remove not working and deprecated PJ4Bv6 support Switch off explicit broadcasting of the TLB flush operations for PJ4B CPU Add missing ARMv6 CPU functions to ARM Makefile
Diffstat (limited to 'sys/dev/ic/ns16550.h')
-rw-r--r--sys/dev/ic/ns16550.h1
1 files changed, 1 insertions, 0 deletions
diff --git a/sys/dev/ic/ns16550.h b/sys/dev/ic/ns16550.h
index 659f591..33a7dd1 100644
--- a/sys/dev/ic/ns16550.h
+++ b/sys/dev/ic/ns16550.h
@@ -185,6 +185,7 @@
#define DW_REG_USR 31 /* DesignWare derived Uart Status Reg */
#define com_usr 39 /* Octeon 16750/16550 Uart Status Reg */
#define REG_USR com_usr
+#define USR_BUSY 1 /* Uart Busy. Serial transfer in progress */
#define USR_TXFIFO_NOTFULL 2 /* Uart TX FIFO Not full */
/* 16950 register #1. Access enabled by ACR[7]. Also requires !LCR[7]. */
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