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authorhiren <hiren@FreeBSD.org>2014-05-31 00:40:13 +0000
committerhiren <hiren@FreeBSD.org>2014-05-31 00:40:13 +0000
commit21dae9b420aad42ce7076ac7514d7fedaebd93fc (patch)
treee001434d085c905719b51c443e60f3caa9f58377 /sys/dev/hwpmc/hwpmc_intel.c
parentcc6785bd5fbd26d9748c28753819c47ad6f05e03 (diff)
downloadFreeBSD-src-21dae9b420aad42ce7076ac7514d7fedaebd93fc.zip
FreeBSD-src-21dae9b420aad42ce7076ac7514d7fedaebd93fc.tar.gz
MFC r263446
Update hwpmc to support core events for Atom Silvermont microarchitecture. (Model 0x4D as per Intel document 330061-001 01/2014)
Diffstat (limited to 'sys/dev/hwpmc/hwpmc_intel.c')
-rw-r--r--sys/dev/hwpmc/hwpmc_intel.c6
1 files changed, 6 insertions, 0 deletions
diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c
index 026196c..4ce51c7 100644
--- a/sys/dev/hwpmc/hwpmc_intel.c
+++ b/sys/dev/hwpmc/hwpmc_intel.c
@@ -168,6 +168,10 @@ pmc_intel_initialize(void)
cputype = PMC_CPU_INTEL_HASWELL;
nclasses = 5;
break;
+ case 0x4D: /* Per Intel document 330061-001 01/2014. */
+ cputype = PMC_CPU_INTEL_ATOM_SILVERMONT;
+ nclasses = 3;
+ break;
}
break;
#if defined(__i386__) || defined(__amd64__)
@@ -200,6 +204,7 @@ pmc_intel_initialize(void)
* Intel Core, Core 2 and Atom processors.
*/
case PMC_CPU_INTEL_ATOM:
+ case PMC_CPU_INTEL_ATOM_SILVERMONT:
case PMC_CPU_INTEL_CORE:
case PMC_CPU_INTEL_CORE2:
case PMC_CPU_INTEL_CORE2EXTREME:
@@ -288,6 +293,7 @@ pmc_intel_finalize(struct pmc_mdep *md)
switch (md->pmd_cputype) {
#if defined(__i386__) || defined(__amd64__)
case PMC_CPU_INTEL_ATOM:
+ case PMC_CPU_INTEL_ATOM_SILVERMONT:
case PMC_CPU_INTEL_CORE:
case PMC_CPU_INTEL_CORE2:
case PMC_CPU_INTEL_CORE2EXTREME:
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