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| author | kib <kib@FreeBSD.org> | 2014-06-18 05:35:09 +0000 |
|---|---|---|
| committer | kib <kib@FreeBSD.org> | 2014-06-18 05:35:09 +0000 |
| commit | adb3a0aab05d20467f698904501aef5e0ffcbad1 (patch) | |
| tree | 0fffcfd588f8acf983fd826a171a7ce22f50bf1e /sys/dev/hwpmc/hwpmc_intel.c | |
| parent | 13424f9f51add0a3df94b2ed4303d5f455209c60 (diff) | |
| download | FreeBSD-src-adb3a0aab05d20467f698904501aef5e0ffcbad1.zip FreeBSD-src-adb3a0aab05d20467f698904501aef5e0ffcbad1.tar.gz | |
MFC r267062:
Disable existing uncore hwpmc code for Nehalem and Westmere EX.
Diffstat (limited to 'sys/dev/hwpmc/hwpmc_intel.c')
| -rw-r--r-- | sys/dev/hwpmc/hwpmc_intel.c | 13 |
1 files changed, 12 insertions, 1 deletions
diff --git a/sys/dev/hwpmc/hwpmc_intel.c b/sys/dev/hwpmc/hwpmc_intel.c index 4ce51c7..9fd02889 100644 --- a/sys/dev/hwpmc/hwpmc_intel.c +++ b/sys/dev/hwpmc/hwpmc_intel.c @@ -139,15 +139,22 @@ pmc_intel_initialize(void) * Per Intel document 253669-032 9/2009, * pages A-2 and A-57 */ - case 0x2E: cputype = PMC_CPU_INTEL_COREI7; nclasses = 5; break; + case 0x2E: + cputype = PMC_CPU_INTEL_NEHALEM_EX; + nclasses = 3; + break; case 0x25: /* Per Intel document 253669-033US 12/2009. */ case 0x2C: /* Per Intel document 253669-033US 12/2009. */ cputype = PMC_CPU_INTEL_WESTMERE; nclasses = 5; break; + case 0x2F: /* Westmere-EX, seen in wild */ + cputype = PMC_CPU_INTEL_WESTMERE_EX; + nclasses = 3; + break; case 0x2A: /* Per Intel document 253669-039US 05/2011. */ cputype = PMC_CPU_INTEL_SANDYBRIDGE; nclasses = 5; @@ -209,9 +216,11 @@ pmc_intel_initialize(void) case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_NEHALEM_EX: case PMC_CPU_INTEL_IVYBRIDGE: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: + case PMC_CPU_INTEL_WESTMERE_EX: case PMC_CPU_INTEL_SANDYBRIDGE_XEON: case PMC_CPU_INTEL_IVYBRIDGE_XEON: case PMC_CPU_INTEL_HASWELL: @@ -298,10 +307,12 @@ pmc_intel_finalize(struct pmc_mdep *md) case PMC_CPU_INTEL_CORE2: case PMC_CPU_INTEL_CORE2EXTREME: case PMC_CPU_INTEL_COREI7: + case PMC_CPU_INTEL_NEHALEM_EX: case PMC_CPU_INTEL_HASWELL: case PMC_CPU_INTEL_IVYBRIDGE: case PMC_CPU_INTEL_SANDYBRIDGE: case PMC_CPU_INTEL_WESTMERE: + case PMC_CPU_INTEL_WESTMERE_EX: case PMC_CPU_INTEL_SANDYBRIDGE_XEON: case PMC_CPU_INTEL_IVYBRIDGE_XEON: pmc_core_finalize(md); |
