o Revert the part of if_gem.c rev. 1.35 which added a call to gem_stop()

  to gem_attach() as the former access softc members not yet initialized
  at that time and gem_reset() actually is enough to stop the chip. [1]
o Revise the use of gem_bitwait(); add bus_barrier() calls before calling
  gem_bitwait() to ensure the respective bit has been written before we
  starting polling on it and poll for the right bits to change, f.e. even
  though we only reset RX we have to actually wait for both GEM_RESET_RX
  and GEM_RESET_TX to clear. Add some additional gem_bitwait() calls in
  places we've been missing them according to the GEM documentation.
  Along with this some excessive DELAYs, which probably only were added
  because of bugs in gem_bitwait() and its use in the first place, as
  well as as have of an gem_bitwait() reimplementation in gem_reset_tx()
  were removed.
o Add gem_reset_rxdma() and use it to deal with GEM_MAC_RX_OVERFLOW errors
  more gracefully as unlike gem_init_locked() it resets the RX DMA engine
  only, causing no link loss and the FIFOs not to be cleared. Also use it
  deal with GEM_INTR_RX_TAG_ERR errors, with previously were unhandled.
  This was based on information obtained from the Linux GEM and OpenSolaris
  ERI drivers.
o Turn on workarounds for silicon bugs in the Apple GMAC variants.
  This was based on information obtained from the Darwin GMAC and Linux GEM
  drivers.
o Turn on "infinite" (i.e. maximum 31 * 64 bytes in length) DMA bursts.
  This greatly improves especially RX performance.
o Optimize the RX path, this consists of:
  - kicking the receiver as soon as we've a spare descriptor in gem_rint()
    again instead of just once after all the ready ones have been handled;
  - kicking the receiver the right way, i.e. as outlined in the GEM
    documentation in batches of 4 and by pointing it to the descriptor
    after the last valid one;
  - calling gem_rint() before gem_tint() in gem_intr() as gem_tint() may
    take quite a while;
  - doubling the size of the RX ring to 256 descriptors.
  Overall the RX performance of a GEM in a 1GHz Sun Fire V210 was improved
  from ~100Mbit/s to ~850Mbit/s.
o In gem_add_rxbuf() don't assign the newly allocated mbuf to rxs_mbuf
  before calling bus_dmamap_load_mbuf_sg(), if bus_dmamap_load_mbuf_sg()
  fails we'll free the newly allocated mbuf, unable to recycle the
  previous one but a NULL pointer dereference instead.
o In gem_init_locked() honor the return value of gem_meminit().
o Simplify gem_ringsize() and dont' return garbage in the default case.
  Based on OpenBSD.
o Don't turn on MAC control, MIF and PCS interrupts unless GEM_DEBUG is
  defined as we don't need/use these interrupts for operation.
o In gem_start_locked() sync the DMA maps of the descriptor rings before
  every kick of the transmitter and not just once after enqueuing all
  packets as the NIC might instantly start transmitting after we kicked
  it the first time.
o Keep state of the link state and use it to enable or disable the MAC
  in gem_mii_statchg() accordingly as well as to return early from
  gem_start_locked() in case the link is down. [3]
o Initialize the maximum frame size to a sane value.
o In gem_mii_statchg() enable carrier extension if appropriate.
o Increment if_ierrors in case of an GEM_MAC_RX_OVERFLOW error and in
  gem_eint(). [3]
o Handle IFF_ALLMULTI correctly; don't set it if we've turned promiscuous
  group mode on and don't clear the flag if we've disabled promiscuous
  group mode (these were mostly NOPs though). [2]
o Let gem_eint() also report GEM_INTR_PERR errors.
o Move setting sc_variant from gem_pci_probe() to gem_pci_attach() as
  device probe methods are not supposed to touch the softc.
o Collapse sc_inited and sc_pci into bits for sc_flags.
o Add CTASSERTs ensuring that GEM_NRXDESC and GEM_NTXDESC are set to
  legal values.
o Correctly set up for 802.3x flow control, though #ifdef out the code
  that actually enables it as this needs more testing and mainly a proper
  framework to support it.
o Correct and add some conversions from hard-coded functions names to
  __func__ which were borked or forgotten in if_gem.c rev. 1.42.
o Use PCIR_BAR instead of a homegrown macro.
o Replace sc_enaddr[6] with sc_enaddr[ETHER_ADDR_LEN].
o In gem_pci_attach() in case attaching fails release the resources in
  the opposite order they were allocated.
o Make gem_reset() static to if_gem.c as it's not needed outside that
  module.
o Remove the GEM_GIGABIT flag and the associated code; GEM_GIGABIT was
  never set and the associated code was in the wrong place.
o Remove sc_mif_config; it was only used to cache the contents of the
  respective register within gem_attach().
o Remove the #ifdef'ed out NetBSD/OpenBSD code for establishing a suspend
  hook as it will never be used on FreeBSD.
o Also probe Apple Intrepid 2 GMAC and Apple Shasta GMAC, add support for
  Apple K2 GMAC. Based on OpenBSD.
o Add support for Sun GBE/P cards, or in other words actually add support
  for cards based on GEM to gem(4). This mainly consists of adding support
  for the TBI of these chips. Along with this the PHY selection code was
  rewritten to hardcode the PHY number for certain configurations as for
  example the PHY of the on-board ERI of Blade 1000 shows up twice causing
  no link as the second incarnation is isolated.
  These changes were ported from OpenBSD with some additional improvements
  and modulo some bugs.
o Add code to if_gem_pci.c allowing to read the MAC-address from the VPD on
  systems without Open Firmware.
  This is an improved version of my variant of the respective code in
  if_hme_pci.c
o Now that gem(4) is MI enable it for all archs.

Pointed out by:	yongari [1]
Suggested by:	rwatson [2], yongari [3]
Tested on:	i386 (GEM), powerpc (GMACs by marcel and yongari),
		sparc64 (ERI and GEM)
Reviewed by:	yongari
Approved by:	re (kensmith)

1 files changed, 39 insertions, 27 deletions

diff --git a/sys/dev/gem/if_gemvar.h b/sys/dev/gem/if_gemvar.h
index 0986a8d..08b2105 100644
--- a/sys/dev/gem/if_gemvar.h
+++ b/sys/dev/gem/if_gemvar.h
@@ -58,9 +58,8 @@
  * Receive descriptor list size.  We have one Rx buffer per incoming
  * packet, so this logic is a little simpler.
  */
-#define	GEM_NRXDESC		128
+#define	GEM_NRXDESC		256
 #define	GEM_NRXDESC_MASK	(GEM_NRXDESC - 1)
-#define	GEM_PREVRX(x)		((x - 1) & GEM_NRXDESC_MASK)
 #define	GEM_NEXTRX(x)		((x + 1) & GEM_NRXDESC_MASK)
 
 /*
@@ -118,15 +117,15 @@ struct gem_rxsoft {
  */
 struct gem_softc {
 	struct ifnet	*sc_ifp;
+	struct mtx	sc_mtx;
 	device_t	sc_miibus;
 	struct mii_data	*sc_mii;	/* MII media control */
 	device_t	sc_dev;		/* generic device information */
-	u_char		sc_enaddr[6];
+	u_char		sc_enaddr[ETHER_ADDR_LEN];
 	struct callout	sc_tick_ch;	/* tick callout */
 	struct callout	sc_rx_ch;	/* delayed rx callout */
 	int		sc_wdog_timer;	/* watchdog timer */
 
-	/* The following bus handles are to be provided by the bus front-end */
 	void		*sc_ih;
 	struct resource *sc_res[2];
 	bus_dma_tag_t	sc_pdmatag;	/* parent bus dma tag */
@@ -135,18 +134,24 @@ struct gem_softc {
 	bus_dma_tag_t	sc_cdmatag;	/* control data bus dma tag */
 	bus_dmamap_t	sc_dmamap;	/* bus dma handle */
 
-	int		sc_phys[2];	/* MII instance -> PHY map */
-
-	int		sc_mif_config;	/* Selected MII reg setting */
+	int		sc_phyad;	/* addr. of PHY to use or -1 for any */
 
-	int		sc_pci;		/* XXXXX -- PCI buses are LE. */
 	u_int		sc_variant;	/* which GEM are we dealing with? */
 #define	GEM_UNKNOWN		0	/* don't know */
-#define	GEM_SUN_GEM		1	/* Sun GEM variant */
-#define	GEM_APPLE_GMAC		2	/* Apple GMAC variant */
+#define	GEM_SUN_GEM		1	/* Sun GEM */
+#define	GEM_SUN_ERI		2	/* Sun ERI */
+#define	GEM_APPLE_GMAC		3	/* Apple GMAC */
+#define	GEM_APPLE_K2_GMAC	4	/* Apple K2 GMAC */
+
+#define	GEM_IS_APPLE(sc)						\
+	((sc)->sc_variant == GEM_APPLE_GMAC ||				\
+	(sc)->sc_variant == GEM_APPLE_K2_GMAC)
 
 	u_int		sc_flags;	/* */
-#define	GEM_GIGABIT		0x0001	/* has a gigabit PHY */
+#define	GEM_INITED	(1 << 0)	/* reset persistent regs initialized */
+#define	GEM_LINK	(1 << 1)	/* link is up */
+#define	GEM_PCI		(1 << 2)	/* XXX PCI busses are little-endian */
+#define	GEM_SERDES	(1 << 3)	/* use the SERDES */
 
 	/*
 	 * Ring buffer DMA stuff.
@@ -169,33 +174,31 @@ struct gem_softc {
 #define	sc_txdescs	sc_control_data->gcd_txdescs
 #define	sc_rxdescs	sc_control_data->gcd_rxdescs
 
-	int		sc_txfree;		/* number of free Tx descriptors */
-	int		sc_txnext;		/* next ready Tx descriptor */
-	int		sc_txwin;		/* Tx descriptors since last Tx int */
+	int		sc_txfree;	/* number of free Tx descriptors */
+	int		sc_txnext;	/* next ready Tx descriptor */
+	int		sc_txwin;	/* Tx descriptors since last Tx int */
 
 	struct gem_txsq	sc_txfreeq;	/* free Tx descsofts */
 	struct gem_txsq	sc_txdirtyq;	/* dirty Tx descsofts */
 
-	int		sc_rxptr;		/* next ready RX descriptor/descsoft */
-	int		sc_rxfifosize;		/* Rx FIFO size (bytes) */
+	int		sc_rxptr;	/* next ready RX descriptor/descsoft */
+	int		sc_rxfifosize;	/* Rx FIFO size (bytes) */
 
 	/* ========== */
-	int		sc_inited;
-	int		sc_debug;
 	int		sc_ifflags;
 	int		sc_csum_features;
-
-	struct mtx	sc_mtx;
 };
 
-#define	GEM_DMA_READ(sc, v)	(((sc)->sc_pci) ? le64toh(v) : be64toh(v))
-#define	GEM_DMA_WRITE(sc, v)	(((sc)->sc_pci) ? htole64(v) : htobe64(v))
+#define	GEM_DMA_READ(sc, v)						\
+	((((sc)->sc_flags & GEM_PCI) != 0) ? le64toh(v) : be64toh(v))
+#define	GEM_DMA_WRITE(sc, v)						\
+	((((sc)->sc_flags & GEM_PCI) != 0) ? htole64(v) : htobe64(v))
 
 #define	GEM_CDTXADDR(sc, x)	((sc)->sc_cddma + GEM_CDTXOFF((x)))
 #define	GEM_CDRXADDR(sc, x)	((sc)->sc_cddma + GEM_CDRXOFF((x)))
 
 #define	GEM_CDSYNC(sc, ops)						\
-	bus_dmamap_sync((sc)->sc_cdmatag, (sc)->sc_cddmamap, (ops));	\
+	bus_dmamap_sync((sc)->sc_cdmatag, (sc)->sc_cddmamap, (ops));
 
 #define	GEM_INIT_RXDESC(sc, x)						\
 do {									\
@@ -208,7 +211,19 @@ do {									\
 	    GEM_DMA_WRITE((sc), __rxs->rxs_paddr);			\
 	__rxd->gd_flags =						\
 	    GEM_DMA_WRITE((sc),						\
-			(((__m->m_ext.ext_size)<<GEM_RD_BUFSHIFT)	\
+			(((__m->m_ext.ext_size) << GEM_RD_BUFSHIFT)	\
+				& GEM_RD_BUFSIZE) | GEM_RD_OWN);	\
+} while (0)
+
+#define	GEM_UPDATE_RXDESC(sc, x)					\
+do {									\
+	struct gem_rxsoft *__rxs = &sc->sc_rxsoft[(x)];			\
+	struct gem_desc *__rxd = &sc->sc_rxdescs[(x)];			\
+	struct mbuf *__m = __rxs->rxs_mbuf;				\
+									\
+	__rxd->gd_flags =						\
+	    GEM_DMA_WRITE((sc),						\
+			(((__m->m_ext.ext_size) << GEM_RD_BUFSHIFT)	\
 				& GEM_RD_BUFSIZE) | GEM_RD_OWN);	\
 } while (0)
 
@@ -231,8 +246,6 @@ void	gem_intr(void *);
 int	gem_mediachange(struct ifnet *);
 void	gem_mediastatus(struct ifnet *, struct ifmediareq *);
 
-void	gem_reset(struct gem_softc *);
-
 /* MII methods & callbacks */
 int	gem_mii_readreg(device_t, int, int);
 int	gem_mii_writereg(device_t, int, int, int);
@@ -240,5 +253,4 @@ void	gem_mii_statchg(device_t);
 
 #endif /* _KERNEL */
 
-
 #endif