- Use __FXP_BITFIELDX macros to make the configuration bitfield

  endian safe.
- Change some u_int to u_int8_t which make more sense here since
  we're really defining bytes.  That produces the same code due to
  how bitfields work.
- Add the definition of the vlan_drop_en bit (not used yet).
- Add some useful comments.

Obtained from:	NetBSD

1 files changed, 99 insertions, 81 deletions

diff --git a/sys/dev/fxp/if_fxpreg.h b/sys/dev/fxp/if_fxpreg.h
index de0d9f6a..15a7f5b 100644
--- a/sys/dev/fxp/if_fxpreg.h
+++ b/sys/dev/fxp/if_fxpreg.h
@@ -121,93 +121,111 @@ struct fxp_cb_ias {
 	u_int32_t link_addr;
 	u_int8_t macaddr[6];
 };
+
 /* I hate bit-fields :-( */
+#if BYTE_ORDER == LITTLE_ENDIAN
+#define __FXP_BITFIELD2(a, b)			a, b
+#define __FXP_BITFIELD3(a, b, c)		a, b, c
+#define __FXP_BITFIELD4(a, b, c, d)		a, b, c, d
+#define __FXP_BITFIELD5(a, b, c, d, e)		a, b, c, d, e
+#define __FXP_BITFIELD6(a, b, c, d, e, f)	a, b, c, d, e, f
+#define __FXP_BITFIELD7(a, b, c, d, e, f, g)	a, b, c, d, e, f, g
+#define __FXP_BITFIELD8(a, b, c, d, e, f, g, h)	a, b, c, d, e, f, g, h
+#else
+#define __FXP_BITFIELD2(a, b)			b, a
+#define __FXP_BITFIELD3(a, b, c)		c, b, a
+#define __FXP_BITFIELD4(a, b, c, d)		d, c, b, a
+#define __FXP_BITFIELD5(a, b, c, d, e)		e, d, c, b, a
+#define __FXP_BITFIELD6(a, b, c, d, e, f)	f, e, d, c, b, a
+#define __FXP_BITFIELD7(a, b, c, d, e, f, g)	g, f, e, d, c, b, a
+#define __FXP_BITFIELD8(a, b, c, d, e, f, g, h)	h, g, f, e, d, c, b, a
+#endif
+
 struct fxp_cb_config {
 	u_int16_t	cb_status;
 	u_int16_t	cb_command;
 	u_int32_t	link_addr;
-	u_int		byte_count:6,
-			:2;
-	u_int		rx_fifo_limit:4,
-			tx_fifo_limit:3,
-			:1;
+
+	/* Bytes 0 - 21 -- common to all i8255x */
+	u_int8_t	__FXP_BITFIELD2(byte_count:6, :2);
+	u_int8_t	__FXP_BITFIELD3(rx_fifo_limit:4, tx_fifo_limit:3, :1);
 	u_int8_t	adaptive_ifs;
-	u_int		mwi_enable:1,			/* 8,9 */
-			type_enable:1,			/* 8,9 */
-			read_align_en:1,		/* 8,9 */
-			end_wr_on_cl:1,			/* 8,9 */
-			:4;
-	u_int		rx_dma_bytecount:7,
-			:1;
-	u_int		tx_dma_bytecount:7,
-			dma_mbce:1;
-	u_int		late_scb:1,			/* 7 */
-			direct_dma_dis:1,		/* 8,9 */
-			tno_int_or_tco_en:1,		/* 7,9 */
-			ci_int:1,
-			ext_txcb_dis:1,			/* 8,9 */
-			ext_stats_dis:1,		/* 8,9 */
-			keep_overrun_rx:1,
-			save_bf:1;
-	u_int		disc_short_rx:1,
-			underrun_retry:2,
-			:2,
-			ext_rfa:1,			/* 550 */
-			two_frames:1,			/* 8,9 */
-			dyn_tbd:1;			/* 8,9 */
-	u_int		mediatype:1,			/* 7 */
-			:6,
-			csma_dis:1;			/* 8,9 */
-	u_int		tcp_udp_cksum:1,		/* 9 */
-			:3,
-			vlan_tco:1,			/* 8,9 */
-			link_wake_en:1,			/* 8,9 */
-			arp_wake_en:1,			/* 8 */
-			mc_wake_en:1;			/* 8 */
-	u_int		:3,
-			nsai:1,
-			preamble_length:2,
-			loopback:2;
-	u_int		linear_priority:3,		/* 7 */
-			:5;
-	u_int		linear_pri_mode:1,		/* 7 */
-			:3,
-			interfrm_spacing:4;
-	u_int		:8;
-	u_int		:8;
-	u_int		promiscuous:1,
-			bcast_disable:1,
-			wait_after_win:1,		/* 8,9 */
-			:1,
-			ignore_ul:1,			/* 8,9 */
-			crc16_en:1,			/* 9 */
-			:1,
-			crscdt:1;
-	u_int		fc_delay_lsb:8;			/* 8,9 */
-	u_int		fc_delay_msb:8;			/* 8,9 */
-	u_int		stripping:1,
-			padding:1,
-			rcv_crc_xfer:1,
-			long_rx_en:1,			/* 8,9 */
-			pri_fc_thresh:3,		/* 8,9 */
-			:1;
-	u_int		ia_wake_en:1,			/* 8 */
-			magic_pkt_dis:1,		/* 8,9,!9ER */
-			tx_fc_dis:1,			/* 8,9 */
-			rx_fc_restop:1,			/* 8,9 */
-			rx_fc_restart:1,		/* 8,9 */
-			fc_filter:1,			/* 8,9 */
-			force_fdx:1,
-			fdx_pin_en:1;
-	u_int		:5,
-			pri_fc_loc:1,			/* 8,9 */
-			multi_ia:1,
-			:1;
-	u_int		:3,
-			mc_all:1,
-			:4;
-	u_int8_t	gamla_rx:1;			/* 550 */
-	u_int8_t	pad[9];				/* 550 */
+	u_int8_t	__FXP_BITFIELD5(mwi_enable:1,		/* 8,9 */
+			    type_enable:1,			/* 8,9 */
+			    read_align_en:1,			/* 8,9 */
+			    end_wr_on_cl:1,			/* 8,9 */
+			    :4);
+	u_int8_t	__FXP_BITFIELD2(rx_dma_bytecount:7, :1);
+	u_int8_t	__FXP_BITFIELD2(tx_dma_bytecount:7, dma_mbce:1);
+	u_int8_t	__FXP_BITFIELD8(late_scb:1,		/* 7 */
+			    direct_dma_dis:1,			/* 8,9 */
+			    tno_int_or_tco_en:1,		/* 7,9 */
+			    ci_int:1,
+			    ext_txcb_dis:1,			/* 8,9 */
+			    ext_stats_dis:1,			/* 8,9 */
+			    keep_overrun_rx:1,
+			    save_bf:1);
+	u_int8_t	__FXP_BITFIELD6(disc_short_rx:1,
+			    underrun_retry:2,
+			    :2,
+			    ext_rfa:1,				/* 550 */
+			    two_frames:1,			/* 8,9 */
+			    dyn_tbd:1);				/* 8,9 */
+	u_int8_t	__FXP_BITFIELD3(mediatype:1,		/* 7 */
+			    :6,
+			    csma_dis:1);			/* 8,9 */
+	u_int8_t	__FXP_BITFIELD6(tcp_udp_cksum:1,	/* 9 */
+			    :3,
+			    vlan_tco:1,				/* 8,9 */
+			    link_wake_en:1,			/* 8,9 */
+			    arp_wake_en:1,			/* 8 */
+			    mc_wake_en:1);			/* 8 */
+	u_int8_t	__FXP_BITFIELD4(:3,
+			    nsai:1,
+			    preamble_length:2,
+			    loopback:2);
+	u_int8_t	__FXP_BITFIELD2(linear_priority:3,	/* 7 */
+			    :5);
+	u_int8_t	__FXP_BITFIELD3(linear_pri_mode:1,	/* 7 */
+			    :3,
+			    interfrm_spacing:4);
+	u_int8_t	:8;
+	u_int8_t	:8;
+	u_int8_t	__FXP_BITFIELD8(promiscuous:1,
+			    bcast_disable:1,
+			    wait_after_win:1,			/* 8,9 */
+			    :1,
+			    ignore_ul:1,			/* 8,9 */
+			    crc16_en:1,				/* 9 */
+			    :1,
+			    crscdt:1);
+	u_int8_t	fc_delay_lsb:8;				/* 8,9 */
+	u_int8_t	fc_delay_msb:8;				/* 8,9 */
+	u_int8_t	__FXP_BITFIELD6(stripping:1,
+			    padding:1,
+			    rcv_crc_xfer:1,
+			    long_rx_en:1,			/* 8,9 */
+			    pri_fc_thresh:3,			/* 8,9 */
+			    :1);
+	u_int8_t	__FXP_BITFIELD8(ia_wake_en:1,		/* 8 */
+			    magic_pkt_dis:1,			/* 8,9,!9ER */
+			    tx_fc_dis:1,			/* 8,9 */
+			    rx_fc_restop:1,			/* 8,9 */
+			    rx_fc_restart:1,			/* 8,9 */
+			    fc_filter:1,			/* 8,9 */
+			    force_fdx:1,
+			    fdx_pin_en:1);
+	u_int8_t	__FXP_BITFIELD4(:5,
+			    pri_fc_loc:1,			/* 8,9 */
+			    multi_ia:1,
+			    :1);
+	u_int8_t	__FXP_BITFIELD3(:3, mc_all:1, :4);
+
+	/* Bytes 22 - 31 -- i82550 only */
+	u_int8_t	__FXP_BITFIELD3(gamla_rx:1,
+			    vlan_drop_en:1,
+			    :6);
+	u_int8_t	pad[9];
 };
 
 #define MAXMCADDR 80