MFC r256911, r256936

MFP4: 223121 (PIC portion), 225861, 227822, 229692 (PIC only), 229693,
230523, 1123614

Implement a driver for Robert Norton's PIC as an FDT interrupt
controller.  Devices whose interrupt-parent property points to a beripic

device will have their interrupt allocation, activation, and setup
operations routed through the IC rather than down the traditional bus
hierarchy.

This driver largely abstracts the underlying CPU away allowing the
PIC to be implemented on CPU's other than BERI.  Due to insufficient
abstractions a small amount of MIPS specific code is currently required
in fdt_mips.c and to implement counters.

Sponsored by:	DARPA/AFRL
Approved by:	re (gjb)

1 files changed, 19 insertions, 0 deletions

diff --git a/sys/dev/fdt/fdt_mips.c b/sys/dev/fdt/fdt_mips.c
index 4df31d8..1904574 100644
--- a/sys/dev/fdt/fdt_mips.c
+++ b/sys/dev/fdt/fdt_mips.c
@@ -68,7 +68,26 @@ fdt_pic_decode_mips4k_cp0(phandle_t node, pcell_t *intr, int *interrupt,
 	return (0);
 }
 
+/*
+ * CHERI PIC decoder.
+ */
+static int
+fdt_pic_decode_beri(phandle_t node, pcell_t *intr, int *interrupt,
+    int *trig, int *pol)
+{
+
+	if (!fdt_is_compatible(node, "sri-cambridge,beri-pic"))
+		return (ENXIO);
+
+	*interrupt = fdt32_to_cpu(intr[0]);
+	*trig = INTR_TRIGGER_CONFORM;
+	*pol = INTR_POLARITY_CONFORM;
+
+	return (0);
+}
+
 fdt_pic_decode_t fdt_pic_table[] = {
 	&fdt_pic_decode_mips4k_cp0,
+	&fdt_pic_decode_beri,
 	NULL
 };