MFC r256870, r256898, r256899, r256900 (by nwhitehorn):

 Standards-conformance and code deduplication:
  - Use bus reference phandles in place of FDT offsets as IRQ domain keys
  - Unify the identical macio/fdt/mambo OpenPIC drivers into one
  - Be more forgiving (following ePAPR) about what we need from the device
    tree to identify an OpenPIC
  - Correctly map all IRQs into an interrupt domain
  - Set IRQ_*_CONFORM for interrupts on an unknown PIC type instead of
    failing attachment for that device.

  Allow lots of interrupts (useful on multi-domain platforms) and do not
  set device_quiet() on all devices attached under nexus(4).

1 files changed, 18 insertions, 12 deletions

diff --git a/sys/dev/fdt/fdt_common.c b/sys/dev/fdt/fdt_common.c
index dad4297..740ccb5 100644
--- a/sys/dev/fdt/fdt_common.c
+++ b/sys/dev/fdt/fdt_common.c
@@ -478,21 +478,31 @@ fdt_intr_decode(phandle_t intr_parent, pcell_t *intr, int *interrupt,
     int *trig, int *pol)
 {
 	fdt_pic_decode_t intr_decode;
+	phandle_t intr_offset;
 	int i, rv;
 
+	intr_offset = OF_xref_phandle(intr_parent);
+
 	for (i = 0; fdt_pic_table[i] != NULL; i++) {
 
 		/* XXX check if pic_handle has interrupt-controller prop? */
 
 		intr_decode = fdt_pic_table[i];
-		rv = intr_decode(intr_parent, intr, interrupt, trig, pol);
+		rv = intr_decode(intr_offset, intr, interrupt, trig, pol);
 
-		if (rv == 0)
+		if (rv == 0) {
 			/* This was recognized as our PIC and decoded. */
+			*interrupt = FDT_MAP_IRQ(intr_parent, *interrupt);
 			return (0);
+		}
 	}
 
-	return (ENXIO);
+	/* Not in table, so guess */
+	*interrupt = FDT_MAP_IRQ(intr_parent, fdt32_to_cpu(*intr));
+	*trig = INTR_TRIGGER_CONFORM;
+	*pol = INTR_POLARITY_CONFORM;
+
+	return (0);
 }
 
 int
@@ -500,7 +510,7 @@ fdt_intr_to_rl(phandle_t node, struct resource_list *rl,
     struct fdt_sense_level *intr_sl)
 {
 	phandle_t intr_par;
-	ihandle_t iph;
+	phandle_t iph;
 	pcell_t *intr;
 	pcell_t intr_cells;
 	int interrupt, trig, pol;
@@ -517,8 +527,7 @@ fdt_intr_to_rl(phandle_t node, struct resource_list *rl,
 		debugf("no intr-parent phandle\n");
 		intr_par = OF_parent(node);
 	} else {
-		iph = fdt32_to_cpu(iph);
-		intr_par = OF_instance_to_package(iph);
+		intr_par = OF_xref_phandle(iph);
 	}
 
 	if (OF_getprop(intr_par, "#interrupt-cells", &intr_cells,
@@ -540,7 +549,7 @@ fdt_intr_to_rl(phandle_t node, struct resource_list *rl,
 		interrupt = -1;
 		trig = pol = 0;
 
-		if (fdt_intr_decode(intr_par, &intr[i * intr_cells],
+		if (fdt_intr_decode(iph, &intr[i * intr_cells],
 		    &interrupt, &trig, &pol) != 0) {
 			rv = ENXIO;
 			goto out;
@@ -557,7 +566,7 @@ fdt_intr_to_rl(phandle_t node, struct resource_list *rl,
 		intr_sl[i].trig = trig;
 		intr_sl[i].pol = pol;
 
-		irq = FDT_MAP_IRQ(intr_par, interrupt);
+		irq = FDT_MAP_IRQ(iph, interrupt);
 		resource_list_add(rl, SYS_RES_IRQ, i, irq, irq, 1);
 	}
 
@@ -570,7 +579,6 @@ int
 fdt_get_phyaddr(phandle_t node, device_t dev, int *phy_addr, void **phy_sc)
 {
 	phandle_t phy_node;
-	ihandle_t phy_ihandle;
 	pcell_t phy_handle, phy_reg;
 	uint32_t i;
 	device_t parent, child;
@@ -579,9 +587,7 @@ fdt_get_phyaddr(phandle_t node, device_t dev, int *phy_addr, void **phy_sc)
 	    sizeof(phy_handle)) <= 0)
 		return (ENXIO);
 
-	phy_ihandle = (ihandle_t)phy_handle;
-	phy_ihandle = fdt32_to_cpu(phy_ihandle);
-	phy_node = OF_instance_to_package(phy_ihandle);
+	phy_node = OF_xref_phandle(phy_handle);
 
 	if (OF_getprop(phy_node, "reg", (void *)&phy_reg,
 	    sizeof(phy_reg)) <= 0)