diff options
author | dg <dg@FreeBSD.org> | 1995-01-23 19:06:08 +0000 |
---|---|---|
committer | dg <dg@FreeBSD.org> | 1995-01-23 19:06:08 +0000 |
commit | e870016a53074361f99ee148e506d47688db2eec (patch) | |
tree | 4b4dd7b625f39493364f3a4a69ea13886b03b6eb /sys/dev/ed | |
parent | 77c139fd98d96b4147ab01cad84f542b85ac01f3 (diff) | |
download | FreeBSD-src-e870016a53074361f99ee148e506d47688db2eec.zip FreeBSD-src-e870016a53074361f99ee148e506d47688db2eec.tar.gz |
Much better fix/support for the 83c795 based cards (the new SMC EtherEZ)
by steve@simon.chi.il.us (Steven E. Piette). Minor changes by me.
Diffstat (limited to 'sys/dev/ed')
-rw-r--r-- | sys/dev/ed/if_ed.c | 62 | ||||
-rw-r--r-- | sys/dev/ed/if_edreg.h | 22 |
2 files changed, 71 insertions, 13 deletions
diff --git a/sys/dev/ed/if_ed.c b/sys/dev/ed/if_ed.c index 6d62941..9653df7 100644 --- a/sys/dev/ed/if_ed.c +++ b/sys/dev/ed/if_ed.c @@ -13,7 +13,7 @@ * the SMC Elite Ultra (8216), the 3Com 3c503, the NE1000 and NE2000, * and a variety of similar clones. * - * $Id: if_ed.c,v 1.63 1995/01/04 21:10:17 davidg Exp $ + * $Id: if_ed.c,v 1.64 1995/01/15 00:18:17 wollman Exp $ */ #include "ed.h" @@ -401,18 +401,32 @@ ed_probe_WD80x3(isa_dev) sc->is790 = 1; break; case ED_TYPE_SMC8216T: - (unsigned int) *(isa_dev->id_maddr+8192) = (unsigned int)0; - if ((unsigned int) *(isa_dev->id_maddr+8192)) { + sc->type_str = "SMC8216T"; + sc->kdc.kdc_description = + "Ethernet adapter: SMC 8216T"; + + outb(sc->asic_addr + ED_WD790_HWR, + inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH); + switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) { + case ED_WD790_RAR_SZ64: + memsize = 65536; + break; + case ED_WD790_RAR_SZ32: + memsize = 32768; + break; + case ED_WD790_RAR_SZ16: + memsize = 16384; + break; + case ED_WD790_RAR_SZ8: sc->type_str = "SMC8416T"; sc->kdc.kdc_description = "Ethernet adapter: SMC 8416T"; memsize = 8192; - } else { - sc->type_str = "SMC8216T"; - sc->kdc.kdc_description = - "Ethernet adapter: SMC 8216T"; - memsize = 16384; + break; } + outb(sc->asic_addr + ED_WD790_HWR, + inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); + isa16bit = 1; sc->is790 = 1; break; @@ -447,6 +461,30 @@ ed_probe_WD80x3(isa_dev) isa16bit = 0; memsize = 8192; } + + + if (sc->is790) { + outb(sc->asic_addr + ED_WD790_HWR, + inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH); + + switch (inb(sc->asic_addr + ED_WD790_RAR) & ED_WD790_RAR_SZ64) { + case ED_WD790_RAR_SZ64: + memsize = 65536; + break; + case ED_WD790_RAR_SZ32: + memsize = 32768; + break; + case ED_WD790_RAR_SZ16: + memsize = 16384; + break; + case ED_WD790_RAR_SZ8: + memsize = 8192; + break; + } + outb(sc->asic_addr + ED_WD790_HWR, + inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH); + } + #if ED_DEBUG printf("type = %x type_str=%s isa16bit=%d memsize=%d id_msize=%d\n", sc->type, sc->type_str, isa16bit, memsize, isa_dev->id_msize); @@ -585,11 +623,11 @@ ed_probe_WD80x3(isa_dev) sc->cr_proto = ED_CR_RD2; } else { outb(sc->asic_addr + ED_WD_MSR, ED_WD_MSR_MENB); - outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) | 0x80)); - outb(sc->asic_addr + 0x0b, ((kvtop(sc->mem_start) >> 13) & 0x0f) | + outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) | ED_WD790_HWR_SWH)); + outb(sc->asic_addr + ED_WD790_RAR, ((kvtop(sc->mem_start) >> 13) & 0x0f) | ((kvtop(sc->mem_start) >> 11) & 0x40) | - (inb(sc->asic_addr + 0x0b) & 0xb0)); - outb(sc->asic_addr + 0x04, (inb(sc->asic_addr + 0x04) & ~0x80)); + (inb(sc->asic_addr + ED_WD790_RAR) & 0xb0)); + outb(sc->asic_addr + ED_WD790_HWR, (inb(sc->asic_addr + ED_WD790_HWR) & ~ED_WD790_HWR_SWH)); sc->cr_proto = 0; } diff --git a/sys/dev/ed/if_edreg.h b/sys/dev/ed/if_edreg.h index 1d56fdc..31f7879 100644 --- a/sys/dev/ed/if_edreg.h +++ b/sys/dev/ed/if_edreg.h @@ -6,7 +6,7 @@ * of this software, nor does the author assume any responsibility * for damages incurred with its use. * - * $Id: if_edreg.h,v 1.15 1994/08/02 07:39:30 davidg Exp $ + * $Id: if_edreg.h,v 1.16 1994/08/04 17:42:35 davidg Exp $ */ /* * National Semiconductor DS8390 NIC register definitions @@ -705,6 +705,25 @@ struct ed_ring { #define ED_WD790_ICR_EIL 0x01 /* enable interrupts */ /* + * REV/IOPA Revision / I/O Pipe register for the 83C79X + */ +#define ED_WD790_REV 7 + +#define ED_WD790 0x20 +#define ED_WD795 0x40 + +/* + * 79X RAM Address Register (RAR) + * Enabled with SWH bit=1 in HWR register + */ +#define ED_WD790_RAR 0x0b + +#define ED_WD790_RAR_SZ8 0x00 /* 8k memory buffer */ +#define ED_WD790_RAR_SZ16 0x10 /* 16k memory buffer */ +#define ED_WD790_RAR_SZ32 0x20 /* 32k memory buffer */ +#define ED_WD790_RAR_SZ64 0x30 /* 64k memory buffer */ + +/* * General Control Register (GCR) * Enabled with SWH bit=1 in HWR register */ @@ -714,6 +733,7 @@ struct ed_ring { #define ED_WD790_GCR_IR1 0x08 /* bit 1 of encoded IRQ */ #define ED_WD790_GCR_ZWSEN 0x20 /* zero wait state enable */ #define ED_WD790_GCR_IR2 0x40 /* bit 2 of encoded IRQ */ +#define ED_WD790_GCR_LIT 0x01 /* Link Integrity Test Enable */ /* * The three bits of the encoded IRQ are decoded as follows: * |