diff options
author | dg <dg@FreeBSD.org> | 1995-01-23 19:06:08 +0000 |
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committer | dg <dg@FreeBSD.org> | 1995-01-23 19:06:08 +0000 |
commit | e870016a53074361f99ee148e506d47688db2eec (patch) | |
tree | 4b4dd7b625f39493364f3a4a69ea13886b03b6eb /sys/dev/ed/if_edreg.h | |
parent | 77c139fd98d96b4147ab01cad84f542b85ac01f3 (diff) | |
download | FreeBSD-src-e870016a53074361f99ee148e506d47688db2eec.zip FreeBSD-src-e870016a53074361f99ee148e506d47688db2eec.tar.gz |
Much better fix/support for the 83c795 based cards (the new SMC EtherEZ)
by steve@simon.chi.il.us (Steven E. Piette). Minor changes by me.
Diffstat (limited to 'sys/dev/ed/if_edreg.h')
-rw-r--r-- | sys/dev/ed/if_edreg.h | 22 |
1 files changed, 21 insertions, 1 deletions
diff --git a/sys/dev/ed/if_edreg.h b/sys/dev/ed/if_edreg.h index 1d56fdc..31f7879 100644 --- a/sys/dev/ed/if_edreg.h +++ b/sys/dev/ed/if_edreg.h @@ -6,7 +6,7 @@ * of this software, nor does the author assume any responsibility * for damages incurred with its use. * - * $Id: if_edreg.h,v 1.15 1994/08/02 07:39:30 davidg Exp $ + * $Id: if_edreg.h,v 1.16 1994/08/04 17:42:35 davidg Exp $ */ /* * National Semiconductor DS8390 NIC register definitions @@ -705,6 +705,25 @@ struct ed_ring { #define ED_WD790_ICR_EIL 0x01 /* enable interrupts */ /* + * REV/IOPA Revision / I/O Pipe register for the 83C79X + */ +#define ED_WD790_REV 7 + +#define ED_WD790 0x20 +#define ED_WD795 0x40 + +/* + * 79X RAM Address Register (RAR) + * Enabled with SWH bit=1 in HWR register + */ +#define ED_WD790_RAR 0x0b + +#define ED_WD790_RAR_SZ8 0x00 /* 8k memory buffer */ +#define ED_WD790_RAR_SZ16 0x10 /* 16k memory buffer */ +#define ED_WD790_RAR_SZ32 0x20 /* 32k memory buffer */ +#define ED_WD790_RAR_SZ64 0x30 /* 64k memory buffer */ + +/* * General Control Register (GCR) * Enabled with SWH bit=1 in HWR register */ @@ -714,6 +733,7 @@ struct ed_ring { #define ED_WD790_GCR_IR1 0x08 /* bit 1 of encoded IRQ */ #define ED_WD790_GCR_ZWSEN 0x20 /* zero wait state enable */ #define ED_WD790_GCR_IR2 0x40 /* bit 2 of encoded IRQ */ +#define ED_WD790_GCR_LIT 0x01 /* Link Integrity Test Enable */ /* * The three bits of the encoded IRQ are decoded as follows: * |