This delta is primarily a fix for es2lan devices that

will sometimes fail to initialize problem due to a lock
contention with management hardware. However, in order to
deliver that fix it was necessary to take a shared code
update as a whole, and this required scattered changes in
the core code to be compatible.

The em driver now has VLAN HW support added as the igb
driver had previously.

MFC after:  ASAP - in time for 7.1 RELEASE

1 files changed, 128 insertions, 207 deletions

diff --git a/sys/dev/e1000/e1000_ich8lan.c b/sys/dev/e1000/e1000_ich8lan.c
index c4b9a2b..f368998 100644
--- a/sys/dev/e1000/e1000_ich8lan.c
+++ b/sys/dev/e1000/e1000_ich8lan.c
@@ -32,8 +32,28 @@
 ******************************************************************************/
 /*$FreeBSD$*/
 
-/* e1000_ich8lan
- * e1000_ich9lan
+/*
+ * 82562G 10/100 Network Connection
+ * 82562G-2 10/100 Network Connection
+ * 82562GT 10/100 Network Connection
+ * 82562GT-2 10/100 Network Connection
+ * 82562V 10/100 Network Connection
+ * 82562V-2 10/100 Network Connection
+ * 82566DC-2 Gigabit Network Connection
+ * 82566DC Gigabit Network Connection
+ * 82566DM-2 Gigabit Network Connection
+ * 82566DM Gigabit Network Connection
+ * 82566MC Gigabit Network Connection
+ * 82566MM Gigabit Network Connection
+ * 82567LM Gigabit Network Connection
+ * 82567LF Gigabit Network Connection
+ * 82567V Gigabit Network Connection
+ * 82567LM-2 Gigabit Network Connection
+ * 82567LF-2 Gigabit Network Connection
+ * 82567V-2 Gigabit Network Connection
+ * 82567LF-3 Gigabit Network Connection
+ * 82567LM-3 Gigabit Network Connection
+ * 82567LM-4 Gigabit Network Connection
  */
 
 #include "e1000_api.h"
@@ -79,9 +99,9 @@ static s32  e1000_get_phy_info_ife_ich8lan(struct e1000_hw *hw);
 static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw);
 static s32  e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw);
 static s32  e1000_read_flash_byte_ich8lan(struct e1000_hw *hw,
-                                          u32 offset, u8* data);
+                                          u32 offset, u8 *data);
 static s32  e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
-                                          u8 size, u16* data);
+                                          u8 size, u16 *data);
 static s32  e1000_read_flash_word_ich8lan(struct e1000_hw *hw,
                                           u32 offset, u16 *data);
 static s32  e1000_retry_write_flash_byte_ich8lan(struct e1000_hw *hw,
@@ -134,16 +154,6 @@ union ich8_hws_flash_regacc {
 	u16 regval;
 };
 
-struct e1000_shadow_ram {
-	u16  value;
-	bool modified;
-};
-
-struct e1000_dev_spec_ich8lan {
-	bool kmrn_lock_loss_workaround_enabled;
-	struct e1000_shadow_ram shadow_ram[E1000_SHADOW_RAM_WORDS];
-};
-
 /**
  *  e1000_init_phy_params_ich8lan - Initialize PHY function pointers
  *  @hw: pointer to the HW structure
@@ -239,7 +249,7 @@ out:
 static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
 {
 	struct e1000_nvm_info *nvm = &hw->nvm;
-	struct e1000_dev_spec_ich8lan *dev_spec;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
 	u32 gfpreg, sector_base_addr, sector_end_addr;
 	s32 ret_val = E1000_SUCCESS;
 	u16 i;
@@ -253,7 +263,7 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
 		goto out;
 	}
 
-	nvm->type               = e1000_nvm_flash_sw;
+	nvm->type = e1000_nvm_flash_sw;
 
 	gfpreg = E1000_READ_FLASH_REG(hw, ICH_FLASH_GFPREG);
 
@@ -266,27 +276,19 @@ static s32 e1000_init_nvm_params_ich8lan(struct e1000_hw *hw)
 	sector_end_addr = ((gfpreg >> 16) & FLASH_GFPREG_BASE_MASK) + 1;
 
 	/* flash_base_addr is byte-aligned */
-	nvm->flash_base_addr    = sector_base_addr << FLASH_SECTOR_ADDR_SHIFT;
+	nvm->flash_base_addr = sector_base_addr << FLASH_SECTOR_ADDR_SHIFT;
 
 	/*
 	 * find total size of the NVM, then cut in half since the total
 	 * size represents two separate NVM banks.
 	 */
-	nvm->flash_bank_size    = (sector_end_addr - sector_base_addr)
+	nvm->flash_bank_size = (sector_end_addr - sector_base_addr)
 	                          << FLASH_SECTOR_ADDR_SHIFT;
-	nvm->flash_bank_size    /= 2;
+	nvm->flash_bank_size /= 2;
 	/* Adjust to word count */
-	nvm->flash_bank_size    /= sizeof(u16);
-
-	nvm->word_size          = E1000_SHADOW_RAM_WORDS;
-
-	dev_spec = (struct e1000_dev_spec_ich8lan *)hw->dev_spec;
+	nvm->flash_bank_size /= sizeof(u16);
 
-	if (!dev_spec) {
-		DEBUGOUT("dev_spec pointer is set to NULL.\n");
-		ret_val = -E1000_ERR_CONFIG;
-		goto out;
-	}
+	nvm->word_size = E1000_SHADOW_RAM_WORDS;
 
 	/* Clear shadow ram */
 	for (i = 0; i < nvm->word_size; i++) {
@@ -317,7 +319,6 @@ out:
 static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 {
 	struct e1000_mac_info *mac = &hw->mac;
-	s32 ret_val = E1000_SUCCESS;
 
 	DEBUGFUNC("e1000_init_mac_params_ich8lan");
 
@@ -339,6 +340,8 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 
 	/* bus type/speed/width */
 	mac->ops.get_bus_info = e1000_get_bus_info_ich8lan;
+	/* function id */
+	mac->ops.set_lan_id = e1000_set_lan_id_single_port;
 	/* reset */
 	mac->ops.reset_hw = e1000_reset_hw_ich8lan;
 	/* hw initialization */
@@ -366,25 +369,15 @@ static s32 e1000_init_mac_params_ich8lan(struct e1000_hw *hw)
 	/* turn on/off LED */
 	mac->ops.led_on = e1000_led_on_ich8lan;
 	mac->ops.led_off = e1000_led_off_ich8lan;
-	/* remove device */
-	mac->ops.remove_device = e1000_remove_device_generic;
 	/* clear hardware counters */
 	mac->ops.clear_hw_cntrs = e1000_clear_hw_cntrs_ich8lan;
 
-	hw->dev_spec_size = sizeof(struct e1000_dev_spec_ich8lan);
-
-	/* Device-specific structure allocation */
-	ret_val = e1000_alloc_zeroed_dev_spec_struct(hw, hw->dev_spec_size);
-	if (ret_val)
-		goto out;
-
 	/* Enable PCS Lock-loss workaround for ICH8 */
 	if (mac->type == e1000_ich8lan)
 		e1000_set_kmrn_lock_loss_workaround_ich8lan(hw, TRUE);
 
 
-out:
-	return ret_val;
+	return E1000_SUCCESS;
 }
 
 /**
@@ -478,8 +471,8 @@ static bool e1000_check_mng_mode_ich8lan(struct e1000_hw *hw)
 
 	fwsm = E1000_READ_REG(hw, E1000_FWSM);
 
-	return ((fwsm & E1000_FWSM_MODE_MASK) ==
-	        (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT));
+	return (fwsm & E1000_FWSM_MODE_MASK) ==
+	        (E1000_ICH_MNG_IAMT_MODE << E1000_FWSM_MODE_SHIFT);
 }
 
 /**
@@ -560,9 +553,8 @@ static s32 e1000_phy_force_speed_duplex_ich8lan(struct e1000_hw *hw)
 		if (ret_val)
 			goto out;
 
-		if (!link) {
+		if (!link)
 			DEBUGOUT("Link taking longer than expected.\n");
-		}
 
 		/* Try once more */
 		ret_val = e1000_phy_has_link_generic(hw,
@@ -588,7 +580,6 @@ out:
 static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
 {
 	struct e1000_phy_info *phy = &hw->phy;
-	struct e1000_nvm_info *nvm = &hw->nvm;
 	u32 i, data, cnf_size, cnf_base_addr, sw_cfg_mask;
 	s32 ret_val;
 	u16 loop = E1000_ICH8_LAN_INIT_TIMEOUT;
@@ -631,9 +622,8 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
 		 * count reaches 0, loading the configuration from NVM will
 		 * leave the PHY in a bad state possibly resulting in no link.
 		 */
-		if (loop == 0) {
+		if (loop == 0)
 			DEBUGOUT("LAN_INIT_DONE not set, increase timeout\n");
-		}
 
 		/* Clear the Init Done bit for the next init event */
 		data = E1000_READ_REG(hw, E1000_STATUS);
@@ -657,26 +647,19 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
 		cnf_base_addr = data & E1000_EXTCNF_CTRL_EXT_CNF_POINTER_MASK;
 		cnf_base_addr >>= E1000_EXTCNF_CTRL_EXT_CNF_POINTER_SHIFT;
 
-		/*
-		 * Configure LCD from extended configuration
-		 * region.
-		 */
+		/* Configure LCD from extended configuration region. */
 
 		/* cnf_base_addr is in DWORD */
 		word_addr = (u16)(cnf_base_addr << 1);
 
 		for (i = 0; i < cnf_size; i++) {
-			ret_val = nvm->ops.read(hw,
-			                        (word_addr + i * 2),
-			                        1,
-			                        &reg_data);
+			ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2), 1,
+			                           &reg_data);
 			if (ret_val)
 				goto out;
 
-			ret_val = nvm->ops.read(hw,
-			                        (word_addr + i * 2 + 1),
-			                        1,
-			                        &reg_addr);
+			ret_val = hw->nvm.ops.read(hw, (word_addr + i * 2 + 1),
+			                           1, &reg_addr);
 			if (ret_val)
 				goto out;
 
@@ -688,9 +671,7 @@ static s32 e1000_phy_hw_reset_ich8lan(struct e1000_hw *hw)
 
 			reg_addr |= phy_page;
 
-			ret_val = phy->ops.write_reg(hw,
-			                             (u32)reg_addr,
-			                             reg_data);
+			ret_val = phy->ops.write_reg(hw, (u32)reg_addr, reg_data);
 			if (ret_val)
 				goto out;
 		}
@@ -705,8 +686,6 @@ out:
  *  @hw: pointer to the HW structure
  *
  *  Wrapper for calling the get_phy_info routines for the appropriate phy type.
- *  This is a function pointer entry point called by drivers
- *  or other shared routines.
  **/
 static s32 e1000_get_phy_info_ich8lan(struct e1000_hw *hw)
 {
@@ -805,8 +784,7 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_check_polarity_ife_ich8lan");
 
 	/*
-	 * Polarity is determined based on the reversal feature
-	 * being enabled.
+	 * Polarity is determined based on the reversal feature being enabled.
 	 */
 	if (phy->polarity_correction) {
 		offset	= IFE_PHY_EXTENDED_STATUS_CONTROL;
@@ -839,8 +817,7 @@ static s32 e1000_check_polarity_ife_ich8lan(struct e1000_hw *hw)
  *  This is a function pointer entry point only called by
  *  PHY setup routines.
  **/
-static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw,
-                                           bool active)
+static s32 e1000_set_d0_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
 {
 	struct e1000_phy_info *phy = &hw->phy;
 	u32 phy_ctrl;
@@ -932,8 +909,7 @@ out:
  *  This is a function pointer entry point only called by
  *  PHY setup routines.
  **/
-static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw,
-                                           bool active)
+static s32 e1000_set_d3_lplu_state_ich8lan(struct e1000_hw *hw, bool active)
 {
 	struct e1000_phy_info *phy = &hw->phy;
 	u32 phy_ctrl;
@@ -1032,7 +1008,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 			*bank = 1;
 		else
 			*bank = 0;
-	} else if (hw->dev_spec != NULL) {
+	} else {
 		/*
 		 * Make sure the signature for bank 0 is valid,
 		 * if not check for bank1
@@ -1048,7 +1024,7 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 			e1000_read_flash_byte_ich8lan(hw,
 			                              act_offset + bank1_offset,
 			                              &bank_high_byte);
-			
+
 			/* bank1 has a valid signature equivalent to SEC1V */
 			if ((bank_high_byte & 0xC0) == 0x80) {
 				*bank = 1;
@@ -1057,11 +1033,8 @@ static s32 e1000_valid_nvm_bank_detect_ich8lan(struct e1000_hw *hw, u32 *bank)
 				ret_val = -E1000_ERR_NVM;
 			}
 		}
-	} else {
-		DEBUGOUT("DEV SPEC is NULL\n");
-		ret_val = -E1000_ERR_NVM;
 	}
-	
+
 	return ret_val;
 }
 
@@ -1078,7 +1051,7 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
                                   u16 *data)
 {
 	struct e1000_nvm_info *nvm = &hw->nvm;
-	struct e1000_dev_spec_ich8lan *dev_spec;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
 	u32 act_offset;
 	s32 ret_val = E1000_SUCCESS;
 	u32 bank = 0;
@@ -1086,14 +1059,6 @@ static s32 e1000_read_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
 
 	DEBUGFUNC("e1000_read_nvm_ich8lan");
 
-	dev_spec = (struct e1000_dev_spec_ich8lan *)hw->dev_spec;
-
-	if (!dev_spec) {
-		DEBUGOUT("dev_spec pointer is set to NULL.\n");
-		ret_val = -E1000_ERR_CONFIG;
-		goto out;
-	}
-
 	if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
 	    (words == 0)) {
 		DEBUGOUT("nvm parameter(s) out of bounds\n");
@@ -1200,8 +1165,7 @@ static s32 e1000_flash_cycle_init_ich8lan(struct e1000_hw *hw)
 			 * now set the Flash Cycle Done.
 			 */
 			hsfsts.hsf_status.flcdone = 1;
-			E1000_WRITE_FLASH_REG16(hw,
-			                        ICH_FLASH_HSFSTS,
+			E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFSTS,
 			                        hsfsts.regval);
 		} else {
 			DEBUGOUT("Flash controller busy, cannot get access");
@@ -1286,7 +1250,7 @@ out:
  *  Reads a single byte from the NVM using the flash access registers.
  **/
 static s32 e1000_read_flash_byte_ich8lan(struct e1000_hw *hw, u32 offset,
-                                         u8* data)
+                                         u8 *data)
 {
 	s32 ret_val = E1000_SUCCESS;
 	u16 word = 0;
@@ -1311,7 +1275,7 @@ out:
  *  Reads a byte or word from the NVM using the flash access registers.
  **/
 static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
-                                         u8 size, u16* data)
+                                         u8 size, u16 *data)
 {
 	union ich8_hws_flash_status hsfsts;
 	union ich8_hws_flash_ctrl hsflctl;
@@ -1354,11 +1318,10 @@ static s32 e1000_read_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
 		 */
 		if (ret_val == E1000_SUCCESS) {
 			flash_data = E1000_READ_FLASH_REG(hw, ICH_FLASH_FDATA0);
-			if (size == 1) {
+			if (size == 1)
 				*data = (u8)(flash_data & 0x000000FF);
-			} else if (size == 2) {
+			else if (size == 2)
 				*data = (u16)(flash_data & 0x0000FFFF);
-			}
 			break;
 		} else {
 			/*
@@ -1397,20 +1360,12 @@ static s32 e1000_write_nvm_ich8lan(struct e1000_hw *hw, u16 offset, u16 words,
                                    u16 *data)
 {
 	struct e1000_nvm_info *nvm = &hw->nvm;
-	struct e1000_dev_spec_ich8lan *dev_spec;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
 	s32 ret_val = E1000_SUCCESS;
 	u16 i;
 
 	DEBUGFUNC("e1000_write_nvm_ich8lan");
 
-	dev_spec = (struct e1000_dev_spec_ich8lan *)hw->dev_spec;
-
-	if (!dev_spec) {
-		DEBUGOUT("dev_spec pointer is set to NULL.\n");
-		ret_val = -E1000_ERR_CONFIG;
-		goto out;
-	}
-
 	if ((offset >= nvm->word_size) || (words > nvm->word_size - offset) ||
 	    (words == 0)) {
 		DEBUGOUT("nvm parameter(s) out of bounds\n");
@@ -1447,15 +1402,13 @@ out:
 static s32 e1000_update_nvm_checksum_ich8lan(struct e1000_hw *hw)
 {
 	struct e1000_nvm_info *nvm = &hw->nvm;
-	struct e1000_dev_spec_ich8lan *dev_spec;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
 	u32 i, act_offset, new_bank_offset, old_bank_offset, bank;
 	s32 ret_val;
 	u16 data;
 
 	DEBUGFUNC("e1000_update_nvm_checksum_ich8lan");
 
-	dev_spec = (struct e1000_dev_spec_ich8lan *)hw->dev_spec;
-
 	ret_val = e1000_update_nvm_checksum_generic(hw);
 	if (ret_val)
 		goto out;
@@ -1594,9 +1547,8 @@ out:
  *  @hw: pointer to the HW structure
  *
  *  Check to see if checksum needs to be fixed by reading bit 6 in word 0x19.
- *  If the bit is 0, that the EEPROM had been modified, but the checksum was
- *  not calculated, in which case we need to calculate the checksum and set
- *  bit 6.
+ *  If the bit is 0, that the EEPROM had been modified, but the checksum was not
+ *  calculated, in which case we need to calculate the checksum and set bit 6.
  **/
 static s32 e1000_validate_nvm_checksum_ich8lan(struct e1000_hw *hw)
 {
@@ -1668,7 +1620,7 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
 
 		hsflctl.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFCTL);
 		/* 0b/1b corresponds to 1 or 2 byte size, respectively. */
-		hsflctl.hsf_ctrl.fldbcount = size -1;
+		hsflctl.hsf_ctrl.fldbcount = size - 1;
 		hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_WRITE;
 		E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL, hsflctl.regval);
 
@@ -1687,25 +1639,23 @@ static s32 e1000_write_flash_data_ich8lan(struct e1000_hw *hw, u32 offset,
 		 */
 		ret_val = e1000_flash_cycle_ich8lan(hw,
 		                               ICH_FLASH_WRITE_COMMAND_TIMEOUT);
-		if (ret_val == E1000_SUCCESS) {
+		if (ret_val == E1000_SUCCESS)
+			break;
+
+		/*
+		 * If we're here, then things are most likely
+		 * completely hosed, but if the error condition
+		 * is detected, it won't hurt to give it another
+		 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times.
+		 */
+		hsfsts.regval = E1000_READ_FLASH_REG16(hw, ICH_FLASH_HSFSTS);
+		if (hsfsts.hsf_status.flcerr == 1) {
+			/* Repeat for some time before giving up. */
+			continue;
+		} else if (hsfsts.hsf_status.flcdone == 0) {
+			DEBUGOUT("Timeout error - flash cycle "
+				 "did not complete.");
 			break;
-		} else {
-			/*
-			 * If we're here, then things are most likely
-			 * completely hosed, but if the error condition
-			 * is detected, it won't hurt to give it another
-			 * try...ICH_FLASH_CYCLE_REPEAT_COUNT times.
-			 */
-			hsfsts.regval = E1000_READ_FLASH_REG16(hw,
-			                                      ICH_FLASH_HSFSTS);
-			if (hsfsts.hsf_status.flcerr == 1) {
-				/* Repeat for some time before giving up. */
-				continue;
-			} else if (hsfsts.hsf_status.flcdone == 0) {
-				DEBUGOUT("Timeout error - flash cycle "
-				         "did not complete.");
-				break;
-			}
 		}
 	} while (count++ < ICH_FLASH_CYCLE_REPEAT_COUNT);
 
@@ -1784,9 +1734,9 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
 	u32 flash_linear_addr;
 	/* bank size is in 16bit words - adjust to bytes */
 	u32 flash_bank_size = nvm->flash_bank_size * 2;
-	s32  ret_val = E1000_SUCCESS;
-	s32  count = 0;
-	s32  j, iteration, sector_size;
+	s32 ret_val = E1000_SUCCESS;
+	s32 count = 0;
+	s32 j, iteration, sector_size;
 
 	DEBUGFUNC("e1000_erase_flash_bank_ich8lan");
 
@@ -1851,8 +1801,7 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
 			hsflctl.regval = E1000_READ_FLASH_REG16(hw,
 			                                      ICH_FLASH_HSFCTL);
 			hsflctl.hsf_ctrl.flcycle = ICH_CYCLE_ERASE;
-			E1000_WRITE_FLASH_REG16(hw,
-			                        ICH_FLASH_HSFCTL,
+			E1000_WRITE_FLASH_REG16(hw, ICH_FLASH_HSFCTL,
 			                        hsflctl.regval);
 
 			/*
@@ -1861,31 +1810,26 @@ static s32 e1000_erase_flash_bank_ich8lan(struct e1000_hw *hw, u32 bank)
 			 * Address.
 			 */
 			flash_linear_addr += (j * sector_size);
-			E1000_WRITE_FLASH_REG(hw,
-			                      ICH_FLASH_FADDR,
+			E1000_WRITE_FLASH_REG(hw, ICH_FLASH_FADDR,
 			                      flash_linear_addr);
 
 			ret_val = e1000_flash_cycle_ich8lan(hw,
 			                       ICH_FLASH_ERASE_COMMAND_TIMEOUT);
-			if (ret_val == E1000_SUCCESS) {
+			if (ret_val == E1000_SUCCESS)
 				break;
-			} else {
-				/*
-				 * Check if FCERR is set to 1.  If 1,
-				 * clear it and try the whole sequence
-				 * a few more times else Done
-				 */
-				hsfsts.regval = E1000_READ_FLASH_REG16(hw,
-				                              ICH_FLASH_HSFSTS);
-				if (hsfsts.hsf_status.flcerr == 1) {
-					/*
-					 * repeat for some time before
-					 * giving up
-					 */
-					continue;
-				} else if (hsfsts.hsf_status.flcdone == 0)
-					goto out;
-			}
+
+			/*
+			 * Check if FCERR is set to 1.  If 1,
+			 * clear it and try the whole sequence
+			 * a few more times else Done
+			 */
+			hsfsts.regval = E1000_READ_FLASH_REG16(hw,
+						      ICH_FLASH_HSFSTS);
+			if (hsfsts.hsf_status.flcerr == 1)
+				/* repeat for some time before giving up */
+				continue;
+			else if (hsfsts.hsf_status.flcdone == 0)
+				goto out;
 		} while (++count < ICH_FLASH_CYCLE_REPEAT_COUNT);
 	}
 
@@ -1969,9 +1913,8 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 	 * on the last TLP read/write transaction when MAC is reset.
 	 */
 	ret_val = e1000_disable_pcie_master_generic(hw);
-	if (ret_val) {
+	if (ret_val)
 		DEBUGOUT("PCI-E Master disable polling has failed.\n");
-	}
 
 	DEBUGOUT("Masking off all interrupts\n");
 	E1000_WRITE_REG(hw, E1000_IMC, 0xffffffff);
@@ -2006,7 +1949,7 @@ static s32 e1000_reset_hw_ich8lan(struct e1000_hw *hw)
 		ctrl |= E1000_CTRL_PHY_RST;
 	}
 	ret_val = e1000_acquire_swflag_ich8lan(hw);
-	DEBUGOUT("Issuing a global reset to ich8lan");
+	DEBUGOUT("Issuing a global reset to ich8lan\n");
 	E1000_WRITE_REG(hw, E1000_CTRL, (ctrl | E1000_CTRL_RST));
 	msec_delay(20);
 
@@ -2122,9 +2065,6 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_initialize_hw_bits_ich8lan");
 
-	if (hw->mac.disable_hw_init_bits)
-		goto out;
-
 	/* Extended Device Control */
 	reg = E1000_READ_REG(hw, E1000_CTRL_EXT);
 	reg |= (1 << 22);
@@ -2163,7 +2103,6 @@ static void e1000_initialize_hw_bits_ich8lan(struct e1000_hw *hw)
 		E1000_WRITE_REG(hw, E1000_STATUS, reg);
 	}
 
-out:
 	return;
 }
 
@@ -2191,12 +2130,17 @@ static s32 e1000_setup_link_ich8lan(struct e1000_hw *hw)
 	 * the default flow control setting, so we explicitly
 	 * set it to full.
 	 */
-	if (hw->fc.type == e1000_fc_default)
-		hw->fc.type = e1000_fc_full;
+	if (hw->fc.requested_mode == e1000_fc_default)
+		hw->fc.requested_mode = e1000_fc_full;
 
-	hw->fc.original_type = hw->fc.type;
+	/*
+	 * Save off the requested flow control mode for use later.  Depending
+	 * on the link partner's capabilities, we may or may not use this mode.
+	 */
+	hw->fc.current_mode = hw->fc.requested_mode;
 
-	DEBUGOUT1("After fix-ups FlowControl is now = %x\n", hw->fc.type);
+	DEBUGOUT1("After fix-ups FlowControl is now = %x\n",
+                                                    hw->fc.current_mode);
 
 	/* Continue to configure the copper link. */
 	ret_val = hw->mac.ops.setup_physical_interface(hw);
@@ -2340,7 +2284,7 @@ out:
  **/
 static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
 {
-	struct e1000_dev_spec_ich8lan *dev_spec;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
 	u32 phy_ctrl;
 	s32 ret_val = E1000_SUCCESS;
 	u16 i, data;
@@ -2348,14 +2292,6 @@ static s32 e1000_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw)
 
 	DEBUGFUNC("e1000_kmrn_lock_loss_workaround_ich8lan");
 
-	dev_spec = (struct e1000_dev_spec_ich8lan *)hw->dev_spec;
-
-	if (!dev_spec) {
-		DEBUGOUT("dev_spec pointer is set to NULL.\n");
-		ret_val = -E1000_ERR_CONFIG;
-		goto out;
-	}
-
 	if (!(dev_spec->kmrn_lock_loss_workaround_enabled))
 		goto out;
 
@@ -2420,25 +2356,17 @@ out:
 void e1000_set_kmrn_lock_loss_workaround_ich8lan(struct e1000_hw *hw,
                                                  bool state)
 {
-	struct e1000_dev_spec_ich8lan *dev_spec;
+	struct e1000_dev_spec_ich8lan *dev_spec = &hw->dev_spec.ich8lan;
 
 	DEBUGFUNC("e1000_set_kmrn_lock_loss_workaround_ich8lan");
 
 	if (hw->mac.type != e1000_ich8lan) {
 		DEBUGOUT("Workaround applies to ICH8 only.\n");
-		goto out;
-	}
-
-	dev_spec = (struct e1000_dev_spec_ich8lan *)hw->dev_spec;
-
-	if (!dev_spec) {
-		DEBUGOUT("dev_spec pointer is set to NULL.\n");
-		goto out;
+		return;
 	}
 
 	dev_spec->kmrn_lock_loss_workaround_enabled = state;
 
-out:
 	return;
 }
 
@@ -2481,8 +2409,7 @@ void e1000_igp3_phy_powerdown_workaround_ich8lan(struct e1000_hw *hw)
 		/* Write VR power-down enable */
 		hw->phy.ops.read_reg(hw, IGP3_VR_CTRL, &data);
 		data &= ~IGP3_VR_CTRL_DEV_POWERDOWN_MODE_MASK;
-		hw->phy.ops.write_reg(hw,
-		                   IGP3_VR_CTRL,
+		hw->phy.ops.write_reg(hw, IGP3_VR_CTRL,
 		                   data | IGP3_VR_CTRL_MODE_SHUTDOWN);
 
 		/* Read it back and test */
@@ -2579,8 +2506,7 @@ static s32 e1000_cleanup_led_ich8lan(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_cleanup_led_ich8lan");
 
 	if (hw->phy.type == e1000_phy_ife)
-		ret_val = hw->phy.ops.write_reg(hw,
-		                              IFE_PHY_SPECIAL_CONTROL_LED,
+		ret_val = hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,
 		                              0);
 	else
 		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_default);
@@ -2601,8 +2527,7 @@ static s32 e1000_led_on_ich8lan(struct e1000_hw *hw)
 	DEBUGFUNC("e1000_led_on_ich8lan");
 
 	if (hw->phy.type == e1000_phy_ife)
-		ret_val = hw->phy.ops.write_reg(hw,
-		                IFE_PHY_SPECIAL_CONTROL_LED,
+		ret_val = hw->phy.ops.write_reg(hw, IFE_PHY_SPECIAL_CONTROL_LED,
 		                (IFE_PSCL_PROBE_MODE | IFE_PSCL_PROBE_LEDS_ON));
 	else
 		E1000_WRITE_REG(hw, E1000_LEDCTL, hw->mac.ledctl_mode2);
@@ -2652,12 +2577,12 @@ static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)
 	/* If EEPROM is not marked present, init the IGP 3 PHY manually */
 	if (hw->mac.type != e1000_ich10lan) {
 		if (((E1000_READ_REG(hw, E1000_EECD) & E1000_EECD_PRES) == 0) &&
-    		    (hw->phy.type == e1000_phy_igp_3)) {
+		    (hw->phy.type == e1000_phy_igp_3)) {
 			e1000_phy_init_script_igp3(hw);
 		}
 	} else {
 		if (e1000_valid_nvm_bank_detect_ich8lan(hw, &bank)) {
-			/* Maybe we should do a basic Boazman config */
+			/* Maybe we should do a basic PHY config */
 			DEBUGOUT("EEPROM not present\n");
 			ret_val = -E1000_ERR_CONFIG;
 		}
@@ -2675,11 +2600,9 @@ static s32 e1000_get_cfg_done_ich8lan(struct e1000_hw *hw)
  **/
 static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw)
 {
-	struct e1000_phy_info *phy = &hw->phy;
-	struct e1000_mac_info *mac = &hw->mac;
-
 	/* If the management interface is not enabled, then power down */
-	if (!(mac->ops.check_mng_mode(hw) || phy->ops.check_reset_block(hw)))
+	if (!(hw->mac.ops.check_mng_mode(hw) ||
+	      hw->phy.ops.check_reset_block(hw)))
 		e1000_power_down_phy_copper(hw);
 
 	return;
@@ -2694,24 +2617,22 @@ static void e1000_power_down_phy_copper_ich8lan(struct e1000_hw *hw)
  **/
 static void e1000_clear_hw_cntrs_ich8lan(struct e1000_hw *hw)
 {
-	volatile u32 temp;
-
 	DEBUGFUNC("e1000_clear_hw_cntrs_ich8lan");
 
 	e1000_clear_hw_cntrs_base_generic(hw);
 
-	temp = E1000_READ_REG(hw, E1000_ALGNERRC);
-	temp = E1000_READ_REG(hw, E1000_RXERRC);
-	temp = E1000_READ_REG(hw, E1000_TNCRS);
-	temp = E1000_READ_REG(hw, E1000_CEXTERR);
-	temp = E1000_READ_REG(hw, E1000_TSCTC);
-	temp = E1000_READ_REG(hw, E1000_TSCTFC);
+	E1000_READ_REG(hw, E1000_ALGNERRC);
+	E1000_READ_REG(hw, E1000_RXERRC);
+	E1000_READ_REG(hw, E1000_TNCRS);
+	E1000_READ_REG(hw, E1000_CEXTERR);
+	E1000_READ_REG(hw, E1000_TSCTC);
+	E1000_READ_REG(hw, E1000_TSCTFC);
 
-	temp = E1000_READ_REG(hw, E1000_MGTPRC);
-	temp = E1000_READ_REG(hw, E1000_MGTPDC);
-	temp = E1000_READ_REG(hw, E1000_MGTPTC);
+	E1000_READ_REG(hw, E1000_MGTPRC);
+	E1000_READ_REG(hw, E1000_MGTPDC);
+	E1000_READ_REG(hw, E1000_MGTPTC);
 
-	temp = E1000_READ_REG(hw, E1000_IAC);
-	temp = E1000_READ_REG(hw, E1000_ICRXOC);
+	E1000_READ_REG(hw, E1000_IAC);
+	E1000_READ_REG(hw, E1000_ICRXOC);
 }