diff options
author | rnoland <rnoland@FreeBSD.org> | 2009-04-07 22:20:58 +0000 |
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committer | rnoland <rnoland@FreeBSD.org> | 2009-04-07 22:20:58 +0000 |
commit | f5751c34ee5affa9aba22473f08b33d6fb686322 (patch) | |
tree | a8c9baf89cd58a7bbe0f415dee3cf527b79dcb7a /sys/dev/drm | |
parent | b2a611f93a1bd1f74b0f463a784f9e3f364760ea (diff) | |
download | FreeBSD-src-f5751c34ee5affa9aba22473f08b33d6fb686322.zip FreeBSD-src-f5751c34ee5affa9aba22473f08b33d6fb686322.tar.gz |
Add regs required for occlusion queries support
Submitted by: Maciej Cencora <m.cencora@gmail.com>
MFC after: 3 days
Diffstat (limited to 'sys/dev/drm')
-rw-r--r-- | sys/dev/drm/r300_cmdbuf.c | 5 | ||||
-rw-r--r-- | sys/dev/drm/r300_reg.h | 5 | ||||
-rw-r--r-- | sys/dev/drm/radeon_cp.c | 2 | ||||
-rw-r--r-- | sys/dev/drm/radeon_drv.h | 1 |
4 files changed, 11 insertions, 2 deletions
diff --git a/sys/dev/drm/r300_cmdbuf.c b/sys/dev/drm/r300_cmdbuf.c index b9e9f0f..1691d50 100644 --- a/sys/dev/drm/r300_cmdbuf.c +++ b/sys/dev/drm/r300_cmdbuf.c @@ -208,6 +208,10 @@ void r300_init_reg_flags(struct drm_device *dev) ADD_RANGE(0x42C0, 2); ADD_RANGE(R300_RS_CNTL_0, 2); + ADD_RANGE(R300_SU_REG_DEST, 1); + if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV530) + ADD_RANGE(RV530_FG_ZBREG_DEST, 1); + ADD_RANGE(R300_SC_HYPERZ, 2); ADD_RANGE(0x43E8, 1); @@ -233,6 +237,7 @@ void r300_init_reg_flags(struct drm_device *dev) ADD_RANGE(R300_ZB_DEPTHPITCH, 1); ADD_RANGE(R300_ZB_DEPTHCLEARVALUE, 1); ADD_RANGE(R300_ZB_ZMASK_OFFSET, 13); + ADD_RANGE(R300_ZB_ZPASS_DATA, 2); /* ZB_ZPASS_DATA, ZB_ZPASS_ADDR */ ADD_RANGE(R300_TX_FILTER_0, 16); ADD_RANGE(R300_TX_FILTER1_0, 16); diff --git a/sys/dev/drm/r300_reg.h b/sys/dev/drm/r300_reg.h index c92779e..928440f 100644 --- a/sys/dev/drm/r300_reg.h +++ b/sys/dev/drm/r300_reg.h @@ -1776,6 +1776,11 @@ __FBSDID("$FreeBSD$"); #define R500_RB3D_COLOR_CLEAR_VALUE_AR 0x46c0 #define R500_RB3D_CONSTANT_COLOR_AR 0x4ef8 +#define R300_SU_REG_DEST 0x42c8 +#define RV530_FG_ZBREG_DEST 0x4be8 +#define R300_ZB_ZPASS_DATA 0x4f58 +#define R300_ZB_ZPASS_ADDR 0x4f5c + #endif /* _R300_REG_H */ /* *INDENT-ON* */ diff --git a/sys/dev/drm/radeon_cp.c b/sys/dev/drm/radeon_cp.c index 1687012..8f723ce 100644 --- a/sys/dev/drm/radeon_cp.c +++ b/sys/dev/drm/radeon_cp.c @@ -436,7 +436,7 @@ static void radeon_init_pipes(drm_radeon_private_t *dev_priv) if ((dev_priv->flags & RADEON_FAMILY_MASK) >= CHIP_RV515) { RADEON_WRITE_PLL(R500_DYN_SCLK_PWMEM_PIPE, (1 | ((gb_pipe_sel >> 8) & 0xf) << 4)); - RADEON_WRITE(R500_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1)); + RADEON_WRITE(R300_SU_REG_DEST, ((1 << dev_priv->num_gb_pipes) - 1)); } RADEON_WRITE(R300_GB_TILE_CONFIG, gb_tile_config); radeon_do_wait_for_idle(dev_priv); diff --git a/sys/dev/drm/radeon_drv.h b/sys/dev/drm/radeon_drv.h index 138a1e2..57f57a9 100644 --- a/sys/dev/drm/radeon_drv.h +++ b/sys/dev/drm/radeon_drv.h @@ -684,7 +684,6 @@ extern void r600_page_table_cleanup(struct drm_device *dev, struct drm_ati_pciga /* pipe config regs */ #define R400_GB_PIPE_SELECT 0x402c #define R500_DYN_SCLK_PWMEM_PIPE 0x000d /* PLL */ -#define R500_SU_REG_DEST 0x42c8 #define R300_GB_TILE_CONFIG 0x4018 # define R300_ENABLE_TILING (1 << 0) # define R300_PIPE_COUNT_RV350 (0 << 1) |