Update to DRM CVS as of 2005-04-12, bringing many changes:

- Split core DRM routines back into their own module, rather than using the
  nasty templated system like before.
- Development-class R300 support in radeon driver (requires userland pieces, of
  course).
- Mach64 driver (haven't tested in a while -- my mach64s no longer fit in the
  testbox).  Covers Rage Pros, Rage Mobility P/M, Rage XL, and some others.
- i915 driver files, which just need to get drm_drv.c fixed to allow attachment
  to the drmsub device.  Covers i830 through i915 integrated graphics.
- savage driver files, which should require minimal changes to work.  Covers the
  Savage3D, Savage IX/MX, Savage 4, ProSavage.
- Support for color and texture tiling and HyperZ features of Radeon.

Thanks to:	scottl (much p4 handholding)
		Jung-uk Kim (helpful prodding)
PR:		[1] kern/76879, [2] kern/72548
Submitted by:	[1] Alex, lesha at intercaf dot ru
		[2] Shaun Jurrens, shaun at shamz dot net

76 files changed, 25843 insertions, 16792 deletions

diff --git a/sys/dev/drm/ati_pcigart.h b/sys/dev/drm/ati_pcigart.c
index 0bdb336..df8e5da 100644
--- a/sys/dev/drm/ati_pcigart.h
+++ b/sys/dev/drm/ati_pcigart.c
@@ -1,5 +1,6 @@
 /* ati_pcigart.h -- ATI PCI GART support -*- linux-c -*-
- * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com */
+ * Created: Wed Dec 13 21:52:19 2000 by gareth@valinux.com
+ */
 /*-
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All Rights Reserved.
@@ -44,9 +45,8 @@
 # define ATI_MAX_PCIGART_PAGES		8192	/* 32 MB aperture, 4K pages */
 # define ATI_PCIGART_PAGE_SIZE		4096	/* PCI GART page size */
 
-int DRM(ati_pcigart_init)( drm_device_t *dev,
-			   unsigned long *addr,
-			   dma_addr_t *bus_addr)
+int drm_ati_pcigart_init(drm_device_t *dev, unsigned long *addr,
+			 dma_addr_t *bus_addr)
 {
 	drm_sg_mem_t *entry = dev->sg;
 	unsigned long address = 0;
@@ -60,7 +60,7 @@ int DRM(ati_pcigart_init)( drm_device_t *dev,
 	}
 
 	address = (long)contigmalloc((1 << ATI_PCIGART_TABLE_ORDER) * PAGE_SIZE, 
-	    DRM(M_DRM), M_NOWAIT, 0ul, 0xfffffffful, PAGE_SIZE, 0);
+	    M_DRM, M_NOWAIT, 0ul, 0xfffffffful, PAGE_SIZE, 0);
 	if ( !address ) {
 		DRM_ERROR( "cannot allocate PCI GART page!\n" );
 		goto done;
@@ -96,9 +96,8 @@ done:
 	return ret;
 }
 
-int DRM(ati_pcigart_cleanup)( drm_device_t *dev,
-			      unsigned long addr,
-			      dma_addr_t bus_addr)
+int drm_ati_pcigart_cleanup(drm_device_t *dev, unsigned long addr,
+			    dma_addr_t bus_addr)
 {
 	drm_sg_mem_t *entry = dev->sg;
 
@@ -109,7 +108,9 @@ int DRM(ati_pcigart_cleanup)( drm_device_t *dev,
 	}
 
 #if __FreeBSD_version > 500000
-	contigfree( (void *)addr, (1 << ATI_PCIGART_TABLE_ORDER) * PAGE_SIZE, DRM(M_DRM));	/* Not available on 4.x */
+	/* Not available on 4.x */
+	contigfree((void *)addr, (1 << ATI_PCIGART_TABLE_ORDER) * PAGE_SIZE,
+		   M_DRM);
 #endif
 	return 1;
 }
diff --git a/sys/dev/drm/drm.h b/sys/dev/drm/drm.h
index 1675783..00a79bf 100644
--- a/sys/dev/drm/drm.h
+++ b/sys/dev/drm/drm.h
@@ -1,7 +1,7 @@
 /**
- * \file drm.h 
+ * \file drm.h
  * Header for the Direct Rendering Manager
- * 
+ *
  * \author Rickard E. (Rik) Faith <faith@valinux.com>
  *
  * \par Acknowledgments:
@@ -35,10 +35,35 @@
  * $FreeBSD$
  */
 
+/**
+ * \mainpage
+ *
+ * The Direct Rendering Manager (DRM) is a device-independent kernel-level
+ * device driver that provides support for the XFree86 Direct Rendering
+ * Infrastructure (DRI).
+ *
+ * The DRM supports the Direct Rendering Infrastructure (DRI) in four major
+ * ways:
+ *     -# The DRM provides synchronized access to the graphics hardware via
+ *        the use of an optimized two-tiered lock.
+ *     -# The DRM enforces the DRI security policy for access to the graphics
+ *        hardware by only allowing authenticated X11 clients access to
+ *        restricted regions of memory.
+ *     -# The DRM provides a generic DMA engine, complete with multiple
+ *        queues and the ability to detect the need for an OpenGL context
+ *        switch.
+ *     -# The DRM is extensible via the use of small device-specific modules
+ *        that rely extensively on the API exported by the DRM module.
+ *
+ */
 
 #ifndef _DRM_H_
 #define _DRM_H_
 
+#ifndef __user
+#define __user
+#endif
+
 #if defined(__linux__)
 #include <linux/config.h>
 #include <asm/ioctl.h>		/* For _IO* macros */
@@ -56,7 +81,7 @@
 #define ioctl(a,b,c)		xf86ioctl(a,b,c)
 #else
 #include <sys/ioccom.h>
-#endif /* __FreeBSD__ && xf86ioctl */
+#endif				/* __FreeBSD__ && xf86ioctl */
 #define DRM_IOCTL_NR(n)		((n) & 0xff)
 #define DRM_IOC_VOID		IOC_VOID
 #define DRM_IOC_READ		IOC_OUT
@@ -89,52 +114,49 @@
 #if defined(__linux__) || defined(__NetBSD__)
 #define DRM_MAJOR       226
 #endif
-#define DRM_MAX_MINOR   15
+#define DRM_MAX_MINOR   255
 #endif
 #define DRM_NAME	"drm"	  /**< Name in kernel, /dev, and /proc */
 #define DRM_MIN_ORDER	5	  /**< At least 2^5 bytes = 32 bytes */
 #define DRM_MAX_ORDER	22	  /**< Up to 2^22 bytes = 4MB */
 #define DRM_RAM_PERCENT 10	  /**< How much system ram can we lock? */
 
-#define _DRM_LOCK_HELD	0x80000000 /**< Hardware lock is held */
-#define _DRM_LOCK_CONT	0x40000000 /**< Hardware lock is contended */
+#define _DRM_LOCK_HELD	0x80000000U /**< Hardware lock is held */
+#define _DRM_LOCK_CONT	0x40000000U /**< Hardware lock is contended */
 #define _DRM_LOCK_IS_HELD(lock)	   ((lock) & _DRM_LOCK_HELD)
 #define _DRM_LOCK_IS_CONT(lock)	   ((lock) & _DRM_LOCK_CONT)
 #define _DRM_LOCKING_CONTEXT(lock) ((lock) & ~(_DRM_LOCK_HELD|_DRM_LOCK_CONT))
 
-
-typedef unsigned long drm_handle_t;
-typedef unsigned int  drm_context_t;
-typedef unsigned int  drm_drawable_t;
-typedef unsigned int  drm_magic_t;
-
+typedef unsigned long drm_handle_t;	/**< To mapped regions */
+typedef unsigned int drm_context_t;	/**< GLXContext handle */
+typedef unsigned int drm_drawable_t;
+typedef unsigned int drm_magic_t;	/**< Magic for authentication */
 
 /**
  * Cliprect.
- * 
- * \warning: If you change this structure, make sure you change
+ *
+ * \warning If you change this structure, make sure you change
  * XF86DRIClipRectRec in the server as well
  *
  * \note KW: Actually it's illegal to change either for
  * backwards-compatibility reasons.
  */
 typedef struct drm_clip_rect {
-	unsigned short	x1;
-	unsigned short	y1;
-	unsigned short	x2;
-	unsigned short	y2;
+	unsigned short x1;
+	unsigned short y1;
+	unsigned short x2;
+	unsigned short y2;
 } drm_clip_rect_t;
 
-
 /**
  * Texture region,
  */
 typedef struct drm_tex_region {
-	unsigned char	next;
-	unsigned char	prev;
-	unsigned char	in_use;
-	unsigned char	padding;
-	unsigned int	age;
+	unsigned char next;
+	unsigned char prev;
+	unsigned char in_use;
+	unsigned char padding;
+	unsigned int age;
 } drm_tex_region_t;
 
 /**
@@ -146,50 +168,63 @@ typedef struct drm_tex_region {
  */
 typedef struct drm_hw_lock {
 	__volatile__ unsigned int lock;		/**< lock variable */
-	char			  padding[60];	/**< Pad to cache line */
+	char padding[60];			/**< Pad to cache line */
 } drm_hw_lock_t;
 
+/* This is beyond ugly, and only works on GCC.  However, it allows me to use
+ * drm.h in places (i.e., in the X-server) where I can't use size_t.  The real
+ * fix is to use uint32_t instead of size_t, but that fix will break existing
+ * LP64 (i.e., PowerPC64, SPARC64, IA-64, Alpha, etc.) systems.  That *will*
+ * eventually happen, though.  I chose 'unsigned long' to be the fallback type
+ * because that works on all the platforms I know about.  Hopefully, the
+ * real fix will happen before that bites us.
+ */
+
+#ifdef __SIZE_TYPE__
+# define DRM_SIZE_T __SIZE_TYPE__
+#else
+# warning "__SIZE_TYPE__ not defined.  Assuming sizeof(size_t) == sizeof(unsigned long)!"
+# define DRM_SIZE_T unsigned long
+#endif
 
 /**
  * DRM_IOCTL_VERSION ioctl argument type.
- * 
+ *
  * \sa drmGetVersion().
  */
 typedef struct drm_version {
-	int    version_major;	  /**< Major version */
-	int    version_minor;	  /**< Minor version */
-	int    version_patchlevel;/**< Patch level */
-	size_t name_len;	  /**< Length of name buffer */
-	char   *name;		  /**< Name of driver */
-	size_t date_len;	  /**< Length of date buffer */
-	char   *date;		  /**< User-space buffer to hold date */
-	size_t desc_len;	  /**< Length of desc buffer */
-	char   *desc;		  /**< User-space buffer to hold desc */
+	int version_major;	  /**< Major version */
+	int version_minor;	  /**< Minor version */
+	int version_patchlevel;	  /**< Patch level */
+	DRM_SIZE_T name_len;	  /**< Length of name buffer */
+	char __user *name;		  /**< Name of driver */
+	DRM_SIZE_T date_len;	  /**< Length of date buffer */
+	char __user *date;		  /**< User-space buffer to hold date */
+	DRM_SIZE_T desc_len;	  /**< Length of desc buffer */
+	char __user *desc;		  /**< User-space buffer to hold desc */
 } drm_version_t;
 
-
 /**
  * DRM_IOCTL_GET_UNIQUE ioctl argument type.
  *
  * \sa drmGetBusid() and drmSetBusId().
  */
 typedef struct drm_unique {
-	size_t unique_len;	  /**< Length of unique */
-	char   *unique;		  /**< Unique name for driver instantiation */
+	DRM_SIZE_T unique_len;	  /**< Length of unique */
+	char __user *unique;		  /**< Unique name for driver instantiation */
 } drm_unique_t;
 
+#undef DRM_SIZE_T
 
 typedef struct drm_list {
-	int		 count;	  /**< Length of user-space structures */
-	drm_version_t	 *version;
+	int count;		  /**< Length of user-space structures */
+	drm_version_t __user *version;
 } drm_list_t;
 
-
 typedef struct drm_block {
-	int		 unused;
+	int unused;
 } drm_block_t;
 
-
 /**
  * DRM_IOCTL_CONTROL ioctl argument type.
  *
@@ -201,43 +236,40 @@ typedef struct drm_control {
 		DRM_RM_COMMAND,
 		DRM_INST_HANDLER,
 		DRM_UNINST_HANDLER
-	}		 func;
-	int		 irq;
+	} func;
+	int irq;
 } drm_control_t;
 
-
 /**
  * Type of memory to map.
  */
 typedef enum drm_map_type {
-	_DRM_FRAME_BUFFER   = 0,  /**< WC (no caching), no core dump */
-	_DRM_REGISTERS	    = 1,  /**< no caching, no core dump */
-	_DRM_SHM	    = 2,  /**< shared, cached */
-	_DRM_AGP            = 3,  /**< AGP/GART */
-	_DRM_SCATTER_GATHER = 4	  /**< Scatter/gather memory for PCI DMA */
+	_DRM_FRAME_BUFFER = 0,	  /**< WC (no caching), no core dump */
+	_DRM_REGISTERS = 1,	  /**< no caching, no core dump */
+	_DRM_SHM = 2,		  /**< shared, cached */
+	_DRM_AGP = 3,		  /**< AGP/GART */
+	_DRM_SCATTER_GATHER = 4,  /**< Scatter/gather memory for PCI DMA */
+	_DRM_CONSISTENT = 5	  /**< Consistent memory for PCI DMA */
 } drm_map_type_t;
 
-
 /**
  * Memory mapping flags.
  */
 typedef enum drm_map_flags {
-	_DRM_RESTRICTED	     = 0x01, /**< Cannot be mapped to user-virtual */
-	_DRM_READ_ONLY	     = 0x02,
-	_DRM_LOCKED	     = 0x04, /**< shared, cached, locked */
-	_DRM_KERNEL	     = 0x08, /**< kernel requires access */
+	_DRM_RESTRICTED = 0x01,	     /**< Cannot be mapped to user-virtual */
+	_DRM_READ_ONLY = 0x02,
+	_DRM_LOCKED = 0x04,	     /**< shared, cached, locked */
+	_DRM_KERNEL = 0x08,	     /**< kernel requires access */
 	_DRM_WRITE_COMBINING = 0x10, /**< use write-combining if available */
-	_DRM_CONTAINS_LOCK   = 0x20, /**< SHM page that contains lock */
-	_DRM_REMOVABLE	     = 0x40  /**< Removable mapping */
+	_DRM_CONTAINS_LOCK = 0x20,   /**< SHM page that contains lock */
+	_DRM_REMOVABLE = 0x40	     /**< Removable mapping */
 } drm_map_flags_t;
 
-
 typedef struct drm_ctx_priv_map {
-	unsigned int	ctx_id;  /**< Context requesting private mapping */
-	void		*handle; /**< Handle of map */
+	unsigned int ctx_id;	 /**< Context requesting private mapping */
+	void *handle;		 /**< Handle of map */
 } drm_ctx_priv_map_t;
 
-
 /**
  * DRM_IOCTL_GET_MAP, DRM_IOCTL_ADD_MAP and DRM_IOCTL_RM_MAP ioctls
  * argument type.
@@ -245,30 +277,28 @@ typedef struct drm_ctx_priv_map {
  * \sa drmAddMap().
  */
 typedef struct drm_map {
-	unsigned long	offset;	 /**< Requested physical address (0 for SAREA)*/
-	unsigned long	size;	 /**< Requested physical size (bytes) */
-	drm_map_type_t	type;	 /**< Type of memory to map */
+	unsigned long offset;	 /**< Requested physical address (0 for SAREA)*/
+	unsigned long size;	 /**< Requested physical size (bytes) */
+	drm_map_type_t type;	 /**< Type of memory to map */
 	drm_map_flags_t flags;	 /**< Flags */
-	void		*handle; /**< User-space: "Handle" to pass to mmap() */
+	void *handle;		 /**< User-space: "Handle" to pass to mmap() */
 				 /**< Kernel-space: kernel-virtual address */
-	int		mtrr;	 /**< MTRR slot used */
-				 /*   Private data */
+	int mtrr;		 /**< MTRR slot used */
+	/*   Private data */
 } drm_map_t;
 
-
 /**
  * DRM_IOCTL_GET_CLIENT ioctl argument type.
  */
 typedef struct drm_client {
-	int		idx;	/**< Which client desired? */
-	int		auth;	/**< Is client authenticated? */
-	unsigned long	pid;	/**< Process ID */
-	unsigned long	uid;	/**< User ID */
-	unsigned long	magic;	/**< Magic */
-	unsigned long	iocs;	/**< Ioctl count */
+	int idx;		/**< Which client desired? */
+	int auth;		/**< Is client authenticated? */
+	unsigned long pid;	/**< Process ID */
+	unsigned long uid;	/**< User ID */
+	unsigned long magic;	/**< Magic */
+	unsigned long iocs;	/**< Ioctl count */
 } drm_client_t;
 
-
 typedef enum {
 	_DRM_STAT_LOCK,
 	_DRM_STAT_OPENS,
@@ -286,63 +316,58 @@ typedef enum {
 	_DRM_STAT_DMA,		/**< DMA */
 	_DRM_STAT_SPECIAL,	/**< Special DMA (e.g., priority or polled) */
 	_DRM_STAT_MISSED	/**< Missed DMA opportunity */
-
-				/* Add to the *END* of the list */
+	    /* Add to the *END* of the list */
 } drm_stat_type_t;
 
-
 /**
  * DRM_IOCTL_GET_STATS ioctl argument type.
  */
 typedef struct drm_stats {
 	unsigned long count;
 	struct {
-		unsigned long   value;
+		unsigned long value;
 		drm_stat_type_t type;
 	} data[15];
 } drm_stats_t;
 
-
 /**
  * Hardware locking flags.
  */
 typedef enum drm_lock_flags {
-	_DRM_LOCK_READY	     = 0x01, /**< Wait until hardware is ready for DMA */
-	_DRM_LOCK_QUIESCENT  = 0x02, /**< Wait until hardware quiescent */
-	_DRM_LOCK_FLUSH	     = 0x04, /**< Flush this context's DMA queue first */
-	_DRM_LOCK_FLUSH_ALL  = 0x08, /**< Flush all DMA queues first */
-				/* These *HALT* flags aren't supported yet
-				   -- they will be used to support the
-				   full-screen DGA-like mode. */
+	_DRM_LOCK_READY = 0x01,	     /**< Wait until hardware is ready for DMA */
+	_DRM_LOCK_QUIESCENT = 0x02,  /**< Wait until hardware quiescent */
+	_DRM_LOCK_FLUSH = 0x04,	     /**< Flush this context's DMA queue first */
+	_DRM_LOCK_FLUSH_ALL = 0x08,  /**< Flush all DMA queues first */
+	/* These *HALT* flags aren't supported yet
+	   -- they will be used to support the
+	   full-screen DGA-like mode. */
 	_DRM_HALT_ALL_QUEUES = 0x10, /**< Halt all current and future queues */
 	_DRM_HALT_CUR_QUEUES = 0x20  /**< Halt all current queues */
 } drm_lock_flags_t;
 
-
 /**
  * DRM_IOCTL_LOCK, DRM_IOCTL_UNLOCK and DRM_IOCTL_FINISH ioctl argument type.
- * 
+ *
  * \sa drmGetLock() and drmUnlock().
  */
 typedef struct drm_lock {
-	int		 context;
+	int context;
 	drm_lock_flags_t flags;
 } drm_lock_t;
 
-
 /**
  * DMA flags
  *
- * \warning 
+ * \warning
  * These values \e must match xf86drm.h.
  *
  * \sa drm_dma.
  */
-typedef enum drm_dma_flags {	      
-				      /* Flags for DMA buffer dispatch */
-	_DRM_DMA_BLOCK	      = 0x01, /**<
+typedef enum drm_dma_flags {
+	/* Flags for DMA buffer dispatch */
+	_DRM_DMA_BLOCK = 0x01,	      /**<
 				       * Block until buffer dispatched.
-				       * 
+				       *
 				       * \note The buffer may not yet have
 				       * been processed by the hardware --
 				       * getting a hardware lock with the
@@ -351,78 +376,73 @@ typedef enum drm_dma_flags {
 				       * processed.
 				       */
 	_DRM_DMA_WHILE_LOCKED = 0x02, /**< Dispatch while lock held */
-	_DRM_DMA_PRIORITY     = 0x04, /**< High priority dispatch */
+	_DRM_DMA_PRIORITY = 0x04,     /**< High priority dispatch */
 
-				      /* Flags for DMA buffer request */
-	_DRM_DMA_WAIT	      = 0x10, /**< Wait for free buffers */
-	_DRM_DMA_SMALLER_OK   = 0x20, /**< Smaller-than-requested buffers OK */
-	_DRM_DMA_LARGER_OK    = 0x40  /**< Larger-than-requested buffers OK */
+	/* Flags for DMA buffer request */
+	_DRM_DMA_WAIT = 0x10,	      /**< Wait for free buffers */
+	_DRM_DMA_SMALLER_OK = 0x20,   /**< Smaller-than-requested buffers OK */
+	_DRM_DMA_LARGER_OK = 0x40     /**< Larger-than-requested buffers OK */
 } drm_dma_flags_t;
 
-
 /**
  * DRM_IOCTL_ADD_BUFS and DRM_IOCTL_MARK_BUFS ioctl argument type.
  *
  * \sa drmAddBufs().
  */
 typedef struct drm_buf_desc {
-	int	      count;	 /**< Number of buffers of this size */
-	int	      size;	 /**< Size in bytes */
-	int	      low_mark;	 /**< Low water mark */
-	int	      high_mark; /**< High water mark */
+	int count;		 /**< Number of buffers of this size */
+	int size;		 /**< Size in bytes */
+	int low_mark;		 /**< Low water mark */
+	int high_mark;		 /**< High water mark */
 	enum {
-		_DRM_PAGE_ALIGN = 0x01, /**< Align on page boundaries for DMA */
-		_DRM_AGP_BUFFER = 0x02, /**< Buffer is in AGP space */
-		_DRM_SG_BUFFER  = 0x04  /**< Scatter/gather memory buffer */
-	}	      flags;
-	unsigned long agp_start; /**< 
+		_DRM_PAGE_ALIGN = 0x01,	/**< Align on page boundaries for DMA */
+		_DRM_AGP_BUFFER = 0x02,	/**< Buffer is in AGP space */
+		_DRM_SG_BUFFER  = 0x04,	/**< Scatter/gather memory buffer */
+		_DRM_FB_BUFFER  = 0x08  /**< Buffer is in frame buffer */
+	} flags;
+	unsigned long agp_start; /**<
 				  * Start address of where the AGP buffers are
 				  * in the AGP aperture
 				  */
 } drm_buf_desc_t;
 
-
 /**
  * DRM_IOCTL_INFO_BUFS ioctl argument type.
  */
 typedef struct drm_buf_info {
-	int	       count;	/**< Entries in list */
-	drm_buf_desc_t *list;
+	int count;		  /**< Number of buffers described in list */
+	drm_buf_desc_t __user *list;	  /**< List of buffer descriptions */
 } drm_buf_info_t;
 
-
 /**
  * DRM_IOCTL_FREE_BUFS ioctl argument type.
  */
 typedef struct drm_buf_free {
-	int	       count;
-	int	       *list;
+	int count;
+	int __user *list;
 } drm_buf_free_t;
 
-
 /**
  * Buffer information
  *
  * \sa drm_buf_map.
  */
 typedef struct drm_buf_pub {
-	int		  idx;	       /**< Index into the master buffer list */
-	int		  total;       /**< Buffer size */
-	int		  used;	       /**< Amount of buffer in use (for DMA) */
-	void		  *address;    /**< Address of buffer */
+	int idx;		       /**< Index into the master buffer list */
+	int total;		       /**< Buffer size */
+	int used;		       /**< Amount of buffer in use (for DMA) */
+	void __user *address;	       /**< Address of buffer */
 } drm_buf_pub_t;
 
-
 /**
  * DRM_IOCTL_MAP_BUFS ioctl argument type.
  */
 typedef struct drm_buf_map {
-	int	      count;	/**< Length of the buffer list */
-	void	      *virtual;	/**< Mmap'd area in user-virtual */
-	drm_buf_pub_t *list;	/**< Buffer information */
+	int count;		/**< Length of the buffer list */
+	void __user *virtual;		/**< Mmap'd area in user-virtual */
+	drm_buf_pub_t __user *list;	/**< Buffer information */
 } drm_buf_map_t;
 
-
 /**
  * DRM_IOCTL_DMA ioctl argument type.
  *
@@ -431,61 +451,55 @@ typedef struct drm_buf_map {
  * \sa drmDMA().
  */
 typedef struct drm_dma {
-	int		context;	  /**< Context handle */
-	int		send_count;	  /**< Number of buffers to send */
-	int		*send_indices;	  /**< List of handles to buffers */
-	int		*send_sizes;	  /**< Lengths of data to send */
+	int context;			  /**< Context handle */
+	int send_count;			  /**< Number of buffers to send */
+	int __user *send_indices;	  /**< List of handles to buffers */
+	int __user *send_sizes;		  /**< Lengths of data to send */
 	drm_dma_flags_t flags;		  /**< Flags */
-	int		request_count;	  /**< Number of buffers requested */
-	int		request_size;	  /**< Desired size for buffers */
-	int		*request_indices; /**< Buffer information */
-	int		*request_sizes;
-	int		granted_count;	  /**< Number of buffers granted */
+	int request_count;		  /**< Number of buffers requested */
+	int request_size;		  /**< Desired size for buffers */
+	int __user *request_indices;	 /**< Buffer information */
+	int __user *request_sizes;
+	int granted_count;		  /**< Number of buffers granted */
 } drm_dma_t;
 
-
 typedef enum {
 	_DRM_CONTEXT_PRESERVED = 0x01,
-	_DRM_CONTEXT_2DONLY    = 0x02
+	_DRM_CONTEXT_2DONLY = 0x02
 } drm_ctx_flags_t;
 
-
 /**
  * DRM_IOCTL_ADD_CTX ioctl argument type.
  *
  * \sa drmCreateContext() and drmDestroyContext().
  */
 typedef struct drm_ctx {
-	drm_context_t	handle;
+	drm_context_t handle;
 	drm_ctx_flags_t flags;
 } drm_ctx_t;
 
-
 /**
  * DRM_IOCTL_RES_CTX ioctl argument type.
  */
 typedef struct drm_ctx_res {
-	int		count;
-	drm_ctx_t	*contexts;
+	int count;
+	drm_ctx_t __user *contexts;
 } drm_ctx_res_t;
 
-
 /**
  * DRM_IOCTL_ADD_DRAW and DRM_IOCTL_RM_DRAW ioctl argument type.
  */
 typedef struct drm_draw {
-	drm_drawable_t	handle;
+	drm_drawable_t handle;
 } drm_draw_t;
 
-
 /**
  * DRM_IOCTL_GET_MAGIC and DRM_IOCTL_AUTH_MAGIC ioctl argument type.
  */
 typedef struct drm_auth {
-	drm_magic_t	magic;
+	drm_magic_t magic;
 } drm_auth_t;
 
-
 /**
  * DRM_IOCTL_IRQ_BUSID ioctl argument type.
  *
@@ -498,24 +512,20 @@ typedef struct drm_irq_busid {
 	int funcnum;	/**< function number */
 } drm_irq_busid_t;
 
-
 typedef enum {
-    _DRM_VBLANK_ABSOLUTE = 0x0,		/**< Wait for specific vblank sequence number */
-    _DRM_VBLANK_RELATIVE = 0x1,		/**< Wait for given number of vblanks */
-    _DRM_VBLANK_SIGNAL   = 0x40000000	/**< Send signal instead of blocking */
+	_DRM_VBLANK_ABSOLUTE = 0x0,	/**< Wait for specific vblank sequence number */
+	_DRM_VBLANK_RELATIVE = 0x1,	/**< Wait for given number of vblanks */
+	_DRM_VBLANK_SIGNAL = 0x40000000	/**< Send signal instead of blocking */
 } drm_vblank_seq_type_t;
 
-
 #define _DRM_VBLANK_FLAGS_MASK _DRM_VBLANK_SIGNAL
 
-
 struct drm_wait_vblank_request {
 	drm_vblank_seq_type_t type;
 	unsigned int sequence;
 	unsigned long signal;
 };
 
-
 struct drm_wait_vblank_reply {
 	drm_vblank_seq_type_t type;
 	unsigned int sequence;
@@ -523,7 +533,6 @@ struct drm_wait_vblank_reply {
 	long tval_usec;
 };
 
-
 /**
  * DRM_IOCTL_WAIT_VBLANK ioctl argument type.
  *
@@ -534,7 +543,6 @@ typedef union drm_wait_vblank {
 	struct drm_wait_vblank_reply reply;
 } drm_wait_vblank_t;
 
-
 /**
  * DRM_IOCTL_AGP_ENABLE ioctl argument type.
  *
@@ -544,7 +552,6 @@ typedef struct drm_agp_mode {
 	unsigned long mode;	/**< AGP mode */
 } drm_agp_mode_t;
 
-
 /**
  * DRM_IOCTL_AGP_ALLOC and DRM_IOCTL_AGP_FREE ioctls argument type.
  *
@@ -553,22 +560,20 @@ typedef struct drm_agp_mode {
 typedef struct drm_agp_buffer {
 	unsigned long size;	/**< In bytes -- will round to page boundary */
 	unsigned long handle;	/**< Used for binding / unbinding */
-	unsigned long type;     /**< Type of memory to allocate */
-        unsigned long physical; /**< Physical used by i810 */
+	unsigned long type;	/**< Type of memory to allocate */
+	unsigned long physical;	/**< Physical used by i810 */
 } drm_agp_buffer_t;
 
-
 /**
  * DRM_IOCTL_AGP_BIND and DRM_IOCTL_AGP_UNBIND ioctls argument type.
  *
  * \sa drmAgpBind() and drmAgpUnbind().
  */
 typedef struct drm_agp_binding {
-	unsigned long handle;   /**< From drm_agp_buffer */
+	unsigned long handle;	/**< From drm_agp_buffer */
 	unsigned long offset;	/**< In bytes -- will round to page boundary */
 } drm_agp_binding_t;
 
-
 /**
  * DRM_IOCTL_AGP_INFO ioctl argument type.
  *
@@ -577,20 +582,21 @@ typedef struct drm_agp_binding {
  * drmAgpVendorId() and drmAgpDeviceId().
  */
 typedef struct drm_agp_info {
-	int            agp_version_major;
-	int            agp_version_minor;
-	unsigned long  mode;
-	unsigned long  aperture_base;  /* physical address */
-	unsigned long  aperture_size;  /* bytes */
-	unsigned long  memory_allowed; /* bytes */
-	unsigned long  memory_used;
-
-				/* PCI information */
+	int agp_version_major;
+	int agp_version_minor;
+	unsigned long mode;
+	unsigned long aperture_base;   /**< physical address */
+	unsigned long aperture_size;   /**< bytes */
+	unsigned long memory_allowed;  /**< bytes */
+	unsigned long memory_used;
+
+	/** \name PCI information */
+	/*@{ */
 	unsigned short id_vendor;
 	unsigned short id_device;
+	/*@} */
 } drm_agp_info_t;
 
-
 /**
  * DRM_IOCTL_SG_ALLOC ioctl argument type.
  */
@@ -609,6 +615,10 @@ typedef struct drm_set_version {
 	int drm_dd_minor;
 } drm_set_version_t;
 
+/**
+ * \name Ioctls Definitions
+ */
+/*@{*/
 
 #define DRM_IOCTL_BASE			'd'
 #define DRM_IO(nr)			_IO(DRM_IOCTL_BASE,nr)
@@ -670,6 +680,8 @@ typedef struct drm_set_version {
 
 #define DRM_IOCTL_WAIT_VBLANK		DRM_IOWR(0x3a, drm_wait_vblank_t)
 
+/*@}*/
+
 /**
  * Device specific ioctls should only be in their respective headers
  * The device specific ioctl range is from 0x40 to 0x79.
diff --git a/sys/dev/drm/drmP.h b/sys/dev/drm/drmP.h
index c30ab87..4d00edc 100644
--- a/sys/dev/drm/drmP.h
+++ b/sys/dev/drm/drmP.h
@@ -1,5 +1,6 @@
 /* drmP.h -- Private header for Direct Rendering Manager -*- linux-c -*-
- * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com */
+ * Created: Mon Jan  4 10:05:05 1999 by faith@precisioninsight.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -36,48 +37,99 @@
 
 #if defined(_KERNEL) || defined(__KERNEL__)
 
-/* DRM template customization defaults
- */
-#ifndef __HAVE_AGP
-#define __HAVE_AGP		0
-#endif
-#ifndef __HAVE_MTRR
-#define __HAVE_MTRR		0
-#endif
-#ifndef __HAVE_CTX_BITMAP
-#define __HAVE_CTX_BITMAP	0
-#endif
-#ifndef __HAVE_DMA
-#define __HAVE_DMA		0
-#endif
-#ifndef __HAVE_IRQ
-#define __HAVE_IRQ		0
-#endif
-
-#define DRM_DEBUG_CODE 0	  /* Include debugging code (if > 1, then
-				     also include looping detection. */
-
 typedef struct drm_device drm_device_t;
 typedef struct drm_file drm_file_t;
 
-/* There's undoubtably more of this file to go into these OS dependent ones. */
-
-#ifdef __FreeBSD__
-#include "dev/drm/drm_os_freebsd.h"
-#elif defined __NetBSD__
-#include "dev/drm/drm_os_netbsd.h"
-#endif
+#include <sys/param.h>
+#include <sys/queue.h>
+#include <sys/malloc.h>
+#include <sys/kernel.h>
+#include <sys/module.h>
+#include <sys/systm.h>
+#include <sys/conf.h>
+#include <sys/stat.h>
+#include <sys/proc.h>
+#include <sys/lock.h>
+#include <sys/fcntl.h>
+#include <sys/uio.h>
+#include <sys/filio.h>
+#include <sys/sysctl.h>
+#include <sys/bus.h>
+#include <sys/signalvar.h>
+#include <sys/poll.h>
+#include <vm/vm.h>
+#include <vm/pmap.h>
+#include <vm/vm_extern.h>
+#include <vm/vm_map.h>
+#include <vm/vm_param.h>
+#include <machine/param.h>
+#include <machine/pmap.h>
+#include <machine/bus.h>
+#include <machine/resource.h>
+#include <machine/sysarch.h>
+#include <sys/endian.h>
+#include <sys/mman.h>
+#if defined(__FreeBSD__)
+#include <sys/rman.h>
+#include <sys/memrange.h>
+#include <pci/agpvar.h>
+#include <sys/agpio.h>
+#if __FreeBSD_version >= 500000
+#include <sys/mutex.h>
+#include <dev/pci/pcivar.h>
+#include <sys/selinfo.h>
+#else /* __FreeBSD_version >= 500000 */
+#include <pci/pcivar.h>
+#include <sys/select.h>
+#endif /* __FreeBSD_version < 500000 */
+#elif defined(__NetBSD__)
+#include <machine/mtrr.h>
+#include <sys/vnode.h>
+#include <sys/select.h>
+#include <sys/device.h>
+#include <sys/resourcevar.h>
+#include <sys/lkm.h>
+#include <sys/agpio.h>
+#include <sys/ttycom.h>
+#include <uvm/uvm.h>
+#include <dev/pci/pcireg.h>
+#include <dev/pci/pcivar.h>
+#include <dev/pci/agpvar.h>
+#elif defined(__OpenBSD__)
+#include <sys/lkm.h>
+#include <uvm/uvm.h>
+#endif
+#include <sys/bus.h>
 
 #include "dev/drm/drm.h"
+#include "dev/drm/drm_linux_list.h"
+#include "dev/drm/drm_atomic.h"
 
-/* Begin the DRM... */
+#ifdef __FreeBSD__
+#include <opt_drm.h>
+#ifdef DRM_DEBUG
+#undef DRM_DEBUG
+#define DRM_DEBUG_DEFAULT_ON 1
+#endif /* DRM_DEBUG */
+#endif
+
+#if defined(DRM_LINUX) && DRM_LINUX && !defined(__amd64__)
+#include <sys/file.h>
+#include <sys/proc.h>
+#include <machine/../linux/linux.h>
+#include <machine/../linux/linux_proto.h>
+#else
+/* Either it was defined when it shouldn't be (FreeBSD amd64) or it isn't
+ * supported on this OS yet.
+ */
+#undef DRM_LINUX
+#define DRM_LINUX 0
+#endif
 
 #define DRM_HASH_SIZE	      16 /* Size of key hash table		  */
 #define DRM_KERNEL_CONTEXT    0	 /* Change drm_resctx if changed	  */
 #define DRM_RESERVED_CONTEXTS 1	 /* Change drm_resctx if changed	  */
 
-#define DRM_FLAG_DEBUG	  0x01
-
 #define DRM_MEM_DMA	   0
 #define DRM_MEM_SAREA	   1
 #define DRM_MEM_DRIVER	   2
@@ -101,19 +153,6 @@ typedef struct drm_file drm_file_t;
 
 #define DRM_MAX_CTXBITMAP (PAGE_SIZE * 8)
 
-				/* Mapping helper macros */
-#define DRM_IOREMAP(map, dev)						\
-	(map)->handle = DRM(ioremap)( dev, map )
-
-#define DRM_IOREMAP_NOCACHE(map, dev)					\
-	(map)->handle = DRM(ioremap_nocache)( dev, map )
-
-#define DRM_IOREMAPFREE(map, dev)						\
-	do {								\
-		if ( (map)->handle && (map)->size )			\
-			DRM(ioremapfree)( map );			\
-	} while (0)
-
 				/* Internal types and structures */
 #define DRM_ARRAY_SIZE(x) (sizeof(x)/sizeof(x[0]))
 #define DRM_MIN(a,b) ((a)<(b)?(a):(b))
@@ -121,10 +160,268 @@ typedef struct drm_file drm_file_t;
 
 #define DRM_IF_VERSION(maj, min) (maj << 16 | min)
 
+MALLOC_DECLARE(M_DRM);
+
+#define __OS_HAS_AGP	1
+
+#define DRM_DEV_MODE	(S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
+#define DRM_DEV_UID	0
+#define DRM_DEV_GID	0
+
+#define wait_queue_head_t	atomic_t
+#define DRM_WAKEUP(w)		wakeup((void *)w)
+#define DRM_WAKEUP_INT(w)	wakeup(w)
+#define DRM_INIT_WAITQUEUE(queue) do {} while (0)
+
+#if defined(__FreeBSD__) && __FreeBSD_version < 502109
+#define bus_alloc_resource_any(dev, type, rid, flags) \
+	bus_alloc_resource(dev, type, rid, 0ul, ~0ul, 1, flags)
+#endif
+
+#if defined(__FreeBSD__) && __FreeBSD_version >= 500000
+#define DRM_CURPROC		curthread
+#define DRM_STRUCTPROC		struct thread
+#define DRM_SPINTYPE		struct mtx
+#define DRM_SPININIT(l,name)	mtx_init(&l, name, NULL, MTX_DEF)
+#define DRM_SPINUNINIT(l)	mtx_destroy(&l)
+#define DRM_SPINLOCK(l)		mtx_lock(l)
+#define DRM_SPINUNLOCK(u)	mtx_unlock(u);
+#define DRM_SPINLOCK_ASSERT(l)	mtx_assert(l, MA_OWNED)
+#define DRM_CURRENTPID		curthread->td_proc->p_pid
+#define DRM_LOCK()		mtx_lock(&dev->dev_lock)
+#define DRM_UNLOCK() 		mtx_unlock(&dev->dev_lock)
+#define DRM_SYSCTL_HANDLER_ARGS	(SYSCTL_HANDLER_ARGS)
+#else /* __FreeBSD__ && __FreeBSD_version >= 500000 */
+#define DRM_CURPROC		curproc
+#define DRM_STRUCTPROC		struct proc
+#define DRM_SPINTYPE		struct simplelock
+#define DRM_SPININIT(l,name)
+#define DRM_SPINUNINIT(l)
+#define DRM_SPINLOCK(l)	
+#define DRM_SPINUNLOCK(u)
+#define DRM_SPINLOCK_ASSERT(l)
+#define DRM_CURRENTPID		curproc->p_pid
+#define DRM_LOCK()
+#define DRM_UNLOCK()
+#define DRM_SYSCTL_HANDLER_ARGS	SYSCTL_HANDLER_ARGS
+#define spldrm()		spltty()
+#endif /* __NetBSD__ || __OpenBSD__ */
+
+/* Currently our DRMFILE (filp) is a void * which is actually the pid
+ * of the current process.  It should be a per-open unique pointer, but
+ * code for that is not yet written */
+#define DRMFILE			void *
+#define DRM_IRQ_ARGS		void *arg
+typedef void			irqreturn_t;
+#define IRQ_HANDLED		/* nothing */
+#define IRQ_NONE		/* nothing */
+
+#if defined(__FreeBSD__)
+#define DRM_DEVICE							\
+	drm_device_t *dev = kdev->si_drv1
+#define DRM_IOCTL_ARGS		struct cdev *kdev, u_long cmd, caddr_t data, \
+				int flags, DRM_STRUCTPROC *p, DRMFILE filp
+
+#define PAGE_ALIGN(addr) round_page(addr)
+#define DRM_SUSER(p)		suser(p)
+#define DRM_AGP_FIND_DEVICE()	agp_find_device()
+#define DRM_MTRR_WC		MDF_WRITECOMBINE
+#define jiffies			ticks
+
+#else /* __FreeBSD__ */
+
+#if defined(__NetBSD__)
+#define DRM_DEVICE							\
+	drm_device_t *dev = device_lookup(&drm_cd, minor(kdev))
+#elif defined(__OpenBSD__)
+#define DRM_DEVICE							\
+	drm_device_t *dev = (device_lookup(&drm_cd,			\
+	    minor(kdev)))->dv_cfdata->cf_driver->cd_devs[minor(kdev)]
+#endif /* __OpenBSD__ */
+#define DRM_IOCTL_ARGS		dev_t kdev, u_long cmd, caddr_t data, \
+				int flags, DRM_STRUCTPROC *p, DRMFILE filp
+
+#define CDEV_MAJOR		34
+#define PAGE_ALIGN(addr)	(((addr) + PAGE_SIZE - 1) & PAGE_MASK)
+#define DRM_SUSER(p)		suser(p->p_ucred, &p->p_acflag)
+#define DRM_AGP_FIND_DEVICE()	agp_find_device(0)
+#define DRM_MTRR_WC		MTRR_TYPE_WC
+#define jiffies			hardclock_ticks
+
+typedef drm_device_t *device_t;
+extern struct cfdriver drm_cd;
+#endif /* !__FreeBSD__ */
+
+typedef unsigned long dma_addr_t;
+typedef u_int32_t u32;
+typedef u_int16_t u16;
+typedef u_int8_t u8;
+
+/* DRM_READMEMORYBARRIER() prevents reordering of reads.
+ * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
+ * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
+ */
+#if defined(__i386__)
+#define DRM_READMEMORYBARRIER()		__asm __volatile( \
+					"lock; addl $0,0(%%esp)" : : : "memory");
+#define DRM_WRITEMEMORYBARRIER()	__asm __volatile("" : : : "memory");
+#define DRM_MEMORYBARRIER()		__asm __volatile( \
+					"lock; addl $0,0(%%esp)" : : : "memory");
+#elif defined(__alpha__)
+#define DRM_READMEMORYBARRIER()		alpha_mb();
+#define DRM_WRITEMEMORYBARRIER()	alpha_wmb();
+#define DRM_MEMORYBARRIER()		alpha_mb();
+#elif defined(__amd64__)
+#define DRM_READMEMORYBARRIER()		__asm __volatile( \
+					"lock; addl $0,0(%%rsp)" : : : "memory");
+#define DRM_WRITEMEMORYBARRIER()	__asm __volatile("" : : : "memory");
+#define DRM_MEMORYBARRIER()		__asm __volatile( \
+					"lock; addl $0,0(%%rsp)" : : : "memory");
+#endif
+
+#ifdef __FreeBSD__
+#define DRM_READ8(map, offset)						\
+	*(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset))
+#define DRM_READ16(map, offset)						\
+	*(volatile u_int16_t *) (((unsigned long)(map)->handle) + (offset))
+#define DRM_READ32(map, offset)						\
+	*(volatile u_int32_t *)(((unsigned long)(map)->handle) + (offset))
+#define DRM_WRITE8(map, offset, val)					\
+	*(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset)) = val
+#define DRM_WRITE16(map, offset, val)					\
+	*(volatile u_int16_t *) (((unsigned long)(map)->handle) + (offset)) = val
+#define DRM_WRITE32(map, offset, val)					\
+	*(volatile u_int32_t *)(((unsigned long)(map)->handle) + (offset)) = val
+
+#define DRM_VERIFYAREA_READ( uaddr, size )		\
+	(!useracc(__DECONST(caddr_t, uaddr), size, VM_PROT_READ))
+
+#else /* __FreeBSD__ */
+
+typedef vaddr_t vm_offset_t;
+
+#define DRM_READ8(map, offset)		\
+	bus_space_read_1( (map)->bst, (map)->bsh, (offset))
+#define DRM_READ16(map, offset)		\
+	bus_space_read_2( (map)->bst, (map)->bsh, (offset))
+#define DRM_READ32(map, offset)		\
+	bus_space_read_4( (map)->bst, (map)->bsh, (offset))
+#define DRM_WRITE8(map, offset, val)	\
+	bus_space_write_1((map)->bst, (map)->bsh, (offset), (val))
+#define DRM_WRITE16(map, offset, val)	\
+	bus_space_write_2((map)->bst, (map)->bsh, (offset), (val))
+#define DRM_WRITE32(map, offset, val)	\
+	bus_space_write_4((map)->bst, (map)->bsh, (offset), (val))
+
+#define DRM_VERIFYAREA_READ( uaddr, size )		\
+	(!uvm_useracc((caddr_t)uaddr, size, VM_PROT_READ))
+#endif /* !__FreeBSD__ */
+
+#define DRM_COPY_TO_USER_IOCTL(user, kern, size)	\
+	if ( IOCPARM_LEN(cmd) != size)			\
+		return EINVAL;				\
+	*user = kern;
+#define DRM_COPY_FROM_USER_IOCTL(kern, user, size) \
+	if ( IOCPARM_LEN(cmd) != size)			\
+		return EINVAL;				\
+	kern = *user;
+#define DRM_COPY_TO_USER(user, kern, size) \
+	copyout(kern, user, size)
+#define DRM_COPY_FROM_USER(kern, user, size) \
+	copyin(user, kern, size)
+#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) 	\
+	copyin(arg2, arg1, arg3)
+#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3)	\
+	copyout(arg2, arg1, arg3)
+#if __FreeBSD_version > 500000
+#define DRM_GET_USER_UNCHECKED(val, uaddr)		\
+	((val) = fuword32(uaddr), 0)
+#else
+#define DRM_GET_USER_UNCHECKED(val, uaddr)		\
+	((val) = fuword(uaddr), 0)
+#endif
+
+#define cpu_to_le32(x) htole32(x)
+#define le32_to_cpu(x) le32toh(x)
+
+#define DRM_ERR(v)		v
+#define DRM_HZ			hz
+#define DRM_UDELAY(udelay)	DELAY(udelay)
+#define DRM_TIME_SLICE		(hz/20)  /* Time slice for GLXContexts	  */
+
 #define DRM_GET_PRIV_SAREA(_dev, _ctx, _map) do {	\
 	(_map) = (_dev)->context_sareas[_ctx];		\
 } while(0)
 
+#define DRM_GET_PRIV_WITH_RETURN(_priv, _filp)			\
+do {								\
+	if (_filp != (DRMFILE)(intptr_t)DRM_CURRENTPID) {	\
+		DRM_ERROR("filp doesn't match curproc\n");	\
+		return EINVAL;					\
+	}							\
+	_priv = drm_find_file_by_proc(dev, DRM_CURPROC);	\
+	if (_priv == NULL) {					\
+		DRM_ERROR("can't find authenticator\n");	\
+		return EINVAL;					\
+	}							\
+} while (0)
+
+#define LOCK_TEST_WITH_RETURN(dev, filp)				\
+do {									\
+	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ||		\
+	     dev->lock.filp != filp) {					\
+		DRM_ERROR("%s called without lock held\n",		\
+			   __FUNCTION__);				\
+		return EINVAL;						\
+	}								\
+} while (0)
+
+#define DRM_GETSAREA()					\
+do {								\
+	drm_local_map_t *map;					\
+	DRM_SPINLOCK_ASSERT(&dev->dev_lock);			\
+	TAILQ_FOREACH(map, &dev->maplist, link) {		\
+		if (map->type == _DRM_SHM &&			\
+			map->flags & _DRM_CONTAINS_LOCK) {	\
+			dev_priv->sarea = map;			\
+			break;					\
+		}						\
+	}							\
+} while (0)
+
+#if defined(__FreeBSD__) && __FreeBSD_version > 500000
+#define DRM_WAIT_ON( ret, queue, timeout, condition )		\
+for ( ret = 0 ; !ret && !(condition) ; ) {			\
+	DRM_UNLOCK();						\
+	mtx_lock(&dev->irq_lock);				\
+	if (!(condition))					\
+	   ret = msleep(&(queue), &dev->irq_lock, 		\
+			 PZERO | PCATCH, "drmwtq", (timeout));	\
+	mtx_unlock(&dev->irq_lock);				\
+	DRM_LOCK();						\
+}
+#else
+#define DRM_WAIT_ON( ret, queue, timeout, condition )	\
+for ( ret = 0 ; !ret && !(condition) ; ) {		\
+        int s = spldrm();				\
+	if (!(condition))				\
+	   ret = tsleep( &(queue), PZERO | PCATCH, 	\
+			 "drmwtq", (timeout) );		\
+	splx(s);					\
+}
+#endif
+
+#define DRM_ERROR(fmt, arg...) \
+	printf("error: [" DRM_NAME ":pid%d:%s] *ERROR* " fmt,		\
+	    DRM_CURRENTPID, __func__ , ## arg)
+
+#define DRM_INFO(fmt, arg...)  printf("info: [" DRM_NAME "] " fmt , ## arg)
+
+#define DRM_DEBUG(fmt, arg...) do {					\
+	if (drm_debug_flag)						\
+		printf("[" DRM_NAME ":pid%d:%s] " fmt, DRM_CURRENTPID,	\
+			__func__ , ## arg);				\
+} while (0)
 
 typedef struct drm_pci_id_list
 {
@@ -207,10 +504,7 @@ struct drm_file {
 	int		  refs;
 	drm_magic_t	  magic;
 	unsigned long	  ioctl_count;
-	struct drm_device *devXX;
-#ifdef DRIVER_FILE_FIELDS
-	DRIVER_FILE_FIELDS;
-#endif
+	void		 *driver_priv;
 };
 
 typedef struct drm_lock_data {
@@ -239,13 +533,8 @@ typedef struct drm_device_dma {
 		_DRM_DMA_USE_AGP = 0x01,
 		_DRM_DMA_USE_SG  = 0x02
 	} flags;
-
-				/* DMA support */
-	drm_buf_t	  *this_buffer;	/* Buffer being sent		   */
-	drm_buf_t	  *next_buffer; /* Selected buffer to send	   */
 } drm_device_dma_t;
 
-#if __REALLY_HAVE_AGP
 typedef struct drm_agp_mem {
 	void               *handle;
 	unsigned long      bound; /* address */
@@ -267,7 +556,6 @@ typedef struct drm_agp_head {
 	int		   cant_use_aperture;
 	unsigned long	   page_mask;
 } drm_agp_head_t;
-#endif
 
 typedef struct drm_sg_mem {
 	unsigned long   handle;
@@ -276,6 +564,8 @@ typedef struct drm_sg_mem {
 	dma_addr_t	*busaddr;
 } drm_sg_mem_t;
 
+typedef TAILQ_HEAD(drm_map_list, drm_local_map) drm_map_list_t;
+
 typedef struct drm_local_map {
 	unsigned long	offset;	 /* Physical address (0 for SAREA)*/
 	unsigned long	size;	 /* Physical size (bytes)	    */
@@ -285,16 +575,14 @@ typedef struct drm_local_map {
 				 /* Kernel-space: kernel-virtual address    */
 	int		mtrr;	 /* Boolean: MTRR used */
 				 /* Private data			    */
-	bus_space_tag_t iot;
-	bus_space_handle_t ioh;
+	int		rid;	 /* PCI resource ID for bus_space */
+	int		kernel_owned; /* Boolean: 1 = initmapped, 0 = addmapped */
+	struct resource *bsr;
+	bus_space_tag_t bst;
+	bus_space_handle_t bsh;
+	TAILQ_ENTRY(drm_local_map) link;
 } drm_local_map_t;
 
-typedef TAILQ_HEAD(drm_map_list, drm_map_list_entry) drm_map_list_t;
-typedef struct drm_map_list_entry {
-	TAILQ_ENTRY(drm_map_list_entry) link;
-	drm_local_map_t	*map;
-} drm_map_list_entry_t;
-
 TAILQ_HEAD(drm_vbl_sig_list, drm_vbl_sig);
 typedef struct drm_vbl_sig {
 	TAILQ_ENTRY(drm_vbl_sig) link;
@@ -303,29 +591,80 @@ typedef struct drm_vbl_sig {
 	int		pid;
 } drm_vbl_sig_t;
 
+/** 
+ * DRM device functions structure
+ */
 struct drm_device {
-#ifdef __NetBSD__
-	struct device	  device;	/* NetBSD's softc is an extension of struct device */
-#endif
-	const char	  *name;	/* Simple driver name		   */
+#if defined(__NetBSD__) || defined(__OpenBSD__)
+	struct device	  device; /* softc is an extension of struct device */
+#endif
+
+	/* Beginning of driver-config section */
+	int	(*preinit)(struct drm_device *, unsigned long flags);
+	int	(*postinit)(struct drm_device *, unsigned long flags);
+	void	(*prerelease)(struct drm_device *, void *filp);
+	void	(*pretakedown)(struct drm_device *);
+	int	(*postcleanup)(struct drm_device *);
+	int	(*presetup)(struct drm_device *);
+	int	(*postsetup)(struct drm_device *);
+	int	(*open_helper)(struct drm_device *, drm_file_t *);
+	void	(*free_filp_priv)(struct drm_device *, drm_file_t *);
+	void	(*release)(struct drm_device *, void *filp);
+	int	(*dma_ioctl)(DRM_IOCTL_ARGS);
+	void	(*dma_ready)(struct drm_device *);
+	int	(*dma_quiescent)(struct drm_device *);
+	int	(*dma_flush_block_and_flush)(struct drm_device *, int context,
+					     drm_lock_flags_t flags);
+	int	(*dma_flush_unblock)(struct drm_device *, int context,
+				     drm_lock_flags_t flags);
+	int	(*context_ctor)(struct drm_device *dev, int context);
+	int	(*context_dtor)(struct drm_device *dev, int context);
+	int	(*kernel_context_switch)(struct drm_device *dev, int old,
+					 int new);
+	int	(*kernel_context_switch_unlock)(struct drm_device *dev);
+	void	(*irq_preinstall)(drm_device_t *dev);
+	void	(*irq_postinstall)(drm_device_t *dev);
+	void	(*irq_uninstall)(drm_device_t *dev);
+	void	(*irq_handler)(DRM_IRQ_ARGS);
+	int	(*vblank_wait)(drm_device_t *dev, unsigned int *sequence);
+
+	drm_ioctl_desc_t *driver_ioctls;
+	int	max_driver_ioctl;
+
+	int	dev_priv_size;
+
+	int	driver_major;
+	int	driver_minor;
+	int	driver_patchlevel;
+	const char *driver_name;	/* Simple driver name		   */
+	const char *driver_desc;	/* Longer driver name		   */
+	const char *driver_date;	/* Date of last major changes.	   */
+
+	unsigned use_agp :1;
+	unsigned require_agp :1;
+	unsigned use_sg :1;
+	unsigned use_dma :1;
+	unsigned use_pci_dma :1;
+	unsigned use_dma_queue :1;
+	unsigned use_irq :1;
+	unsigned use_vbl_irq :1;
+	unsigned use_mtrr :1;
+	/* End of driver-config section */
+
 	char		  *unique;	/* Unique identifier: e.g., busid  */
 	int		  unique_len;	/* Length of unique field	   */
 #ifdef __FreeBSD__
 	device_t	  device;	/* Device instance from newbus     */
 #endif
-	struct cdev *devnode;	/* Device number for mknod	   */
+	struct cdev	  *devnode;	/* Device number for mknod	   */
 	int		  if_version;	/* Highest interface version set */
 
 	int		  flags;	/* Flags to open(2)		   */
 
 				/* Locks */
 #if defined(__FreeBSD__) && __FreeBSD_version > 500000
-#if __HAVE_DMA
 	struct mtx	  dma_lock;	/* protects dev->dma */
-#endif
-#if __HAVE_IRQ
-	struct mtx	  irq_lock; /* protects irq condition checks */
-#endif
+	struct mtx	  irq_lock;	/* protects irq condition checks */
 	struct mtx	  dev_lock;	/* protects everything else */
 #endif
 				/* Usage Counters */
@@ -342,7 +681,7 @@ struct drm_device {
 	drm_magic_head_t  magiclist[DRM_HASH_SIZE];
 
 	/* Linked list of mappable regions. Protected by dev_lock */
-	drm_map_list_t	  *maplist;
+	drm_map_list_t	  maplist;
 
 	drm_local_map_t	  **context_sareas;
 	int		  max_context;
@@ -358,7 +697,7 @@ struct drm_device {
 #ifdef __FreeBSD__
 	int		  irqrid;	/* Interrupt used by board */
 	struct resource   *irqr;	/* Resource for interrupt used by board	   */
-#elif defined(__NetBSD__)
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 	struct pci_attach_args  pa;
 	pci_intr_handle_t	ih;
 #endif
@@ -371,13 +710,8 @@ struct drm_device {
 
 	atomic_t	  context_flag;	/* Context swapping flag	   */
 	int		  last_context;	/* Last current context		   */
-#if __FreeBSD_version >= 400005
-	struct task       task;
-#endif
-#if __HAVE_VBL_IRQ
    	int		  vbl_queue;	/* vbl wait channel */
    	atomic_t          vbl_received;
-#endif
 
 #ifdef __FreeBSD__
 	struct sigio      *buf_sigio;	/* Processes waiting for SIGIO     */
@@ -388,188 +722,226 @@ struct drm_device {
 				/* Sysctl support */
 	struct drm_sysctl_info *sysctl;
 
-#if __REALLY_HAVE_AGP
 	drm_agp_head_t    *agp;
-#endif
 	drm_sg_mem_t      *sg;  /* Scatter gather memory */
 	atomic_t          *ctx_bitmap;
 	void		  *dev_private;
+	drm_local_map_t   *agp_buffer_map;
 };
 
-extern int	     DRM(flags);
+extern int	drm_debug_flag;
 
-				/* Memory management support (drm_memory.h) */
-extern void	     DRM(mem_init)(void);
-extern void	     DRM(mem_uninit)(void);
-extern void	     *DRM(alloc)(size_t size, int area);
-extern void	     *DRM(calloc)(size_t nmemb, size_t size, int area);
-extern void	     *DRM(realloc)(void *oldpt, size_t oldsize, size_t size,
+/* Device setup support (drm_drv.c) */
+#ifdef __FreeBSD__
+int	drm_probe(device_t nbdev, drm_pci_id_list_t *idlist);
+int	drm_attach(device_t nbdev, drm_pci_id_list_t *idlist);
+int	drm_detach(device_t nbdev);
+d_ioctl_t drm_ioctl;
+d_open_t drm_open;
+d_close_t drm_close;
+d_read_t drm_read;
+d_poll_t drm_poll;
+d_mmap_t drm_mmap;
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+int	drm_probe(struct pci_attach_args *pa, drm_pci_id_list_t *idlist);
+int	drm_attach(struct pci_attach_args *pa, dev_t kdev, drm_pci_id_list_t *idlist);
+dev_type_ioctl(drm_ioctl);
+dev_type_open(drm_open);
+dev_type_close(drm_close);
+dev_type_read(drm_read);
+dev_type_poll(drm_poll);
+dev_type_mmap(drm_mmap);
+#endif
+
+/* File operations helpers (drm_fops.c) */
+#ifdef __FreeBSD__
+extern int		drm_open_helper(struct cdev *kdev, int flags, int fmt, 
+					 DRM_STRUCTPROC *p, drm_device_t *dev);
+extern drm_file_t	*drm_find_file_by_proc(drm_device_t *dev, 
+					 DRM_STRUCTPROC *p);
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+extern int		drm_open_helper(dev_t kdev, int flags, int fmt, 
+					DRM_STRUCTPROC *p, drm_device_t *dev);
+extern drm_file_t	*drm_find_file_by_proc(drm_device_t *dev, 
+					       DRM_STRUCTPROC *p);
+#endif /* __NetBSD__ || __OpenBSD__ */
+
+/* Memory management support (drm_memory.c) */
+void	drm_mem_init(void);
+void	drm_mem_uninit(void);
+void	*drm_alloc(size_t size, int area);
+void	*drm_calloc(size_t nmemb, size_t size, int area);
+void	*drm_realloc(void *oldpt, size_t oldsize, size_t size,
 				   int area);
-extern void	     DRM(free)(void *pt, size_t size, int area);
-extern void	     *DRM(ioremap)(drm_device_t *dev, drm_local_map_t *map);
-extern void	     DRM(ioremapfree)(drm_local_map_t *map);
-extern int	 DRM(mtrr_add)(unsigned long offset, size_t size, int flags);
-extern int	 DRM(mtrr_del)(unsigned long offset, size_t size, int flags);
-
-#if __REALLY_HAVE_AGP
-extern agp_memory    *DRM(alloc_agp)(int pages, u32 type);
-extern int           DRM(free_agp)(agp_memory *handle, int pages);
-extern int           DRM(bind_agp)(agp_memory *handle, unsigned int start);
-extern int           DRM(unbind_agp)(agp_memory *handle);
-#endif
-
-extern int	     DRM(context_switch)(drm_device_t *dev, int old, int new);
-extern int	     DRM(context_switch_complete)(drm_device_t *dev, int new);
-
-#if __HAVE_CTX_BITMAP
-extern int	     DRM(ctxbitmap_init)( drm_device_t *dev );
-extern void	     DRM(ctxbitmap_cleanup)( drm_device_t *dev );
-extern void          DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle );
-extern int           DRM(ctxbitmap_next)( drm_device_t *dev );
-#endif
-
-				/* Locking IOCTL support (drm_lock.h) */
-extern int	     DRM(lock_take)(__volatile__ unsigned int *lock,
+void	drm_free(void *pt, size_t size, int area);
+void	*drm_ioremap(drm_device_t *dev, drm_local_map_t *map);
+void	drm_ioremapfree(drm_local_map_t *map);
+int	drm_mtrr_add(unsigned long offset, size_t size, int flags);
+int	drm_mtrr_del(unsigned long offset, size_t size, int flags);
+
+int	drm_context_switch(drm_device_t *dev, int old, int new);
+int	drm_context_switch_complete(drm_device_t *dev, int new);
+
+int	drm_ctxbitmap_init(drm_device_t *dev);
+void	drm_ctxbitmap_cleanup(drm_device_t *dev);
+void	drm_ctxbitmap_free(drm_device_t *dev, int ctx_handle);
+int	drm_ctxbitmap_next(drm_device_t *dev);
+
+/* Locking IOCTL support (drm_lock.c) */
+int	drm_lock_take(__volatile__ unsigned int *lock,
 				    unsigned int context);
-extern int	     DRM(lock_transfer)(drm_device_t *dev,
+int	drm_lock_transfer(drm_device_t *dev,
 					__volatile__ unsigned int *lock,
 					unsigned int context);
-extern int	     DRM(lock_free)(drm_device_t *dev,
+int	drm_lock_free(drm_device_t *dev,
 				    __volatile__ unsigned int *lock,
 				    unsigned int context);
 
-				/* Buffer management support (drm_bufs.h) */
-extern int	     DRM(order)( unsigned long size );
-
-#if __HAVE_DMA
-				/* DMA support (drm_dma.h) */
-extern int	     DRM(dma_setup)(drm_device_t *dev);
-extern void	     DRM(dma_takedown)(drm_device_t *dev);
-extern void	     DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf);
-extern void	     DRM(reclaim_buffers)(drm_device_t *dev, DRMFILE filp);
-#endif
-
-#if __HAVE_IRQ
-				/* IRQ support (drm_irq.h) */
-extern int	     DRM(irq_install)(drm_device_t *dev);
-extern int           DRM(irq_uninstall)( drm_device_t *dev );
-extern irqreturn_t   DRM(irq_handler)( DRM_IRQ_ARGS );
-extern void          DRM(driver_irq_preinstall)( drm_device_t *dev );
-extern void          DRM(driver_irq_postinstall)( drm_device_t *dev );
-extern void          DRM(driver_irq_uninstall)( drm_device_t *dev );
-#if __HAVE_IRQ_BH
-extern void          DRM(irq_immediate_bh)( DRM_TASKQUEUE_ARGS );
-#endif
-#endif
-
-#if __HAVE_VBL_IRQ
-extern int           DRM(vblank_wait)(drm_device_t *dev, unsigned int *vbl_seq);
-extern void          DRM(vbl_send_signals)( drm_device_t *dev );
-#endif
-
-#if __REALLY_HAVE_AGP
-				/* AGP/GART support (drm_agpsupport.h) */
-extern drm_agp_head_t *DRM(agp_init)(void);
-extern void           DRM(agp_uninit)(void);
-extern void           DRM(agp_do_release)(void);
-extern agp_memory     *DRM(agp_allocate_memory)(size_t pages, u32 type);
-extern int            DRM(agp_free_memory)(agp_memory *handle);
-extern int            DRM(agp_bind_memory)(agp_memory *handle, off_t start);
-extern int            DRM(agp_unbind_memory)(agp_memory *handle);
-#endif
-
-#if __HAVE_SG
-				/* Scatter Gather Support (drm_scatter.h) */
-extern void           DRM(sg_cleanup)(drm_sg_mem_t *entry);
-#endif
-
-#if __REALLY_HAVE_SG
-                               /* ATI PCIGART support (ati_pcigart.h) */
-extern int            DRM(ati_pcigart_init)(drm_device_t *dev,
-					    unsigned long *addr,
-					    dma_addr_t *bus_addr);
-extern int            DRM(ati_pcigart_cleanup)(drm_device_t *dev,
-					       unsigned long addr,
-					       dma_addr_t bus_addr);
-#endif
-
-/* Locking IOCTL support (drm_drv.h) */
-extern int		DRM(lock)(DRM_IOCTL_ARGS);
-extern int		DRM(unlock)(DRM_IOCTL_ARGS);
-extern int		DRM(version)( DRM_IOCTL_ARGS );
-extern int		DRM(setversion)( DRM_IOCTL_ARGS );
-
-/* Misc. IOCTL support (drm_ioctl.h) */
-extern int		DRM(irq_by_busid)(DRM_IOCTL_ARGS);
-extern int		DRM(getunique)(DRM_IOCTL_ARGS);
-extern int		DRM(setunique)(DRM_IOCTL_ARGS);
-extern int		DRM(getmap)(DRM_IOCTL_ARGS);
-extern int		DRM(getclient)(DRM_IOCTL_ARGS);
-extern int		DRM(getstats)(DRM_IOCTL_ARGS);
-extern int		DRM(noop)(DRM_IOCTL_ARGS);
-
-/* Context IOCTL support (drm_context.h) */
-extern int		DRM(resctx)(DRM_IOCTL_ARGS);
-extern int		DRM(addctx)(DRM_IOCTL_ARGS);
-extern int		DRM(modctx)(DRM_IOCTL_ARGS);
-extern int		DRM(getctx)(DRM_IOCTL_ARGS);
-extern int		DRM(switchctx)(DRM_IOCTL_ARGS);
-extern int		DRM(newctx)(DRM_IOCTL_ARGS);
-extern int		DRM(rmctx)(DRM_IOCTL_ARGS);
-extern int		DRM(setsareactx)(DRM_IOCTL_ARGS);
-extern int		DRM(getsareactx)(DRM_IOCTL_ARGS);
-
-/* Drawable IOCTL support (drm_drawable.h) */
-extern int		DRM(adddraw)(DRM_IOCTL_ARGS);
-extern int		DRM(rmdraw)(DRM_IOCTL_ARGS);
-
-/* Authentication IOCTL support (drm_auth.h) */
-extern int		DRM(getmagic)(DRM_IOCTL_ARGS);
-extern int		DRM(authmagic)(DRM_IOCTL_ARGS);
-
-/* Buffer management support (drm_bufs.h) */
-extern int		DRM(addmap)(DRM_IOCTL_ARGS);
-extern int		DRM(rmmap)(DRM_IOCTL_ARGS);
-#if __HAVE_DMA
-extern int		DRM(addbufs)(DRM_IOCTL_ARGS);
-extern int		DRM(infobufs)(DRM_IOCTL_ARGS);
-extern int		DRM(markbufs)(DRM_IOCTL_ARGS);
-extern int		DRM(freebufs)(DRM_IOCTL_ARGS);
-extern int		DRM(mapbufs)(DRM_IOCTL_ARGS);
-#endif
+/* Buffer management support (drm_bufs.c) */
+unsigned long drm_get_resource_start(drm_device_t *dev, unsigned int resource);
+unsigned long drm_get_resource_len(drm_device_t *dev, unsigned int resource);
+int	drm_initmap(drm_device_t *dev, unsigned long start, unsigned long len,
+		    unsigned int resource, int type, int flags);
+void	drm_remove_map(drm_device_t *dev, drm_local_map_t *map);
+int	drm_order(unsigned long size);
+
+/* DMA support (drm_dma.c) */
+int	drm_dma_setup(drm_device_t *dev);
+void	drm_dma_takedown(drm_device_t *dev);
+void	drm_free_buffer(drm_device_t *dev, drm_buf_t *buf);
+void	drm_reclaim_buffers(drm_device_t *dev, DRMFILE filp);
+
+/* IRQ support (drm_irq.c) */
+int	drm_irq_install(drm_device_t *dev);
+int	drm_irq_uninstall(drm_device_t *dev);
+irqreturn_t drm_irq_handler(DRM_IRQ_ARGS);
+void	drm_driver_irq_preinstall(drm_device_t *dev);
+void	drm_driver_irq_postinstall(drm_device_t *dev);
+void	drm_driver_irq_uninstall(drm_device_t *dev);
+int	drm_vblank_wait(drm_device_t *dev, unsigned int *vbl_seq);
+void	drm_vbl_send_signals(drm_device_t *dev);
+
+/* AGP/GART support (drm_agpsupport.c) */
+int	drm_device_is_agp(drm_device_t *dev);
+drm_agp_head_t *drm_agp_init(void);
+void	drm_agp_uninit(void);
+void	drm_agp_do_release(void);
+void	*drm_agp_allocate_memory(size_t pages, u32 type);
+int	drm_agp_free_memory(void *handle);
+int	drm_agp_bind_memory(void *handle, off_t start);
+int	drm_agp_unbind_memory(void *handle);
+
+/* Scatter Gather Support (drm_scatter.c) */
+void	drm_sg_cleanup(drm_sg_mem_t *entry);
 
-/* IRQ support (drm_irq.h) */
-#if __HAVE_IRQ || __HAVE_DMA
-extern int		DRM(control)(DRM_IOCTL_ARGS);
-#endif
-#if __HAVE_VBL_IRQ
-extern int		DRM(wait_vblank)(DRM_IOCTL_ARGS);
-#endif
+#ifdef __FreeBSD__
+/* sysctl support (drm_sysctl.h) */
+extern int		drm_sysctl_init(drm_device_t *dev);
+extern int		drm_sysctl_cleanup(drm_device_t *dev);
+#endif /* __FreeBSD__ */
+
+/* ATI PCIGART support (ati_pcigart.c) */
+int	drm_ati_pcigart_init(drm_device_t *dev, unsigned long *addr,
+			     dma_addr_t *bus_addr);
+int	drm_ati_pcigart_cleanup(drm_device_t *dev, unsigned long addr,
+				dma_addr_t bus_addr);
+
+/* Locking IOCTL support (drm_drv.c) */
+int	drm_lock(DRM_IOCTL_ARGS);
+int	drm_unlock(DRM_IOCTL_ARGS);
+int	drm_version(DRM_IOCTL_ARGS);
+int	drm_setversion(DRM_IOCTL_ARGS);
+
+/* Misc. IOCTL support (drm_ioctl.c) */
+int	drm_irq_by_busid(DRM_IOCTL_ARGS);
+int	drm_getunique(DRM_IOCTL_ARGS);
+int	drm_setunique(DRM_IOCTL_ARGS);
+int	drm_getmap(DRM_IOCTL_ARGS);
+int	drm_getclient(DRM_IOCTL_ARGS);
+int	drm_getstats(DRM_IOCTL_ARGS);
+int	drm_noop(DRM_IOCTL_ARGS);
+
+/* Context IOCTL support (drm_context.c) */
+int	drm_resctx(DRM_IOCTL_ARGS);
+int	drm_addctx(DRM_IOCTL_ARGS);
+int	drm_modctx(DRM_IOCTL_ARGS);
+int	drm_getctx(DRM_IOCTL_ARGS);
+int	drm_switchctx(DRM_IOCTL_ARGS);
+int	drm_newctx(DRM_IOCTL_ARGS);
+int	drm_rmctx(DRM_IOCTL_ARGS);
+int	drm_setsareactx(DRM_IOCTL_ARGS);
+int	drm_getsareactx(DRM_IOCTL_ARGS);
+
+/* Drawable IOCTL support (drm_drawable.c) */
+int	drm_adddraw(DRM_IOCTL_ARGS);
+int	drm_rmdraw(DRM_IOCTL_ARGS);
+
+/* Authentication IOCTL support (drm_auth.c) */
+int	drm_getmagic(DRM_IOCTL_ARGS);
+int	drm_authmagic(DRM_IOCTL_ARGS);
+
+/* Buffer management support (drm_bufs.c) */
+int	drm_addmap(DRM_IOCTL_ARGS);
+int	drm_rmmap(DRM_IOCTL_ARGS);
+int	drm_addbufs(DRM_IOCTL_ARGS);
+int	drm_infobufs(DRM_IOCTL_ARGS);
+int	drm_markbufs(DRM_IOCTL_ARGS);
+int	drm_freebufs(DRM_IOCTL_ARGS);
+int	drm_mapbufs(DRM_IOCTL_ARGS);
+
+/* DMA support (drm_dma.c) */
+int	drm_dma(DRM_IOCTL_ARGS);
+
+/* IRQ support (drm_irq.c) */
+int	drm_control(DRM_IOCTL_ARGS);
+int	drm_wait_vblank(DRM_IOCTL_ARGS);
+
+/* AGP/GART support (drm_agpsupport.c) */
+int	drm_agp_acquire(DRM_IOCTL_ARGS);
+int	drm_agp_release(DRM_IOCTL_ARGS);
+int	drm_agp_enable(DRM_IOCTL_ARGS);
+int	drm_agp_info(DRM_IOCTL_ARGS);
+int	drm_agp_alloc(DRM_IOCTL_ARGS);
+int	drm_agp_free(DRM_IOCTL_ARGS);
+int	drm_agp_unbind(DRM_IOCTL_ARGS);
+int	drm_agp_bind(DRM_IOCTL_ARGS);
+
+/* Scatter Gather Support (drm_scatter.c) */
+int	drm_sg_alloc(DRM_IOCTL_ARGS);
+int	drm_sg_free(DRM_IOCTL_ARGS);
+
+/* consistent PCI memory functions (drm_pci.c) */
+void	*drm_pci_alloc(drm_device_t *dev, size_t size, size_t align,
+		       dma_addr_t maxaddr, dma_addr_t *busaddr);
+void	drm_pci_free(drm_device_t *dev, size_t size, void *vaddr,
+		     dma_addr_t busaddr);
+
+/* Inline replacements for DRM_IOREMAP macros */
+static __inline__ void drm_core_ioremap(struct drm_local_map *map, struct drm_device *dev)
+{
+	map->handle = drm_ioremap(dev, map);
+}
+static __inline__ void drm_core_ioremapfree(struct drm_local_map *map, struct drm_device *dev)
+{
+	if ( map->handle && map->size )
+		drm_ioremapfree(map);
+}
 
-/* AGP/GART support (drm_agpsupport.h) */
-#if __REALLY_HAVE_AGP
-extern int		DRM(agp_acquire)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_release)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_enable)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_info)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_alloc)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_free)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_unbind)(DRM_IOCTL_ARGS);
-extern int		DRM(agp_bind)(DRM_IOCTL_ARGS);
-#endif
+static __inline__ struct drm_local_map *drm_core_findmap(struct drm_device *dev, unsigned long offset)
+{
+	drm_local_map_t *map;
 
-/* Scatter Gather Support (drm_scatter.h) */
-#if __HAVE_SG
-extern int		DRM(sg_alloc)(DRM_IOCTL_ARGS);
-extern int		DRM(sg_free)(DRM_IOCTL_ARGS);
-#endif
+	DRM_SPINLOCK_ASSERT(&dev->dev_lock);
+	TAILQ_FOREACH(map, &dev->maplist, link) {
+		if (map->offset == offset)
+			return map;
+	}
+	return NULL;
+}
 
-/* consistent PCI memory functions (drm_pci.h) */
-extern void		*DRM(pci_alloc)(drm_device_t *dev, size_t size, 
-					size_t align, dma_addr_t maxaddr,
-					dma_addr_t *busaddr);
-extern void		DRM(pci_free)(drm_device_t *dev, size_t size, 
-				      void *vaddr, dma_addr_t busaddr);
+static __inline__ void drm_core_dropmap(struct drm_map *map)
+{
+}
 
 #endif /* __KERNEL__ */
 #endif /* _DRM_P_H_ */
diff --git a/sys/dev/drm/drm_agpsupport.h b/sys/dev/drm/drm_agpsupport.c
index 4758a88..59f681b 100644
--- a/sys/dev/drm/drm_agpsupport.h
+++ b/sys/dev/drm/drm_agpsupport.c
@@ -1,5 +1,6 @@
 /* drm_agpsupport.h -- DRM support for AGP/GART backend -*- linux-c -*-
- * Created: Mon Dec 13 09:56:45 1999 by faith@precisioninsight.com */
+ * Created: Mon Dec 13 09:56:45 1999 by faith@precisioninsight.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,7 +34,50 @@
 
 #include "dev/drm/drmP.h"
 
-int DRM(agp_info)(DRM_IOCTL_ARGS)
+#ifdef __FreeBSD__
+#include <pci/agpreg.h>
+#include <dev/pci/pcireg.h>
+#endif
+
+int
+drm_device_is_agp(drm_device_t *dev)
+{
+#ifdef __FreeBSD__
+	/* Code taken from agp.c.  IWBNI that was a public interface. */
+	u_int32_t status;
+	u_int8_t ptr, next;
+
+	/*
+	 * Check the CAP_LIST bit of the PCI status register first.
+	 */
+	status = pci_read_config(dev->device, PCIR_STATUS, 2);
+	if (!(status & 0x10))
+		return 0;
+
+	/*
+	 * Traverse the capabilities list.
+	 */
+	for (ptr = pci_read_config(dev->device, AGP_CAPPTR, 1);
+	     ptr != 0;
+	     ptr = next) {
+		u_int32_t capid = pci_read_config(dev->device, ptr, 4);
+		next = AGP_CAPID_GET_NEXT_PTR(capid);
+
+		/*
+		 * If this capability entry ID is 2, then we are done.
+		 */
+		if (AGP_CAPID_GET_CAP_ID(capid) == 2)
+			return 1;
+	}
+
+	return 0;
+#else
+	/* XXX: fill me in for non-FreeBSD */
+	return 1;
+#endif
+}
+
+int drm_agp_info(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	struct agp_info *kern;
@@ -58,7 +102,7 @@ int DRM(agp_info)(DRM_IOCTL_ARGS)
 	return 0;
 }
 
-int DRM(agp_acquire)(DRM_IOCTL_ARGS)
+int drm_agp_acquire(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	int          retcode;
@@ -72,7 +116,7 @@ int DRM(agp_acquire)(DRM_IOCTL_ARGS)
 	return 0;
 }
 
-int DRM(agp_release)(DRM_IOCTL_ARGS)
+int drm_agp_release(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 
@@ -84,7 +128,7 @@ int DRM(agp_release)(DRM_IOCTL_ARGS)
 	
 }
 
-void DRM(agp_do_release)(void)
+void drm_agp_do_release(void)
 {
 	device_t agpdev;
 
@@ -93,7 +137,7 @@ void DRM(agp_do_release)(void)
 		agp_release(agpdev);
 }
 
-int DRM(agp_enable)(DRM_IOCTL_ARGS)
+int drm_agp_enable(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_agp_mode_t mode;
@@ -110,7 +154,7 @@ int DRM(agp_enable)(DRM_IOCTL_ARGS)
 	return 0;
 }
 
-int DRM(agp_alloc)(DRM_IOCTL_ARGS)
+int drm_agp_alloc(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_agp_buffer_t request;
@@ -125,16 +169,15 @@ int DRM(agp_alloc)(DRM_IOCTL_ARGS)
 
 	request = *(drm_agp_buffer_t *) data;
 
-	if (!(entry = DRM(alloc)(sizeof(*entry), DRM_MEM_AGPLISTS)))
+	entry = malloc(sizeof(*entry), M_DRM, M_NOWAIT | M_ZERO);
+	if (entry == NULL)
 		return ENOMEM;
-   
-   	bzero(entry, sizeof(*entry));
 
 	pages = (request.size + PAGE_SIZE - 1) / PAGE_SIZE;
 	type = (u_int32_t) request.type;
 
-	if (!(handle = DRM(alloc_agp)(pages, type))) {
-		DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
+	if (!(handle = drm_agp_allocate_memory(pages, type))) {
+		free(entry, M_DRM);
 		return ENOMEM;
 	}
 	
@@ -157,7 +200,7 @@ int DRM(agp_alloc)(DRM_IOCTL_ARGS)
 	return 0;
 }
 
-static drm_agp_mem_t * DRM(agp_lookup_entry)(drm_device_t *dev, void *handle)
+static drm_agp_mem_t * drm_agp_lookup_entry(drm_device_t *dev, void *handle)
 {
 	drm_agp_mem_t *entry;
 
@@ -167,7 +210,7 @@ static drm_agp_mem_t * DRM(agp_lookup_entry)(drm_device_t *dev, void *handle)
 	return NULL;
 }
 
-int DRM(agp_unbind)(DRM_IOCTL_ARGS)
+int drm_agp_unbind(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_agp_binding_t request;
@@ -177,10 +220,10 @@ int DRM(agp_unbind)(DRM_IOCTL_ARGS)
 	if (!dev->agp || !dev->agp->acquired)
 		return EINVAL;
 	request = *(drm_agp_binding_t *) data;
-	if (!(entry = DRM(agp_lookup_entry)(dev, (void *) request.handle)))
+	if (!(entry = drm_agp_lookup_entry(dev, (void *)request.handle)))
 		return EINVAL;
 	if (!entry->bound) return EINVAL;
-	retcode=DRM(unbind_agp)(entry->handle);
+	retcode = drm_agp_unbind_memory(entry->handle);
 	if (!retcode)
 	{
 		entry->bound=0;
@@ -190,7 +233,7 @@ int DRM(agp_unbind)(DRM_IOCTL_ARGS)
 		return retcode;
 }
 
-int DRM(agp_bind)(DRM_IOCTL_ARGS)
+int drm_agp_bind(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_agp_binding_t request;
@@ -202,17 +245,17 @@ int DRM(agp_bind)(DRM_IOCTL_ARGS)
 	if (!dev->agp || !dev->agp->acquired)
 		return EINVAL;
 	request = *(drm_agp_binding_t *) data;
-	if (!(entry = DRM(agp_lookup_entry)(dev, (void *) request.handle)))
+	if (!(entry = drm_agp_lookup_entry(dev, (void *)request.handle)))
 		return EINVAL;
 	if (entry->bound) return EINVAL;
 	page = (request.offset + PAGE_SIZE - 1) / PAGE_SIZE;
-	if ((retcode = DRM(bind_agp)(entry->handle, page)))
+	if ((retcode = drm_agp_bind_memory(entry->handle, page)))
 		return retcode;
 	entry->bound = dev->agp->base + (page << PAGE_SHIFT);
 	return 0;
 }
 
-int DRM(agp_free)(DRM_IOCTL_ARGS)
+int drm_agp_free(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_agp_buffer_t request;
@@ -221,10 +264,10 @@ int DRM(agp_free)(DRM_IOCTL_ARGS)
 	if (!dev->agp || !dev->agp->acquired)
 		return EINVAL;
 	request = *(drm_agp_buffer_t *) data;
-	if (!(entry = DRM(agp_lookup_entry)(dev, (void*) request.handle)))
+	if (!(entry = drm_agp_lookup_entry(dev, (void*)request.handle)))
 		return EINVAL;
 	if (entry->bound)
-		DRM(unbind_agp)(entry->handle);
+		drm_agp_unbind_memory(entry->handle);
    
 	if (entry->prev)
 		entry->prev->next = entry->next;
@@ -232,12 +275,12 @@ int DRM(agp_free)(DRM_IOCTL_ARGS)
 		dev->agp->memory  = entry->next;
 	if (entry->next)
 		entry->next->prev = entry->prev;
-	DRM(free_agp)(entry->handle, entry->pages);
-	DRM(free)(entry, sizeof(*entry), DRM_MEM_AGPLISTS);
+	drm_agp_free_memory(entry->handle);
+	free(entry, M_DRM);
 	return 0;
 }
 
-drm_agp_head_t *DRM(agp_init)(void)
+drm_agp_head_t *drm_agp_init(void)
 {
 	device_t agpdev;
 	drm_agp_head_t *head   = NULL;
@@ -250,9 +293,9 @@ drm_agp_head_t *DRM(agp_init)(void)
 	DRM_DEBUG("agp_available = %d\n", agp_available);
 
 	if (agp_available) {
-		if (!(head = DRM(alloc)(sizeof(*head), DRM_MEM_AGPLISTS)))
+		head = malloc(sizeof(*head), M_DRM, M_NOWAIT | M_ZERO);
+		if (head == NULL)
 			return NULL;
-		bzero((void *)head, sizeof(*head));
 		head->agpdev = agpdev;
 		agp_get_info(agpdev, &head->info);
 		head->memory = NULL;
@@ -263,13 +306,13 @@ drm_agp_head_t *DRM(agp_init)(void)
 	return head;
 }
 
-void DRM(agp_uninit)(void)
+void drm_agp_uninit(void)
 {
 /* FIXME: What goes here */
 }
 
 
-agp_memory *DRM(agp_allocate_memory)(size_t pages, u32 type)
+void *drm_agp_allocate_memory(size_t pages, u32 type)
 {
 	device_t agpdev;
 
@@ -280,7 +323,7 @@ agp_memory *DRM(agp_allocate_memory)(size_t pages, u32 type)
 	return agp_alloc_memory(agpdev, type, pages << AGP_PAGE_SHIFT);
 }
 
-int DRM(agp_free_memory)(agp_memory *handle)
+int drm_agp_free_memory(void *handle)
 {
 	device_t agpdev;
 
@@ -292,7 +335,7 @@ int DRM(agp_free_memory)(agp_memory *handle)
 	return 1;
 }
 
-int DRM(agp_bind_memory)(agp_memory *handle, off_t start)
+int drm_agp_bind_memory(void *handle, off_t start)
 {
 	device_t agpdev;
 
@@ -303,7 +346,7 @@ int DRM(agp_bind_memory)(agp_memory *handle, off_t start)
 	return agp_bind_memory(agpdev, handle, start * PAGE_SIZE);
 }
 
-int DRM(agp_unbind_memory)(agp_memory *handle)
+int drm_agp_unbind_memory(void *handle)
 {
 	device_t agpdev;
 
diff --git a/sys/dev/drm/drm_atomic.h b/sys/dev/drm/drm_atomic.h
new file mode 100644
index 0000000..8cdabc7
--- /dev/null
+++ b/sys/dev/drm/drm_atomic.h
@@ -0,0 +1,143 @@
+/**
+ * \file drm_atomic.h
+ * Atomic operations used in the DRM which may or may not be provided by the OS.
+ * 
+ * \author Eric Anholt <anholt@FreeBSD.org>
+ */
+
+/*-
+ * Copyright 2004 Eric Anholt
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+/* Many of these implementations are rather fake, but good enough. */
+
+typedef u_int32_t atomic_t;
+
+#ifdef __FreeBSD__
+#define atomic_set(p, v)	(*(p) = (v))
+#define atomic_read(p)		(*(p))
+#define atomic_inc(p)		atomic_add_int(p, 1)
+#define atomic_dec(p)		atomic_subtract_int(p, 1)
+#define atomic_add(n, p)	atomic_add_int(p, n)
+#define atomic_sub(n, p)	atomic_subtract_int(p, n)
+#else /* __FreeBSD__ */
+/* FIXME */
+#define atomic_set(p, v)	(*(p) = (v))
+#define atomic_read(p)		(*(p))
+#define atomic_inc(p)		(*(p) += 1)
+#define atomic_dec(p)		(*(p) -= 1)
+#define atomic_add(n, p)	(*(p) += (n))
+#define atomic_sub(n, p)	(*(p) -= (n))
+/* FIXME */
+#define atomic_add_int(p, v)      *(p) += v
+#define atomic_subtract_int(p, v) *(p) -= v
+#define atomic_set_int(p, bits)   *(p) |= (bits)
+#define atomic_clear_int(p, bits) *(p) &= ~(bits)
+#endif /* !__FreeBSD__ */
+
+#if !defined(__FreeBSD_version) || (__FreeBSD_version < 500000)
+#if defined(__i386__)
+/* The extra atomic functions from 5.0 haven't been merged to 4.x */
+static __inline int
+atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
+{
+	int res = exp;
+
+	__asm __volatile (
+	"	lock ;			"
+	"	cmpxchgl %1,%2 ;	"
+	"       setz	%%al ;		"
+	"	movzbl	%%al,%0 ;	"
+	"1:				"
+	"# atomic_cmpset_int"
+	: "+a" (res)			/* 0 (result) */
+	: "r" (src),			/* 1 */
+	  "m" (*(dst))			/* 2 */
+	: "memory");				 
+
+	return (res);
+}
+#else /* __i386__ */
+static __inline int
+atomic_cmpset_int(__volatile__ int *dst, int old, int new)
+{
+	int s = splhigh();
+	if (*dst==old) {
+		*dst = new;
+		splx(s);
+		return 1;
+	}
+	splx(s);
+	return 0;
+}
+#endif /* !__i386__ */
+#endif /* !__FreeBSD_version || __FreeBSD_version < 500000 */
+
+static __inline atomic_t
+test_and_set_bit(int b, volatile void *p)
+{
+	int s = splhigh();
+	unsigned int m = 1<<b;
+	unsigned int r = *(volatile int *)p & m;
+	*(volatile int *)p |= m;
+	splx(s);
+	return r;
+}
+
+static __inline void
+clear_bit(int b, volatile void *p)
+{
+	atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
+}
+
+static __inline void
+set_bit(int b, volatile void *p)
+{
+	atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
+}
+
+static __inline int
+test_bit(int b, volatile void *p)
+{
+	return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f));
+}
+
+static __inline int
+find_first_zero_bit(volatile void *p, int max)
+{
+	int b;
+	volatile int *ptr = (volatile int *)p;
+
+	for (b = 0; b < max; b += 32) {
+		if (ptr[b >> 5] != ~0) {
+			for (;;) {
+				if ((ptr[b >> 5] & (1 << (b & 0x1f))) == 0)
+					return b;
+				b++;
+			}
+		}
+	}
+	return max;
+}
diff --git a/sys/dev/drm/drm_auth.h b/sys/dev/drm/drm_auth.c
index faa3ffc..910c0b0 100644
--- a/sys/dev/drm/drm_auth.h
+++ b/sys/dev/drm/drm_auth.c
@@ -1,5 +1,6 @@
 /* drm_auth.h -- IOCTLs for authentication -*- linux-c -*-
- * Created: Tue Feb  2 08:37:54 1999 by faith@valinux.com */
+ * Created: Tue Feb  2 08:37:54 1999 by faith@valinux.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,16 +34,18 @@
 
 #include "dev/drm/drmP.h"
 
-static int DRM(hash_magic)(drm_magic_t magic)
+static int drm_hash_magic(drm_magic_t magic)
 {
 	return magic & (DRM_HASH_SIZE-1);
 }
 
-static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic)
+static drm_file_t *drm_find_file(drm_device_t *dev, drm_magic_t magic)
 {
 	drm_file_t	  *retval = NULL;
 	drm_magic_entry_t *pt;
-	int		  hash	  = DRM(hash_magic)(magic);
+	int		  hash;
+
+	hash = drm_hash_magic(magic);
 
 	DRM_LOCK();
 	for (pt = dev->magiclist[hash].head; pt; pt = pt->next) {
@@ -55,17 +58,16 @@ static drm_file_t *DRM(find_file)(drm_device_t *dev, drm_magic_t magic)
 	return retval;
 }
 
-static int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
+static int drm_add_magic(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic)
 {
 	int		  hash;
 	drm_magic_entry_t *entry;
 
 	DRM_DEBUG("%d\n", magic);
 
-	hash	     = DRM(hash_magic)(magic);
-	entry	     = (drm_magic_entry_t*) DRM(alloc)(sizeof(*entry), DRM_MEM_MAGIC);
+	hash = drm_hash_magic(magic);
+	entry = malloc(sizeof(*entry), M_DRM, M_ZERO | M_NOWAIT);
 	if (!entry) return DRM_ERR(ENOMEM);
-	memset(entry, 0, sizeof(*entry));
 	entry->magic = magic;
 	entry->priv  = priv;
 	entry->next  = NULL;
@@ -83,14 +85,14 @@ static int DRM(add_magic)(drm_device_t *dev, drm_file_t *priv, drm_magic_t magic
 	return 0;
 }
 
-static int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
+static int drm_remove_magic(drm_device_t *dev, drm_magic_t magic)
 {
 	drm_magic_entry_t *prev = NULL;
 	drm_magic_entry_t *pt;
 	int		  hash;
 
 	DRM_DEBUG("%d\n", magic);
-	hash = DRM(hash_magic)(magic);
+	hash = drm_hash_magic(magic);
 
 	DRM_LOCK();
 	for (pt = dev->magiclist[hash].head; pt; prev = pt, pt = pt->next) {
@@ -110,18 +112,24 @@ static int DRM(remove_magic)(drm_device_t *dev, drm_magic_t magic)
 	}
 	DRM_UNLOCK();
 
-	DRM(free)(pt, sizeof(*pt), DRM_MEM_MAGIC);
+	free(pt, M_DRM);
 	return DRM_ERR(EINVAL);
 }
 
-int DRM(getmagic)(DRM_IOCTL_ARGS)
+int drm_getmagic(DRM_IOCTL_ARGS)
 {
+	DRM_DEVICE;
 	static drm_magic_t sequence = 0;
 	drm_auth_t auth;
 	drm_file_t *priv;
-	DRM_DEVICE;
 
-	DRM_GET_PRIV_WITH_RETURN(priv, filp);
+	DRM_LOCK();
+	priv = drm_find_file_by_proc(dev, p);
+	DRM_UNLOCK();
+	if (priv == NULL) {
+		DRM_ERROR("can't find authenticator\n");
+		return EINVAL;
+	}
 
 				/* Find unique magic */
 	if (priv->magic) {
@@ -134,9 +142,9 @@ int DRM(getmagic)(DRM_IOCTL_ARGS)
 			
 			if (!atomic_cmpset_int(&sequence, old, auth.magic))
 				continue;
-		} while (DRM(find_file)(dev, auth.magic));
+		} while (drm_find_file(dev, auth.magic));
 		priv->magic = auth.magic;
-		DRM(add_magic)(dev, priv, auth.magic);
+		drm_add_magic(dev, priv, auth.magic);
 	}
 
 	DRM_DEBUG("%u\n", auth.magic);
@@ -146,7 +154,7 @@ int DRM(getmagic)(DRM_IOCTL_ARGS)
 	return 0;
 }
 
-int DRM(authmagic)(DRM_IOCTL_ARGS)
+int drm_authmagic(DRM_IOCTL_ARGS)
 {
 	drm_auth_t	   auth;
 	drm_file_t	   *file;
@@ -156,9 +164,9 @@ int DRM(authmagic)(DRM_IOCTL_ARGS)
 
 	DRM_DEBUG("%u\n", auth.magic);
 
-	if ((file = DRM(find_file)(dev, auth.magic))) {
+	if ((file = drm_find_file(dev, auth.magic))) {
 		file->authenticated = 1;
-		DRM(remove_magic)(dev, auth.magic);
+		drm_remove_magic(dev, auth.magic);
 		return 0;
 	}
 	return DRM_ERR(EINVAL);
diff --git a/sys/dev/drm/drm_bufs.h b/sys/dev/drm/drm_bufs.c
index cb57852..9a25c2c 100644
--- a/sys/dev/drm/drm_bufs.h
+++ b/sys/dev/drm/drm_bufs.c
@@ -1,5 +1,6 @@
 /* drm_bufs.h -- Generic buffer template -*- linux-c -*-
- * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com */
+ * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
+ */
 /*-
  * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,29 +34,10 @@
 
 #include "dev/drm/drmP.h"
 
-#ifndef __HAVE_PCI_DMA
-#define __HAVE_PCI_DMA		0
-#endif
-
-#ifndef __HAVE_SG
-#define __HAVE_SG		0
-#endif
-
-#ifndef DRIVER_BUF_PRIV_T
-#define DRIVER_BUF_PRIV_T		u32
-#endif
-#ifndef DRIVER_AGP_BUFFERS_MAP
-#if __HAVE_AGP && __HAVE_DMA
-#error "You must define DRIVER_AGP_BUFFERS_MAP()"
-#else
-#define DRIVER_AGP_BUFFERS_MAP( dev )	NULL
-#endif
-#endif
-
 /*
  * Compute order.  Can be made faster.
  */
-int DRM(order)( unsigned long size )
+int drm_order(unsigned long size)
 {
 	int order;
 	unsigned long tmp;
@@ -68,19 +50,151 @@ int DRM(order)( unsigned long size )
 	return order;
 }
 
-int DRM(addmap)( DRM_IOCTL_ARGS )
+unsigned long drm_get_resource_start(drm_device_t *dev, unsigned int resource)
+{
+	struct resource *bsr;
+	unsigned long offset;
+
+	resource = resource * 4 + 0x10;
+
+	bsr = bus_alloc_resource_any(dev->device, SYS_RES_MEMORY, &resource,
+	    RF_ACTIVE | RF_SHAREABLE);
+	if (bsr == NULL) {
+		DRM_ERROR("Couldn't find resource 0x%x\n", resource);
+		return 0;
+	}
+
+	offset = rman_get_start(bsr);
+
+	bus_release_resource(dev->device, SYS_RES_MEMORY, resource, bsr);
+
+	return offset;
+}
+
+unsigned long drm_get_resource_len(drm_device_t *dev, unsigned int resource)
+{
+	struct resource *bsr;
+	unsigned long len;
+
+	resource = resource * 4 + 0x10;
+
+	bsr = bus_alloc_resource_any(dev->device, SYS_RES_MEMORY, &resource,
+	    RF_ACTIVE | RF_SHAREABLE);
+	if (bsr == NULL) {
+		DRM_ERROR("Couldn't find resource 0x%x\n", resource);
+		return ENOMEM;
+	}
+
+	len = rman_get_size(bsr);
+
+	bus_release_resource(dev->device, SYS_RES_MEMORY, resource, bsr);
+
+	return len;
+}
+
+int drm_initmap(drm_device_t *dev, unsigned long start, unsigned long len,
+		unsigned int resource, int type, int flags)
+{
+	drm_local_map_t *map;
+	struct resource *bsr;
+
+	if (type != _DRM_REGISTERS && type != _DRM_FRAME_BUFFER)
+		return EINVAL;
+	if (len == 0)
+		return EINVAL;
+
+	map = malloc(sizeof(*map), M_DRM, M_ZERO | M_NOWAIT);
+	if (map == NULL)
+		return ENOMEM;
+
+	map->rid = resource * 4 + 0x10;
+	bsr = bus_alloc_resource_any(dev->device, SYS_RES_MEMORY, &map->rid,
+	    RF_ACTIVE | RF_SHAREABLE);
+	if (bsr == NULL) {
+		DRM_ERROR("Couldn't allocate %s resource\n",
+		    ((type == _DRM_REGISTERS) ? "mmio" : "framebuffer"));
+		free(map, M_DRM);
+		return ENOMEM;
+	}
+
+	map->kernel_owned = 1;
+	map->type = type;
+	map->flags = flags;
+	map->bsr = bsr;
+	map->bst = rman_get_bustag(bsr);
+	map->bsh = rman_get_bushandle(bsr);
+	map->offset = start;
+	map->size = len;
+
+	if (type == _DRM_REGISTERS)
+		map->handle = rman_get_virtual(bsr);
+
+	DRM_DEBUG("initmap %d,0x%x@0x%lx/0x%lx\n", map->type, map->flags,
+	    map->offset, map->size);
+
+	if (map->flags & _DRM_WRITE_COMBINING) {
+		int err;
+
+		err = drm_mtrr_add(map->offset, map->size, DRM_MTRR_WC);
+		if (err == 0)
+			map->mtrr = 1;
+	}
+
+	DRM_LOCK();
+	TAILQ_INSERT_TAIL(&dev->maplist, map, link);
+	DRM_UNLOCK();
+
+	return 0;
+}
+
+int drm_addmap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_map_t request;
 	drm_local_map_t *map;
-	drm_map_list_entry_t *list;
+	dma_addr_t bus_addr;
 	
 	if (!(dev->flags & (FREAD|FWRITE)))
 		return DRM_ERR(EACCES); /* Require read/write */
 
 	DRM_COPY_FROM_USER_IOCTL( request, (drm_map_t *)data, sizeof(drm_map_t) );
 
-	map = (drm_local_map_t *) DRM(alloc)( sizeof(*map), DRM_MEM_MAPS );
+	/* Only allow shared memory to be removable since we only keep enough
+	 * book keeping information about shared memory to allow for removal
+	 * when processes fork.
+	 */
+	if ((request.flags & _DRM_REMOVABLE) && request.type != _DRM_SHM)
+		return EINVAL;
+	if ((request.offset & PAGE_MASK) || (request.size & PAGE_MASK))
+		return EINVAL;
+	if (request.offset + request.size < request.offset)
+		return EINVAL;
+
+	DRM_DEBUG("offset = 0x%08lx, size = 0x%08lx, type = %d\n",
+	    request.offset, request.size, request.type);
+
+	/* Check if this is just another version of a kernel-allocated map, and
+	 * just hand that back if so.
+	 */
+	if (request.type == _DRM_REGISTERS || request.type == _DRM_FRAME_BUFFER)
+	{
+		DRM_LOCK();
+		TAILQ_FOREACH(map, &dev->maplist, link) {
+			if (map->kernel_owned && map->type == request.type &&
+			    map->offset == request.offset) {
+				/* XXX: this size setting is questionable. */
+				map->size = request.size;
+				DRM_DEBUG("Found kernel map %d\n", request.type);
+				goto done;
+			}
+		}
+		DRM_UNLOCK();
+	}
+
+	/* Allocate a new map structure, fill it in, and do any type-specific
+	 * initialization necessary.
+	 */
+	map = malloc(sizeof(*map), M_DRM, M_ZERO | M_NOWAIT);
 	if ( !map )
 		return DRM_ERR(ENOMEM);
 
@@ -88,46 +202,23 @@ int DRM(addmap)( DRM_IOCTL_ARGS )
 	map->size = request.size;
 	map->type = request.type;
 	map->flags = request.flags;
-	map->mtrr = 0;
-	map->handle = 0;
-	
-	/* Only allow shared memory to be removable since we only keep enough
-	 * book keeping information about shared memory to allow for removal
-	 * when processes fork.
-	 */
-	if ( (map->flags & _DRM_REMOVABLE) && map->type != _DRM_SHM ) {
-		DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-		return DRM_ERR(EINVAL);
-	}
-	DRM_DEBUG( "offset = 0x%08lx, size = 0x%08lx, type = %d\n",
-		   map->offset, map->size, map->type );
-	if ( (map->offset & PAGE_MASK) || (map->size & PAGE_MASK) ) {
-		DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
-		return DRM_ERR(EINVAL);
-	}
-	if (map->offset + map->size < map->offset) {
-		DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
-		return DRM_ERR(EINVAL);
-	}
 
 	switch ( map->type ) {
 	case _DRM_REGISTERS:
-		DRM_IOREMAP(map, dev);
+		drm_ioremap(dev, map);
 		if (!(map->flags & _DRM_WRITE_COMBINING))
 			break;
 		/* FALLTHROUGH */
 	case _DRM_FRAME_BUFFER:
-#if __REALLY_HAVE_MTRR
-		if (DRM(mtrr_add)(map->offset, map->size, DRM_MTRR_WC) == 0)
+		if (drm_mtrr_add(map->offset, map->size, DRM_MTRR_WC) == 0)
 			map->mtrr = 1;
-#endif
 		break;
 	case _DRM_SHM:
-		map->handle = (void *)DRM(alloc)(map->size, DRM_MEM_SAREA);
+		map->handle = malloc(map->size, M_DRM, M_NOWAIT);
 		DRM_DEBUG( "%lu %d %p\n",
-			   map->size, DRM(order)( map->size ), map->handle );
+			   map->size, drm_order(map->size), map->handle );
 		if ( !map->handle ) {
-			DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
+			free(map, M_DRM);
 			return DRM_ERR(ENOMEM);
 		}
 		map->offset = (unsigned long)map->handle;
@@ -136,51 +227,53 @@ int DRM(addmap)( DRM_IOCTL_ARGS )
 			DRM_LOCK();
 			if (dev->lock.hw_lock != NULL) {
 				DRM_UNLOCK();
-				DRM(free)(map->handle, map->size,
-				    DRM_MEM_SAREA);
-				DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
+				free(map->handle, M_DRM);
+				free(map, M_DRM);
 				return DRM_ERR(EBUSY);
 			}
 			dev->lock.hw_lock = map->handle; /* Pointer to lock */
 			DRM_UNLOCK();
 		}
 		break;
-#if __REALLY_HAVE_AGP
 	case _DRM_AGP:
 		map->offset += dev->agp->base;
 		map->mtrr   = dev->agp->mtrr; /* for getmap */
 		break;
-#endif
 	case _DRM_SCATTER_GATHER:
 		if (!dev->sg) {
-			DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
+			free(map, M_DRM);
 			return DRM_ERR(EINVAL);
 		}
 		map->offset = map->offset + dev->sg->handle;
 		break;
-
+	case _DRM_CONSISTENT:
+		map->handle = drm_pci_alloc(dev, map->size, map->size,
+		    0xfffffffful, &bus_addr);
+		if (map->handle == NULL) {
+			free(map, M_DRM);
+			return ENOMEM;
+		}
+		map->offset = (unsigned long)bus_addr;
+		break;
 	default:
-		DRM(free)( map, sizeof(*map), DRM_MEM_MAPS );
+		free(map, M_DRM);
 		return DRM_ERR(EINVAL);
 	}
 
-	list = DRM(calloc)(1, sizeof(*list), DRM_MEM_MAPS);
-	if (list == NULL) {
-		DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
-		return DRM_ERR(EINVAL);
-	}
-	list->map = map;
-
 	DRM_LOCK();
-	TAILQ_INSERT_TAIL(dev->maplist, list, link);
-	DRM_UNLOCK();
+	TAILQ_INSERT_TAIL(&dev->maplist, map, link);
 
+done:
+	/* Jumped to, with lock held, when a kernel map is found. */
 	request.offset = map->offset;
 	request.size = map->size;
 	request.type = map->type;
 	request.flags = map->flags;
 	request.mtrr   = map->mtrr;
 	request.handle = map->handle;
+	DRM_UNLOCK();
+
+	DRM_DEBUG("Added map %d 0x%lx/0x%lx\n", request.type, request.offset, request.size);
 
 	if ( request.type != _DRM_SHM ) {
 		request.handle = (void *)request.offset;
@@ -191,105 +284,105 @@ int DRM(addmap)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
+void drm_remove_map(drm_device_t *dev, drm_local_map_t *map)
+{
+	DRM_SPINLOCK_ASSERT(&dev->dev_lock);
+
+	TAILQ_REMOVE(&dev->maplist, map, link);
+
+	switch (map->type) {
+	case _DRM_REGISTERS:
+		if (map->bsr == NULL)
+			drm_ioremapfree(map);
+		/* FALLTHROUGH */
+	case _DRM_FRAME_BUFFER:
+		if (map->mtrr) {
+			int __unused retcode;
+			
+			retcode = drm_mtrr_del(map->offset, map->size,
+			    DRM_MTRR_WC);
+			DRM_DEBUG("mtrr_del = %d\n", retcode);
+		}
+		break;
+	case _DRM_SHM:
+		free(map->handle, M_DRM);
+		break;
+	case _DRM_AGP:
+	case _DRM_SCATTER_GATHER:
+		break;
+	case _DRM_CONSISTENT:
+		drm_pci_free(dev, map->size, map->handle, map->offset);
+		break;
+	}
+
+	if (map->bsr != NULL) {
+		bus_release_resource(dev->device, SYS_RES_MEMORY, map->rid,
+		    map->bsr);
+	}
+
+	free(map, M_DRM);
+}
 
 /* Remove a map private from list and deallocate resources if the mapping
  * isn't in use.
  */
 
-int DRM(rmmap)( DRM_IOCTL_ARGS )
+int drm_rmmap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
-	drm_map_list_entry_t *list;
 	drm_local_map_t *map;
 	drm_map_t request;
 
 	DRM_COPY_FROM_USER_IOCTL( request, (drm_map_t *)data, sizeof(request) );
 
 	DRM_LOCK();
-	TAILQ_FOREACH(list, dev->maplist, link) {
-		map = list->map;
+	TAILQ_FOREACH(map, &dev->maplist, link) {
 		if (map->handle == request.handle &&
 		    map->flags & _DRM_REMOVABLE)
 			break;
 	}
 
 	/* No match found. */
-	if (list == NULL) {
+	if (map == NULL) {
 		DRM_UNLOCK();
 		return DRM_ERR(EINVAL);
 	}
-	TAILQ_REMOVE(dev->maplist, list, link);
-	DRM_UNLOCK();
 
-	DRM(free)(list, sizeof(*list), DRM_MEM_MAPS);
+	drm_remove_map(dev, map);
+
+	DRM_UNLOCK();
 
-	switch (map->type) {
-	case _DRM_REGISTERS:
-	case _DRM_FRAME_BUFFER:
-#if __REALLY_HAVE_MTRR
-		if (map->mtrr) {
-			int __unused retcode;
-			
-			retcode = DRM(mtrr_del)(map->offset, map->size,
-			    DRM_MTRR_WC);
-			DRM_DEBUG("mtrr_del = %d\n", retcode);
-		}
-#endif
-		DRM(ioremapfree)(map);
-		break;
-	case _DRM_SHM:
-		DRM(free)(map->handle, map->size, DRM_MEM_SAREA);
-		break;
-	case _DRM_AGP:
-	case _DRM_SCATTER_GATHER:
-		break;
-	}
-	DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
 	return 0;
 }
 
-#if __HAVE_DMA
 
-
-static void DRM(cleanup_buf_error)(drm_device_t *dev, drm_buf_entry_t *entry)
+static void drm_cleanup_buf_error(drm_device_t *dev, drm_buf_entry_t *entry)
 {
 	int i;
 
-#if __HAVE_PCI_DMA
 	if (entry->seg_count) {
 		for (i = 0; i < entry->seg_count; i++) {
-			if (entry->seglist[i] != 0)
-				DRM(pci_free)(dev, entry->buf_size,
-				    (void *)entry->seglist[i],
-				    entry->seglist_bus[i]);
+			drm_pci_free(dev, entry->buf_size,
+			    (void *)entry->seglist[i],
+			    entry->seglist_bus[i]);
 		}
-		DRM(free)(entry->seglist,
-			  entry->seg_count *
-			  sizeof(*entry->seglist),
-			  DRM_MEM_SEGS);
-		DRM(free)(entry->seglist_bus, entry->seg_count *
-			  sizeof(*entry->seglist_bus), DRM_MEM_SEGS);
+		free(entry->seglist, M_DRM);
+		free(entry->seglist_bus, M_DRM);
 
 		entry->seg_count = 0;
 	}
-#endif /* __HAVE_PCI_DMA */
 
    	if (entry->buf_count) {
 	   	for (i = 0; i < entry->buf_count; i++) {
-			DRM(free)(entry->buflist[i].dev_private,
-			    entry->buflist[i].dev_priv_size, DRM_MEM_BUFS);
+			free(entry->buflist[i].dev_private, M_DRM);
 		}
-		DRM(free)(entry->buflist,
-			  entry->buf_count *
-			  sizeof(*entry->buflist),
-			  DRM_MEM_BUFS);
+		free(entry->buflist, M_DRM);
 
 		entry->buf_count = 0;
 	}
 }
 
-#if __REALLY_HAVE_AGP
-static int DRM(addbufs_agp)(drm_device_t *dev, drm_buf_desc_t *request)
+static int drm_addbufs_agp(drm_device_t *dev, drm_buf_desc_t *request)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_entry_t *entry;
@@ -307,7 +400,7 @@ static int DRM(addbufs_agp)(drm_device_t *dev, drm_buf_desc_t *request)
 	drm_buf_t **temp_buflist;
 
 	count = request->count;
-	order = DRM(order)(request->size);
+	order = drm_order(request->size);
 	size = 1 << order;
 
 	alignment  = (request->flags & _DRM_PAGE_ALIGN)
@@ -328,12 +421,11 @@ static int DRM(addbufs_agp)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	entry = &dma->bufs[order];
 
-	entry->buflist = DRM(alloc)( count * sizeof(*entry->buflist),
-				    DRM_MEM_BUFS );
+	entry->buflist = malloc(count * sizeof(*entry->buflist), M_DRM,
+	    M_NOWAIT | M_ZERO);
 	if ( !entry->buflist ) {
 		return DRM_ERR(ENOMEM);
 	}
-	memset( entry->buflist, 0, count * sizeof(*entry->buflist) );
 
 	entry->buf_size = size;
 	entry->page_order = page_order;
@@ -354,13 +446,13 @@ static int DRM(addbufs_agp)(drm_device_t *dev, drm_buf_desc_t *request)
 		buf->pending = 0;
 		buf->filp    = NULL;
 
-		buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
-		buf->dev_private = DRM(calloc)(1, buf->dev_priv_size,
-		    DRM_MEM_BUFS);
+		buf->dev_priv_size = dev->dev_priv_size;
+		buf->dev_private = malloc(buf->dev_priv_size, M_DRM,
+		    M_NOWAIT | M_ZERO);
 		if (buf->dev_private == NULL) {
 			/* Set count correctly so we free the proper amount. */
 			entry->buf_count = count;
-			DRM(cleanup_buf_error)(dev, entry);
+			drm_cleanup_buf_error(dev, entry);
 			return DRM_ERR(ENOMEM);
 		}
 
@@ -371,14 +463,12 @@ static int DRM(addbufs_agp)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	DRM_DEBUG( "byte_count: %d\n", byte_count );
 
-	temp_buflist = DRM(realloc)( dma->buflist,
-				     dma->buf_count * sizeof(*dma->buflist),
-				     (dma->buf_count + entry->buf_count)
-				     * sizeof(*dma->buflist),
-				     DRM_MEM_BUFS );
+	temp_buflist = realloc(dma->buflist,
+	    (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), M_DRM,
+	    M_NOWAIT);
 	if (temp_buflist == NULL) {
 		/* Free the entry because it isn't valid */
-		DRM(cleanup_buf_error)(dev, entry);
+		drm_cleanup_buf_error(dev, entry);
 		return DRM_ERR(ENOMEM);
 	}
 	dma->buflist = temp_buflist;
@@ -400,10 +490,8 @@ static int DRM(addbufs_agp)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	return 0;
 }
-#endif /* __REALLY_HAVE_AGP */
 
-#if __HAVE_PCI_DMA
-static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
+static int drm_addbufs_pci(drm_device_t *dev, drm_buf_desc_t *request)
 {
 	drm_device_dma_t *dma = dev->dma;
 	int count;
@@ -424,7 +512,7 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 	dma_addr_t bus_addr;
 
 	count = request->count;
-	order = DRM(order)(request->size);
+	order = drm_order(request->size);
 	size = 1 << order;
 
 	DRM_DEBUG( "count=%d, size=%d (%d), order=%d\n",
@@ -437,32 +525,26 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	entry = &dma->bufs[order];
 
-	entry->buflist = DRM(alloc)(count * sizeof(*entry->buflist),
-	    DRM_MEM_BUFS);
-	entry->seglist = DRM(alloc)(count * sizeof(*entry->seglist),
-	    DRM_MEM_SEGS);
-	entry->seglist_bus = DRM(alloc)(count * sizeof(*entry->seglist_bus),
-	    DRM_MEM_SEGS);
+	entry->buflist = malloc(count * sizeof(*entry->buflist), M_DRM,
+	    M_NOWAIT | M_ZERO);
+	entry->seglist = malloc(count * sizeof(*entry->seglist), M_DRM,
+	    M_NOWAIT | M_ZERO);
+	entry->seglist_bus = malloc(count * sizeof(*entry->seglist_bus), M_DRM,
+	    M_NOWAIT | M_ZERO);
 
 	/* Keep the original pagelist until we know all the allocations
 	 * have succeeded
 	 */
-	temp_pagelist = DRM(alloc)((dma->page_count + (count << page_order)) *
-	    sizeof(*dma->pagelist), DRM_MEM_PAGES);
+	temp_pagelist = malloc((dma->page_count + (count << page_order)) *
+	    sizeof(*dma->pagelist), M_DRM, M_NOWAIT);
 
 	if (entry->buflist == NULL || entry->seglist == NULL || 
-	    temp_pagelist == NULL) {
-		DRM(free)(entry->buflist, count * sizeof(*entry->buflist),
-		    DRM_MEM_BUFS);
-		DRM(free)(entry->seglist, count * sizeof(*entry->seglist),
-		    DRM_MEM_SEGS);
-		DRM(free)(entry->seglist_bus, count *
-		    sizeof(*entry->seglist_bus), DRM_MEM_SEGS);
+	    entry->seglist_bus == NULL || temp_pagelist == NULL) {
+		free(entry->buflist, M_DRM);
+		free(entry->seglist, M_DRM);
+		free(entry->seglist_bus, M_DRM);
 		return DRM_ERR(ENOMEM);
 	}
-
-	bzero(entry->buflist, count * sizeof(*entry->buflist));
-	bzero(entry->seglist, count * sizeof(*entry->seglist));
 	
 	memcpy(temp_pagelist, dma->pagelist, dma->page_count * 
 	    sizeof(*dma->pagelist));
@@ -476,16 +558,14 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 	page_count = 0;
 
 	while ( entry->buf_count < count ) {
-		vaddr = (vm_offset_t) DRM(pci_alloc)(dev, size, alignment,
+		vaddr = (vm_offset_t)drm_pci_alloc(dev, size, alignment,
 		    0xfffffffful, &bus_addr);
 		if (vaddr == 0) {
 			/* Set count correctly so we free the proper amount. */
 			entry->buf_count = count;
 			entry->seg_count = count;
-			DRM(cleanup_buf_error)(dev, entry);
-			DRM(free)(temp_pagelist, (dma->page_count +
-			    (count << page_order)) * sizeof(*dma->pagelist),
-			    DRM_MEM_PAGES);
+			drm_cleanup_buf_error(dev, entry);
+			free(temp_pagelist, M_DRM);
 			return DRM_ERR(ENOMEM);
 		}
 	
@@ -513,20 +593,17 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 			buf->pending = 0;
 			buf->filp    = NULL;
 
-			buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
-			buf->dev_private = DRM(alloc)(sizeof(DRIVER_BUF_PRIV_T),
-			    DRM_MEM_BUFS);
+			buf->dev_priv_size = dev->dev_priv_size;
+			buf->dev_private = malloc(buf->dev_priv_size, M_DRM,
+			    M_NOWAIT | M_ZERO);
 			if (buf->dev_private == NULL) {
 				/* Set count correctly so we free the proper amount. */
 				entry->buf_count = count;
 				entry->seg_count = count;
-				DRM(cleanup_buf_error)(dev, entry);
-				DRM(free)(temp_pagelist, (dma->page_count + 
-				    (count << page_order)) *
-				    sizeof(*dma->pagelist), DRM_MEM_PAGES );
+				drm_cleanup_buf_error(dev, entry);
+				free(temp_pagelist, M_DRM);
 				return DRM_ERR(ENOMEM);
 			}
-			bzero(buf->dev_private, buf->dev_priv_size);
 
 			DRM_DEBUG( "buffer %d @ %p\n",
 				   entry->buf_count, buf->address );
@@ -534,17 +611,13 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 		byte_count += PAGE_SIZE << page_order;
 	}
 
-	temp_buflist = DRM(realloc)( dma->buflist,
-				     dma->buf_count * sizeof(*dma->buflist),
-				     (dma->buf_count + entry->buf_count)
-				     * sizeof(*dma->buflist),
-				     DRM_MEM_BUFS );
+	temp_buflist = realloc(dma->buflist,
+	    (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), M_DRM,
+	    M_NOWAIT);
 	if (temp_buflist == NULL) {
 		/* Free the entry because it isn't valid */
-		DRM(cleanup_buf_error)(dev, entry);
-		DRM(free)(temp_pagelist, (dma->page_count + 
-		    (count << page_order)) * sizeof(*dma->pagelist),
-		    DRM_MEM_PAGES);
+		drm_cleanup_buf_error(dev, entry);
+		free(temp_pagelist, M_DRM);
 		return DRM_ERR(ENOMEM);
 	}
 	dma->buflist = temp_buflist;
@@ -556,8 +629,7 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 	/* No allocations failed, so now we can replace the orginal pagelist
 	 * with the new one.
 	 */
-	DRM(free)(dma->pagelist, dma->page_count * sizeof(*dma->pagelist),
-	    DRM_MEM_PAGES);
+	free(dma->pagelist, M_DRM);
 	dma->pagelist = temp_pagelist;
 
 	dma->buf_count += entry->buf_count;
@@ -571,10 +643,8 @@ static int DRM(addbufs_pci)(drm_device_t *dev, drm_buf_desc_t *request)
 	return 0;
 
 }
-#endif /* __HAVE_PCI_DMA */
 
-#if __REALLY_HAVE_SG
-static int DRM(addbufs_sg)(drm_device_t *dev, drm_buf_desc_t *request)
+static int drm_addbufs_sg(drm_device_t *dev, drm_buf_desc_t *request)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_entry_t *entry;
@@ -592,7 +662,7 @@ static int DRM(addbufs_sg)(drm_device_t *dev, drm_buf_desc_t *request)
 	drm_buf_t **temp_buflist;
 
 	count = request->count;
-	order = DRM(order)(request->size);
+	order = drm_order(request->size);
 	size = 1 << order;
 
 	alignment  = (request->flags & _DRM_PAGE_ALIGN)
@@ -613,8 +683,8 @@ static int DRM(addbufs_sg)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	entry = &dma->bufs[order];
 
-	entry->buflist = DRM(calloc)(1, count * sizeof(*entry->buflist),
-	    DRM_MEM_BUFS);
+	entry->buflist = malloc(count * sizeof(*entry->buflist), M_DRM,
+	    M_NOWAIT | M_ZERO);
 	if (entry->buflist == NULL)
 		return DRM_ERR(ENOMEM);
 
@@ -637,13 +707,13 @@ static int DRM(addbufs_sg)(drm_device_t *dev, drm_buf_desc_t *request)
 		buf->pending = 0;
 		buf->filp    = NULL;
 
-		buf->dev_priv_size = sizeof(DRIVER_BUF_PRIV_T);
-		buf->dev_private = DRM(calloc)(1, buf->dev_priv_size,
-		    DRM_MEM_BUFS);
+		buf->dev_priv_size = dev->dev_priv_size;
+		buf->dev_private = malloc(buf->dev_priv_size, M_DRM,
+		    M_NOWAIT | M_ZERO);
 		if (buf->dev_private == NULL) {
 			/* Set count correctly so we free the proper amount. */
 			entry->buf_count = count;
-			DRM(cleanup_buf_error)(dev, entry);
+			drm_cleanup_buf_error(dev, entry);
 			return DRM_ERR(ENOMEM);
 		}
 
@@ -657,14 +727,12 @@ static int DRM(addbufs_sg)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	DRM_DEBUG( "byte_count: %d\n", byte_count );
 
-	temp_buflist = DRM(realloc)( dma->buflist,
-				     dma->buf_count * sizeof(*dma->buflist),
-				     (dma->buf_count + entry->buf_count)
-				     * sizeof(*dma->buflist),
-				     DRM_MEM_BUFS );
+	temp_buflist = realloc(dma->buflist,
+	    (dma->buf_count + entry->buf_count) * sizeof(*dma->buflist), M_DRM,
+	    M_NOWAIT);
 	if (temp_buflist == NULL) {
 		/* Free the entry because it isn't valid */
-		DRM(cleanup_buf_error)(dev, entry);
+		drm_cleanup_buf_error(dev, entry);
 		return DRM_ERR(ENOMEM);
 	}
 	dma->buflist = temp_buflist;
@@ -686,9 +754,8 @@ static int DRM(addbufs_sg)(drm_device_t *dev, drm_buf_desc_t *request)
 
 	return 0;
 }
-#endif /* __REALLY_HAVE_SG */
 
-int DRM(addbufs)( DRM_IOCTL_ARGS )
+int drm_addbufs(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_buf_desc_t request;
@@ -700,7 +767,7 @@ int DRM(addbufs)( DRM_IOCTL_ARGS )
 	if (request.count < 0 || request.count > 4096)
 		return DRM_ERR(EINVAL);
 
-	order = DRM(order)(request.size);
+	order = drm_order(request.size);
 	if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER)
 		return DRM_ERR(EINVAL);
 
@@ -716,21 +783,13 @@ int DRM(addbufs)( DRM_IOCTL_ARGS )
 		return DRM_ERR(ENOMEM);
 	}
 
-#if __REALLY_HAVE_AGP
 	if ( request.flags & _DRM_AGP_BUFFER )
-		err = DRM(addbufs_agp)(dev, &request);
+		err = drm_addbufs_agp(dev, &request);
 	else
-#endif
-#if __REALLY_HAVE_SG
 	if ( request.flags & _DRM_SG_BUFFER )
-		err = DRM(addbufs_sg)(dev, &request);
+		err = drm_addbufs_sg(dev, &request);
 	else
-#endif
-#if __HAVE_PCI_DMA
-		err = DRM(addbufs_pci)(dev, &request);
-#else
-		err = DRM_ERR(EINVAL);
-#endif
+		err = drm_addbufs_pci(dev, &request);
 	DRM_SPINUNLOCK(&dev->dma_lock);
 
 	DRM_COPY_TO_USER_IOCTL((drm_buf_desc_t *)data, request, sizeof(request));
@@ -738,7 +797,7 @@ int DRM(addbufs)( DRM_IOCTL_ARGS )
 	return err;
 }
 
-int DRM(infobufs)( DRM_IOCTL_ARGS )
+int drm_infobufs(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
@@ -792,7 +851,7 @@ int DRM(infobufs)( DRM_IOCTL_ARGS )
 	return retcode;
 }
 
-int DRM(markbufs)( DRM_IOCTL_ARGS )
+int drm_markbufs(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
@@ -805,7 +864,7 @@ int DRM(markbufs)( DRM_IOCTL_ARGS )
 		   request.size, request.low_mark, request.high_mark );
 	
 
-	order = DRM(order)(request.size);	
+	order = drm_order(request.size);	
 	if (order < DRM_MIN_ORDER || order > DRM_MAX_ORDER ||
 	    request.low_mark < 0 || request.high_mark < 0) {
 		return DRM_ERR(EINVAL);
@@ -824,7 +883,7 @@ int DRM(markbufs)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(freebufs)( DRM_IOCTL_ARGS )
+int drm_freebufs(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
@@ -857,14 +916,14 @@ int DRM(freebufs)( DRM_IOCTL_ARGS )
 			retcode = DRM_ERR(EINVAL);
 			break;
 		}
-		DRM(free_buffer)( dev, buf );
+		drm_free_buffer(dev, buf);
 	}
 	DRM_SPINUNLOCK(&dev->dma_lock);
 
 	return retcode;
 }
 
-int DRM(mapbufs)( DRM_IOCTL_ARGS )
+int drm_mapbufs(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
@@ -876,22 +935,21 @@ int DRM(mapbufs)( DRM_IOCTL_ARGS )
 	vm_ooffset_t foff;
 	vm_size_t size;
 	vm_offset_t vaddr;
-#endif /* __FreeBSD__ */
-#ifdef __NetBSD__
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 	struct vnode *vn;
 	vm_size_t size;
 	vaddr_t vaddr;
-#endif /* __NetBSD__ */
+#endif /* __NetBSD__ || __OpenBSD__ */
 
 	drm_buf_map_t request;
 	int i;
 
 	DRM_COPY_FROM_USER_IOCTL( request, (drm_buf_map_t *)data, sizeof(request) );
 
-#ifdef __NetBSD__
+#if defined(__NetBSD__) || defined(__OpenBSD__)
 	if (!vfinddev(kdev, VCHR, &vn))
 		return 0;	/* FIXME: Shouldn't this be EINVAL or something? */
-#endif /* __NetBSD__ */
+#endif /* __NetBSD__ || __OpenBSD */
 
 #if defined(__FreeBSD__) && __FreeBSD_version >= 500000
 	vms = p->td_proc->p_vmspace;
@@ -906,9 +964,9 @@ int DRM(mapbufs)( DRM_IOCTL_ARGS )
 	if (request.count < dma->buf_count)
 		goto done;
 
-	if ((__HAVE_AGP && (dma->flags & _DRM_DMA_USE_AGP)) ||
-	    (__HAVE_SG && (dma->flags & _DRM_DMA_USE_SG))) {
-		drm_local_map_t *map = DRIVER_AGP_BUFFERS_MAP(dev);
+	if ((dev->use_agp && (dma->flags & _DRM_DMA_USE_AGP)) ||
+	    (dev->use_sg && (dma->flags & _DRM_DMA_USE_SG))) {
+		drm_local_map_t *map = dev->agp_buffer_map;
 
 		if (map == NULL) {
 			retcode = EINVAL;
@@ -923,14 +981,19 @@ int DRM(mapbufs)( DRM_IOCTL_ARGS )
 
 #ifdef __FreeBSD__
 	vaddr = round_page((vm_offset_t)vms->vm_daddr + MAXDSIZ);
+#if __FreeBSD_version >= 600023
 	retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE,
 	    VM_PROT_ALL, MAP_SHARED, OBJT_DEVICE, kdev, foff );
-#elif defined(__NetBSD__)
+#else
+	retcode = vm_mmap(&vms->vm_map, &vaddr, size, PROT_READ | PROT_WRITE,
+	    VM_PROT_ALL, MAP_SHARED, SLIST_FIRST(&kdev->si_hlist), foff );
+#endif
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 	vaddr = round_page((vaddr_t)vms->vm_daddr + MAXDSIZ);
 	retcode = uvm_mmap(&vms->vm_map, &vaddr, size,
 	    UVM_PROT_READ | UVM_PROT_WRITE, UVM_PROT_ALL, MAP_SHARED,
 	    &vn->v_uobj, foff, p->p_rlimit[RLIMIT_MEMLOCK].rlim_cur);
-#endif /* __NetBSD__ */
+#endif /* __NetBSD__ || __OpenBSD */
 	if (retcode)
 		goto done;
 
@@ -969,5 +1032,3 @@ int DRM(mapbufs)( DRM_IOCTL_ARGS )
 
 	return DRM_ERR(retcode);
 }
-
-#endif /* __HAVE_DMA */
diff --git a/sys/dev/drm/drm_context.h b/sys/dev/drm/drm_context.c
index 177bd59..7c02d92 100644
--- a/sys/dev/drm/drm_context.h
+++ b/sys/dev/drm/drm_context.c
@@ -1,5 +1,6 @@
 /* drm_context.h -- IOCTLs for generic contexts -*- linux-c -*-
- * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com */
+ * Created: Fri Nov 24 18:31:37 2000 by gareth@valinux.com
+ */
 /*-
  * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,15 +34,11 @@
 
 #include "dev/drm/drmP.h"
 
-#if !__HAVE_CTX_BITMAP
-#error "__HAVE_CTX_BITMAP must be defined"
-#endif
-
 /* ================================================================
  * Context bitmap support
  */
 
-void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle )
+void drm_ctxbitmap_free(drm_device_t *dev, int ctx_handle)
 {
 	if (ctx_handle < 0 || ctx_handle >= DRM_MAX_CTXBITMAP || 
 	    dev->ctx_bitmap == NULL) {
@@ -57,7 +54,7 @@ void DRM(ctxbitmap_free)( drm_device_t *dev, int ctx_handle )
 	return;
 }
 
-int DRM(ctxbitmap_next)( drm_device_t *dev )
+int drm_ctxbitmap_next(drm_device_t *dev)
 {
 	int bit;
 
@@ -78,12 +75,9 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 		if (dev->context_sareas != NULL) {
 			drm_local_map_t **ctx_sareas;
 
-			ctx_sareas = DRM(realloc)(dev->context_sareas,
-					(dev->max_context - 1) * 
-					sizeof(*dev->context_sareas),
-					dev->max_context * 
-					sizeof(*dev->context_sareas),
-					DRM_MEM_MAPS);
+			ctx_sareas = realloc(dev->context_sareas,
+			    dev->max_context * sizeof(*dev->context_sareas),
+			    M_DRM, M_NOWAIT);
 			if (ctx_sareas == NULL) {
 				clear_bit(bit, dev->ctx_bitmap);
 				DRM_UNLOCK();
@@ -93,8 +87,8 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 			dev->context_sareas[bit] = NULL;
 		} else {
 			/* max_context == 1 at this point */
-			dev->context_sareas = DRM(alloc)(dev->max_context * 
-			    sizeof(*dev->context_sareas), DRM_MEM_MAPS);
+			dev->context_sareas = malloc(dev->max_context * 
+			    sizeof(*dev->context_sareas), M_DRM, M_NOWAIT);
 			if (dev->context_sareas == NULL) {
 				clear_bit(bit, dev->ctx_bitmap);
 				DRM_UNLOCK();
@@ -107,14 +101,13 @@ int DRM(ctxbitmap_next)( drm_device_t *dev )
 	return bit;
 }
 
-int DRM(ctxbitmap_init)( drm_device_t *dev )
+int drm_ctxbitmap_init(drm_device_t *dev)
 {
 	int i;
    	int temp;
 
 	DRM_LOCK();
-	dev->ctx_bitmap = (atomic_t *)DRM(calloc)(1, PAGE_SIZE,
-	    DRM_MEM_CTXBITMAP);
+	dev->ctx_bitmap = malloc(PAGE_SIZE, M_DRM, M_NOWAIT | M_ZERO);
 	if ( dev->ctx_bitmap == NULL ) {
 		DRM_UNLOCK();
 		return DRM_ERR(ENOMEM);
@@ -124,20 +117,19 @@ int DRM(ctxbitmap_init)( drm_device_t *dev )
 	DRM_UNLOCK();
 
 	for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
-		temp = DRM(ctxbitmap_next)( dev );
+		temp = drm_ctxbitmap_next(dev);
 	   	DRM_DEBUG( "drm_ctxbitmap_init : %d\n", temp );
 	}
 
 	return 0;
 }
 
-void DRM(ctxbitmap_cleanup)( drm_device_t *dev )
+void drm_ctxbitmap_cleanup(drm_device_t *dev)
 {
 	DRM_LOCK();
 	if (dev->context_sareas != NULL)
-		DRM(free)(dev->context_sareas, sizeof(*dev->context_sareas) * 
-		    dev->max_context, DRM_MEM_MAPS);
-	DRM(free)( (void *)dev->ctx_bitmap, PAGE_SIZE, DRM_MEM_CTXBITMAP );
+		free(dev->context_sareas, M_DRM);
+	free(dev->ctx_bitmap, M_DRM);
 	DRM_UNLOCK();
 }
 
@@ -145,7 +137,7 @@ void DRM(ctxbitmap_cleanup)( drm_device_t *dev )
  * Per Context SAREA Support
  */
 
-int DRM(getsareactx)( DRM_IOCTL_ARGS )
+int drm_getsareactx( DRM_IOCTL_ARGS )
 {
 	DRM_DEVICE;
 	drm_ctx_priv_map_t request;
@@ -170,19 +162,17 @@ int DRM(getsareactx)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(setsareactx)( DRM_IOCTL_ARGS )
+int drm_setsareactx( DRM_IOCTL_ARGS )
 {
 	DRM_DEVICE;
 	drm_ctx_priv_map_t request;
 	drm_local_map_t *map = NULL;
-	drm_map_list_entry_t *list;
 
 	DRM_COPY_FROM_USER_IOCTL( request, (drm_ctx_priv_map_t *)data,
 			   sizeof(request) );
 
 	DRM_LOCK();
-	TAILQ_FOREACH(list, dev->maplist, link) {
-		map=list->map;
+	TAILQ_FOREACH(map, &dev->maplist, link) {
 		if (map->handle == request.handle) {
 			if (dev->max_context < 0)
 				goto bad;
@@ -203,7 +193,7 @@ bad:
  * The actual DRM context handling routines
  */
 
-int DRM(context_switch)( drm_device_t *dev, int old, int new )
+int drm_context_switch(drm_device_t *dev, int old, int new)
 {
         if ( test_and_set_bit( 0, &dev->context_flag ) ) {
                 DRM_ERROR( "Reentering -- FIXME\n" );
@@ -220,7 +210,7 @@ int DRM(context_switch)( drm_device_t *dev, int old, int new )
         return 0;
 }
 
-int DRM(context_switch_complete)( drm_device_t *dev, int new )
+int drm_context_switch_complete(drm_device_t *dev, int new)
 {
         dev->last_context = new;  /* PRE/POST: This is the _only_ writer. */
 
@@ -236,18 +226,15 @@ int DRM(context_switch_complete)( drm_device_t *dev, int new )
         return 0;
 }
 
-int DRM(resctx)( DRM_IOCTL_ARGS )
+int drm_resctx(DRM_IOCTL_ARGS)
 {
 	drm_ctx_res_t res;
-	drm_ctx_t ctx;
 	int i;
 
 	DRM_COPY_FROM_USER_IOCTL( res, (drm_ctx_res_t *)data, sizeof(res) );
 
 	if ( res.count >= DRM_RESERVED_CONTEXTS ) {
-		bzero(&ctx, sizeof(ctx));
 		for ( i = 0 ; i < DRM_RESERVED_CONTEXTS ; i++ ) {
-			ctx.handle = i;
 			if ( DRM_COPY_TO_USER( &res.contexts[i],
 					   &i, sizeof(i) ) )
 				return DRM_ERR(EFAULT);
@@ -260,17 +247,17 @@ int DRM(resctx)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(addctx)( DRM_IOCTL_ARGS )
+int drm_addctx(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_ctx_t ctx;
 
 	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
-	ctx.handle = DRM(ctxbitmap_next)( dev );
+	ctx.handle = drm_ctxbitmap_next(dev);
 	if ( ctx.handle == DRM_KERNEL_CONTEXT ) {
 				/* Skip kernel's context and get a new one. */
-		ctx.handle = DRM(ctxbitmap_next)( dev );
+		ctx.handle = drm_ctxbitmap_next(dev);
 	}
 	DRM_DEBUG( "%d\n", ctx.handle );
 	if ( ctx.handle == -1 ) {
@@ -279,23 +266,24 @@ int DRM(addctx)( DRM_IOCTL_ARGS )
 		return DRM_ERR(ENOMEM);
 	}
 
-#ifdef DRIVER_CTX_CTOR
-	if ( ctx.handle != DRM_KERNEL_CONTEXT )
-		DRIVER_CTX_CTOR(ctx.handle); /* XXX: also pass dev ? */
-#endif
+	if (dev->context_ctor && ctx.handle != DRM_KERNEL_CONTEXT) {
+		DRM_LOCK();
+		dev->context_ctor(dev, ctx.handle);
+		DRM_UNLOCK();
+	}
 
 	DRM_COPY_TO_USER_IOCTL( (drm_ctx_t *)data, ctx, sizeof(ctx) );
 
 	return 0;
 }
 
-int DRM(modctx)( DRM_IOCTL_ARGS )
+int drm_modctx(DRM_IOCTL_ARGS)
 {
 	/* This does nothing */
 	return 0;
 }
 
-int DRM(getctx)( DRM_IOCTL_ARGS )
+int drm_getctx(DRM_IOCTL_ARGS)
 {
 	drm_ctx_t ctx;
 
@@ -309,7 +297,7 @@ int DRM(getctx)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(switchctx)( DRM_IOCTL_ARGS )
+int drm_switchctx(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_ctx_t ctx;
@@ -317,10 +305,10 @@ int DRM(switchctx)( DRM_IOCTL_ARGS )
 	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG( "%d\n", ctx.handle );
-	return DRM(context_switch)( dev, dev->last_context, ctx.handle );
+	return drm_context_switch(dev, dev->last_context, ctx.handle);
 }
 
-int DRM(newctx)( DRM_IOCTL_ARGS )
+int drm_newctx(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_ctx_t ctx;
@@ -328,12 +316,12 @@ int DRM(newctx)( DRM_IOCTL_ARGS )
 	DRM_COPY_FROM_USER_IOCTL( ctx, (drm_ctx_t *)data, sizeof(ctx) );
 
 	DRM_DEBUG( "%d\n", ctx.handle );
-	DRM(context_switch_complete)( dev, ctx.handle );
+	drm_context_switch_complete(dev, ctx.handle);
 
 	return 0;
 }
 
-int DRM(rmctx)( DRM_IOCTL_ARGS )
+int drm_rmctx(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_ctx_t ctx;
@@ -342,10 +330,13 @@ int DRM(rmctx)( DRM_IOCTL_ARGS )
 
 	DRM_DEBUG( "%d\n", ctx.handle );
 	if ( ctx.handle != DRM_KERNEL_CONTEXT ) {
-#ifdef DRIVER_CTX_DTOR
-		DRIVER_CTX_DTOR(ctx.handle); /* XXX: also pass dev ? */
-#endif
-		DRM(ctxbitmap_free)( dev, ctx.handle );
+		if (dev->context_dtor) {
+			DRM_LOCK();
+			dev->context_dtor(dev, ctx.handle);
+			DRM_UNLOCK();
+		}
+
+		drm_ctxbitmap_free(dev, ctx.handle);
 	}
 
 	return 0;
diff --git a/sys/dev/drm/drm_dma.h b/sys/dev/drm/drm_dma.c
index 9a0f2aa..21073b6 100644
--- a/sys/dev/drm/drm_dma.h
+++ b/sys/dev/drm/drm_dma.c
@@ -1,5 +1,6 @@
 /* drm_dma.c -- DMA IOCTL and function support -*- linux-c -*-
- * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com */
+ * Created: Fri Mar 19 14:30:16 1999 by faith@valinux.com
+ */
 /*-
  * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,22 +34,10 @@
 
 #include "dev/drm/drmP.h"
 
-#ifndef __HAVE_DMA_WAITQUEUE
-#define __HAVE_DMA_WAITQUEUE	0
-#endif
-#ifndef __HAVE_DMA_RECLAIM
-#define __HAVE_DMA_RECLAIM	0
-#endif
-#ifndef __HAVE_SHARED_IRQ
-#define __HAVE_SHARED_IRQ	0
-#endif
-
-#if __HAVE_DMA
-
-int DRM(dma_setup)( drm_device_t *dev )
+int drm_dma_setup(drm_device_t *dev)
 {
 
-	dev->dma = DRM(calloc)(1, sizeof(*dev->dma), DRM_MEM_DRIVER);
+	dev->dma = malloc(sizeof(*dev->dma), M_DRM, M_NOWAIT | M_ZERO);
 	if (dev->dma == NULL)
 		return DRM_ERR(ENOMEM);
 
@@ -57,7 +46,7 @@ int DRM(dma_setup)( drm_device_t *dev )
 	return 0;
 }
 
-void DRM(dma_takedown)(drm_device_t *dev)
+void drm_dma_takedown(drm_device_t *dev)
 {
 	drm_device_dma_t  *dma = dev->dma;
 	int		  i, j;
@@ -67,7 +56,6 @@ void DRM(dma_takedown)(drm_device_t *dev)
 
 				/* Clear dma buffers */
 	for (i = 0; i <= DRM_MAX_ORDER; i++) {
-#if __HAVE_PCI_DMA
 		if (dma->bufs[i].seg_count) {
 			DRM_DEBUG("order %d: buf_count = %d,"
 				  " seg_count = %d\n",
@@ -75,46 +63,32 @@ void DRM(dma_takedown)(drm_device_t *dev)
 				  dma->bufs[i].buf_count,
 				  dma->bufs[i].seg_count);
 			for (j = 0; j < dma->bufs[i].seg_count; j++) {
-				if (dma->bufs[i].seglist[j] != 0)
-					DRM(pci_free)(dev, dma->bufs[i].buf_size,
-					    (void *)dma->bufs[i].seglist[j],
-					    dma->bufs[i].seglist_bus[j]);
+				drm_pci_free(dev, dma->bufs[i].buf_size,
+				    (void *)dma->bufs[i].seglist[j],
+				    dma->bufs[i].seglist_bus[j]);
 			}
-			DRM(free)(dma->bufs[i].seglist,
-				  dma->bufs[i].seg_count
-				  * sizeof(*dma->bufs[0].seglist),
-				  DRM_MEM_SEGS);
-			DRM(free)(dma->bufs[i].seglist_bus,
-				  dma->bufs[i].seg_count
-				  * sizeof(*dma->bufs[0].seglist_bus),
-				  DRM_MEM_SEGS);
+			free(dma->bufs[i].seglist, M_DRM);
+			free(dma->bufs[i].seglist_bus, M_DRM);
 		}
-#endif /* __HAVE_PCI_DMA */
 
 	   	if (dma->bufs[i].buf_count) {
 		   	for (j = 0; j < dma->bufs[i].buf_count; j++) {
-				DRM(free)(dma->bufs[i].buflist[j].dev_private,
-					dma->bufs[i].buflist[j].dev_priv_size,
-					DRM_MEM_BUFS);
+				free(dma->bufs[i].buflist[j].dev_private,
+				    M_DRM);
 			}
-		   	DRM(free)(dma->bufs[i].buflist,
-				  dma->bufs[i].buf_count *
-				  sizeof(*dma->bufs[0].buflist),
-				  DRM_MEM_BUFS);
+		   	free(dma->bufs[i].buflist, M_DRM);
 		}
 	}
 
-	DRM(free)(dma->buflist, dma->buf_count * sizeof(*dma->buflist),
-	    DRM_MEM_BUFS);
-	DRM(free)(dma->pagelist, dma->page_count * sizeof(*dma->pagelist),
-	    DRM_MEM_PAGES);
-	DRM(free)(dev->dma, sizeof(*dev->dma), DRM_MEM_DRIVER);
+	free(dma->buflist, M_DRM);
+	free(dma->pagelist, M_DRM);
+	free(dev->dma, M_DRM);
 	dev->dma = NULL;
 	DRM_SPINUNINIT(dev->dma_lock);
 }
 
 
-void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
+void drm_free_buffer(drm_device_t *dev, drm_buf_t *buf)
 {
 	if (!buf) return;
 
@@ -123,8 +97,7 @@ void DRM(free_buffer)(drm_device_t *dev, drm_buf_t *buf)
 	buf->used     = 0;
 }
 
-#if !__HAVE_DMA_RECLAIM
-void DRM(reclaim_buffers)(drm_device_t *dev, DRMFILE filp)
+void drm_reclaim_buffers(drm_device_t *dev, DRMFILE filp)
 {
 	drm_device_dma_t *dma = dev->dma;
 	int		 i;
@@ -134,7 +107,7 @@ void DRM(reclaim_buffers)(drm_device_t *dev, DRMFILE filp)
 		if (dma->buflist[i]->filp == filp) {
 			switch (dma->buflist[i]->list) {
 			case DRM_LIST_NONE:
-				DRM(free_buffer)(dev, dma->buflist[i]);
+				drm_free_buffer(dev, dma->buflist[i]);
 				break;
 			case DRM_LIST_WAIT:
 				dma->buflist[i]->list = DRM_LIST_RECLAIM;
@@ -146,27 +119,16 @@ void DRM(reclaim_buffers)(drm_device_t *dev, DRMFILE filp)
 		}
 	}
 }
-#endif
 
-#if !__HAVE_IRQ
-/* This stub DRM_IOCTL_CONTROL handler is for the drivers that used to require
- * IRQs for DMA but no longer do.  It maintains compatibility with the X Servers
- * that try to use the control ioctl by simply returning success.
- */
-int DRM(control)( DRM_IOCTL_ARGS )
+/* Call into the driver-specific DMA handler */
+int drm_dma(DRM_IOCTL_ARGS)
 {
-	drm_control_t ctl;
-
-	DRM_COPY_FROM_USER_IOCTL( ctl, (drm_control_t *) data, sizeof(ctl) );
+	DRM_DEVICE;
 
-	switch ( ctl.func ) {
-	case DRM_INST_HANDLER:
-	case DRM_UNINST_HANDLER:
-		return 0;
-	default:
-		return DRM_ERR(EINVAL);
+	if (dev->dma_ioctl) {
+		return dev->dma_ioctl(kdev, cmd, data, flags, p, filp);
+	} else {
+		DRM_DEBUG("DMA ioctl on driver with no dma handler\n");
+		return EINVAL;
 	}
 }
-#endif
-
-#endif /* __HAVE_DMA */
diff --git a/sys/dev/drm/drm_drawable.h b/sys/dev/drm/drm_drawable.c
index d7381f1..43d71e8 100644
--- a/sys/dev/drm/drm_drawable.h
+++ b/sys/dev/drm/drm_drawable.c
@@ -1,5 +1,6 @@
 /* drm_drawable.h -- IOCTLs for drawables -*- linux-c -*-
- * Created: Tue Feb  2 08:37:54 1999 by faith@valinux.com */
+ * Created: Tue Feb  2 08:37:54 1999 by faith@valinux.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,7 +34,7 @@
 
 #include "dev/drm/drmP.h"
 
-int DRM(adddraw)( DRM_IOCTL_ARGS )
+int drm_adddraw(DRM_IOCTL_ARGS)
 {
 	drm_draw_t draw;
 
@@ -45,7 +46,7 @@ int DRM(adddraw)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(rmdraw)( DRM_IOCTL_ARGS )
+int drm_rmdraw(DRM_IOCTL_ARGS)
 {
 	return 0;		/* NOOP */
 }
diff --git a/sys/dev/drm/drm_drv.c b/sys/dev/drm/drm_drv.c
new file mode 100644
index 0000000..4f5831c
--- /dev/null
+++ b/sys/dev/drm/drm_drv.c
@@ -0,0 +1,916 @@
+/* drm_drv.h -- Generic driver template -*- linux-c -*-
+ * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com
+ */
+/*-
+ * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD$
+ */
+
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
+
+int drm_debug_flag = 0;
+
+static int drm_init(device_t nbdev);
+static void drm_cleanup(drm_device_t *dev);
+
+#ifdef __FreeBSD__
+#define DRIVER_SOFTC(unit) \
+	((drm_device_t *)devclass_get_softc(drm_devclass, unit))
+
+MODULE_VERSION(drm, 1);
+MODULE_DEPEND(drm, agp, 1, 1, 1);
+MODULE_DEPEND(drm, pci, 1, 1, 1);
+#if __FreeBSD_version > 502127
+MODULE_DEPEND(drm, mem, 1, 1, 1);
+#endif
+#endif /* __FreeBSD__ */
+
+#if defined(__NetBSD__) || defined(__OpenBSD__)
+#define DRIVER_SOFTC(unit) \
+	((drm_device_t *)device_lookup(&drm_cd, unit))
+#endif /* __NetBSD__ || __OpenBSD__ */
+
+static drm_ioctl_desc_t		  drm_ioctls[256] = {
+	[DRM_IOCTL_NR(DRM_IOCTL_VERSION)]       = { drm_version,     0, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)]    = { drm_getunique,   0, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)]     = { drm_getmagic,    0, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)]     = { drm_irq_by_busid, 0, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)]       = { drm_getmap,      0, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)]    = { drm_getclient,   0, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)]     = { drm_getstats,    0, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_SET_VERSION)]   = { drm_setversion,  0, 1 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)]    = { drm_setunique,   1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)]         = { drm_noop,        1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)]       = { drm_noop,        1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)]    = { drm_authmagic,   1, 1 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)]       = { drm_addmap,      1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)]        = { drm_rmmap,       1, 0 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { drm_setsareactx, 1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { drm_getsareactx, 1, 0 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)]       = { drm_addctx,      1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)]        = { drm_rmctx,       1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)]       = { drm_modctx,      1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)]       = { drm_getctx,      1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)]    = { drm_switchctx,   1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)]       = { drm_newctx,      1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)]       = { drm_resctx,      1, 0 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)]      = { drm_adddraw,     1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)]       = { drm_rmdraw,      1, 1 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_LOCK)]	        = { drm_lock,        1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)]        = { drm_unlock,      1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_FINISH)]        = { drm_noop,        1, 0 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)]      = { drm_addbufs,     1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)]     = { drm_markbufs,    1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)]     = { drm_infobufs,    1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)]      = { drm_mapbufs,     1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)]     = { drm_freebufs,    1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_DMA)]           = { drm_dma,         1, 0 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)]       = { drm_control,     1, 1 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)]   = { drm_agp_acquire, 1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)]   = { drm_agp_release, 1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)]    = { drm_agp_enable,  1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)]      = { drm_agp_info,    1, 0 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)]     = { drm_agp_alloc,   1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)]      = { drm_agp_free,    1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)]      = { drm_agp_bind,    1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)]    = { drm_agp_unbind,  1, 1 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)]      = { drm_sg_alloc,    1, 1 },
+	[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)]       = { drm_sg_free,     1, 1 },
+
+	[DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)]   = { drm_wait_vblank, 0, 0 },
+};
+
+const char *drm_find_description(int vendor, int device, drm_pci_id_list_t *idlist);
+
+#ifdef __FreeBSD__
+static struct cdevsw drm_cdevsw = {
+#if __FreeBSD_version >= 502103
+	.d_version =	D_VERSION,
+#endif
+	.d_open =	drm_open,
+	.d_close =	drm_close,
+	.d_read =	drm_read,
+	.d_ioctl =	drm_ioctl,
+	.d_poll =	drm_poll,
+	.d_mmap =	drm_mmap,
+	.d_name =	"drm",
+#if __FreeBSD_version >= 502103
+	.d_flags =	D_TRACKCLOSE | D_NEEDGIANT,
+#else
+	.d_maj =	145,
+	.d_flags =	D_TRACKCLOSE,
+#endif
+#if __FreeBSD_version < 500000
+	.d_bmaj =	-1
+#endif
+};
+
+int drm_probe(device_t dev, drm_pci_id_list_t *idlist)
+{
+	const char *s = NULL;
+	int vendor, device;
+
+	vendor = pci_get_vendor(dev);
+	device = pci_get_device(dev);
+
+	s = drm_find_description(vendor, device, idlist);
+	if (s != NULL) {
+		device_set_desc(dev, s);
+		return 0;
+	}
+
+	return ENXIO;
+}
+
+int drm_attach(device_t dev, drm_pci_id_list_t *idlist)
+{
+	return drm_init(dev);
+}
+
+int drm_detach(device_t dev)
+{
+	drm_cleanup(device_get_softc(dev));
+	return 0;
+}
+
+#ifndef DRM_DEV_NAME
+#define DRM_DEV_NAME "drm"
+#endif
+
+devclass_t drm_devclass;
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+
+static struct cdevsw drm_cdevsw = {
+	drm_open,
+	drm_close,
+	drm_read,
+	nowrite,
+	drm_ioctl,
+	nostop,
+	notty,
+	drm_poll,
+	drm_mmap,
+	nokqfilter,
+	D_TTY
+};
+
+int drm_refcnt = 0;
+
+#if defined(__NetBSD__) && __NetBSD_Version__ >= 106080000
+MOD_DEV("drm", DRIVER_NAME, NULL, -1, &drm_cdevsw, CDEV_MAJOR);
+#else
+MOD_DEV("drm", LM_DT_CHAR, CDEV_MAJOR, &drm_cdevsw);
+#endif
+
+int drm_lkmentry(struct lkm_table *lkmtp, int cmd, int ver);
+static int drm_lkmhandle(struct lkm_table *lkmtp, int cmd);
+
+int drm_modprobe();
+int drm_probe(struct pci_attach_args *pa);
+void drm_attach(struct pci_attach_args *pa, dev_t kdev);
+
+int drm_lkmentry(struct lkm_table *lkmtp, int cmd, int ver) {
+	DISPATCH(lkmtp, cmd, ver, drm_lkmhandle, drm_lkmhandle, drm_lkmhandle);
+}
+
+static int drm_lkmhandle(struct lkm_table *lkmtp, int cmd)
+{
+	int j, error = 0;
+#if defined(__NetBSD__) && (__NetBSD_Version__ > 106080000)
+	struct lkm_dev *args = lkmtp->private.lkm_dev;
+#endif
+
+	switch(cmd) {
+	case LKM_E_LOAD:
+		if (lkmexists(lkmtp))
+			return EEXIST;
+
+		if(drm_modprobe())
+			return 0;
+
+		return 1;
+
+	case LKM_E_UNLOAD:
+		if (drm_refcnt > 0)
+			return (EBUSY);
+		break;
+	case LKM_E_STAT:
+		break;
+
+	default:
+		error = EIO;
+		break;
+	}
+	
+	return error;
+}
+
+int drm_modprobe() {
+	struct pci_attach_args pa;
+	int error;
+
+	error = pci_find_device(&pa, drm_probe, idlist);
+	if (error != 0)
+		drm_attach(&pa, 0);
+
+	return error;
+}
+
+int drm_probe(struct pci_attach_args *pa, drm_pci_id_list_t idlist)
+{
+	const char *desc;
+
+	desc = drm_find_description(PCI_VENDOR(pa->pa_id),
+	    PCI_PRODUCT(pa->pa_id), idlist);
+	if (desc != NULL) {
+		return 1;
+	}
+
+	return 0;
+}
+
+void drm_attach(struct pci_attach_args *pa, dev_t kdev, 
+    drm_pci_id_list_t *idlist)
+{
+	int i;
+	drm_device_t *dev;
+
+	config_makeroom(kdev, &drm_cd);
+	drm_cd.cd_devs[(kdev)] = malloc(sizeof(drm_device_t), M_DRM, M_WAITOK);
+	dev = DRIVER_SOFTC(kdev);
+
+	memset(dev, 0, sizeof(drm_device_t));
+	memcpy(&dev->pa, pa, sizeof(dev->pa));
+
+	DRM_INFO("%s", drm_find_description(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id), idlist));
+	drm_init(dev);
+}
+
+int drm_detach(struct device *self, int flags)
+{
+	drm_cleanup((drm_device_t *)self);
+	return 0;
+}
+
+int drm_activate(struct device *self, enum devact act)
+{
+	switch (act) {
+	case DVACT_ACTIVATE:
+		return (EOPNOTSUPP);
+		break;
+
+	case DVACT_DEACTIVATE:
+		/* FIXME */
+		break;
+	}
+	return (0);
+}
+#endif /* __NetBSD__ || __OpenBSD__ */
+
+const char *drm_find_description(int vendor, int device, drm_pci_id_list_t *idlist) {
+	int i = 0;
+	
+	for (i = 0; idlist[i].vendor != 0; i++) {
+		if ((idlist[i].vendor == vendor) &&
+		    (idlist[i].device == device)) {
+			return idlist[i].name;
+		}
+	}
+	return NULL;
+}
+
+/* Initialize the DRM on first open. */
+static int drm_setup(drm_device_t *dev)
+{
+	int i;
+
+	DRM_SPINLOCK_ASSERT(&dev->dev_lock);
+
+	if (dev->presetup)
+		dev->presetup(dev);
+
+	dev->buf_use = 0;
+
+	if (dev->use_dma) {
+		i = drm_dma_setup(dev);
+		if (i != 0)
+			return i;
+	}
+
+	dev->counters  = 6;
+	dev->types[0]  = _DRM_STAT_LOCK;
+	dev->types[1]  = _DRM_STAT_OPENS;
+	dev->types[2]  = _DRM_STAT_CLOSES;
+	dev->types[3]  = _DRM_STAT_IOCTLS;
+	dev->types[4]  = _DRM_STAT_LOCKS;
+	dev->types[5]  = _DRM_STAT_UNLOCKS;
+
+	for ( i = 0 ; i < DRM_ARRAY_SIZE(dev->counts) ; i++ )
+		atomic_set( &dev->counts[i], 0 );
+
+	for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
+		dev->magiclist[i].head = NULL;
+		dev->magiclist[i].tail = NULL;
+	}
+
+	dev->lock.hw_lock = NULL;
+	dev->lock.lock_queue = 0;
+	dev->irq_enabled = 0;
+	dev->context_flag = 0;
+	dev->last_context = 0;
+	dev->if_version = 0;
+
+#ifdef __FreeBSD__
+	dev->buf_sigio = NULL;
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	dev->buf_pgid = 0;
+#endif
+
+	DRM_DEBUG( "\n" );
+
+	if (dev->postsetup)
+		dev->postsetup(dev);
+
+	return 0;
+}
+
+/* Free resources associated with the DRM on the last close. */
+static int drm_takedown(drm_device_t *dev)
+{
+	drm_magic_entry_t *pt, *next;
+	drm_local_map_t *map, *mapsave;
+	int i;
+
+	DRM_SPINLOCK_ASSERT(&dev->dev_lock);
+
+	DRM_DEBUG( "\n" );
+
+	if (dev->pretakedown != NULL)
+		dev->pretakedown(dev);
+
+	if (dev->irq_enabled)
+		drm_irq_uninstall(dev);
+
+	if ( dev->unique ) {
+		free(dev->unique, M_DRM);
+		dev->unique = NULL;
+		dev->unique_len = 0;
+	}
+				/* Clear pid list */
+	for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
+		for ( pt = dev->magiclist[i].head ; pt ; pt = next ) {
+			next = pt->next;
+			free(pt, M_DRM);
+		}
+		dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
+	}
+
+				/* Clear AGP information */
+	if ( dev->agp ) {
+		drm_agp_mem_t *entry;
+		drm_agp_mem_t *nexte;
+
+				/* Remove AGP resources, but leave dev->agp
+                                   intact until drm_cleanup is called. */
+		for ( entry = dev->agp->memory ; entry ; entry = nexte ) {
+			nexte = entry->next;
+			if ( entry->bound )
+				drm_agp_unbind_memory(entry->handle);
+			drm_agp_free_memory(entry->handle);
+			free(entry, M_DRM);
+		}
+		dev->agp->memory = NULL;
+
+		if (dev->agp->acquired)
+			drm_agp_do_release();
+
+		dev->agp->acquired = 0;
+		dev->agp->enabled  = 0;
+	}
+	if (dev->sg != NULL) {
+		drm_sg_cleanup(dev->sg);
+		dev->sg = NULL;
+	}
+
+	/* Clean up maps that weren't set up by the driver. */
+	TAILQ_FOREACH_SAFE(map, &dev->maplist, link, mapsave) {
+		if (!map->kernel_owned)
+			drm_remove_map(dev, map);
+	}
+
+	drm_dma_takedown(dev);
+	if ( dev->lock.hw_lock ) {
+		dev->lock.hw_lock = NULL; /* SHM removed */
+		dev->lock.filp = NULL;
+		DRM_WAKEUP_INT((void *)&dev->lock.lock_queue);
+	}
+
+	return 0;
+}
+
+/* linux: drm_init is called via init_module at module load time, or via
+ *        linux/init/main.c (this is not currently supported).
+ * bsd:   drm_init is called via the attach function per device.
+ */
+static int drm_init(device_t nbdev)
+{
+	int unit;
+	drm_device_t *dev;
+	int retcode;
+	DRM_DEBUG( "\n" );
+
+#ifdef __FreeBSD__
+	unit = device_get_unit(nbdev);
+	dev = device_get_softc(nbdev);
+
+	if (!strcmp(device_get_name(nbdev), "drmsub"))
+		dev->device = device_get_parent(nbdev);
+	else
+		dev->device = nbdev;
+
+	dev->devnode = make_dev(&drm_cdevsw,
+			unit,
+			DRM_DEV_UID,
+			DRM_DEV_GID,
+			DRM_DEV_MODE,
+			"dri/card%d", unit);
+#if __FreeBSD_version >= 500000
+	mtx_init(&dev->dev_lock, "drm device", NULL, MTX_DEF);
+#endif
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	dev = nbdev;
+	unit = minor(dev->device.dv_unit);
+#endif
+
+	dev->irq = pci_get_irq(dev->device);
+	/* XXX Fix domain number (alpha hoses) */
+	dev->pci_domain = 0;
+	dev->pci_bus = pci_get_bus(dev->device);
+	dev->pci_slot = pci_get_slot(dev->device);
+	dev->pci_func = pci_get_function(dev->device);
+
+	TAILQ_INIT(&dev->maplist);
+
+	drm_mem_init();
+#ifdef __FreeBSD__
+	drm_sysctl_init(dev);
+#endif
+	TAILQ_INIT(&dev->files);
+
+	if (dev->preinit != NULL) {
+		retcode = dev->preinit(dev, 0);
+		if (retcode != 0)
+			goto error;
+	}
+
+	if (dev->use_agp) {
+		if (drm_device_is_agp(dev))
+			dev->agp = drm_agp_init();
+		if (dev->require_agp && dev->agp == NULL) {
+			DRM_ERROR("Card isn't AGP, or couldn't initialize "
+			    "AGP.\n");
+			retcode = DRM_ERR(ENOMEM);
+			goto error;
+		}
+		if (dev->agp != NULL) {
+			if (drm_mtrr_add(dev->agp->info.ai_aperture_base,
+			    dev->agp->info.ai_aperture_size, DRM_MTRR_WC) == 0)
+				dev->agp->mtrr = 1;
+		}
+	}
+
+	retcode = drm_ctxbitmap_init(dev);
+	if (retcode != 0) {
+		DRM_ERROR("Cannot allocate memory for context bitmap.\n");
+		goto error;
+	}
+	
+	DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n",
+	  	dev->driver_name,
+	  	dev->driver_major,
+	  	dev->driver_minor,
+	  	dev->driver_patchlevel,
+	  	dev->driver_date,
+	  	unit );
+
+	if (dev->postinit != NULL)
+		dev->postinit(dev, 0);
+
+	return 0;
+
+error:
+#ifdef __FreeBSD__
+	drm_sysctl_cleanup(dev);
+#endif
+	DRM_LOCK();
+	drm_takedown(dev);
+	DRM_UNLOCK();
+#ifdef __FreeBSD__
+	destroy_dev(dev->devnode);
+#if __FreeBSD_version >= 500000
+	mtx_destroy(&dev->dev_lock);
+#endif
+#endif
+	return retcode;
+}
+
+/* linux: drm_cleanup is called via cleanup_module at module unload time.
+ * bsd:   drm_cleanup is called per device at module unload time.
+ * FIXME: NetBSD
+ */
+static void drm_cleanup(drm_device_t *dev)
+{
+	drm_local_map_t *map;
+
+	DRM_DEBUG( "\n" );
+
+#ifdef __FreeBSD__
+	drm_sysctl_cleanup(dev);
+	destroy_dev(dev->devnode);
+#endif
+
+	drm_ctxbitmap_cleanup(dev);
+
+	if (dev->agp && dev->agp->mtrr) {
+		int __unused retcode;
+
+		retcode = drm_mtrr_del(dev->agp->info.ai_aperture_base,
+		    dev->agp->info.ai_aperture_size, DRM_MTRR_WC);
+		DRM_DEBUG("mtrr_del = %d", retcode);
+	}
+
+	DRM_LOCK();
+	drm_takedown(dev);
+	DRM_UNLOCK();
+
+	/* Clean up any maps left over that had been allocated by the driver. */
+	while ((map = TAILQ_FIRST(&dev->maplist)) != NULL) {
+		drm_remove_map(dev, map);
+	}
+
+	if ( dev->agp ) {
+		drm_agp_uninit();
+		free(dev->agp, M_DRM);
+		dev->agp = NULL;
+	}
+
+	if (dev->postcleanup != NULL)
+		dev->postcleanup(dev);
+
+	drm_mem_uninit();
+#if defined(__FreeBSD__) &&  __FreeBSD_version >= 500000
+	mtx_destroy(&dev->dev_lock);
+#endif
+}
+
+
+int drm_version(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_version_t version;
+	int len;
+
+	DRM_COPY_FROM_USER_IOCTL( version, (drm_version_t *)data, sizeof(version) );
+
+#define DRM_COPY( name, value )						\
+	len = strlen( value );						\
+	if ( len > name##_len ) len = name##_len;			\
+	name##_len = strlen( value );					\
+	if ( len && name ) {						\
+		if ( DRM_COPY_TO_USER( name, value, len ) )		\
+			return DRM_ERR(EFAULT);				\
+	}
+
+	version.version_major = dev->driver_major;
+	version.version_minor = dev->driver_minor;
+	version.version_patchlevel = dev->driver_patchlevel;
+
+	DRM_COPY(version.name, dev->driver_name);
+	DRM_COPY(version.date, dev->driver_date);
+	DRM_COPY(version.desc, dev->driver_desc);
+
+	DRM_COPY_TO_USER_IOCTL( (drm_version_t *)data, version, sizeof(version) );
+
+	return 0;
+}
+
+int drm_open(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p)
+{
+	drm_device_t *dev = NULL;
+	int retcode = 0;
+
+	dev = DRIVER_SOFTC(minor(kdev));
+
+	DRM_DEBUG( "open_count = %d\n", dev->open_count );
+
+	retcode = drm_open_helper(kdev, flags, fmt, p, dev);
+
+	if ( !retcode ) {
+		atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
+		DRM_LOCK();
+#ifdef __FreeBSD__
+		device_busy(dev->device);
+#endif
+		if ( !dev->open_count++ )
+			retcode = drm_setup(dev);
+		DRM_UNLOCK();
+	}
+
+	return retcode;
+}
+
+int drm_close(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p)
+{
+	drm_file_t *priv;
+	DRM_DEVICE;
+	int retcode = 0;
+	DRMFILE filp = (void *)(uintptr_t)(DRM_CURRENTPID);
+	
+	DRM_DEBUG( "open_count = %d\n", dev->open_count );
+
+	DRM_LOCK();
+
+	priv = drm_find_file_by_proc(dev, p);
+	if (!priv) {
+		DRM_UNLOCK();
+		DRM_ERROR("can't find authenticator\n");
+		return EINVAL;
+	}
+
+	if (dev->prerelease != NULL)
+		dev->prerelease(dev, filp);
+
+	/* ========================================================
+	 * Begin inline drm_release
+	 */
+
+#ifdef __FreeBSD__
+	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
+		   DRM_CURRENTPID, (long)dev->device, dev->open_count );
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
+		   DRM_CURRENTPID, (long)&dev->device, dev->open_count);
+#endif
+
+	if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
+	    && dev->lock.filp == filp) {
+		DRM_DEBUG("Process %d dead, freeing lock for context %d\n",
+			  DRM_CURRENTPID,
+			  _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+		if (dev->release != NULL)
+			dev->release(dev, filp);
+
+		drm_lock_free(dev, &dev->lock.hw_lock->lock,
+		    _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
+		
+				/* FIXME: may require heavy-handed reset of
+                                   hardware at this point, possibly
+                                   processed via a callback to the X
+                                   server. */
+	} else if (dev->release != NULL && dev->lock.hw_lock != NULL) {
+		/* The lock is required to reclaim buffers */
+		for (;;) {
+			if ( !dev->lock.hw_lock ) {
+				/* Device has been unregistered */
+				retcode = DRM_ERR(EINTR);
+				break;
+			}
+			if (drm_lock_take(&dev->lock.hw_lock->lock,
+			    DRM_KERNEL_CONTEXT)) {
+				dev->lock.filp = filp;
+				dev->lock.lock_time = jiffies;
+                                atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
+				break;	/* Got lock */
+			}
+				/* Contention */
+#if defined(__FreeBSD__) && __FreeBSD_version > 500000
+			retcode = msleep((void *)&dev->lock.lock_queue,
+			    &dev->dev_lock, PZERO | PCATCH, "drmlk2", 0);
+#else
+			retcode = tsleep((void *)&dev->lock.lock_queue,
+			    PZERO | PCATCH, "drmlk2", 0);
+#endif
+			if (retcode)
+				break;
+		}
+		if (retcode == 0) {
+			dev->release(dev, filp);
+			drm_lock_free(dev, &dev->lock.hw_lock->lock,
+			    DRM_KERNEL_CONTEXT);
+		}
+	}
+
+	if (dev->use_dma)
+		drm_reclaim_buffers(dev, (void *)(uintptr_t)priv->pid);
+
+#if defined (__FreeBSD__) && (__FreeBSD_version >= 500000)
+	funsetown(&dev->buf_sigio);
+#elif defined(__FreeBSD__)
+	funsetown(dev->buf_sigio);
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	dev->buf_pgid = 0;
+#endif /* __NetBSD__  || __OpenBSD__ */
+
+	if (--priv->refs == 0) {
+		if (dev->free_filp_priv != NULL)
+			dev->free_filp_priv(dev, priv);
+		TAILQ_REMOVE(&dev->files, priv, link);
+		free(priv, M_DRM);
+	}
+
+	/* ========================================================
+	 * End inline drm_release
+	 */
+
+	atomic_inc( &dev->counts[_DRM_STAT_CLOSES] );
+#ifdef __FreeBSD__
+	device_unbusy(dev->device);
+#endif
+	if (--dev->open_count == 0) {
+		retcode = drm_takedown(dev);
+	}
+
+	DRM_UNLOCK();
+	
+	return retcode;
+}
+
+/* drm_ioctl is called whenever a process performs an ioctl on /dev/drm.
+ */
+int drm_ioctl(struct cdev *kdev, u_long cmd, caddr_t data, int flags, 
+    DRM_STRUCTPROC *p)
+{
+	DRM_DEVICE;
+	int retcode = 0;
+	drm_ioctl_desc_t *ioctl;
+	int (*func)(DRM_IOCTL_ARGS);
+	int nr = DRM_IOCTL_NR(cmd);
+	int is_driver_ioctl = 0;
+	drm_file_t *priv;
+	DRMFILE filp = (DRMFILE)(uintptr_t)DRM_CURRENTPID;
+
+	DRM_LOCK();
+	priv = drm_find_file_by_proc(dev, p);
+	DRM_UNLOCK();
+	if (priv == NULL) {
+		DRM_ERROR("can't find authenticator\n");
+		return EINVAL;
+	}
+
+	atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
+	++priv->ioctl_count;
+
+#ifdef __FreeBSD__
+	DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
+		 DRM_CURRENTPID, cmd, nr, (long)dev->device, priv->authenticated );
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
+		 DRM_CURRENTPID, cmd, nr, (long)&dev->device, priv->authenticated );
+#endif
+
+	switch (cmd) {
+	case FIONBIO:
+	case FIOASYNC:
+		return 0;
+
+#ifdef __FreeBSD__
+	case FIOSETOWN:
+		return fsetown(*(int *)data, &dev->buf_sigio);
+
+	case FIOGETOWN:
+#if (__FreeBSD_version >= 500000)
+		*(int *) data = fgetown(&dev->buf_sigio);
+#else
+		*(int *) data = fgetown(dev->buf_sigio);
+#endif
+		return 0;
+#endif /* __FreeBSD__ */
+#if defined(__NetBSD__) || defined(__OpenBSD__)
+	case TIOCSPGRP:
+		dev->buf_pgid = *(int *)data;
+		return 0;
+
+	case TIOCGPGRP:
+		*(int *)data = dev->buf_pgid;
+		return 0;
+#endif /* __NetBSD__ */
+	}
+
+	if (IOCGROUP(cmd) != DRM_IOCTL_BASE) {
+		DRM_DEBUG("Bad ioctl group 0x%x\n", (int)IOCGROUP(cmd));
+		return EINVAL;
+	}
+
+	ioctl = &drm_ioctls[nr];
+	/* It's not a core DRM ioctl, try driver-specific. */
+	if (ioctl->func == NULL && nr >= DRM_COMMAND_BASE) {
+		/* The array entries begin at DRM_COMMAND_BASE ioctl nr */
+		nr -= DRM_COMMAND_BASE;
+		if (nr > dev->max_driver_ioctl) {
+			DRM_DEBUG("Bad driver ioctl number, 0x%x (of 0x%x)\n",
+			    nr, dev->max_driver_ioctl);
+			return EINVAL;
+		}
+		ioctl = &dev->driver_ioctls[nr];
+		is_driver_ioctl = 1;
+	}
+	func = ioctl->func;
+
+	if (func == NULL) {
+		DRM_DEBUG( "no function\n" );
+		return EINVAL;
+	}
+	if ((ioctl->root_only && DRM_SUSER(p)) || (ioctl->auth_needed &&
+	    !priv->authenticated))
+		return EACCES;
+
+	if (is_driver_ioctl)
+		DRM_LOCK();
+	retcode = func(kdev, cmd, data, flags, p, filp);
+	if (is_driver_ioctl)
+		DRM_UNLOCK();
+
+	if (retcode != 0)
+		DRM_DEBUG("    returning %d\n", retcode);
+
+	return DRM_ERR(retcode);
+}
+
+
+#if DRM_LINUX
+
+#include <sys/sysproto.h>
+
+MODULE_DEPEND(DRIVER_NAME, linux, 1, 1, 1);
+
+#define LINUX_IOCTL_DRM_MIN		0x6400
+#define LINUX_IOCTL_DRM_MAX		0x64ff
+
+static linux_ioctl_function_t drm_linux_ioctl;
+static struct linux_ioctl_handler drm_handler = {drm_linux_ioctl, 
+    LINUX_IOCTL_DRM_MIN, LINUX_IOCTL_DRM_MAX};
+
+SYSINIT(drm_register, SI_SUB_KLD, SI_ORDER_MIDDLE, 
+    linux_ioctl_register_handler, &drm_handler);
+SYSUNINIT(drm_unregister, SI_SUB_KLD, SI_ORDER_MIDDLE, 
+    linux_ioctl_unregister_handler, &drm_handler);
+
+/* The bits for in/out are switched on Linux */
+#define LINUX_IOC_IN	IOC_OUT
+#define LINUX_IOC_OUT	IOC_IN
+
+static int
+drm_linux_ioctl(DRM_STRUCTPROC *p, struct linux_ioctl_args* args)
+{
+	int error;
+	int cmd = args->cmd;
+
+	args->cmd &= ~(LINUX_IOC_IN | LINUX_IOC_OUT);
+	if (cmd & LINUX_IOC_IN)
+		args->cmd |= IOC_IN;
+	if (cmd & LINUX_IOC_OUT)
+		args->cmd |= IOC_OUT;
+	
+	error = ioctl(p, (struct ioctl_args *)args);
+
+	return error;
+}
+#endif /* DRM_LINUX */
diff --git a/sys/dev/drm/drm_drv.h b/sys/dev/drm/drm_drv.h
deleted file mode 100644
index 59bf0c8..0000000
--- a/sys/dev/drm/drm_drv.h
+++ /dev/null
@@ -1,1155 +0,0 @@
-/* drm_drv.h -- Generic driver template -*- linux-c -*-
- * Created: Thu Nov 23 03:10:50 2000 by gareth@valinux.com */
-/*-
- * Copyright 1999, 2000 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Rickard E. (Rik) Faith <faith@valinux.com>
- *    Gareth Hughes <gareth@valinux.com>
- *
- * $FreeBSD$
- */
-
-/*
- * To use this template, you must at least define the following (samples
- * given for the MGA driver):
- *
- * #define DRIVER_AUTHOR	"VA Linux Systems, Inc."
- *
- * #define DRIVER_NAME		"mga"
- * #define DRIVER_DESC		"Matrox G200/G400"
- * #define DRIVER_DATE		"20001127"
- *
- * #define DRIVER_MAJOR		2
- * #define DRIVER_MINOR		0
- * #define DRIVER_PATCHLEVEL	2
- *
- * #define DRIVER_IOCTL_COUNT	DRM_ARRAY_SIZE( mga_ioctls )
- *
- * #define DRM(x)		mga_##x
- */
-
-#ifndef __MUST_HAVE_AGP
-#define __MUST_HAVE_AGP			0
-#endif
-#ifndef __HAVE_CTX_BITMAP
-#define __HAVE_CTX_BITMAP		0
-#endif
-#ifndef __HAVE_IRQ
-#define __HAVE_IRQ			0
-#endif
-#ifndef __HAVE_DMA_QUEUE
-#define __HAVE_DMA_QUEUE		0
-#endif
-#ifndef __HAVE_DMA_SCHEDULE
-#define __HAVE_DMA_SCHEDULE		0
-#endif
-#ifndef __HAVE_DMA_QUIESCENT
-#define __HAVE_DMA_QUIESCENT		0
-#endif
-#ifndef __HAVE_RELEASE
-#define __HAVE_RELEASE			0
-#endif
-#ifndef __HAVE_COUNTERS
-#define __HAVE_COUNTERS			0
-#endif
-#ifndef __HAVE_SG
-#define __HAVE_SG			0
-#endif
-
-#ifndef DRIVER_PREINIT
-#define DRIVER_PREINIT(dev) do {} while (0)
-#endif
-#ifndef DRIVER_POSTINIT
-#define DRIVER_POSTINIT(dev) do {} while (0)
-#endif
-#ifndef DRIVER_PRERELEASE
-#define DRIVER_PRERELEASE()
-#endif
-#ifndef DRIVER_PRETAKEDOWN
-#define DRIVER_PRETAKEDOWN(dev)
-#endif
-#ifndef DRIVER_POSTCLEANUP
-#define DRIVER_POSTCLEANUP()
-#endif
-#ifndef DRIVER_PRESETUP
-#define DRIVER_PRESETUP()
-#endif
-#ifndef DRIVER_POSTSETUP
-#define DRIVER_POSTSETUP()
-#endif
-#ifndef DRIVER_IOCTLS
-#define DRIVER_IOCTLS
-#endif
-#ifndef DRIVER_OPEN_HELPER
-#define DRIVER_OPEN_HELPER( priv, dev )
-#endif
-#ifndef DRIVER_FOPS
-#endif
-
-#if 1 && DRM_DEBUG_CODE
-int DRM(flags) = DRM_FLAG_DEBUG;
-#else
-int DRM(flags) = 0;
-#endif
-
-static int DRM(init)(device_t nbdev);
-static void DRM(cleanup)(drm_device_t *dev);
-
-#ifdef __FreeBSD__
-#define DRIVER_SOFTC(unit) \
-	((drm_device_t *) devclass_get_softc(DRM(devclass), unit))
-
-#if __REALLY_HAVE_AGP
-MODULE_DEPEND(DRIVER_NAME, agp, 1, 1, 1);
-#endif
-MODULE_DEPEND(DRIVER_NAME, mem, 1, 1, 1);
-#endif /* __FreeBSD__ */
-
-#ifdef __NetBSD__
-#define DRIVER_SOFTC(unit) \
-	((drm_device_t *) device_lookup(&DRM(cd), unit))
-#endif /* __NetBSD__ */
-
-static drm_ioctl_desc_t		  DRM(ioctls)[] = {
-	[DRM_IOCTL_NR(DRM_IOCTL_VERSION)]       = { DRM(version),     0, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_UNIQUE)]    = { DRM(getunique),   0, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_MAGIC)]     = { DRM(getmagic),    0, 0 },
-#if __HAVE_IRQ
-	[DRM_IOCTL_NR(DRM_IOCTL_IRQ_BUSID)]     = { DRM(irq_by_busid), 0, 1 },
-#endif
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_MAP)]       = { DRM(getmap),      0, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_CLIENT)]    = { DRM(getclient),   0, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_STATS)]     = { DRM(getstats),    0, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_SET_VERSION)]   = { DRM(setversion),  0, 1 },
-
-	[DRM_IOCTL_NR(DRM_IOCTL_SET_UNIQUE)]    = { DRM(setunique),   1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_BLOCK)]         = { DRM(noop),        1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_UNBLOCK)]       = { DRM(noop),        1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AUTH_MAGIC)]    = { DRM(authmagic),   1, 1 },
-
-	[DRM_IOCTL_NR(DRM_IOCTL_ADD_MAP)]       = { DRM(addmap),      1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_RM_MAP)]        = { DRM(rmmap),       1, 0 },
-
-#if __HAVE_CTX_BITMAP
-	[DRM_IOCTL_NR(DRM_IOCTL_SET_SAREA_CTX)] = { DRM(setsareactx), 1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_SAREA_CTX)] = { DRM(getsareactx), 1, 0 },
-#endif
-
-	[DRM_IOCTL_NR(DRM_IOCTL_ADD_CTX)]       = { DRM(addctx),      1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_RM_CTX)]        = { DRM(rmctx),       1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_MOD_CTX)]       = { DRM(modctx),      1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_GET_CTX)]       = { DRM(getctx),      1, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_SWITCH_CTX)]    = { DRM(switchctx),   1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_NEW_CTX)]       = { DRM(newctx),      1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_RES_CTX)]       = { DRM(resctx),      1, 0 },
-
-	[DRM_IOCTL_NR(DRM_IOCTL_ADD_DRAW)]      = { DRM(adddraw),     1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_RM_DRAW)]       = { DRM(rmdraw),      1, 1 },
-
-	[DRM_IOCTL_NR(DRM_IOCTL_LOCK)]	        = { DRM(lock),        1, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_UNLOCK)]        = { DRM(unlock),      1, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_FINISH)]        = { DRM(noop),        1, 0 },
-
-#if __HAVE_DMA
-	[DRM_IOCTL_NR(DRM_IOCTL_ADD_BUFS)]      = { DRM(addbufs),     1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_MARK_BUFS)]     = { DRM(markbufs),    1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_INFO_BUFS)]     = { DRM(infobufs),    1, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_MAP_BUFS)]      = { DRM(mapbufs),     1, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_FREE_BUFS)]     = { DRM(freebufs),    1, 0 },
-	/* The DRM_IOCTL_DMA ioctl should be defined by the driver. */
-#endif
-#if __HAVE_IRQ || __HAVE_DMA
-	[DRM_IOCTL_NR(DRM_IOCTL_CONTROL)]       = { DRM(control),     1, 1 },
-#endif
-
-#if __REALLY_HAVE_AGP
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ACQUIRE)]   = { DRM(agp_acquire), 1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_RELEASE)]   = { DRM(agp_release), 1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ENABLE)]    = { DRM(agp_enable),  1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_INFO)]      = { DRM(agp_info),    1, 0 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_ALLOC)]     = { DRM(agp_alloc),   1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_FREE)]      = { DRM(agp_free),    1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_BIND)]      = { DRM(agp_bind),    1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_AGP_UNBIND)]    = { DRM(agp_unbind),  1, 1 },
-#endif
-
-#if __HAVE_SG
-	[DRM_IOCTL_NR(DRM_IOCTL_SG_ALLOC)]      = { DRM(sg_alloc),    1, 1 },
-	[DRM_IOCTL_NR(DRM_IOCTL_SG_FREE)]       = { DRM(sg_free),     1, 1 },
-#endif
-
-#if __HAVE_VBL_IRQ
-	[DRM_IOCTL_NR(DRM_IOCTL_WAIT_VBLANK)]   = { DRM(wait_vblank), 0, 0 },
-#endif
-
-	DRIVER_IOCTLS
-};
-
-#define DRIVER_IOCTL_COUNT	DRM_ARRAY_SIZE( DRM(ioctls) )
-
-const char *DRM(find_description)(int vendor, int device);
-
-#ifdef __FreeBSD__
-static struct cdevsw DRM(cdevsw) = {
-#if __FreeBSD_version >= 502103
-	.d_version =	D_VERSION,
-#endif
-	.d_open =	DRM( open ),
-	.d_close =	DRM( close ),
-	.d_read =	DRM( read ),
-	.d_ioctl =	DRM( ioctl ),
-	.d_poll =	DRM( poll ),
-	.d_mmap =	DRM( mmap ),
-	.d_name =	DRIVER_NAME,
-#if __FreeBSD_version >= 502103
-	.d_flags =	D_TRACKCLOSE | D_NEEDGIANT,
-#else
-	.d_maj =	145,
-	.d_flags =	D_TRACKCLOSE,
-#endif
-#if __FreeBSD_version < 500000
-	.d_bmaj =	-1
-#endif
-};
-
-#include "dev/drm/drm_pciids.h"
-
-static drm_pci_id_list_t DRM(pciidlist)[] = {
-	DRM(PCI_IDS)
-};
-
-static int DRM(probe)(device_t dev)
-{
-	const char *s = NULL;
-	int pciid, vendor, device;
-
-	/* XXX: Cope with agp bridge device? */
-	if (!strcmp(device_get_name(dev), "drmsub"))
-		pciid = pci_get_devid(device_get_parent(dev));
-	else
-		pciid = pci_get_devid(dev);
-
-	vendor = (pciid & 0x0000ffff);
-	device = (pciid & 0xffff0000) >> 16;
-	
-	s = DRM(find_description)(vendor, device);
-	if (s != NULL) {
-		device_set_desc(dev, s);
-		return 0;
-	}
-
-	return ENXIO;
-}
-
-static int DRM(attach)(device_t dev)
-{
-	return DRM(init)(dev);
-}
-
-static int DRM(detach)(device_t dev)
-{
-	DRM(cleanup)(device_get_softc(dev));
-	return 0;
-}
-static device_method_t DRM(methods)[] = {
-	/* Device interface */
-	DEVMETHOD(device_probe,		DRM(probe)),
-	DEVMETHOD(device_attach,	DRM(attach)),
-	DEVMETHOD(device_detach,	DRM(detach)),
-
-	{ 0, 0 }
-};
-
-static driver_t DRM(driver) = {
-	"drm",
-	DRM(methods),
-	sizeof(drm_device_t),
-};
-
-static devclass_t DRM(devclass);
-
-#elif defined(__NetBSD__)
-
-static struct cdevsw DRM(cdevsw) = {
-	DRM(open),
-	DRM(close),
-	DRM(read),
-	nowrite,
-	DRM(ioctl),
-	nostop,
-	notty,
-	DRM(poll),
-	DRM(mmap),
-	nokqfilter,
-	D_TTY
-};
-
-int DRM(refcnt) = 0;
-#if __NetBSD_Version__ >= 106080000
-MOD_DEV( DRIVER_NAME, DRIVER_NAME, NULL, -1, &DRM(cdevsw), CDEV_MAJOR);
-#else
-MOD_DEV( DRIVER_NAME, LM_DT_CHAR, CDEV_MAJOR, &DRM(cdevsw) );
-#endif
-
-int DRM(lkmentry)(struct lkm_table *lkmtp, int cmd, int ver);
-static int DRM(lkmhandle)(struct lkm_table *lkmtp, int cmd);
-
-int DRM(modprobe)();
-int DRM(probe)(struct pci_attach_args *pa);
-void DRM(attach)(struct pci_attach_args *pa, dev_t kdev);
-
-int DRM(lkmentry)(struct lkm_table *lkmtp, int cmd, int ver) {
-	DISPATCH(lkmtp, cmd, ver, DRM(lkmhandle), DRM(lkmhandle), DRM(lkmhandle));
-}
-
-static int DRM(lkmhandle)(struct lkm_table *lkmtp, int cmd)
-{
-	int j, error = 0;
-#if defined(__NetBSD__) && (__NetBSD_Version__ > 106080000)
-	struct lkm_dev *args = lkmtp->private.lkm_dev;
-#endif
-
-	switch(cmd) {
-	case LKM_E_LOAD:
-		if (lkmexists(lkmtp))
-			return EEXIST;
-
-		if(DRM(modprobe)())
-			return 0;
-
-		return 1;
-
-	case LKM_E_UNLOAD:
-		if (DRM(refcnt) > 0)
-			return (EBUSY);
-		break;
-	case LKM_E_STAT:
-		break;
-
-	default:
-		error = EIO;
-		break;
-	}
-	
-	return error;
-}
-
-int DRM(modprobe)() {
-	struct pci_attach_args pa;
-	int error = 0;
-	if((error = pci_find_device(&pa, DRM(probe))) != 0)
-		DRM(attach)(&pa, 0);
-
-	return error;
-}
-
-int DRM(probe)(struct pci_attach_args *pa)
-{
-	const char *desc;
-
-	desc = DRM(find_description)(PCI_VENDOR(pa->pa_id),
-	    PCI_PRODUCT(pa->pa_id));
-	if (desc != NULL) {
-		return 1;
-	}
-
-	return 0;
-}
-
-void DRM(attach)(struct pci_attach_args *pa, dev_t kdev)
-{
-	int i;
-	drm_device_t *dev;
-
-	config_makeroom(kdev, &DRM(cd));
-	DRM(cd).cd_devs[(kdev)] = DRM(alloc)(sizeof(drm_device_t),
-	    DRM_MEM_DRIVER);
-	dev = DRIVER_SOFTC(kdev);
-
-	memset(dev, 0, sizeof(drm_device_t));
-	memcpy(&dev->pa, pa, sizeof(dev->pa));
-
-	DRM_INFO("%s", DRM(find_description)(PCI_VENDOR(pa->pa_id), PCI_PRODUCT(pa->pa_id)));
-	DRM(init)(dev);
-}
-
-int DRM(detach)(struct device *self, int flags)
-{
-	DRM(cleanup)((drm_device_t *)self);
-	return 0;
-}
-
-int DRM(activate)(struct device *self, enum devact act)
-{
-	switch (act) {
-	case DVACT_ACTIVATE:
-		return (EOPNOTSUPP);
-		break;
-
-	case DVACT_DEACTIVATE:
-		/* FIXME */
-		break;
-	}
-	return (0);
-}
-#endif /* __NetBSD__ */
-
-const char *DRM(find_description)(int vendor, int device) {
-	int i = 0;
-	
-	for (i = 0; DRM(pciidlist)[i].vendor != 0; i++) {
-		if ((DRM(pciidlist)[i].vendor == vendor) &&
-		    (DRM(pciidlist)[i].device == device)) {
-			return DRM(pciidlist)[i].name;
-		}
-	}
-	return NULL;
-}
-
-/* Initialize the DRM on first open. */
-static int DRM(setup)( drm_device_t *dev )
-{
-	int i;
-
-	DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
-	DRIVER_PRESETUP();
-	dev->buf_use = 0;
-
-#if __HAVE_DMA
-	i = DRM(dma_setup)( dev );
-	if ( i != 0 )
-		return i;
-#endif
-
-	dev->counters  = 6 + __HAVE_COUNTERS;
-	dev->types[0]  = _DRM_STAT_LOCK;
-	dev->types[1]  = _DRM_STAT_OPENS;
-	dev->types[2]  = _DRM_STAT_CLOSES;
-	dev->types[3]  = _DRM_STAT_IOCTLS;
-	dev->types[4]  = _DRM_STAT_LOCKS;
-	dev->types[5]  = _DRM_STAT_UNLOCKS;
-#ifdef __HAVE_COUNTER6
-	dev->types[6]  = __HAVE_COUNTER6;
-#endif
-#ifdef __HAVE_COUNTER7
-	dev->types[7]  = __HAVE_COUNTER7;
-#endif
-#ifdef __HAVE_COUNTER8
-	dev->types[8]  = __HAVE_COUNTER8;
-#endif
-#ifdef __HAVE_COUNTER9
-	dev->types[9]  = __HAVE_COUNTER9;
-#endif
-#ifdef __HAVE_COUNTER10
-	dev->types[10] = __HAVE_COUNTER10;
-#endif
-#ifdef __HAVE_COUNTER11
-	dev->types[11] = __HAVE_COUNTER11;
-#endif
-#ifdef __HAVE_COUNTER12
-	dev->types[12] = __HAVE_COUNTER12;
-#endif
-#ifdef __HAVE_COUNTER13
-	dev->types[13] = __HAVE_COUNTER13;
-#endif
-#ifdef __HAVE_COUNTER14
-	dev->types[14] = __HAVE_COUNTER14;
-#endif
-#ifdef __HAVE_COUNTER15
-	dev->types[14] = __HAVE_COUNTER14;
-#endif
-
-	for ( i = 0 ; i < DRM_ARRAY_SIZE(dev->counts) ; i++ )
-		atomic_set( &dev->counts[i], 0 );
-
-	for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
-		dev->magiclist[i].head = NULL;
-		dev->magiclist[i].tail = NULL;
-	}
-
-	dev->lock.hw_lock = NULL;
-	dev->lock.lock_queue = 0;
-	dev->irq_enabled = 0;
-	dev->context_flag = 0;
-	dev->last_context = 0;
-	dev->if_version = 0;
-
-#ifdef __FreeBSD__
-	dev->buf_sigio = NULL;
-#elif defined(__NetBSD__)
-	dev->buf_pgid = 0;
-#endif
-
-	DRM_DEBUG( "\n" );
-
-	DRIVER_POSTSETUP();
-	return 0;
-}
-
-/* Free resources associated with the DRM on the last close. */
-static int DRM(takedown)( drm_device_t *dev )
-{
-	drm_magic_entry_t *pt, *next;
-	drm_local_map_t *map;
-	drm_map_list_entry_t *list;
-	int i;
-
-	DRM_SPINLOCK_ASSERT(&dev->dev_lock);
-
-	DRM_DEBUG( "\n" );
-
-	DRIVER_PRETAKEDOWN(dev);
-#if __HAVE_IRQ
-	if (dev->irq_enabled)
-		DRM(irq_uninstall)( dev );
-#endif
-
-	if ( dev->unique ) {
-		DRM(free)( dev->unique, strlen( dev->unique ) + 1,
-			   DRM_MEM_DRIVER );
-		dev->unique = NULL;
-		dev->unique_len = 0;
-	}
-				/* Clear pid list */
-	for ( i = 0 ; i < DRM_HASH_SIZE ; i++ ) {
-		for ( pt = dev->magiclist[i].head ; pt ; pt = next ) {
-			next = pt->next;
-			DRM(free)( pt, sizeof(*pt), DRM_MEM_MAGIC );
-		}
-		dev->magiclist[i].head = dev->magiclist[i].tail = NULL;
-	}
-
-#if __REALLY_HAVE_AGP
-				/* Clear AGP information */
-	if ( dev->agp ) {
-		drm_agp_mem_t *entry;
-		drm_agp_mem_t *nexte;
-
-				/* Remove AGP resources, but leave dev->agp
-                                   intact until DRM(cleanup) is called. */
-		for ( entry = dev->agp->memory ; entry ; entry = nexte ) {
-			nexte = entry->next;
-			if ( entry->bound ) DRM(unbind_agp)( entry->handle );
-			DRM(free_agp)( entry->handle, entry->pages );
-			DRM(free)( entry, sizeof(*entry), DRM_MEM_AGPLISTS );
-		}
-		dev->agp->memory = NULL;
-
-		if ( dev->agp->acquired ) DRM(agp_do_release)();
-
-		dev->agp->acquired = 0;
-		dev->agp->enabled  = 0;
-	}
-#endif
-#if __REALLY_HAVE_SG
-	if (dev->sg != NULL) {
-		DRM(sg_cleanup)(dev->sg);
-		dev->sg = NULL;
-	}
-#endif
-
-	if (dev->maplist != NULL) {
-		while ((list=TAILQ_FIRST(dev->maplist))) {
-			map = list->map;
-			switch ( map->type ) {
-			case _DRM_REGISTERS:
-				DRM(ioremapfree)(map);
-				/* FALLTHROUGH */
-			case _DRM_FRAME_BUFFER:
-#if __REALLY_HAVE_MTRR
-				if (map->mtrr) {
-					int __unused retcode;
-
-					retcode = DRM(mtrr_del)(map->offset,
-					    map->size, DRM_MTRR_WC);
-					DRM_DEBUG("mtrr_del = %d", retcode);
-				}
-#endif
-				break;
-			case _DRM_SHM:
-				DRM(free)(map->handle,
-					       map->size,
-					       DRM_MEM_SAREA);
-				break;
-
-			case _DRM_AGP:
-			case _DRM_SCATTER_GATHER:
-				/* Do nothing here, because this is all
-				 * handled in the AGP/GART/SG functions.
-				 */
-				break;
-			}
-			TAILQ_REMOVE(dev->maplist, list, link);
-			DRM(free)(list, sizeof(*list), DRM_MEM_MAPS);
-			DRM(free)(map, sizeof(*map), DRM_MEM_MAPS);
-		}
- 	}
-
-#if __HAVE_DMA
-	DRM(dma_takedown)( dev );
-#endif
-	if ( dev->lock.hw_lock ) {
-		dev->lock.hw_lock = NULL; /* SHM removed */
-		dev->lock.filp = NULL;
-		DRM_WAKEUP_INT((void *)&dev->lock.lock_queue);
-	}
-
-	return 0;
-}
-
-/* linux: drm_init is called via init_module at module load time, or via
- *        linux/init/main.c (this is not currently supported).
- * bsd:   drm_init is called via the attach function per device.
- */
-static int DRM(init)( device_t nbdev )
-{
-	int unit;
-#ifdef __FreeBSD__
-	drm_device_t *dev;
-#elif defined(__NetBSD__)
-	drm_device_t *dev = nbdev;
-#endif
-#if __HAVE_CTX_BITMAP
-	int retcode;
-#endif
-	DRM_DEBUG( "\n" );
-	DRIVER_PREINIT(dev);
-
-#ifdef __FreeBSD__
-	unit = device_get_unit(nbdev);
-	dev = device_get_softc(nbdev);
-	memset( (void *)dev, 0, sizeof(*dev) );
-
-	if (!strcmp(device_get_name(nbdev), "drmsub"))
-		dev->device = device_get_parent(nbdev);
-	else
-		dev->device = nbdev;
-
-	dev->devnode = make_dev( &DRM(cdevsw),
-			unit,
-			DRM_DEV_UID,
-			DRM_DEV_GID,
-			DRM_DEV_MODE,
-			"dri/card%d", unit );
-#if __FreeBSD_version >= 500000
-	mtx_init(&dev->dev_lock, "drm device", NULL, MTX_DEF);
-#endif
-#elif defined(__NetBSD__)
-	unit = minor(dev->device.dv_unit);
-#endif
-
-	dev->irq = pci_get_irq(dev->device);
-	/* XXX Fix domain number (alpha hoses) */
-	dev->pci_domain = 0;
-	dev->pci_bus = pci_get_bus(dev->device);
-	dev->pci_slot = pci_get_slot(dev->device);
-	dev->pci_func = pci_get_function(dev->device);
-
-	dev->maplist = DRM(calloc)(1, sizeof(*dev->maplist), DRM_MEM_MAPS);
-	if (dev->maplist == NULL) {
-		retcode = ENOMEM;
-		goto error;
-	}
-	TAILQ_INIT(dev->maplist);
-
-	dev->name = DRIVER_NAME;
-	DRM(mem_init)();
-	DRM(sysctl_init)(dev);
-	TAILQ_INIT(&dev->files);
-
-#if __REALLY_HAVE_AGP
-	dev->agp = DRM(agp_init)();
-#if __MUST_HAVE_AGP
-	if ( dev->agp == NULL ) {
-		DRM_ERROR( "Cannot initialize the agpgart module.\n" );
-		retcode = DRM_ERR(ENOMEM);
-		goto error;
-	}
-#endif /* __MUST_HAVE_AGP */
-#if __REALLY_HAVE_MTRR
-	if (dev->agp) {
-		if (DRM(mtrr_add)(dev->agp->info.ai_aperture_base,
-		    dev->agp->info.ai_aperture_size, DRM_MTRR_WC) == 0)
-			dev->agp->mtrr = 1;
-	}
-#endif /* __REALLY_HAVE_MTRR */
-#endif /* __REALLY_HAVE_AGP */
-
-#if __HAVE_CTX_BITMAP
-	retcode = DRM(ctxbitmap_init)( dev );
-	if (retcode != 0) {
-		DRM_ERROR( "Cannot allocate memory for context bitmap.\n" );
-		goto error;
-	}
-#endif
-	
-	DRM_INFO( "Initialized %s %d.%d.%d %s on minor %d\n",
-	  	DRIVER_NAME,
-	  	DRIVER_MAJOR,
-	  	DRIVER_MINOR,
-	  	DRIVER_PATCHLEVEL,
-	  	DRIVER_DATE,
-	  	unit );
-
-	DRIVER_POSTINIT(dev);
-
-	return 0;
-
-error:
-	DRM(sysctl_cleanup)(dev);
-	DRM_LOCK();
-	DRM(takedown)(dev);
-	DRM_UNLOCK();
-#ifdef __FreeBSD__
-	destroy_dev(dev->devnode);
-#if __FreeBSD_version >= 500000
-	mtx_destroy(&dev->dev_lock);
-#endif
-#endif
-	DRM(free)(dev->maplist, sizeof(*dev->maplist), DRM_MEM_MAPS);
-	return retcode;
-}
-
-/* linux: drm_cleanup is called via cleanup_module at module unload time.
- * bsd:   drm_cleanup is called per device at module unload time.
- * FIXME: NetBSD
- */
-static void DRM(cleanup)(drm_device_t *dev)
-{
-
-	DRM_DEBUG( "\n" );
-
-	DRM(sysctl_cleanup)( dev );
-#ifdef __FreeBSD__
-	destroy_dev(dev->devnode);
-#endif
-#if __HAVE_CTX_BITMAP
-	DRM(ctxbitmap_cleanup)( dev );
-#endif
-
-#if __REALLY_HAVE_AGP && __REALLY_HAVE_MTRR
-	if (dev->agp && dev->agp->mtrr) {
-		int __unused retcode;
-
-		retcode = DRM(mtrr_del)(dev->agp->info.ai_aperture_base,
-		    dev->agp->info.ai_aperture_size, DRM_MTRR_WC);
-		DRM_DEBUG("mtrr_del = %d", retcode);
-	}
-#endif
-
-	DRM_LOCK();
-	DRM(takedown)( dev );
-	DRM_UNLOCK();
-
-#if __REALLY_HAVE_AGP
-	if ( dev->agp ) {
-		DRM(agp_uninit)();
-		DRM(free)( dev->agp, sizeof(*dev->agp), DRM_MEM_AGPLISTS );
-		dev->agp = NULL;
-	}
-#endif
-	DRIVER_POSTCLEANUP();
-	DRM(mem_uninit)();
-#if defined(__FreeBSD__) &&  __FreeBSD_version >= 500000
-	mtx_destroy(&dev->dev_lock);
-#endif
-	DRM(free)(dev->maplist, sizeof(*dev->maplist), DRM_MEM_MAPS);
-}
-
-
-int DRM(version)( DRM_IOCTL_ARGS )
-{
-	drm_version_t version;
-	int len;
-
-	DRM_COPY_FROM_USER_IOCTL( version, (drm_version_t *)data, sizeof(version) );
-
-#define DRM_COPY( name, value )						\
-	len = strlen( value );						\
-	if ( len > name##_len ) len = name##_len;			\
-	name##_len = strlen( value );					\
-	if ( len && name ) {						\
-		if ( DRM_COPY_TO_USER( name, value, len ) )		\
-			return DRM_ERR(EFAULT);				\
-	}
-
-	version.version_major = DRIVER_MAJOR;
-	version.version_minor = DRIVER_MINOR;
-	version.version_patchlevel = DRIVER_PATCHLEVEL;
-
-	DRM_COPY( version.name, DRIVER_NAME );
-	DRM_COPY( version.date, DRIVER_DATE );
-	DRM_COPY( version.desc, DRIVER_DESC );
-
-	DRM_COPY_TO_USER_IOCTL( (drm_version_t *)data, version, sizeof(version) );
-
-	return 0;
-}
-
-int DRM(open)(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p)
-{
-	drm_device_t *dev = NULL;
-	int retcode = 0;
-
-	dev = DRIVER_SOFTC(minor(kdev));
-
-	DRM_DEBUG( "open_count = %d\n", dev->open_count );
-
-	retcode = DRM(open_helper)(kdev, flags, fmt, p, dev);
-
-	if ( !retcode ) {
-		atomic_inc( &dev->counts[_DRM_STAT_OPENS] );
-		DRM_LOCK();
-#ifdef __FreeBSD__
-		device_busy(dev->device);
-#endif
-		if ( !dev->open_count++ )
-			retcode = DRM(setup)( dev );
-		DRM_UNLOCK();
-	}
-
-	return retcode;
-}
-
-int DRM(close)(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p)
-{
-	drm_file_t *priv;
-	DRM_DEVICE;
-	int retcode = 0;
-	DRMFILE filp = (void *)(uintptr_t)(DRM_CURRENTPID);
-	
-	DRM_DEBUG( "open_count = %d\n", dev->open_count );
-
-	DRM_LOCK();
-
-	priv = DRM(find_file_by_proc)(dev, p);
-	if (!priv) {
-		DRM_UNLOCK();
-		DRM_DEBUG("can't find authenticator\n");
-		return EINVAL;
-	}
-
-	DRIVER_PRERELEASE();
-
-	/* ========================================================
-	 * Begin inline drm_release
-	 */
-
-#ifdef __FreeBSD__
-	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
-		   DRM_CURRENTPID, (long)dev->device, dev->open_count );
-#elif defined(__NetBSD__)
-	DRM_DEBUG( "pid = %d, device = 0x%lx, open_count = %d\n",
-		   DRM_CURRENTPID, (long)&dev->device, dev->open_count);
-#endif
-
-	if (dev->lock.hw_lock && _DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock)
-	    && dev->lock.filp == filp) {
-		DRM_DEBUG("Process %d dead, freeing lock for context %d\n",
-			  DRM_CURRENTPID,
-			  _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-#if __HAVE_RELEASE
-		DRIVER_RELEASE();
-#endif
-		DRM(lock_free)(dev,
-			      &dev->lock.hw_lock->lock,
-			      _DRM_LOCKING_CONTEXT(dev->lock.hw_lock->lock));
-		
-				/* FIXME: may require heavy-handed reset of
-                                   hardware at this point, possibly
-                                   processed via a callback to the X
-                                   server. */
-	}
-#if __HAVE_RELEASE
-	else if ( dev->lock.hw_lock ) {
-		/* The lock is required to reclaim buffers */
-		for (;;) {
-			if ( !dev->lock.hw_lock ) {
-				/* Device has been unregistered */
-				retcode = DRM_ERR(EINTR);
-				break;
-			}
-			if ( DRM(lock_take)( &dev->lock.hw_lock->lock,
-					     DRM_KERNEL_CONTEXT ) ) {
-				dev->lock.pid       = DRM_CURRENTPID;
-				dev->lock.lock_time = jiffies;
-                                atomic_inc( &dev->counts[_DRM_STAT_LOCKS] );
-				break;	/* Got lock */
-			}
-				/* Contention */
-#if defined(__FreeBSD__) && __FreeBSD_version > 500000
-			retcode = msleep((void *)&dev->lock.lock_queue,
-			    dev->dev_lock, PZERO | PCATCH, "drmlk2", 0);
-#else
-			retcode = tsleep((void *)&dev->lock.lock_queue,
-			    PZERO | PCATCH, "drmlk2", 0);
-#endif
-			if (retcode)
-				break;
-		}
-		if (retcode == 0) {
-			DRIVER_RELEASE();
-			DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
-					DRM_KERNEL_CONTEXT );
-		}
-	}
-#elif __HAVE_DMA
-	DRM(reclaim_buffers)( dev, (void *)(uintptr_t)priv->pid );
-#endif
-
-#if defined (__FreeBSD__) && (__FreeBSD_version >= 500000)
-	funsetown(&dev->buf_sigio);
-#elif defined(__FreeBSD__)
-	funsetown(dev->buf_sigio);
-#elif defined(__NetBSD__)
-	dev->buf_pgid = 0;
-#endif /* __NetBSD__ */
-
-	if (--priv->refs == 0) {
-		TAILQ_REMOVE(&dev->files, priv, link);
-		DRM(free)( priv, sizeof(*priv), DRM_MEM_FILES );
-	}
-
-	/* ========================================================
-	 * End inline drm_release
-	 */
-
-	atomic_inc( &dev->counts[_DRM_STAT_CLOSES] );
-#ifdef __FreeBSD__
-	device_unbusy(dev->device);
-#endif
-	if (--dev->open_count == 0) {
-		retcode = DRM(takedown)(dev);
-	}
-
-	DRM_UNLOCK();
-	
-	return retcode;
-}
-
-/* DRM(ioctl) is called whenever a process performs an ioctl on /dev/drm.
- */
-int DRM(ioctl)(struct cdev *kdev, u_long cmd, caddr_t data, int flags, 
-    DRM_STRUCTPROC *p)
-{
-	DRM_DEVICE;
-	int retcode = 0;
-	drm_ioctl_desc_t *ioctl;
-	int (*func)(DRM_IOCTL_ARGS);
-	int nr = DRM_IOCTL_NR(cmd);
-	drm_file_t *priv;
-
-	DRM_GET_PRIV_WITH_RETURN(priv, (DRMFILE)(uintptr_t)DRM_CURRENTPID);
-
-	atomic_inc( &dev->counts[_DRM_STAT_IOCTLS] );
-	++priv->ioctl_count;
-
-#ifdef __FreeBSD__
-	DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
-		 DRM_CURRENTPID, cmd, nr, (long)dev->device, priv->authenticated );
-#elif defined(__NetBSD__)
-	DRM_DEBUG( "pid=%d, cmd=0x%02lx, nr=0x%02x, dev 0x%lx, auth=%d\n",
-		 DRM_CURRENTPID, cmd, nr, (long)&dev->device, priv->authenticated );
-#endif
-
-	switch (cmd) {
-	case FIONBIO:
-	case FIOASYNC:
-		return 0;
-
-#ifdef __FreeBSD__
-	case FIOSETOWN:
-		return fsetown(*(int *)data, &dev->buf_sigio);
-
-	case FIOGETOWN:
-#if (__FreeBSD_version >= 500000)
-		*(int *) data = fgetown(&dev->buf_sigio);
-#else
-		*(int *) data = fgetown(dev->buf_sigio);
-#endif
-		return 0;
-#endif /* __FreeBSD__ */
-#ifdef __NetBSD__
-	case TIOCSPGRP:
-		dev->buf_pgid = *(int *)data;
-		return 0;
-
-	case TIOCGPGRP:
-		*(int *)data = dev->buf_pgid;
-		return 0;
-#endif /* __NetBSD__ */
-	}
-
-	if (nr >= DRIVER_IOCTL_COUNT || IOCGROUP(cmd) != DRM_IOCTL_BASE)
-		return EINVAL;
-
-	ioctl = &DRM(ioctls)[nr];
-	func = ioctl->func;
-
-	if (func == NULL) {
-		DRM_DEBUG( "no function\n" );
-		return EINVAL;
-	}
-	if ((ioctl->root_only && DRM_SUSER(p)) || (ioctl->auth_needed &&
-	    !priv->authenticated))
-		return EACCES;
-
-	retcode = func(kdev, cmd, data, flags, p, (void *)(uintptr_t)DRM_CURRENTPID);
-
-	return DRM_ERR(retcode);
-}
-
-int DRM(lock)( DRM_IOCTL_ARGS )
-{
-	DRM_DEVICE;
-        drm_lock_t lock;
-        int ret = 0;
-
-	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
-
-        if ( lock.context == DRM_KERNEL_CONTEXT ) {
-                DRM_ERROR( "Process %d using kernel context %d\n",
-			   DRM_CURRENTPID, lock.context );
-                return DRM_ERR(EINVAL);
-        }
-
-        DRM_DEBUG( "%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
-		   lock.context, DRM_CURRENTPID,
-		   dev->lock.hw_lock->lock, lock.flags );
-
-#if __HAVE_DMA_QUEUE
-        if ( lock.context < 0 )
-                return DRM_ERR(EINVAL);
-#endif
-
-	DRM_LOCK();
-	for (;;) {
-		if (DRM(lock_take)(&dev->lock.hw_lock->lock, lock.context)) {
-			dev->lock.filp = (void *)(uintptr_t)DRM_CURRENTPID;
-			dev->lock.lock_time = jiffies;
-			atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
-			break;  /* Got lock */
-		}
-
-		/* Contention */
-#if defined(__FreeBSD__) && __FreeBSD_version > 500000
-		ret = msleep((void *)&dev->lock.lock_queue, &dev->dev_lock,
-		    PZERO | PCATCH, "drmlk2", 0);
-#else
-		ret = tsleep((void *)&dev->lock.lock_queue, PZERO | PCATCH,
-		    "drmlk2", 0);
-#endif
-		if (ret != 0)
-			break;
-	}
-	DRM_UNLOCK();
-	DRM_DEBUG( "%d %s\n", lock.context, ret ? "interrupted" : "has lock" );
-
-	if (ret != 0)
-		return ret;
-
-	/* XXX: Add signal blocking here */
-
-#if __HAVE_DMA_QUIESCENT
-	if (lock.flags & _DRM_LOCK_QUIESCENT) {
-		DRIVER_DMA_QUIESCENT();
-	}
-#endif
-
-	return 0;
-}
-
-
-int DRM(unlock)( DRM_IOCTL_ARGS )
-{
-	DRM_DEVICE;
-	drm_lock_t lock;
-
-	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) ) ;
-
-	if ( lock.context == DRM_KERNEL_CONTEXT ) {
-		DRM_ERROR( "Process %d using kernel context %d\n",
-			   DRM_CURRENTPID, lock.context );
-		return DRM_ERR(EINVAL);
-	}
-
-	atomic_inc( &dev->counts[_DRM_STAT_UNLOCKS] );
-
-	DRM_LOCK();
-	DRM(lock_transfer)( dev, &dev->lock.hw_lock->lock,
-			    DRM_KERNEL_CONTEXT );
-#if __HAVE_DMA_SCHEDULE
-	DRM(dma_schedule)( dev, 1 );
-#endif
-
-	if ( DRM(lock_free)( dev, &dev->lock.hw_lock->lock,
-			     DRM_KERNEL_CONTEXT ) ) {
-		DRM_ERROR( "\n" );
-	}
-	DRM_UNLOCK();
-
-	return 0;
-}
-
-#if DRM_LINUX
-
-#include <sys/sysproto.h>
-
-MODULE_DEPEND(DRIVER_NAME, linux, 1, 1, 1);
-
-#define LINUX_IOCTL_DRM_MIN		0x6400
-#define LINUX_IOCTL_DRM_MAX		0x64ff
-
-static linux_ioctl_function_t DRM(linux_ioctl);
-static struct linux_ioctl_handler DRM(handler) = {DRM(linux_ioctl), 
-    LINUX_IOCTL_DRM_MIN, LINUX_IOCTL_DRM_MAX};
-
-SYSINIT(DRM(register), SI_SUB_KLD, SI_ORDER_MIDDLE, 
-    linux_ioctl_register_handler, &DRM(handler));
-SYSUNINIT(DRM(unregister), SI_SUB_KLD, SI_ORDER_MIDDLE, 
-    linux_ioctl_unregister_handler, &DRM(handler));
-
-/* The bits for in/out are switched on Linux */
-#define LINUX_IOC_IN	IOC_OUT
-#define LINUX_IOC_OUT	IOC_IN
-
-static int
-DRM(linux_ioctl)(DRM_STRUCTPROC *p, struct linux_ioctl_args* args)
-{
-	int error;
-	int cmd = args->cmd;
-
-	args->cmd &= ~(LINUX_IOC_IN | LINUX_IOC_OUT);
-	if (cmd & LINUX_IOC_IN)
-		args->cmd |= IOC_IN;
-	if (cmd & LINUX_IOC_OUT)
-		args->cmd |= IOC_OUT;
-	
-	error = ioctl(p, (struct ioctl_args *)args);
-
-	return error;
-}
-#endif /* DRM_LINUX */
diff --git a/sys/dev/drm/drm_fops.h b/sys/dev/drm/drm_fops.c
index 0e4b24c..9f05115 100644
--- a/sys/dev/drm/drm_fops.h
+++ b/sys/dev/drm/drm_fops.c
@@ -1,5 +1,6 @@
 /* drm_fops.h -- File operations for DRM -*- linux-c -*-
- * Created: Mon Jan  4 08:58:31 1999 by faith@valinux.com */
+ * Created: Mon Jan  4 08:58:31 1999 by faith@valinux.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -34,7 +35,7 @@
 
 #include "dev/drm/drmP.h"
 
-drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_STRUCTPROC *p)
+drm_file_t *drm_find_file_by_proc(drm_device_t *dev, DRM_STRUCTPROC *p)
 {
 #if __FreeBSD_version >= 500021
 	uid_t uid = p->td_ucred->cr_svuid;
@@ -53,12 +54,13 @@ drm_file_t *DRM(find_file_by_proc)(drm_device_t *dev, DRM_STRUCTPROC *p)
 	return NULL;
 }
 
-/* DRM(open_helper) is called whenever a process opens /dev/drm. */
-int DRM(open_helper)(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
+/* drm_open_helper is called whenever a process opens /dev/drm. */
+int drm_open_helper(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
 		    drm_device_t *dev)
 {
 	int	     m = minor(kdev);
 	drm_file_t   *priv;
+	int retcode;
 
 	if (flags & O_EXCL)
 		return EBUSY; /* No exclusive opens */
@@ -67,16 +69,15 @@ int DRM(open_helper)(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
 	DRM_DEBUG("pid = %d, minor = %d\n", DRM_CURRENTPID, m);
 
 	DRM_LOCK();
-	priv = DRM(find_file_by_proc)(dev, p);
+	priv = drm_find_file_by_proc(dev, p);
 	if (priv) {
 		priv->refs++;
 	} else {
-		priv = (drm_file_t *) DRM(alloc)(sizeof(*priv), DRM_MEM_FILES);
+		priv = malloc(sizeof(*priv), M_DRM, M_NOWAIT | M_ZERO);
 		if (priv == NULL) {
 			DRM_UNLOCK();
 			return DRM_ERR(ENOMEM);
 		}
-		bzero(priv, sizeof(*priv));
 #if __FreeBSD_version >= 500000
 		priv->uid		= p->td_ucred->cr_svuid;
 		priv->pid		= p->td_proc->p_pid;
@@ -87,11 +88,17 @@ int DRM(open_helper)(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
 
 		priv->refs		= 1;
 		priv->minor		= m;
-		priv->devXX		= dev;
 		priv->ioctl_count 	= 0;
 		priv->authenticated	= !DRM_SUSER(p);
 
-		DRIVER_OPEN_HELPER( priv, dev );
+		if (dev->open_helper) {
+			retcode = dev->open_helper(dev, priv);
+			if (retcode != 0) {
+				free(priv, M_DRM);
+				DRM_UNLOCK();
+				return retcode;
+			}
+		}
 
 		TAILQ_INSERT_TAIL(&dev->files, priv, link);
 	}
@@ -103,15 +110,15 @@ int DRM(open_helper)(struct cdev *kdev, int flags, int fmt, DRM_STRUCTPROC *p,
 }
 
 
-/* The DRM(read) and DRM(poll) are stubs to prevent spurious errors
+/* The drm_read and drm_poll are stubs to prevent spurious errors
  * on older X Servers (4.3.0 and earlier) */
 
-int DRM(read)(struct cdev *kdev, struct uio *uio, int ioflag)
+int drm_read(struct cdev *kdev, struct uio *uio, int ioflag)
 {
 	return 0;
 }
 
-int DRM(poll)(struct cdev *kdev, int events, DRM_STRUCTPROC *p)
+int drm_poll(struct cdev *kdev, int events, DRM_STRUCTPROC *p)
 {
 	return 0;
 }
diff --git a/sys/dev/drm/drm_ioctl.h b/sys/dev/drm/drm_ioctl.c
index e04e47b..6a56465 100644
--- a/sys/dev/drm/drm_ioctl.h
+++ b/sys/dev/drm/drm_ioctl.c
@@ -1,5 +1,6 @@
 /* drm_ioctl.h -- IOCTL processing for DRM -*- linux-c -*-
- * Created: Fri Jan  8 09:01:26 1999 by faith@valinux.com */
+ * Created: Fri Jan  8 09:01:26 1999 by faith@valinux.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -39,7 +40,7 @@
  * before setunique has been called.  The format for the bus-specific part of
  * the unique is not defined for any other bus.
  */
-int DRM(getunique)( DRM_IOCTL_ARGS )
+int drm_getunique(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_unique_t	 u;
@@ -60,74 +61,94 @@ int DRM(getunique)( DRM_IOCTL_ARGS )
 /* Deprecated in DRM version 1.1, and will return EBUSY when setversion has
  * requested version 1.1 or greater.
  */
-int DRM(setunique)( DRM_IOCTL_ARGS )
+int drm_setunique(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_unique_t u;
 	int domain, bus, slot, func, ret;
-
-	if (dev->unique_len || dev->unique)
-		return DRM_ERR(EBUSY);
+	char *busid;
 
 	DRM_COPY_FROM_USER_IOCTL( u, (drm_unique_t *)data, sizeof(u) );
 
+	/* Check and copy in the submitted Bus ID */
 	if (!u.unique_len || u.unique_len > 1024)
 		return DRM_ERR(EINVAL);
 
-	dev->unique_len = u.unique_len;
-	dev->unique	= DRM(alloc)(u.unique_len + 1, DRM_MEM_DRIVER);
-
-	if (dev->unique == NULL)
+	busid = malloc(u.unique_len + 1, M_DRM, M_WAITOK);
+	if (busid == NULL)
 		return DRM_ERR(ENOMEM);
 
-	if (DRM_COPY_FROM_USER(dev->unique, u.unique, dev->unique_len))
+	if (DRM_COPY_FROM_USER(busid, u.unique, u.unique_len)) {
+		free(busid, M_DRM);
 		return DRM_ERR(EFAULT);
-
-	dev->unique[dev->unique_len] = '\0';
+	}
+	busid[u.unique_len] = '\0';
 
 	/* Return error if the busid submitted doesn't match the device's actual
 	 * busid.
 	 */
-	ret = sscanf(dev->unique, "PCI:%d:%d:%d", &bus, &slot, &func);
-	if (ret != 3)
+	ret = sscanf(busid, "PCI:%d:%d:%d", &bus, &slot, &func);
+	if (ret != 3) {
+		free(busid, M_DRM);
 		return DRM_ERR(EINVAL);
+	}
 	domain = bus >> 8;
 	bus &= 0xff;
 	
 	if ((domain != dev->pci_domain) ||
 	    (bus != dev->pci_bus) ||
 	    (slot != dev->pci_slot) ||
-	    (func != dev->pci_func))
+	    (func != dev->pci_func)) {
+		free(busid, M_DRM);
 		return DRM_ERR(EINVAL);
+	}
+
+	/* Actually set the device's busid now. */
+	DRM_LOCK();
+	if (dev->unique_len || dev->unique) {
+		DRM_UNLOCK();
+		return DRM_ERR(EBUSY);
+	}
+
+	dev->unique_len = u.unique_len;
+	dev->unique = busid;
+	DRM_UNLOCK();
 
 	return 0;
 }
 
 
 static int
-DRM(set_busid)(drm_device_t *dev)
+drm_set_busid(drm_device_t *dev)
 {
 
-	if (dev->unique != NULL)
+	DRM_LOCK();
+
+	if (dev->unique != NULL) {
+		DRM_UNLOCK();
 		return EBUSY;
+	}
 
 	dev->unique_len = 20;
-	dev->unique = DRM(alloc)(dev->unique_len + 1, DRM_MEM_DRIVER);
-	if (dev->unique == NULL)
+	dev->unique = malloc(dev->unique_len + 1, M_DRM, M_NOWAIT);
+	if (dev->unique == NULL) {
+		DRM_UNLOCK();
 		return ENOMEM;
+	}
 
 	snprintf(dev->unique, dev->unique_len, "pci:%04x:%02x:%02x.%1x",
 	    dev->pci_domain, dev->pci_bus, dev->pci_slot, dev->pci_func);
 
+	DRM_UNLOCK();
+
 	return 0;
 }
 
-int DRM(getmap)( DRM_IOCTL_ARGS )
+int drm_getmap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_map_t    map;
 	drm_local_map_t    *mapinlist;
-	drm_map_list_entry_t *list;
 	int          idx;
 	int	     i = 0;
 
@@ -141,8 +162,7 @@ int DRM(getmap)( DRM_IOCTL_ARGS )
 		return DRM_ERR(EINVAL);
 	}
 
-	TAILQ_FOREACH(list, dev->maplist, link) {
-		mapinlist = list->map;
+	TAILQ_FOREACH(mapinlist, &dev->maplist, link) {
 		if (i==idx) {
 			map.offset = mapinlist->offset;
 			map.size   = mapinlist->size;
@@ -157,7 +177,7 @@ int DRM(getmap)( DRM_IOCTL_ARGS )
 
 	DRM_UNLOCK();
 
- 	if (!list)
+ 	if (mapinlist == NULL)
 		return EINVAL;
 
 	DRM_COPY_TO_USER_IOCTL( (drm_map_t *)data, map, sizeof(map) );
@@ -165,7 +185,7 @@ int DRM(getmap)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(getclient)( DRM_IOCTL_ARGS )
+int drm_getclient(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_client_t client;
@@ -199,7 +219,7 @@ int DRM(getclient)( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int DRM(getstats)( DRM_IOCTL_ARGS )
+int drm_getstats(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_stats_t  stats;
@@ -231,7 +251,7 @@ int DRM(getstats)( DRM_IOCTL_ARGS )
 #define DRM_IF_MAJOR	1
 #define DRM_IF_MINOR	2
 
-int DRM(setversion)(DRM_IOCTL_ARGS)
+int drm_setversion(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_set_version_t sv;
@@ -242,9 +262,9 @@ int DRM(setversion)(DRM_IOCTL_ARGS)
 
 	retv.drm_di_major = DRM_IF_MAJOR;
 	retv.drm_di_minor = DRM_IF_MINOR;
-	retv.drm_dd_major = DRIVER_MAJOR;
-	retv.drm_dd_minor = DRIVER_MINOR;
-	
+	retv.drm_dd_major = dev->driver_major;
+	retv.drm_dd_minor = dev->driver_minor;
+
 	DRM_COPY_TO_USER_IOCTL((drm_set_version_t *)data, retv, sizeof(sv));
 
 	if (sv.drm_di_major != -1) {
@@ -257,23 +277,20 @@ int DRM(setversion)(DRM_IOCTL_ARGS)
 			/*
 			 * Version 1.1 includes tying of DRM to specific device
 			 */
-			DRM(set_busid)(dev);
+			drm_set_busid(dev);
 		}
 	}
 
 	if (sv.drm_dd_major != -1) {
-		if (sv.drm_dd_major != DRIVER_MAJOR ||
-		    sv.drm_dd_minor < 0 || sv.drm_dd_minor > DRIVER_MINOR)
+		if (sv.drm_dd_major != dev->driver_major ||
+		    sv.drm_dd_minor < 0 || sv.drm_dd_minor > dev->driver_minor)
 			return EINVAL;
-#ifdef DRIVER_SETVERSION
-		DRIVER_SETVERSION(dev, &sv);
-#endif
 	}
 	return 0;
 }
 
 
-int DRM(noop)(DRM_IOCTL_ARGS)
+int drm_noop(DRM_IOCTL_ARGS)
 {
 	DRM_DEBUG("\n");
 	return 0;
diff --git a/sys/dev/drm/drm_irq.h b/sys/dev/drm/drm_irq.c
index 89f5cda..c7a9981 100644
--- a/sys/dev/drm/drm_irq.h
+++ b/sys/dev/drm/drm_irq.c
@@ -1,5 +1,6 @@
 /* drm_dma.c -- DMA IOCTL and function support
- * Created: Fri Oct 18 2003 by anholt@FreeBSD.org */
+ * Created: Fri Oct 18 2003 by anholt@FreeBSD.org
+ */
 /*-
  * Copyright 2003 Eric Anholt
  * All Rights Reserved.
@@ -18,10 +19,9 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
+ * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  * Authors:
  *    Eric Anholt <anholt@FreeBSD.org>
@@ -29,7 +29,10 @@
  * $FreeBSD$
  */
 
-int DRM(irq_by_busid)( DRM_IOCTL_ARGS )
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
+
+int drm_irq_by_busid(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_irq_busid_t irq;
@@ -54,46 +57,39 @@ int DRM(irq_by_busid)( DRM_IOCTL_ARGS )
 
 #if defined(__FreeBSD__) && __FreeBSD_version >= 500000
 static irqreturn_t
-DRM(irq_handler_wrap)(DRM_IRQ_ARGS)
+drm_irq_handler_wrap(DRM_IRQ_ARGS)
 {
 	drm_device_t *dev = (drm_device_t *)arg;
 
 	DRM_SPINLOCK(&dev->irq_lock);
-	DRM(irq_handler)(arg);
+	dev->irq_handler(arg);
 	DRM_SPINUNLOCK(&dev->irq_lock);
 }
 #endif
 
-int DRM(irq_install)(drm_device_t *dev)
+int drm_irq_install(drm_device_t *dev)
 {
 	int retcode;
 
 	if (dev->irq == 0 || dev->dev_private == NULL)
 		return DRM_ERR(EINVAL);
 
+	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
+
 	DRM_LOCK();
 	if (dev->irq_enabled) {
 		DRM_UNLOCK();
 		return DRM_ERR(EBUSY);
 	}
 	dev->irq_enabled = 1;
-	DRM_UNLOCK();
-
-	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
 
 	dev->context_flag = 0;
 
-	dev->dma->next_buffer = NULL;
-	dev->dma->this_buffer = NULL;
-
-#if __HAVE_IRQ_BH
-	TASK_INIT(&dev->task, 0, DRM(dma_immediate_bh), dev);
-#endif
-
 	DRM_SPININIT(dev->irq_lock, "DRM IRQ lock");
 
 				/* Before installing handler */
-	DRM(driver_irq_preinstall)( dev );
+	dev->irq_preinstall(dev);
+	DRM_UNLOCK();
 
 				/* Install handler */
 #ifdef __FreeBSD__
@@ -106,20 +102,20 @@ int DRM(irq_install)(drm_device_t *dev)
 	}
 #if __FreeBSD_version < 500000
 	retcode = bus_setup_intr(dev->device, dev->irqr, INTR_TYPE_TTY,
-				 DRM(irq_handler), dev, &dev->irqh);
+				 dev->irq_handler, dev, &dev->irqh);
 #else
 	retcode = bus_setup_intr(dev->device, dev->irqr, INTR_TYPE_TTY | INTR_MPSAFE,
-				 DRM(irq_handler_wrap), dev, &dev->irqh);
+				 drm_irq_handler_wrap, dev, &dev->irqh);
 #endif
 	if (retcode != 0)
 		goto err;
-#elif defined(__NetBSD__)
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 	if (pci_intr_map(&dev->pa, &dev->ih) != 0) {
 		retcode = ENOENT;
 		goto err;
 	}
 	dev->irqh = pci_intr_establish(&dev->pa.pa_pc, dev->ih, IPL_TTY,
-	    (irqreturn_t (*)(DRM_IRQ_ARGS))DRM(irq_handler), dev);
+	    (irqreturn_t (*)(DRM_IRQ_ARGS))dev->irq_handler, dev);
 	if (!dev->irqh) {
 		retcode = ENOENT;
 		goto err;
@@ -127,7 +123,9 @@ int DRM(irq_install)(drm_device_t *dev)
 #endif
 
 				/* After installing handler */
-	DRM(driver_irq_postinstall)( dev );
+	DRM_LOCK();
+	dev->irq_postinstall(dev);
+	DRM_UNLOCK();
 
 	return 0;
 err:
@@ -145,10 +143,7 @@ err:
 	return retcode;
 }
 
-/* XXX: This function needs to be called with the device lock held.  In some
- * cases it isn't, so far.
- */
-int DRM(irq_uninstall)( drm_device_t *dev )
+int drm_irq_uninstall(drm_device_t *dev)
 {
 	int irqrid;
 
@@ -161,12 +156,14 @@ int DRM(irq_uninstall)( drm_device_t *dev )
 
 	DRM_DEBUG( "%s: irq=%d\n", __FUNCTION__, dev->irq );
 
-	DRM(driver_irq_uninstall)( dev );
+	dev->irq_uninstall(dev);
 
 #ifdef __FreeBSD__
+	DRM_UNLOCK();
 	bus_teardown_intr(dev->device, dev->irqr, dev->irqh);
 	bus_release_resource(dev->device, SYS_RES_IRQ, irqrid, dev->irqr);
-#elif defined(__NetBSD__)
+	DRM_LOCK();
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 	pci_intr_disestablish(&dev->pa.pa_pc, dev->irqh);
 #endif
 	DRM_SPINUNINIT(dev->irq_lock);
@@ -174,7 +171,7 @@ int DRM(irq_uninstall)( drm_device_t *dev )
 	return 0;
 }
 
-int DRM(control)( DRM_IOCTL_ARGS )
+int drm_control(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_control_t ctl;
@@ -184,13 +181,20 @@ int DRM(control)( DRM_IOCTL_ARGS )
 
 	switch ( ctl.func ) {
 	case DRM_INST_HANDLER:
+		/* Handle drivers whose DRM used to require IRQ setup but the
+		 * no longer does.
+		 */
+		if (!dev->use_irq)
+			return 0;
 		if (dev->if_version < DRM_IF_VERSION(1, 2) &&
 		    ctl.irq != dev->irq)
 			return DRM_ERR(EINVAL);
-		return DRM(irq_install)(dev);
+		return drm_irq_install(dev);
 	case DRM_UNINST_HANDLER:
+		if (!dev->use_irq)
+			return 0;
 		DRM_LOCK();
-		err = DRM(irq_uninstall)( dev );
+		err = drm_irq_uninstall(dev);
 		DRM_UNLOCK();
 		return err;
 	default:
@@ -198,8 +202,7 @@ int DRM(control)( DRM_IOCTL_ARGS )
 	}
 }
 
-#if __HAVE_VBL_IRQ
-int DRM(wait_vblank)( DRM_IOCTL_ARGS )
+int drm_wait_vblank(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_wait_vblank_t vblwait;
@@ -220,11 +223,11 @@ int DRM(wait_vblank)( DRM_IOCTL_ARGS )
 	flags = vblwait.request.type & _DRM_VBLANK_FLAGS_MASK;
 	if (flags & _DRM_VBLANK_SIGNAL) {
 #if 0 /* disabled */
-		drm_vbl_sig_t *vbl_sig = DRM_MALLOC(sizeof(drm_vbl_sig_t));
+		drm_vbl_sig_t *vbl_sig = malloc(sizeof(drm_vbl_sig_t), M_DRM,
+		    M_NOWAIT | M_ZERO);
 		if (vbl_sig == NULL)
 			return ENOMEM;
-		bzero(vbl_sig, sizeof(*vbl_sig));
-		
+
 		vbl_sig->sequence = vblwait.request.sequence;
 		vbl_sig->signo = vblwait.request.signal;
 		vbl_sig->pid = DRM_CURRENTPID;
@@ -238,8 +241,10 @@ int DRM(wait_vblank)( DRM_IOCTL_ARGS )
 #endif
 		ret = EINVAL;
 	} else {
-		ret = DRM(vblank_wait)(dev, &vblwait.request.sequence);
-		
+		DRM_LOCK();
+		ret = dev->vblank_wait(dev, &vblwait.request.sequence);
+		DRM_UNLOCK();
+
 		microtime(&now);
 		vblwait.reply.tval_sec = now.tv_sec;
 		vblwait.reply.tval_usec = now.tv_usec;
@@ -251,12 +256,12 @@ int DRM(wait_vblank)( DRM_IOCTL_ARGS )
 	return ret;
 }
 
-void DRM(vbl_send_signals)(drm_device_t *dev)
+void drm_vbl_send_signals(drm_device_t *dev)
 {
 }
 
 #if 0 /* disabled */
-void DRM(vbl_send_signals)( drm_device_t *dev )
+void drm_vbl_send_signals( drm_device_t *dev )
 {
 	drm_vbl_sig_t *vbl_sig;
 	unsigned int vbl_seq = atomic_read( &dev->vbl_received );
@@ -278,5 +283,3 @@ void DRM(vbl_send_signals)( drm_device_t *dev )
 	}
 }
 #endif
-
-#endif /*  __HAVE_VBL_IRQ */
diff --git a/sys/dev/drm/drm_linux_list.h b/sys/dev/drm/drm_linux_list.h
index 12de823..f3d0744 100644
--- a/sys/dev/drm/drm_linux_list.h
+++ b/sys/dev/drm/drm_linux_list.h
@@ -1,5 +1,6 @@
 /* drm_linux_list.h -- linux list functions for the BSDs.
- * Created: Mon Apr 7 14:30:16 1999 by anholt@FreeBSD.org */
+ * Created: Mon Apr 7 14:30:16 1999 by anholt@FreeBSD.org
+ */
 /*-
  * Copyright 2003 Eric Anholt
  * All Rights Reserved.
diff --git a/sys/dev/drm/drm_lock.h b/sys/dev/drm/drm_lock.c
index bcdcbfe..6bfec3f 100644
--- a/sys/dev/drm/drm_lock.h
+++ b/sys/dev/drm/drm_lock.c
@@ -1,5 +1,6 @@
 /* lock.c -- IOCTLs for locking -*- linux-c -*-
- * Created: Tue Feb  2 08:37:54 1999 by faith@valinux.com */
+ * Created: Tue Feb  2 08:37:54 1999 by faith@valinux.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -33,7 +34,7 @@
 
 #include "dev/drm/drmP.h"
 
-int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context)
+int drm_lock_take(__volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new;
 
@@ -61,7 +62,7 @@ int DRM(lock_take)(__volatile__ unsigned int *lock, unsigned int context)
 
 /* This takes a lock forcibly and hands it to context.	Should ONLY be used
    inside *_unlock to give lock to kernel before calling *_dma_schedule. */
-int DRM(lock_transfer)(drm_device_t *dev,
+int drm_lock_transfer(drm_device_t *dev,
 		       __volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new;
@@ -75,7 +76,7 @@ int DRM(lock_transfer)(drm_device_t *dev,
 	return 1;
 }
 
-int DRM(lock_free)(drm_device_t *dev,
+int drm_lock_free(drm_device_t *dev,
 		   __volatile__ unsigned int *lock, unsigned int context)
 {
 	unsigned int old, new;
@@ -95,3 +96,82 @@ int DRM(lock_free)(drm_device_t *dev,
 	return 0;
 }
 
+int drm_lock(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+        drm_lock_t lock;
+        int ret = 0;
+
+	DRM_COPY_FROM_USER_IOCTL(lock, (drm_lock_t *)data, sizeof(lock));
+
+        if (lock.context == DRM_KERNEL_CONTEXT) {
+                DRM_ERROR("Process %d using kernel context %d\n",
+		    DRM_CURRENTPID, lock.context);
+                return EINVAL;
+        }
+
+        DRM_DEBUG("%d (pid %d) requests lock (0x%08x), flags = 0x%08x\n",
+	    lock.context, DRM_CURRENTPID, dev->lock.hw_lock->lock, lock.flags);
+
+        if (dev->use_dma_queue && lock.context < 0)
+                return EINVAL;
+
+	DRM_LOCK();
+	for (;;) {
+		if (drm_lock_take(&dev->lock.hw_lock->lock, lock.context)) {
+			dev->lock.filp = (void *)(uintptr_t)DRM_CURRENTPID;
+			dev->lock.lock_time = jiffies;
+			atomic_inc(&dev->counts[_DRM_STAT_LOCKS]);
+			break;  /* Got lock */
+		}
+
+		/* Contention */
+#if defined(__FreeBSD__) && __FreeBSD_version > 500000
+		ret = msleep((void *)&dev->lock.lock_queue, &dev->dev_lock,
+		    PZERO | PCATCH, "drmlk2", 0);
+#else
+		ret = tsleep((void *)&dev->lock.lock_queue, PZERO | PCATCH,
+		    "drmlk2", 0);
+#endif
+		if (ret != 0)
+			break;
+	}
+	DRM_UNLOCK();
+	DRM_DEBUG("%d %s\n", lock.context, ret ? "interrupted" : "has lock");
+
+	if (ret != 0)
+		return ret;
+
+	/* XXX: Add signal blocking here */
+
+	if (dev->dma_quiescent != NULL && (lock.flags & _DRM_LOCK_QUIESCENT))
+		dev->dma_quiescent(dev);
+
+	return 0;
+}
+
+int drm_unlock(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_lock_t lock;
+
+	DRM_COPY_FROM_USER_IOCTL(lock, (drm_lock_t *)data, sizeof(lock));
+
+	if (lock.context == DRM_KERNEL_CONTEXT) {
+		DRM_ERROR("Process %d using kernel context %d\n",
+		    DRM_CURRENTPID, lock.context);
+		return EINVAL;
+	}
+
+	atomic_inc(&dev->counts[_DRM_STAT_UNLOCKS]);
+
+	DRM_LOCK();
+	drm_lock_transfer(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT);
+
+	if (drm_lock_free(dev, &dev->lock.hw_lock->lock, DRM_KERNEL_CONTEXT)) {
+		DRM_ERROR("\n");
+	}
+	DRM_UNLOCK();
+
+	return 0;
+}
diff --git a/sys/dev/drm/drm_memory.h b/sys/dev/drm/drm_memory.c
index 1bf0e8e..7d0ab5a 100644
--- a/sys/dev/drm/drm_memory.h
+++ b/sys/dev/drm/drm_memory.c
@@ -1,7 +1,8 @@
 /* drm_memory.h -- Memory management wrappers for DRM -*- linux-c -*-
- * Created: Thu Feb  4 14:00:34 1999 by faith@valinux.com */
+ * Created: Thu Feb  4 14:00:34 1999 by faith@valinux.com
+ */
 /*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ *Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All Rights Reserved.
  *
@@ -33,103 +34,73 @@
 
 #include "dev/drm/drmP.h"
 
-#if defined(__FreeBSD__) || defined(__NetBSD__)
-#define malloctype DRM(M_DRM)
-/* The macros conflicted in the MALLOC_DEFINE */
-MALLOC_DEFINE(malloctype, "drm", "DRM Data Structures");
-#undef malloctype
-#endif
+MALLOC_DEFINE(M_DRM, "drm", "DRM Data Structures");
 
-#ifdef DEBUG_MEMORY
-#include "drm_memory_debug.h"
-#else
-void DRM(mem_init)(void)
+void drm_mem_init(void)
 {
-#ifdef __NetBSD__
-	malloc_type_attach(DRM(M_DRM));
+#if defined(__NetBSD__) || defined(__OpenBSD__)
+	malloc_type_attach(M_DRM);
 #endif
 }
 
-void DRM(mem_uninit)(void)
+void drm_mem_uninit(void)
 {
 }
 
-void *DRM(alloc)(size_t size, int area)
+void *drm_alloc(size_t size, int area)
 {
-	return malloc(size, DRM(M_DRM), M_NOWAIT);
+	return malloc(size, M_DRM, M_NOWAIT);
 }
 
-void *DRM(calloc)(size_t nmemb, size_t size, int area)
+void *drm_calloc(size_t nmemb, size_t size, int area)
 {
-	return malloc(size * nmemb, DRM(M_DRM), M_NOWAIT | M_ZERO);
+	return malloc(size * nmemb, M_DRM, M_NOWAIT | M_ZERO);
 }
 
-void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size, int area)
+void *drm_realloc(void *oldpt, size_t oldsize, size_t size, int area)
 {
 	void *pt;
 
-	pt = malloc(size, DRM(M_DRM), M_NOWAIT);
+	pt = malloc(size, M_DRM, M_NOWAIT);
 	if (pt == NULL)
 		return NULL;
 	if (oldpt && oldsize) {
 		memcpy(pt, oldpt, oldsize);
-		free(oldpt, DRM(M_DRM));
+		free(oldpt, M_DRM);
 	}
 	return pt;
 }
 
-void DRM(free)(void *pt, size_t size, int area)
+void drm_free(void *pt, size_t size, int area)
 {
-	free(pt, DRM(M_DRM));
+	free(pt, M_DRM);
 }
 
-void *DRM(ioremap)( drm_device_t *dev, drm_local_map_t *map )
+void *drm_ioremap(drm_device_t *dev, drm_local_map_t *map)
 {
 #ifdef __FreeBSD__
 	return pmap_mapdev(map->offset, map->size);
-#elif defined(__NetBSD__)
-	map->iot = dev->pa.pa_memt;
-	if (bus_space_map(map->iot, map->offset, map->size, 
-	    BUS_SPACE_MAP_LINEAR, &map->ioh))
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	map->bst = dev->pa.pa_memt;
+	if (bus_space_map(map->bst, map->offset, map->size, 
+	    BUS_SPACE_MAP_LINEAR, &map->bsh))
 		return NULL;
-	return bus_space_vaddr(map->iot, map->ioh);
+	return bus_space_vaddr(map->bst, map->bsh);
 #endif
 }
 
-void DRM(ioremapfree)(drm_local_map_t *map)
+void drm_ioremapfree(drm_local_map_t *map)
 {
 #ifdef __FreeBSD__
 	pmap_unmapdev((vm_offset_t) map->handle, map->size);
-#elif defined(__NetBSD__)
-	bus_space_unmap(map->iot, map->ioh, map->size);
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+	bus_space_unmap(map->bst, map->bsh, map->size);
 #endif
 }
 
-#if __REALLY_HAVE_AGP
-agp_memory *DRM(alloc_agp)(int pages, u32 type)
-{
-	return DRM(agp_allocate_memory)(pages, type);
-}
-
-int DRM(free_agp)(agp_memory *handle, int pages)
-{
-	return DRM(agp_free_memory)(handle);
-}
-
-int DRM(bind_agp)(agp_memory *handle, unsigned int start)
-{
-	return DRM(agp_bind_memory)(handle, start);
-}
-
-int DRM(unbind_agp)(agp_memory *handle)
-{
-	return DRM(agp_unbind_memory)(handle);
-}
-#endif /* __REALLY_HAVE_AGP */
-
 #ifdef __FreeBSD__
 int
-DRM(mtrr_add)(unsigned long offset, size_t size, int flags)
+drm_mtrr_add(unsigned long offset, size_t size, int flags)
 {
 	int act;
 	struct mem_range_desc mrdesc;
@@ -138,12 +109,12 @@ DRM(mtrr_add)(unsigned long offset, size_t size, int flags)
 	mrdesc.mr_len = size;
 	mrdesc.mr_flags = flags;
 	act = MEMRANGE_SET_UPDATE;
-	bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME));
+	strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner));
 	return mem_range_attr_set(&mrdesc, &act);
 }
 
 int
-DRM(mtrr_del)(unsigned long offset, size_t size, int flags)
+drm_mtrr_del(unsigned long offset, size_t size, int flags)
 {
 	int act;
 	struct mem_range_desc mrdesc;
@@ -152,12 +123,12 @@ DRM(mtrr_del)(unsigned long offset, size_t size, int flags)
 	mrdesc.mr_len = size;
 	mrdesc.mr_flags = flags;
 	act = MEMRANGE_SET_REMOVE;
-	bcopy(DRIVER_NAME, &mrdesc.mr_owner, strlen(DRIVER_NAME));
+	strlcpy(mrdesc.mr_owner, "drm", sizeof(mrdesc.mr_owner));
 	return mem_range_attr_set(&mrdesc, &act);
 }
-#elif defined(__NetBSD__)
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 int
-DRM(mtrr_add)(unsigned long offset, size_t size, int flags)
+drm_mtrr_add(unsigned long offset, size_t size, int flags)
 {
 	struct mtrr mtrrmap;
 	int one = 1;
@@ -170,7 +141,7 @@ DRM(mtrr_add)(unsigned long offset, size_t size, int flags)
 }
 
 int
-DRM(mtrr_del)(unsigned long offset, size_t size, int flags)
+drm_mtrr_del(unsigned long offset, size_t size, int flags)
 {
 	struct mtrr mtrrmap;
 	int one = 1;
@@ -182,5 +153,3 @@ DRM(mtrr_del)(unsigned long offset, size_t size, int flags)
 	return mtrr_set(&mtrrmap, &one, NULL, MTRR_GETSET_KERNEL);
 }
 #endif
-
-#endif /* DEBUG_MEMORY */
diff --git a/sys/dev/drm/drm_memory_debug.h b/sys/dev/drm/drm_memory_debug.h
deleted file mode 100644
index 1ce7ffe..0000000
--- a/sys/dev/drm/drm_memory_debug.h
+++ /dev/null
@@ -1,421 +0,0 @@
-/* drm_memory.h -- Memory management wrappers for DRM -*- linux-c -*-
- * Created: Thu Feb  4 14:00:34 1999 by faith@valinux.com */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Rickard E. (Rik) Faith <faith@valinux.com>
- *    Gareth Hughes <gareth@valinux.com>
- *
- * $FreeBSD$
- */
-
-#include "drmP.h"
-
-#define DRM_SYSCTL_PRINT(fmt, arg...)				\
-do {								\
-	snprintf(buf, sizeof(buf), fmt, ##arg);			\
-	error = SYSCTL_OUT(req, buf, strlen(buf));		\
-	if (error)						\
-		return error;					\
-} while (0)
-
-typedef struct drm_mem_stats {
-	const char	  *name;
-	int		  succeed_count;
-	int		  free_count;
-	int		  fail_count;
-	unsigned long	  bytes_allocated;
-	unsigned long	  bytes_freed;
-} drm_mem_stats_t;
-
-static DRM_SPINTYPE	  DRM(mem_lock);
-static unsigned long	  DRM(ram_available) = 0; /* In pages */
-static unsigned long	  DRM(ram_used)      = 0;
-static drm_mem_stats_t	  DRM(mem_stats)[]   = {
-	[DRM_MEM_DMA]	    = { "dmabufs"  },
-	[DRM_MEM_SAREA]	    = { "sareas"   },
-	[DRM_MEM_DRIVER]    = { "driver"   },
-	[DRM_MEM_MAGIC]	    = { "magic"	   },
-	[DRM_MEM_IOCTLS]    = { "ioctltab" },
-	[DRM_MEM_MAPS]	    = { "maplist"  },
-	[DRM_MEM_BUFS]	    = { "buflist"  },
-	[DRM_MEM_SEGS]	    = { "seglist"  },
-	[DRM_MEM_PAGES]	    = { "pagelist" },
-	[DRM_MEM_FILES]	    = { "files"	   },
-	[DRM_MEM_QUEUES]    = { "queues"   },
-	[DRM_MEM_CMDS]	    = { "commands" },
-	[DRM_MEM_MAPPINGS]  = { "mappings" },
-	[DRM_MEM_BUFLISTS]  = { "buflists" },
-	[DRM_MEM_AGPLISTS]  = { "agplist"  },
-	[DRM_MEM_SGLISTS]   = { "sglist"   },
-	[DRM_MEM_TOTALAGP]  = { "totalagp" },
-	[DRM_MEM_BOUNDAGP]  = { "boundagp" },
-	[DRM_MEM_CTXBITMAP] = { "ctxbitmap"},
-	[DRM_MEM_STUB]      = { "stub"     },
-	{ NULL, 0, }		/* Last entry must be null */
-};
-
-void DRM(mem_init)(void)
-{
-	drm_mem_stats_t *mem;
-
-#ifdef __NetBSD__
-	malloc_type_attach(DRM(M_DRM));
-#endif
-
-	DRM_SPININIT(DRM(mem_lock), "drm memory");
-
-	for (mem = DRM(mem_stats); mem->name; ++mem) {
-		mem->succeed_count   = 0;
-		mem->free_count	     = 0;
-		mem->fail_count	     = 0;
-		mem->bytes_allocated = 0;
-		mem->bytes_freed     = 0;
-	}
-
-	DRM(ram_available) = 0; /* si.totalram */
-	DRM(ram_used)	   = 0;
-}
-
-void DRM(mem_uninit)(void)
-{
-	DRM_SPINUNINIT(DRM(mem_lock));
-}
-
-#ifdef __FreeBSD__
-/* drm_mem_info is called whenever a process reads /dev/drm/mem. */
-static int
-DRM(_mem_info)(drm_mem_stats_t *stats, struct sysctl_oid *oidp, void *arg1, 
-    int arg2, struct sysctl_req *req)
-{
-	drm_mem_stats_t *pt;
-	char buf[128];
-	int error;
-
-	DRM_SYSCTL_PRINT("		  total counts			"
-		       " |    outstanding  \n");
-	DRM_SYSCTL_PRINT("type	   alloc freed fail	bytes	   freed"
-		       " | allocs      bytes\n\n");
-	DRM_SYSCTL_PRINT("%-9.9s %5d %5d %4d %10lu	    |\n",
-		       "system", 0, 0, 0, DRM(ram_available));
-	DRM_SYSCTL_PRINT("%-9.9s %5d %5d %4d %10lu	    |\n",
-		       "locked", 0, 0, 0, DRM(ram_used));
-	DRM_SYSCTL_PRINT("\n");
-	for (pt = stats; pt->name; pt++) {
-		DRM_SYSCTL_PRINT("%-9.9s %5d %5d %4d %10lu %10lu | %6d %10ld\n",
-			       pt->name,
-			       pt->succeed_count,
-			       pt->free_count,
-			       pt->fail_count,
-			       pt->bytes_allocated,
-			       pt->bytes_freed,
-			       pt->succeed_count - pt->free_count,
-			       (long)pt->bytes_allocated
-			       - (long)pt->bytes_freed);
-	}
-	SYSCTL_OUT(req, "", 1);
-	
-	return 0;
-}
-
-int DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS
-{
-	int ret;
-	drm_mem_stats_t *stats;
-	
-	stats = malloc(sizeof(DRM(mem_stats)), DRM(M_DRM), M_NOWAIT);
-	if (stats == NULL)
-		return ENOMEM;
-	
-	DRM_SPINLOCK(&DRM(mem_lock));
-	bcopy(DRM(mem_stats), stats, sizeof(DRM(mem_stats)));
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	
-	ret = DRM(_mem_info)(stats, oidp, arg1, arg2, req);
-	
-	free(stats, DRM(M_DRM));
-	return ret;
-}
-#endif /* __FreeBSD__ */
-
-void *DRM(alloc)(size_t size, int area)
-{
-	void *pt;
-
-	if (!size) {
-		DRM_MEM_ERROR(area, "Allocating 0 bytes\n");
-		return NULL;
-	}
-
-	if (!(pt = malloc(size, DRM(M_DRM), M_NOWAIT))) {
-		DRM_SPINLOCK(&DRM(mem_lock));
-		++DRM(mem_stats)[area].fail_count;
-		DRM_SPINUNLOCK(&DRM(mem_lock));
-		return NULL;
-	}
-	DRM_SPINLOCK(&DRM(mem_lock));
-	++DRM(mem_stats)[area].succeed_count;
-	DRM(mem_stats)[area].bytes_allocated += size;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	return pt;
-}
-
-void *DRM(realloc)(void *oldpt, size_t oldsize, size_t size, int area)
-{
-	void *pt;
-
-	if (!(pt = DRM(alloc)(size, area))) return NULL;
-	if (oldpt && oldsize) {
-		memcpy(pt, oldpt, oldsize);
-		DRM(free)(oldpt, oldsize, area);
-	}
-	return pt;
-}
-
-void DRM(free)(void *pt, size_t size, int area)
-{
-	int alloc_count;
-	int free_count;
-
-	if (pt == NULL)
-		return;
-	free(pt, DRM(M_DRM));
-	DRM_SPINLOCK(&DRM(mem_lock));
-	DRM(mem_stats)[area].bytes_freed += size;
-	free_count  = ++DRM(mem_stats)[area].free_count;
-	alloc_count =	DRM(mem_stats)[area].succeed_count;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	if (free_count > alloc_count) {
-		DRM_MEM_ERROR(area, "Excess frees: %d frees, %d allocs\n",
-			      free_count, alloc_count);
-	}
-}
-
-void *DRM(ioremap)( drm_device_t *dev, drm_local_map_t *map )
-{
-	void *pt;
-
-	if (!map->size) {
-		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
-			      "Mapping 0 bytes at 0x%08lx\n", map->offset);
-		return NULL;
-	}
-#ifdef __NetBSD__
-	map->iot = dev->pa.pa_memt;
-#endif
-
-#ifdef __FreeBSD__
-	if (!(pt = pmap_mapdev(map->offset, map->size))) {
-#elif defined(__NetBSD__)
-	if (bus_space_map(map->iot, map->offset, map->size, 
-		BUS_SPACE_MAP_LINEAR, &map->ioh)) {
-#endif
-		DRM_SPINLOCK(&DRM(mem_lock));
-		++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count;
-		DRM_SPINUNLOCK(&DRM(mem_lock));
-		return NULL;
-	}
-#ifdef __NetBSD__
-	pt = bus_space_vaddr(map->iot, map->ioh);
-#endif
-	DRM_SPINLOCK(&DRM(mem_lock));
-	++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
-	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += map->size;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	return pt;
-}
-
-/* unused so far */
-#if 0
-void *DRM(ioremap_nocache)(unsigned long offset, unsigned long size)
-{
-	void *pt;
-
-	if (!size) {
-		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
-			      "Mapping 0 bytes at 0x%08lx\n", offset);
-		return NULL;
-	}
-
-	/* FIXME FOR BSD */
-	if (!(pt = ioremap_nocache(offset, size))) {
-		DRM_SPINLOCK(&DRM(mem_lock));
-		++DRM(mem_stats)[DRM_MEM_MAPPINGS].fail_count;
-		DRM_SPINUNLOCK(&DRM(mem_lock));
-		return NULL;
-	}
-	DRM_SPINLOCK(&DRM(mem_lock));
-	++DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
-	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_allocated += size;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	return pt;
-}
-#endif
-
-void DRM(ioremapfree)(drm_local_map_t *map)
-{
-	int alloc_count;
-	int free_count;
-
-	if (map->handle == NULL)
-		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
-			      "Attempt to free NULL pointer\n");
-	else
-#ifdef __FreeBSD__
-		pmap_unmapdev((vm_offset_t) map->handle, map->size);
-#elif defined(__NetBSD__)
-		bus_space_unmap(map->iot, map->ioh, map->size);
-#endif
-
-	DRM_SPINLOCK(&DRM(mem_lock));
-	DRM(mem_stats)[DRM_MEM_MAPPINGS].bytes_freed += map->size;
-	free_count  = ++DRM(mem_stats)[DRM_MEM_MAPPINGS].free_count;
-	alloc_count =	DRM(mem_stats)[DRM_MEM_MAPPINGS].succeed_count;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	if (free_count > alloc_count) {
-		DRM_MEM_ERROR(DRM_MEM_MAPPINGS,
-			      "Excess frees: %d frees, %d allocs\n",
-			      free_count, alloc_count);
-	}
-}
-
-#if __REALLY_HAVE_AGP
-agp_memory *DRM(alloc_agp)(int pages, u32 type)
-{
-	agp_memory *handle;
-
-	if (!pages) {
-		DRM_MEM_ERROR(DRM_MEM_TOTALAGP, "Allocating 0 pages\n");
-		return NULL;
-	}
-
-	if ((handle = DRM(agp_allocate_memory)(pages, type))) {
-		DRM_SPINLOCK(&DRM(mem_lock));
-		++DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count;
-		DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_allocated
-			+= pages << PAGE_SHIFT;
-		DRM_SPINUNLOCK(&DRM(mem_lock));
-		return handle;
-	}
-	DRM_SPINLOCK(&DRM(mem_lock));
-	++DRM(mem_stats)[DRM_MEM_TOTALAGP].fail_count;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	return NULL;
-}
-
-int DRM(free_agp)(agp_memory *handle, int pages)
-{
-	int           alloc_count;
-	int           free_count;
-
-	if (!handle) {
-		DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
-			      "Attempt to free NULL AGP handle\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	if (DRM(agp_free_memory)(handle)) {
-		DRM_SPINLOCK(&DRM(mem_lock));
-		free_count  = ++DRM(mem_stats)[DRM_MEM_TOTALAGP].free_count;
-		alloc_count =   DRM(mem_stats)[DRM_MEM_TOTALAGP].succeed_count;
-		DRM(mem_stats)[DRM_MEM_TOTALAGP].bytes_freed
-			+= pages << PAGE_SHIFT;
-		DRM_SPINUNLOCK(&DRM(mem_lock));
-		if (free_count > alloc_count) {
-			DRM_MEM_ERROR(DRM_MEM_TOTALAGP,
-				      "Excess frees: %d frees, %d allocs\n",
-				      free_count, alloc_count);
-		}
-		return 0;
-	}
-	return DRM_ERR(EINVAL);
-}
-
-int DRM(bind_agp)(agp_memory *handle, unsigned int start)
-{
-	int retcode;
-	device_t dev = DRM_AGP_FIND_DEVICE();
-	struct agp_memory_info info;
-
-	if (!dev)
-		return EINVAL;
-
-	if (!handle) {
-		DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
-			      "Attempt to bind NULL AGP handle\n");
-		return DRM_ERR(EINVAL);
-	}
-
-	if (!(retcode = DRM(agp_bind_memory)(handle, start))) {
-		DRM_SPINLOCK(&DRM(mem_lock));
-		++DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count;
-		agp_memory_info(dev, handle, &info);
-		DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_allocated
-			+= info.ami_size;
-		DRM_SPINUNLOCK(&DRM(mem_lock));
-		return DRM_ERR(0);
-	}
-	DRM_SPINLOCK(&DRM(mem_lock));
-	++DRM(mem_stats)[DRM_MEM_BOUNDAGP].fail_count;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	return DRM_ERR(retcode);
-}
-
-int DRM(unbind_agp)(agp_memory *handle)
-{
-	int alloc_count;
-	int free_count;
-	int retcode = EINVAL;
-	device_t dev = DRM_AGP_FIND_DEVICE();
-	struct agp_memory_info info;
-
-	if (!dev)
-		return EINVAL;
-
-	if (!handle) {
-		DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
-			      "Attempt to unbind NULL AGP handle\n");
-		return DRM_ERR(retcode);
-	}
-
-	agp_memory_info(dev, handle, &info);
-
-	if ((retcode = DRM(agp_unbind_memory)(handle))) 
-		return DRM_ERR(retcode);
-
-	DRM_SPINLOCK(&DRM(mem_lock));
-	free_count  = ++DRM(mem_stats)[DRM_MEM_BOUNDAGP].free_count;
-	alloc_count = DRM(mem_stats)[DRM_MEM_BOUNDAGP].succeed_count;
-	DRM(mem_stats)[DRM_MEM_BOUNDAGP].bytes_freed
-		+= info.ami_size;
-	DRM_SPINUNLOCK(&DRM(mem_lock));
-	if (free_count > alloc_count) {
-		DRM_MEM_ERROR(DRM_MEM_BOUNDAGP,
-			      "Excess frees: %d frees, %d allocs\n",
-			      free_count, alloc_count);
-	}
-	return DRM_ERR(retcode);
-}
-#endif
diff --git a/sys/dev/drm/drm_os_freebsd.h b/sys/dev/drm/drm_os_freebsd.h
deleted file mode 100644
index c2fafad..0000000
--- a/sys/dev/drm/drm_os_freebsd.h
+++ /dev/null
@@ -1,487 +0,0 @@
-/**
- * \file drm_os_freebsd.h
- * OS-specific #defines for FreeBSD
- * 
- * \author Eric Anholt <anholt@FreeBSD.org>
- */
-
-/*-
- * Copyright 2003 Eric Anholt
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * $FreeBSD$
- */
-
-#include <sys/param.h>
-#include <sys/queue.h>
-#include <sys/malloc.h>
-#include <sys/kernel.h>
-#include <sys/module.h>
-#include <sys/systm.h>
-#include <sys/conf.h>
-#include <sys/stat.h>
-#include <sys/proc.h>
-#include <sys/lock.h>
-#include <sys/fcntl.h>
-#include <sys/uio.h>
-#include <sys/filio.h>
-#include <sys/sysctl.h>
-#include <sys/bus.h>
-#include <sys/signalvar.h>
-#include <sys/poll.h>
-#include <vm/vm.h>
-#include <vm/pmap.h>
-#include <vm/vm_extern.h>
-#include <vm/vm_map.h>
-#include <vm/vm_param.h>
-#include <machine/param.h>
-#include <machine/pmap.h>
-#include <machine/bus.h>
-#include <machine/resource.h>
-#if __FreeBSD_version >= 480000
-#include <sys/endian.h>
-#endif
-#include <sys/mman.h>
-#include <sys/rman.h>
-#include <sys/memrange.h>
-#if __FreeBSD_version >= 500000
-#include <dev/pci/pcivar.h>
-#include <sys/selinfo.h>
-#else
-#include <pci/pcivar.h>
-#include <sys/select.h>
-#endif
-#include <sys/bus.h>
-#if __FreeBSD_version >= 400005
-#include <sys/taskqueue.h>
-#endif
-#if __FreeBSD_version >= 500000
-#include <sys/mutex.h>
-#endif
-
-#include "dev/drm/drm_linux_list.h"
-
-#if __FreeBSD_version >= 400006
-#define __REALLY_HAVE_AGP	__HAVE_AGP
-#endif
-
-#ifdef __i386__
-#define __REALLY_HAVE_MTRR	(__HAVE_MTRR) && (__FreeBSD_version >= 460000)
-#else
-#define __REALLY_HAVE_MTRR	0
-#endif
-
-#define __REALLY_HAVE_SG	(__HAVE_SG)
-
-#if __REALLY_HAVE_AGP
-#include <pci/agpvar.h>
-#include <sys/agpio.h>
-#endif
-
-#include <opt_drm.h>
-#if DRM_DEBUG
-#undef  DRM_DEBUG_CODE
-#define DRM_DEBUG_CODE 2
-#endif
-#undef DRM_DEBUG
-
-#if DRM_LINUX
-#include <sys/file.h>
-#include <sys/proc.h>
-#include <machine/../linux/linux.h>
-#include <machine/../linux/linux_proto.h>
-#endif
-
-#define DRM_TIME_SLICE	      (hz/20)  /* Time slice for GLXContexts	  */
-
-#define DRM_DEV_MODE	(S_IRUSR|S_IWUSR|S_IRGRP|S_IWGRP)
-#define DRM_DEV_UID	0
-#define DRM_DEV_GID	0
-
-#if __FreeBSD_version >= 500000
-#define DRM_CURPROC		curthread
-#define DRM_STRUCTPROC		struct thread
-#define DRM_SPINTYPE		struct mtx
-#define DRM_SPININIT(l,name)	mtx_init(&l, name, NULL, MTX_DEF)
-#define DRM_SPINUNINIT(l)	mtx_destroy(&l)
-#define DRM_SPINLOCK(l)		mtx_lock(l)
-#define DRM_SPINUNLOCK(u)	mtx_unlock(u);
-#define DRM_SPINLOCK_ASSERT(l)	mtx_assert(l, MA_OWNED)
-#define DRM_CURRENTPID		curthread->td_proc->p_pid
-#define DRM_LOCK()		mtx_lock(&dev->dev_lock)
-#define DRM_UNLOCK() 		mtx_unlock(&dev->dev_lock)
-#else
-/* There is no need for locking on FreeBSD 4.x.  Synchronization is handled by
- * the fact that there is no reentrancy of the kernel except for interrupt
- * handlers, and the interrupt handler synchronization is managed by spls.
- */
-#define DRM_CURPROC		curproc
-#define DRM_STRUCTPROC		struct proc
-#define DRM_SPINTYPE		
-#define DRM_SPININIT(l,name)
-#define DRM_SPINUNINIT(l)
-#define DRM_SPINLOCK(l)
-#define DRM_SPINUNLOCK(u)
-#define DRM_SPINLOCK_ASSERT(l)
-#define DRM_CURRENTPID		curproc->p_pid
-#define DRM_LOCK()
-#define DRM_UNLOCK()
-#endif
-
-/* Currently our DRMFILE (filp) is a void * which is actually the pid
- * of the current process.  It should be a per-open unique pointer, but
- * code for that is not yet written */
-#define DRMFILE			void *
-#define DRM_IOCTL_ARGS		struct cdev *kdev, u_long cmd, caddr_t data, int flags, DRM_STRUCTPROC *p, DRMFILE filp
-#define DRM_SUSER(p)		suser(p)
-#define DRM_TASKQUEUE_ARGS	void *arg, int pending
-#define DRM_IRQ_ARGS		void *arg
-typedef void			irqreturn_t;
-#define IRQ_HANDLED		/* nothing */
-#define IRQ_NONE		/* nothing */
-#define DRM_DEVICE		drm_device_t	*dev	= kdev->si_drv1
-#define DRM_MALLOC(size)	malloc( size, DRM(M_DRM), M_NOWAIT )
-#define DRM_FREE(pt,size)		free( pt, DRM(M_DRM) )
-
-/* Read/write from bus space, with byteswapping to le if necessary */
-#define DRM_READ8(map, offset)		*(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset))
-#define DRM_READ32(map, offset)		*(volatile u_int32_t *)(((unsigned long)(map)->handle) + (offset))
-#define DRM_WRITE8(map, offset, val)	*(volatile u_int8_t *) (((unsigned long)(map)->handle) + (offset)) = val
-#define DRM_WRITE32(map, offset, val)	*(volatile u_int32_t *)(((unsigned long)(map)->handle) + (offset)) = val
-/*
-#define DRM_READ8(map, offset)		bus_space_read_1(  (map)->iot, (map)->ioh, (offset) )
-#define DRM_READ32(map, offset)		bus_space_read_4(  (map)->iot, (map)->ioh, (offset) )
-#define DRM_WRITE8(map, offset, val)	bus_space_write_1( (map)->iot, (map)->ioh, (offset), (val) )
-#define DRM_WRITE32(map, offset, val)	bus_space_write_4( (map)->iot, (map)->ioh, (offset), (val) )
-*/
-#define DRM_AGP_FIND_DEVICE()	agp_find_device()
-#define DRM_ERR(v)		v
-
-#define DRM_MTRR_WC	MDF_WRITECOMBINE
-
-#define DRM_GET_PRIV_WITH_RETURN(_priv, _filp)			\
-do {								\
-	if (_filp != (DRMFILE)(intptr_t)DRM_CURRENTPID) {	\
-		DRM_ERROR("filp doesn't match curproc\n");	\
-		return EINVAL;					\
-	}							\
-	DRM_LOCK();						\
-	_priv = DRM(find_file_by_proc)(dev, DRM_CURPROC);	\
-	DRM_UNLOCK();						\
-	if (_priv == NULL) {					\
-		DRM_DEBUG("can't find authenticator\n");	\
-		return EINVAL;					\
-	}							\
-} while (0)
-
-#define LOCK_TEST_WITH_RETURN(dev, filp)				\
-do {									\
-	if (!_DRM_LOCK_IS_HELD(dev->lock.hw_lock->lock) ||		\
-	     dev->lock.filp != filp) {					\
-		DRM_ERROR("%s called without lock held\n",		\
-			   __FUNCTION__);				\
-		return EINVAL;						\
-	}								\
-} while (0)
-
-#define DRM_UDELAY( udelay )					\
-do {								\
-	struct timeval tv1, tv2;				\
-	microtime(&tv1);					\
-	do {							\
-		microtime(&tv2);				\
-	}							\
-	while (((tv2.tv_sec-tv1.tv_sec)*1000000 + tv2.tv_usec - tv1.tv_usec) < udelay ); \
-} while (0)
-
-#define DRM_GETSAREA()					\
-do {								\
-	drm_map_list_entry_t *listentry;			\
-	TAILQ_FOREACH(listentry, dev->maplist, link) {		\
-		drm_local_map_t *map = listentry->map;		\
-		if (map->type == _DRM_SHM &&			\
-			map->flags & _DRM_CONTAINS_LOCK) {	\
-			dev_priv->sarea = map;			\
-			break;					\
-		}						\
-	}							\
-} while (0)
-
-#define DRM_HZ hz
-
-#if defined(__FreeBSD__) && __FreeBSD_version > 500000
-#define DRM_WAIT_ON( ret, queue, timeout, condition )		\
-for ( ret = 0 ; !ret && !(condition) ; ) {			\
-	mtx_lock(&dev->irq_lock);				\
-	if (!(condition))					\
-	   ret = msleep(&(queue), &dev->irq_lock, 	\
-			 PZERO | PCATCH, "drmwtq", (timeout));	\
-	mtx_unlock(&dev->irq_lock);			\
-}
-#else
-#define DRM_WAIT_ON( ret, queue, timeout, condition )	\
-for ( ret = 0 ; !ret && !(condition) ; ) {		\
-        int s = spldrm();				\
-	if (!(condition))				\
-	   ret = tsleep( &(queue), PZERO | PCATCH, 	\
-			 "drmwtq", (timeout) );		\
-	splx(s);					\
-}
-#endif
-
-#define DRM_WAKEUP( queue ) wakeup( queue )
-#define DRM_WAKEUP_INT( queue ) wakeup( queue )
-#define DRM_INIT_WAITQUEUE( queue )  do {} while (0)
-
-#define DRM_COPY_TO_USER_IOCTL(user, kern, size)	\
-	if ( IOCPARM_LEN(cmd) != size)			\
-		return EINVAL;				\
-	*user = kern;
-#define DRM_COPY_FROM_USER_IOCTL(kern, user, size) \
-	if ( IOCPARM_LEN(cmd) != size)			\
-		return EINVAL;				\
-	kern = *user;
-#define DRM_COPY_TO_USER(user, kern, size) \
-	copyout(kern, user, size)
-#define DRM_COPY_FROM_USER(kern, user, size) \
-	copyin(user, kern, size)
-/* Macros for userspace access with checking readability once */
-/* FIXME: can't find equivalent functionality for nocheck yet.
- * It'll be slower than linux, but should be correct.
- */
-#define DRM_VERIFYAREA_READ( uaddr, size )		\
-	(!useracc((caddr_t)uaddr, size, VM_PROT_READ))
-#define DRM_COPY_FROM_USER_UNCHECKED(arg1, arg2, arg3) 	\
-	copyin(arg2, arg1, arg3)
-#define DRM_COPY_TO_USER_UNCHECKED(arg1, arg2, arg3)	\
-	copyout(arg2, arg1, arg3)
-#define DRM_GET_USER_UNCHECKED(val, uaddr)			\
-	((val) = fuword32(uaddr), 0)
-#define DRM_PUT_USER_UNCHECKED(uaddr, val)			\
-	suword32(uaddr, val)
-
-/* DRM_READMEMORYBARRIER() prevents reordering of reads.
- * DRM_WRITEMEMORYBARRIER() prevents reordering of writes.
- * DRM_MEMORYBARRIER() prevents reordering of reads and writes.
- */
-#if defined(__i386__)
-#define DRM_READMEMORYBARRIER()		__asm __volatile( \
-					"lock; addl $0,0(%%esp)" : : : "memory");
-#define DRM_WRITEMEMORYBARRIER()	__asm __volatile("" : : : "memory");
-#define DRM_MEMORYBARRIER()		__asm __volatile( \
-					"lock; addl $0,0(%%esp)" : : : "memory");
-#elif defined(__alpha__)
-#define DRM_READMEMORYBARRIER()		alpha_mb();
-#define DRM_WRITEMEMORYBARRIER()	alpha_wmb();
-#define DRM_MEMORYBARRIER()		alpha_mb();
-#elif defined(__amd64__)
-//#warning FIX-ME!!!
-#define DRM_READMEMORYBARRIER()		__asm __volatile("lfence" ::: "memory");
-#define DRM_WRITEMEMORYBARRIER()	__asm __volatile("sfence" ::: "memory");
-#define DRM_MEMORYBARRIER()		__asm __volatile("mfence" ::: "memory");
-#endif
-
-#define PAGE_ALIGN(addr) round_page(addr)
-
-#ifndef M_WAITOK		/* M_WAITOK (=0) name removed in -current */
-#define M_WAITOK 0
-#endif
-
-#define malloctype DRM(M_DRM)
-/* The macros conflicted in the MALLOC_DEFINE */
-MALLOC_DECLARE(malloctype);
-#undef malloctype
-
-#if __FreeBSD_version < 502109
-#define bus_alloc_resource_any(dev, type, rid, flags) \
-	bus_alloc_resource(dev, type, rid, 0ul, ~0ul, 1, flags)
-#endif
-
-#if __FreeBSD_version >= 480000
-#define cpu_to_le32(x) htole32(x)
-#define le32_to_cpu(x) le32toh(x)
-#else
-#define cpu_to_le32(x) (x)
-#define le32_to_cpu(x) (x)
-#endif
-
-typedef unsigned long dma_addr_t;
-typedef u_int32_t atomic_t;
-typedef u_int32_t u32;
-typedef u_int16_t u16;
-typedef u_int8_t u8;
-#define atomic_set(p, v)	(*(p) = (v))
-#define atomic_read(p)		(*(p))
-#define atomic_inc(p)		atomic_add_int(p, 1)
-#define atomic_dec(p)		atomic_subtract_int(p, 1)
-#define atomic_add(n, p)	atomic_add_int(p, n)
-#define atomic_sub(n, p)	atomic_subtract_int(p, n)
-
-/* Fake this */
-
-#if __FreeBSD_version < 500000
-/* The extra atomic functions from 5.0 haven't been merged to 4.x */
-static __inline int
-atomic_cmpset_int(volatile u_int *dst, u_int exp, u_int src)
-{
-	int res = exp;
-
-	__asm __volatile (
-	"	lock ;			"
-	"	cmpxchgl %1,%2 ;	"
-	"       setz	%%al ;		"
-	"	movzbl	%%al,%0 ;	"
-	"1:				"
-	"# atomic_cmpset_int"
-	: "+a" (res)			/* 0 (result) */
-	: "r" (src),			/* 1 */
-	  "m" (*(dst))			/* 2 */
-	: "memory");				 
-
-	return (res);
-}
-#endif
-
-static __inline atomic_t
-test_and_set_bit(int b, volatile void *p)
-{
-	int s = splhigh();
-	unsigned int m = 1<<b;
-	unsigned int r = *(volatile int *)p & m;
-	*(volatile int *)p |= m;
-	splx(s);
-	return r;
-}
-
-static __inline void
-clear_bit(int b, volatile void *p)
-{
-    atomic_clear_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
-}
-
-static __inline void
-set_bit(int b, volatile void *p)
-{
-    atomic_set_int(((volatile int *)p) + (b >> 5), 1 << (b & 0x1f));
-}
-
-static __inline int
-test_bit(int b, volatile void *p)
-{
-    return ((volatile int *)p)[b >> 5] & (1 << (b & 0x1f));
-}
-
-static __inline int
-find_first_zero_bit(volatile void *p, int max)
-{
-    int b;
-
-    for (b = 0; b < max; b += 32) {
-	if (((volatile int *)p)[b >> 5] != ~0) {
-	    for (;;) {
-		if ((((volatile int *)p)[b >> 5] & (1 << (b & 0x1f))) == 0)
-		    return b;
-		b++;
-	    }
-	}
-    }
-    return max;
-}
-
-#define spldrm()		spltty()
-
-/*
- * Fake out the module macros for versions of FreeBSD where they don't
- * exist.
- */
-#if (__FreeBSD_version < 500002 && __FreeBSD_version > 500000) || __FreeBSD_version < 420000
-#define MODULE_VERSION(a,b)		struct __hack
-#define MODULE_DEPEND(a,b,c,d,e)	struct __hack
-#endif
-
-/* Redefinitions to make templating easy */
-#define wait_queue_head_t	atomic_t
-#define agp_memory		void
-#define jiffies			ticks
-
-				/* Macros to make printf easier */
-#define DRM_ERROR(fmt, arg...) \
-	printf("error: [" DRM_NAME ":pid%d:%s] *ERROR* " fmt,		\
-	    DRM_CURRENTPID, __func__ , ## arg)
-
-#define DRM_MEM_ERROR(area, fmt, arg...) \
-	printf("error: [" DRM_NAME ":pid%d:%s:%s] *ERROR* " fmt,	\
-	    DRM_CURRENTPID , __func__, DRM(mem_stats)[area].name , ##arg)
-
-#define DRM_INFO(fmt, arg...)  printf("info: [" DRM_NAME "] " fmt , ## arg)
-
-#if DRM_DEBUG_CODE
-#define DRM_DEBUG(fmt, arg...)						\
-	do {								\
-		if (DRM(flags) & DRM_FLAG_DEBUG)			\
-			printf("[" DRM_NAME ":pid%d:%s] " fmt,		\
-			    DRM_CURRENTPID, __func__ , ## arg);		\
-	} while (0)
-#else
-#define DRM_DEBUG(fmt, arg...)		 do { } while (0)
-#endif
-
-#if (__FreeBSD_version >= 500000) || ((__FreeBSD_version < 500000) && (__FreeBSD_version >= 410002))
-#define DRM_SYSCTL_HANDLER_ARGS	(SYSCTL_HANDLER_ARGS)
-#else
-#define DRM_SYSCTL_HANDLER_ARGS	SYSCTL_HANDLER_ARGS
-#endif
-
-#define DRM_FIND_MAP(dest, o)						\
-	do {								\
-		drm_map_list_entry_t *listentry;			\
-		TAILQ_FOREACH(listentry, dev->maplist, link) {		\
-			if ( listentry->map->offset == o ) {		\
-				dest = listentry->map;			\
-				break;					\
-			}						\
-		}							\
-	} while (0)
-
-
-/* Internal functions */
-
-/* drm_drv.h */
-extern d_ioctl_t	DRM(ioctl);
-extern d_open_t		DRM(open);
-extern d_close_t	DRM(close);
-extern d_read_t		DRM(read);
-extern d_poll_t		DRM(poll);
-extern d_mmap_t		DRM(mmap);
-extern int		DRM(open_helper)(struct cdev *kdev, int flags, int fmt, 
-					 DRM_STRUCTPROC *p, drm_device_t *dev);
-extern drm_file_t	*DRM(find_file_by_proc)(drm_device_t *dev, 
-					 DRM_STRUCTPROC *p);
-
-/* sysctl support (drm_sysctl.h) */
-extern int		DRM(sysctl_init)(drm_device_t *dev);
-extern int		DRM(sysctl_cleanup)(drm_device_t *dev);
-
-/* Memory info sysctl (drm_memory_debug.h) */
-#ifdef DEBUG_MEMORY
-extern int		DRM(mem_info) DRM_SYSCTL_HANDLER_ARGS;
-#endif
diff --git a/sys/dev/drm/drm_pci.h b/sys/dev/drm/drm_pci.c
index 12add61..0569e93 100644
--- a/sys/dev/drm/drm_pci.h
+++ b/sys/dev/drm/drm_pci.c
@@ -41,12 +41,12 @@
  * memory block.
  */
 void *
-DRM(pci_alloc)(drm_device_t *dev, size_t size, size_t align, dma_addr_t maxaddr,
+drm_pci_alloc(drm_device_t *dev, size_t size, size_t align, dma_addr_t maxaddr,
     dma_addr_t *busaddr)
 {
 	void *vaddr;
 
-	vaddr = contigmalloc(size, DRM(M_DRM), M_NOWAIT, 0ul, maxaddr, align,
+	vaddr = contigmalloc(size, M_DRM, M_NOWAIT, 0ul, maxaddr, align,
 	    0);
 	*busaddr = vtophys(vaddr);
 	
@@ -57,10 +57,12 @@ DRM(pci_alloc)(drm_device_t *dev, size_t size, size_t align, dma_addr_t maxaddr,
  * \brief Free a DMA-accessible consistent memory block.
  */
 void
-DRM(pci_free)(drm_device_t *dev, size_t size, void *vaddr, dma_addr_t busaddr)
+drm_pci_free(drm_device_t *dev, size_t size, void *vaddr, dma_addr_t busaddr)
 {
 #if __FreeBSD_version > 500000
-	contigfree(vaddr, size, DRM(M_DRM));	/* Not available on 4.x */
+	if (vaddr == NULL)
+		return;
+	contigfree(vaddr, size, M_DRM);	/* Not available on 4.x */
 #endif
 }
 
diff --git a/sys/dev/drm/drm_pciids.h b/sys/dev/drm/drm_pciids.h
index 0a8abc5..6ad8bf7 100644
--- a/sys/dev/drm/drm_pciids.h
+++ b/sys/dev/drm/drm_pciids.h
@@ -1,67 +1,81 @@
-/* $FreeBSD$ */
+/*
+ * $FreeBSD$
+ */
+
 /*
    This file is auto-generated from the drm_pciids.txt in the DRM CVS
    Please contact dri-devel@lists.sf.net to add new cards to this list
 */
 #define radeon_PCI_IDS \
-	{0x1002, 0x4136, 0, "ATI Radeon RS100 IGP 320M"}, \
-	{0x1002, 0x4137, 0, "ATI Radeon RS200 IGP"}, \
-	{0x1002, 0x4237, 0, "ATI Radeon RS250 IGP"}, \
-	{0x1002, 0x4242, 0, "ATI Radeon BB R200 AIW 8500DV"}, \
-	{0x1002, 0x4242, 0, "ATI Radeon BC R200"}, \
-	{0x1002, 0x4336, 0, "ATI Radeon RS100 Mobility U1"}, \
-	{0x1002, 0x4337, 0, "ATI Radeon RS200 Mobility IGP 340M"}, \
-	{0x1002, 0x4437, 0, "ATI Radeon RS250 Mobility IGP"}, \
-	{0x1002, 0x4964, 0, "ATI Radeon Id R250 9000"}, \
-	{0x1002, 0x4965, 0, "ATI Radeon Ie R250 9000"}, \
-	{0x1002, 0x4966, 0, "ATI Radeon If R250 9000"}, \
-	{0x1002, 0x4967, 0, "ATI Radeon Ig R250 9000"}, \
-	{0x1002, 0x4C57, 0, "ATI Radeon LW Mobility 7500 M7"}, \
-	{0x1002, 0x4C58, 0, "ATI Radeon LX RV200 Mobility FireGL 7800 M7"}, \
-	{0x1002, 0x4C59, 0, "ATI Radeon LY Mobility M6"}, \
-	{0x1002, 0x4C5A, 0, "ATI Radeon LZ Mobility M6"}, \
-	{0x1002, 0x4C64, 0, "ATI Radeon Ld R250 Mobility 9000 M9"}, \
-	{0x1002, 0x4C65, 0, "ATI Radeon Le R250 Mobility 9000 M9"}, \
-	{0x1002, 0x4C66, 0, "ATI Radeon Lf R250 Mobility 9000 M9"}, \
-	{0x1002, 0x4C67, 0, "ATI Radeon Lg R250 Mobility 9000 M9"}, \
-	{0x1002, 0x5144, 0, "ATI Radeon QD R100"}, \
-	{0x1002, 0x5145, 0, "ATI Radeon QE R100"}, \
-	{0x1002, 0x5146, 0, "ATI Radeon QF R100"}, \
-	{0x1002, 0x5147, 0, "ATI Radeon QG R100"}, \
-	{0x1002, 0x5148, 0, "ATI Radeon QH R200 8500"}, \
-	{0x1002, 0x5149, 0, "ATI Radeon QI R200"}, \
-	{0x1002, 0x514A, 0, "ATI Radeon QJ R200"}, \
-	{0x1002, 0x514B, 0, "ATI Radeon QK R200"}, \
-	{0x1002, 0x514C, 0, "ATI Radeon QL R200 8500 LE"}, \
-	{0x1002, 0x514D, 0, "ATI Radeon QM R200 9100"}, \
-	{0x1002, 0x514E, 0, "ATI Radeon QN R200 8500 LE"}, \
-	{0x1002, 0x514F, 0, "ATI Radeon QO R200 8500 LE"}, \
-	{0x1002, 0x5157, 0, "ATI Radeon QW RV200 7500"}, \
-	{0x1002, 0x5158, 0, "ATI Radeon QX RV200 7500"}, \
-	{0x1002, 0x5159, 0, "ATI Radeon QY RV100 7000/VE"}, \
-	{0x1002, 0x515A, 0, "ATI Radeon QZ RV100 7000/VE"}, \
-	{0x1002, 0x5168, 0, "ATI Radeon Qh R200"}, \
-	{0x1002, 0x5169, 0, "ATI Radeon Qi R200"}, \
-	{0x1002, 0x516A, 0, "ATI Radeon Qj R200"}, \
-	{0x1002, 0x516B, 0, "ATI Radeon Qk R200"}, \
-	{0x1002, 0x516C, 0, "ATI Radeon Ql R200"}, \
-	{0x1002, 0x5834, 0, "ATI Radeon RS300 IGP"}, \
-	{0x1002, 0x5835, 0, "ATI Radeon RS300 Mobility IGP"}, \
-	{0x1002, 0x5836, 0, "ATI Radeon RS300 IGP"}, \
-	{0x1002, 0x5837, 0, "ATI Radeon RS300 IGP"}, \
-	{0x1002, 0x5960, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x5961, 0, "ATI Radeon RV280 9200 SE"}, \
-	{0x1002, 0x5962, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x5963, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x5964, 0, "ATI Radeon RV280 9200 SE"}, \
-	{0x1002, 0x5968, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x5969, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x596A, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x596B, 0, "ATI Radeon RV280 9200"}, \
-	{0x1002, 0x5c61, 0, "ATI Radeon RV280 Mobility"}, \
-	{0x1002, 0x5c62, 0, "ATI Radeon RV280"}, \
-	{0x1002, 0x5c63, 0, "ATI Radeon RV280 Mobility"}, \
-	{0x1002, 0x5c64, 0, "ATI Radeon RV280"}, \
+	{0x1002, 0x4136, CHIP_RS100|CHIP_IS_IGP, "ATI Radeon RS100 IGP 320M"}, \
+	{0x1002, 0x4137, CHIP_RS200|CHIP_IS_IGP, "ATI Radeon RS200 IGP"}, \
+	{0x1002, 0x4144, CHIP_R300, "ATI Radeon AD 9500 Pro"}, \
+	{0x1002, 0x4145, CHIP_R300, "ATI Radeon AE 9700 Pro"}, \
+	{0x1002, 0x4146, CHIP_R300, "ATI Radeon AF 9700 Pro"}, \
+	{0x1002, 0x4147, CHIP_R300, "ATI FireGL AG Z1/X1"}, \
+	{0x1002, 0x4150, CHIP_RV350, "ATI Radeon AP 9600"}, \
+	{0x1002, 0x4151, CHIP_RV350, "ATI Radeon AQ 9600"}, \
+	{0x1002, 0x4152, CHIP_RV350, "ATI Radeon AR 9600"}, \
+	{0x1002, 0x4153, CHIP_RV350, "ATI Radeon AS 9600 AS"}, \
+	{0x1002, 0x4154, CHIP_RV350, "ATI FireGL AT T2"}, \
+	{0x1002, 0x4156, CHIP_RV350, "ATI FireGL AV T2"}, \
+	{0x1002, 0x4237, CHIP_RS250|CHIP_IS_IGP, "ATI Radeon RS250 IGP"}, \
+	{0x1002, 0x4242, CHIP_R200, "ATI Radeon BB R200 AIW 8500DV"}, \
+	{0x1002, 0x4243, CHIP_R200, "ATI Radeon BC R200"}, \
+	{0x1002, 0x4336, CHIP_RS100|CHIP_IS_IGP|CHIP_IS_MOBILITY, "ATI Radeon RS100 Mobility U1"}, \
+	{0x1002, 0x4337, CHIP_RS200|CHIP_IS_IGP|CHIP_IS_MOBILITY, "ATI Radeon RS200 Mobility IGP 340M"}, \
+	{0x1002, 0x4437, CHIP_RS250|CHIP_IS_IGP|CHIP_IS_MOBILITY, "ATI Radeon RS250 Mobility IGP"}, \
+	{0x1002, 0x4964, CHIP_R250, "ATI Radeon Id R250 9000"}, \
+	{0x1002, 0x4965, CHIP_R250, "ATI Radeon Ie R250 9000"}, \
+	{0x1002, 0x4966, CHIP_R250, "ATI Radeon If R250 9000"}, \
+	{0x1002, 0x4967, CHIP_R250, "ATI Radeon Ig R250 9000"}, \
+	{0x1002, 0x4C57, CHIP_RV200|CHIP_IS_MOBILITY, "ATI Radeon LW RV200 Mobility 7500 M7"}, \
+	{0x1002, 0x4C58, CHIP_RV200|CHIP_IS_MOBILITY, "ATI Radeon LX RV200 Mobility FireGL 7800 M7"}, \
+	{0x1002, 0x4C59, CHIP_RV100|CHIP_IS_MOBILITY, "ATI Radeon LY RV100 Mobility M6"}, \
+	{0x1002, 0x4C5A, CHIP_RV100|CHIP_IS_MOBILITY, "ATI Radeon LZ RV100 Mobility M6"}, \
+	{0x1002, 0x4C64, CHIP_R250|CHIP_IS_MOBILITY, "ATI Radeon Ld R250 Mobility 9000 M9"}, \
+	{0x1002, 0x4C65, CHIP_R250|CHIP_IS_MOBILITY, "ATI Radeon Le R250 Mobility 9000 M9"}, \
+	{0x1002, 0x4C66, CHIP_R250|CHIP_IS_MOBILITY, "ATI Radeon Lf R250 Mobility 9000 M9"}, \
+	{0x1002, 0x4C67, CHIP_R250|CHIP_IS_MOBILITY, "ATI Radeon Lg R250 Mobility 9000 M9"}, \
+	{0x1002, 0x4E50, CHIP_RV350|CHIP_IS_MOBILITY, "ATI Radeon RV300 Mobility 9600 M10"}, \
+	{0x1002, 0x5144, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QD R100"}, \
+	{0x1002, 0x5145, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QE R100"}, \
+	{0x1002, 0x5146, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QF R100"}, \
+	{0x1002, 0x5147, CHIP_R100|CHIP_SINGLE_CRTC, "ATI Radeon QG R100"}, \
+	{0x1002, 0x5148, CHIP_R200, "ATI Radeon QH R200 8500"}, \
+	{0x1002, 0x5149, CHIP_R200, "ATI Radeon QI R200"}, \
+	{0x1002, 0x514A, CHIP_R200, "ATI Radeon QJ R200"}, \
+	{0x1002, 0x514B, CHIP_R200, "ATI Radeon QK R200"}, \
+	{0x1002, 0x514C, CHIP_R200, "ATI Radeon QL R200 8500 LE"}, \
+	{0x1002, 0x514D, CHIP_R200, "ATI Radeon QM R200 9100"}, \
+	{0x1002, 0x514E, CHIP_R200, "ATI Radeon QN R200 8500 LE"}, \
+	{0x1002, 0x514F, CHIP_R200, "ATI Radeon QO R200 8500 LE"}, \
+	{0x1002, 0x5157, CHIP_RV200, "ATI Radeon QW RV200 7500"}, \
+	{0x1002, 0x5158, CHIP_RV200, "ATI Radeon QX RV200 7500"}, \
+	{0x1002, 0x5159, CHIP_RV100, "ATI Radeon QY RV100 7000/VE"}, \
+	{0x1002, 0x515A, CHIP_RV100, "ATI Radeon QZ RV100 7000/VE"}, \
+	{0x1002, 0x5168, CHIP_R200, "ATI Radeon Qh R200"}, \
+	{0x1002, 0x5169, CHIP_R200, "ATI Radeon Qi R200"}, \
+	{0x1002, 0x516A, CHIP_R200, "ATI Radeon Qj R200"}, \
+	{0x1002, 0x516B, CHIP_R200, "ATI Radeon Qk R200"}, \
+	{0x1002, 0x516C, CHIP_R200, "ATI Radeon Ql R200"}, \
+	{0x1002, 0x5834, CHIP_RS300|CHIP_IS_IGP, "ATI Radeon RS300 IGP"}, \
+	{0x1002, 0x5835, CHIP_RS300|CHIP_IS_IGP|CHIP_IS_MOBILITY, "ATI Radeon RS300 Mobility IGP"}, \
+	{0x1002, 0x5836, CHIP_RS300|CHIP_IS_IGP, "ATI Radeon RS300 IGP"}, \
+	{0x1002, 0x5837, CHIP_RS300|CHIP_IS_IGP, "ATI Radeon RS300 IGP"}, \
+	{0x1002, 0x5960, CHIP_RV280, "ATI Radeon RV280 9200"}, \
+	{0x1002, 0x5961, CHIP_RV280, "ATI Radeon RV280 9200 SE"}, \
+	{0x1002, 0x5962, CHIP_RV280, "ATI Radeon RV280 9200"}, \
+	{0x1002, 0x5963, CHIP_RV280, "ATI Radeon RV280 9200"}, \
+	{0x1002, 0x5964, CHIP_RV280, "ATI Radeon RV280 9200 SE"}, \
+	{0x1002, 0x5968, CHIP_RV280, "ATI Radeon RV280 9200"}, \
+	{0x1002, 0x5969, CHIP_RV100, "ATI ES1000 RN50"}, \
+	{0x1002, 0x596A, CHIP_RV280, "ATI Radeon RV280 9200"}, \
+	{0x1002, 0x596B, CHIP_RV280, "ATI Radeon RV280 9200"}, \
+	{0x1002, 0x5c61, CHIP_RV280|CHIP_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \
+	{0x1002, 0x5c62, CHIP_RV280, "ATI Radeon RV280"}, \
+	{0x1002, 0x5c63, CHIP_RV280|CHIP_IS_MOBILITY, "ATI Radeon RV280 Mobility"}, \
+	{0x1002, 0x5c64, CHIP_RV280, "ATI Radeon RV280"}, \
 	{0, 0, 0, NULL}
 
 #define r128_PCI_IDS \
@@ -133,7 +147,7 @@
 	{0x1002, 0x4c4e, 0, "Rage Mobility L AGP 2X"}, \
 	{0, 0, 0, NULL}
 
-#define sisdrv_PCI_IDS \
+#define sis_PCI_IDS \
 	{0x1039, 0x0300, 0, "SiS 300/305"}, \
 	{0x1039, 0x5300, 0, "SiS 540"}, \
 	{0x1039, 0x6300, 0, "SiS 630"}, \
@@ -151,6 +165,7 @@
 
 #define viadrv_PCI_IDS \
 	{0x1106, 0x3022, 0, "VIA CLE266 3022"}, \
+	{0x1106, 0x3118, 0, "VIA CN400"}, \
 	{0x1106, 0x3122, 0, "VIA CLE266"}, \
 	{0x1106, 0x7205, 0, "VIA KM400"}, \
 	{0x1106, 0x7204, 0, "VIA K8M800"}, \
@@ -175,30 +190,40 @@
 	{0, 0, 0, NULL}
 
 #define savage_PCI_IDS \
-	{0x5333, 0x8a22, 0, "Savage4"}, \
-	{0x5333, 0x8a23, 0, "Savage4"}, \
-	{0x5333, 0x8c10, 0, "Savage/MX-MV"}, \
-	{0x5333, 0x8c11, 0, "Savage/MX"}, \
-	{0x5333, 0x8c12, 0, "Savage/IX-MV"}, \
-	{0x5333, 0x8c13, 0, "Savage/IX"}, \
-	{0x5333, 0x8c20, 0, "Savage 3D"}, \
-	{0x5333, 0x8c21, 0, "Savage 3D/MV"}, \
-	{0x5333, 0x8c22, 0, "SuperSavage MX/128"}, \
-	{0x5333, 0x8c24, 0, "SuperSavage MX/64"}, \
-	{0x5333, 0x8c26, 0, "SuperSavage MX/64C"}, \
-	{0x5333, 0x8c2a, 0, "SuperSavage IX/128 SDR"}, \
-	{0x5333, 0x8c2b, 0, "SuperSavage IX/128 DDR"}, \
-	{0x5333, 0x8c2c, 0, "SuperSavage IX/64 SDR"}, \
-	{0x5333, 0x8c2d, 0, "SuperSavage IX/64 DDR"}, \
-	{0x5333, 0x8c2e, 0, "SuperSavage IX/C SDR"}, \
-	{0x5333, 0x8c2f, 0, "SuperSavage IX/C DDR"}, \
-	{0x5333, 0x8a25, 0, "ProSavage PM133"}, \
-	{0x5333, 0x8a26, 0, "ProSavage KM133"}, \
-	{0x5333, 0x8d01, 0, "ProSavage PN133"}, \
-	{0x5333, 0x8d02, 0, "ProSavage KN133"}, \
-	{0x5333, 0x8d04, 0, "ProSavage DDR"}, \
+	{0x5333, 0x8a20, S3_SAVAGE3D, "Savage 3D"}, \
+	{0x5333, 0x8a21, S3_SAVAGE3D, "Savage 3D/MV"}, \
+	{0x5333, 0x8a22, S3_SAVAGE4, "Savage4"}, \
+	{0x5333, 0x8a23, S3_SAVAGE4, "Savage4"}, \
+	{0x5333, 0x8c10, S3_SAVAGE_MX, "Savage/MX-MV"}, \
+	{0x5333, 0x8c11, S3_SAVAGE_MX, "Savage/MX"}, \
+	{0x5333, 0x8c12, S3_SAVAGE_MX, "Savage/IX-MV"}, \
+	{0x5333, 0x8c13, S3_SAVAGE_MX, "Savage/IX"}, \
+	{0x5333, 0x8c22, S3_SUPERSAVAGE, "SuperSavage MX/128"}, \
+	{0x5333, 0x8c24, S3_SUPERSAVAGE, "SuperSavage MX/64"}, \
+	{0x5333, 0x8c26, S3_SUPERSAVAGE, "SuperSavage MX/64C"}, \
+	{0x5333, 0x8c2a, S3_SUPERSAVAGE, "SuperSavage IX/128 SDR"}, \
+	{0x5333, 0x8c2b, S3_SUPERSAVAGE, "SuperSavage IX/128 DDR"}, \
+	{0x5333, 0x8c2c, S3_SUPERSAVAGE, "SuperSavage IX/64 SDR"}, \
+	{0x5333, 0x8c2d, S3_SUPERSAVAGE, "SuperSavage IX/64 DDR"}, \
+	{0x5333, 0x8c2e, S3_SUPERSAVAGE, "SuperSavage IX/C SDR"}, \
+	{0x5333, 0x8c2f, S3_SUPERSAVAGE, "SuperSavage IX/C DDR"}, \
+	{0x5333, 0x8a25, S3_PROSAVAGE, "ProSavage PM133"}, \
+	{0x5333, 0x8a26, S3_PROSAVAGE, "ProSavage KM133"}, \
+	{0x5333, 0x8d01, S3_TWISTER, "ProSavage Twister PN133"}, \
+	{0x5333, 0x8d02, S3_TWISTER, "ProSavage Twister KN133"}, \
+	{0x5333, 0x8d03, S3_PROSAVAGEDDR, "ProSavage DDR"}, \
+	{0x5333, 0x8d04, S3_PROSAVAGEDDR, "ProSavage DDR-K"}, \
 	{0, 0, 0, NULL}
 
 #define ffb_PCI_IDS \
 	{0, 0, 0, NULL}
 
+#define i915_PCI_IDS \
+	{0x8086, 0x3577, 0, "Intel i830M GMCH"}, \
+	{0x8086, 0x2562, 0, "Intel i845G GMCH"}, \
+	{0x8086, 0x3582, 0, "Intel i852GM/i855GM GMCH"}, \
+	{0x8086, 0x2572, 0, "Intel i865G GMCH"}, \
+	{0x8086, 0x2582, 0, "Intel i915G"}, \
+	{0x8086, 0x2982, 0, "Intel i915GM"}, \
+	{0, 0, 0, NULL}
+
diff --git a/sys/dev/drm/drm_sarea.h b/sys/dev/drm/drm_sarea.h
index cee3219..5215d2e 100644
--- a/sys/dev/drm/drm_sarea.h
+++ b/sys/dev/drm/drm_sarea.h
@@ -1,5 +1,5 @@
 /**
- * \file drm_sarea.h 
+ * \file drm_sarea.h
  * \brief SAREA definitions
  *
  * \author Michel D�zer <michel@daenzer.net>
@@ -40,7 +40,7 @@
 #if defined(__alpha__)
 #define SAREA_MAX                       0x2000
 #elif defined(__ia64__)
-#define SAREA_MAX                       0x10000         /* 64kB */
+#define SAREA_MAX                       0x10000	/* 64kB */
 #else
 /* Intel 830M driver needs at least 8k SAREA */
 #define SAREA_MAX                       0x2000
@@ -53,28 +53,28 @@
 
 /** SAREA drawable */
 typedef struct drm_sarea_drawable {
-    unsigned int	stamp;
-    unsigned int	flags;
+	unsigned int stamp;
+	unsigned int flags;
 } drm_sarea_drawable_t;
 
 /** SAREA frame */
 typedef struct drm_sarea_frame {
-    unsigned int        x;
-    unsigned int        y;
-    unsigned int        width;
-    unsigned int        height;
-    unsigned int        fullscreen;
+	unsigned int x;
+	unsigned int y;
+	unsigned int width;
+	unsigned int height;
+	unsigned int fullscreen;
 } drm_sarea_frame_t;
 
 /** SAREA */
 typedef struct drm_sarea {
     /** first thing is always the DRM locking structure */
-    drm_hw_lock_t		lock;
+	drm_hw_lock_t lock;
     /** \todo Use readers/writer lock for drm_sarea::drawable_lock */
-    drm_hw_lock_t		drawable_lock;
-    drm_sarea_drawable_t	drawableTable[SAREA_MAX_DRAWABLES];	/**< drawables */
-    drm_sarea_frame_t		frame;	/**< frame */
-    drm_context_t		dummy_context;
+	drm_hw_lock_t drawable_lock;
+	drm_sarea_drawable_t drawableTable[SAREA_MAX_DRAWABLES];	/**< drawables */
+	drm_sarea_frame_t frame;	/**< frame */
+	drm_context_t dummy_context;
 } drm_sarea_t;
 
-#endif	/* _DRM_SAREA_H_ */
+#endif				/* _DRM_SAREA_H_ */
diff --git a/sys/dev/drm/drm_scatter.h b/sys/dev/drm/drm_scatter.c
index a67f1c6..fe8bb4b 100644
--- a/sys/dev/drm/drm_scatter.h
+++ b/sys/dev/drm/drm_scatter.c
@@ -34,21 +34,14 @@
 
 #define DEBUG_SCATTER 0
 
-#if __REALLY_HAVE_SG
-
-void DRM(sg_cleanup)( drm_sg_mem_t *entry )
+void drm_sg_cleanup(drm_sg_mem_t *entry)
 {
-	free( entry->virtual, DRM(M_DRM) );
-
-	DRM(free)( entry->busaddr,
-		   entry->pages * sizeof(*entry->busaddr),
-		   DRM_MEM_PAGES );
-	DRM(free)( entry,
-		   sizeof(*entry),
-		   DRM_MEM_SGLISTS );
+	free(entry->virtual, M_DRM);
+	free(entry->busaddr, M_DRM);
+	free(entry, M_DRM);
 }
 
-int DRM(sg_alloc)( DRM_IOCTL_ARGS )
+int drm_sg_alloc(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_scatter_gather_t request;
@@ -63,40 +56,28 @@ int DRM(sg_alloc)( DRM_IOCTL_ARGS )
 	DRM_COPY_FROM_USER_IOCTL(request, (drm_scatter_gather_t *)data,
 			     sizeof(request) );
 
-	entry = DRM(alloc)( sizeof(*entry), DRM_MEM_SGLISTS );
+	entry = malloc(sizeof(*entry), M_DRM, M_WAITOK | M_ZERO);
 	if ( !entry )
 		return ENOMEM;
 
-   	bzero( entry, sizeof(*entry) );
-
 	pages = round_page(request.size) / PAGE_SIZE;
 	DRM_DEBUG( "sg size=%ld pages=%ld\n", request.size, pages );
 
 	entry->pages = pages;
 
-	entry->busaddr = DRM(alloc)( pages * sizeof(*entry->busaddr),
-				     DRM_MEM_PAGES );
+	entry->busaddr = malloc(pages * sizeof(*entry->busaddr), M_DRM,
+	    M_WAITOK | M_ZERO);
 	if ( !entry->busaddr ) {
-		DRM(free)( entry,
-			   sizeof(*entry),
-			   DRM_MEM_SGLISTS );
+		drm_sg_cleanup(entry);
 		return ENOMEM;
 	}
-	bzero( (void *)entry->busaddr, pages * sizeof(*entry->busaddr) );
 
-	entry->virtual = malloc( pages << PAGE_SHIFT, DRM(M_DRM), M_WAITOK );
+	entry->virtual = malloc(pages << PAGE_SHIFT, M_DRM, M_WAITOK | M_ZERO);
 	if ( !entry->virtual ) {
-		DRM(free)( entry->busaddr,
-			   entry->pages * sizeof(*entry->busaddr),
-			   DRM_MEM_PAGES );
-		DRM(free)( entry,
-			   sizeof(*entry),
-			   DRM_MEM_SGLISTS );
+		drm_sg_cleanup(entry);
 		return ENOMEM;
 	}
 
-	bzero( entry->virtual, pages << PAGE_SHIFT );
-
 	entry->handle = (unsigned long)entry->virtual;
 
 	DRM_DEBUG( "sg alloc handle  = %08lx\n", entry->handle );
@@ -108,15 +89,19 @@ int DRM(sg_alloc)( DRM_IOCTL_ARGS )
 			   request,
 			   sizeof(request) );
 
+	DRM_LOCK();
+	if (dev->sg) {
+		DRM_UNLOCK();
+		drm_sg_cleanup(entry);
+		return EINVAL;
+	}
 	dev->sg = entry;
+	DRM_UNLOCK();
 
 	return 0;
-
-	DRM(sg_cleanup)( entry );
-	return ENOMEM;
 }
 
-int DRM(sg_free)( DRM_IOCTL_ARGS )
+int drm_sg_free(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_scatter_gather_t request;
@@ -125,28 +110,17 @@ int DRM(sg_free)( DRM_IOCTL_ARGS )
 	DRM_COPY_FROM_USER_IOCTL( request, (drm_scatter_gather_t *)data,
 			     sizeof(request) );
 
+	DRM_LOCK();
 	entry = dev->sg;
 	dev->sg = NULL;
+	DRM_UNLOCK();
 
 	if ( !entry || entry->handle != request.handle )
 		return EINVAL;
 
 	DRM_DEBUG( "sg free virtual  = %p\n", entry->virtual );
 
-	DRM(sg_cleanup)( entry );
+	drm_sg_cleanup(entry);
 
 	return 0;
 }
-
-#else /* __REALLY_HAVE_SG */
-
-int DRM(sg_alloc)( DRM_IOCTL_ARGS )
-{
-	return DRM_ERR(EINVAL);
-}
-int DRM(sg_free)( DRM_IOCTL_ARGS )
-{
-	return DRM_ERR(EINVAL);
-}
-
-#endif
diff --git a/sys/dev/drm/drm_sysctl.h b/sys/dev/drm/drm_sysctl.c
index 64b3408..5a9e35b 100644
--- a/sys/dev/drm/drm_sysctl.h
+++ b/sys/dev/drm/drm_sysctl.c
@@ -16,57 +16,49 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
+ * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  * $FreeBSD$
  */
 
-#ifdef __FreeBSD__
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
 
 #include <sys/sysctl.h>
 
-static int	   DRM(name_info)DRM_SYSCTL_HANDLER_ARGS;
-static int	   DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS;
-static int	   DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS;
-#if __HAVE_DMA
-static int	   DRM(bufs_info)DRM_SYSCTL_HANDLER_ARGS;
-#endif
+static int	   drm_name_info DRM_SYSCTL_HANDLER_ARGS;
+static int	   drm_vm_info DRM_SYSCTL_HANDLER_ARGS;
+static int	   drm_clients_info DRM_SYSCTL_HANDLER_ARGS;
+static int	   drm_bufs_info DRM_SYSCTL_HANDLER_ARGS;
 
-struct DRM(sysctl_list) {
+struct drm_sysctl_list {
 	const char *name;
 	int	   (*f) DRM_SYSCTL_HANDLER_ARGS;
-} DRM(sysctl_list)[] = {
-	{ "name",    DRM(name_info)    },
-#ifdef DEBUG_MEMORY
-	{ "mem",     DRM(mem_info)     },
-#endif
-	{ "vm",	     DRM(vm_info)      },
-	{ "clients", DRM(clients_info) },
-#if __HAVE_DMA
-	{ "bufs",    DRM(bufs_info)    },
-#endif
+} drm_sysctl_list[] = {
+	{"name",    drm_name_info},
+	{"vm",	    drm_vm_info},
+	{"clients", drm_clients_info},
+	{"bufs",    drm_bufs_info},
 };
-#define DRM_SYSCTL_ENTRIES (sizeof(DRM(sysctl_list))/sizeof(DRM(sysctl_list)[0]))
+#define DRM_SYSCTL_ENTRIES (sizeof(drm_sysctl_list)/sizeof(drm_sysctl_list[0]))
 
 struct drm_sysctl_info {
 	struct sysctl_ctx_list ctx;
 	char		       name[2];
 };
 
-int DRM(sysctl_init)(drm_device_t *dev)
+int drm_sysctl_init(drm_device_t *dev)
 {
 	struct drm_sysctl_info *info;
 	struct sysctl_oid *oid;
 	struct sysctl_oid *top, *drioid;
 	int		  i;
 
-	info = DRM(alloc)(sizeof *info, DRM_MEM_DRIVER);
+	info = malloc(sizeof *info, M_DRM, M_WAITOK | M_ZERO);
 	if ( !info )
 		return 1;
-	bzero(info, sizeof *info);
 	dev->sysctl = info;
 
 	/* Add the sysctl node for DRI if it doesn't already exist */
@@ -91,28 +83,32 @@ int DRM(sysctl_init)(drm_device_t *dev)
 		return 1;
 	
 	for (i = 0; i < DRM_SYSCTL_ENTRIES; i++) {
-		oid = SYSCTL_ADD_OID( &info->ctx, 
+		oid = SYSCTL_ADD_OID(&info->ctx, 
 			SYSCTL_CHILDREN(top), 
 			OID_AUTO, 
-			DRM(sysctl_list)[i].name, 
+			drm_sysctl_list[i].name, 
 			CTLTYPE_INT | CTLFLAG_RD, 
 			dev, 
 			0, 
-			DRM(sysctl_list)[i].f, 
+			drm_sysctl_list[i].f, 
 			"A", 
 			NULL);
 		if (!oid)
 			return 1;
 	}
+	SYSCTL_ADD_INT(&info->ctx, SYSCTL_CHILDREN(top), OID_AUTO, "debug",
+	    CTLFLAG_RW, &drm_debug_flag, sizeof(drm_debug_flag),
+	    "Enable debugging output");
+
 	return 0;
 }
 
-int DRM(sysctl_cleanup)(drm_device_t *dev)
+int drm_sysctl_cleanup(drm_device_t *dev)
 {
 	int error;
 	error = sysctl_ctx_free( &dev->sysctl->ctx );
 
-	DRM(free)(dev->sysctl, sizeof *dev->sysctl, DRM_MEM_DRIVER);
+	free(dev->sysctl, M_DRM);
 	dev->sysctl = NULL;
 
 	return error;
@@ -126,14 +122,14 @@ do {								\
 		goto done;					\
 } while (0)
 
-static int DRM(name_info)DRM_SYSCTL_HANDLER_ARGS
+static int drm_name_info DRM_SYSCTL_HANDLER_ARGS
 {
 	drm_device_t *dev = arg1;
 	char buf[128];
 	int retcode;
 	int hasunique = 0;
 
-	DRM_SYSCTL_PRINT("%s 0x%x", dev->name, dev2udev(dev->devnode));
+	DRM_SYSCTL_PRINT("%s 0x%x", dev->driver_name, dev2udev(dev->devnode));
 	
 	DRM_LOCK();
 	if (dev->unique) {
@@ -151,11 +147,10 @@ done:
 	return retcode;
 }
 
-static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS
+static int drm_vm_info DRM_SYSCTL_HANDLER_ARGS
 {
 	drm_device_t *dev = arg1;
 	drm_local_map_t *map, *tempmaps;
-	drm_map_list_entry_t    *listentry;
 	const char   *types[] = { "FB", "REG", "SHM", "AGP", "SG" };
 	const char *type, *yesno;
 	int i, mapcount;
@@ -168,18 +163,18 @@ static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS
 	DRM_LOCK();
 
 	mapcount = 0;
-	TAILQ_FOREACH(listentry, dev->maplist, link)
+	TAILQ_FOREACH(map, &dev->maplist, link)
 		mapcount++;
 
-	tempmaps = DRM(alloc)(sizeof(drm_local_map_t) * mapcount, DRM_MEM_MAPS);
+	tempmaps = malloc(sizeof(drm_local_map_t) * mapcount, M_DRM, M_NOWAIT);
 	if (tempmaps == NULL) {
 		DRM_UNLOCK();
 		return ENOMEM;
 	}
 
 	i = 0;
-	TAILQ_FOREACH(listentry, dev->maplist, link)
-		tempmaps[i++] = *listentry->map;
+	TAILQ_FOREACH(map, &dev->maplist, link)
+		tempmaps[i++] = *map;
 
 	DRM_UNLOCK();
 
@@ -207,12 +202,11 @@ static int DRM(vm_info)DRM_SYSCTL_HANDLER_ARGS
 	SYSCTL_OUT(req, "", 1);
 
 done:
-	DRM(free)(tempmaps, sizeof(drm_local_map_t) * mapcount, DRM_MEM_MAPS);
+	free(tempmaps, M_DRM);
 	return retcode;
 }
 
-#if __HAVE_DMA
-static int DRM(bufs_info) DRM_SYSCTL_HANDLER_ARGS
+static int drm_bufs_info DRM_SYSCTL_HANDLER_ARGS
 {
 	drm_device_t	 *dev = arg1;
 	drm_device_dma_t *dma = dev->dma;
@@ -232,7 +226,7 @@ static int DRM(bufs_info) DRM_SYSCTL_HANDLER_ARGS
 	}
 	DRM_SPINLOCK(&dev->dma_lock);
 	tempdma = *dma;
-	templists = DRM(alloc)(sizeof(int) * dma->buf_count, DRM_MEM_BUFS);
+	templists = malloc(sizeof(int) * dma->buf_count, M_DRM, M_NOWAIT);
 	for (i = 0; i < dma->buf_count; i++)
 		templists[i] = dma->buflist[i]->list;
 	dma = &tempdma;
@@ -264,12 +258,11 @@ static int DRM(bufs_info) DRM_SYSCTL_HANDLER_ARGS
 
 	SYSCTL_OUT(req, "", 1);
 done:
-	DRM(free)(templists, sizeof(int) * dma->buf_count, DRM_MEM_BUFS);
+	free(templists, M_DRM);
 	return retcode;
 }
-#endif
 
-static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS
+static int drm_clients_info DRM_SYSCTL_HANDLER_ARGS
 {
 	drm_device_t *dev = arg1;
 	drm_file_t *priv, *tempprivs;
@@ -283,7 +276,7 @@ static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS
 	TAILQ_FOREACH(priv, &dev->files, link)
 		privcount++;
 
-	tempprivs = DRM(alloc)(sizeof(drm_file_t) * privcount, DRM_MEM_FILES);
+	tempprivs = malloc(sizeof(drm_file_t) * privcount, M_DRM, M_NOWAIT);
 	if (tempprivs == NULL) {
 		DRM_UNLOCK();
 		return ENOMEM;
@@ -308,19 +301,6 @@ static int DRM(clients_info)DRM_SYSCTL_HANDLER_ARGS
 
 	SYSCTL_OUT(req, "", 1);
 done:
-	DRM(free)(tempprivs, sizeof(drm_file_t) * privcount, DRM_MEM_FILES);
+	free(tempprivs, M_DRM);
 	return retcode;
 }
-
-#elif defined(__NetBSD__)
-/* stub it out for now, sysctl is only for debugging */
-int DRM(sysctl_init)(drm_device_t *dev)
-{
-	return 0;
-}
-
-int DRM(sysctl_cleanup)(drm_device_t *dev)
-{
-	return 0;
-}
-#endif
diff --git a/sys/dev/drm/drm_vm.h b/sys/dev/drm/drm_vm.c
index 23a6de7..81c00c2 100644
--- a/sys/dev/drm/drm_vm.h
+++ b/sys/dev/drm/drm_vm.c
@@ -16,71 +16,62 @@
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- *
+ * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  * $FreeBSD$
  */
 
-#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
-static int DRM(dma_mmap)(struct cdev *kdev, vm_offset_t offset, vm_paddr_t *paddr, 
-    int prot)
-#elif defined(__FreeBSD__)
-static int DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot)
-#elif defined(__NetBSD__)
-static paddr_t DRM(dma_mmap)(dev_t kdev, vm_offset_t offset, int prot)
-#endif
-{
-	DRM_DEVICE;
-	drm_device_dma_t *dma = dev->dma;
-	unsigned long physical;
-	unsigned long page;
-
-	if (dma == NULL || dma->pagelist == NULL)
-		return -1;
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
 
-	page	 = offset >> PAGE_SHIFT;
-	physical = dma->pagelist[page];
-
-	DRM_DEBUG("0x%08lx (page %lu) => 0x%08lx\n", (long)offset, page, physical);
 #if defined(__FreeBSD__) && __FreeBSD_version >= 500102
-	*paddr = physical;
-	return 0;
-#else
-	return atop(physical);
-#endif
-}
-
-#if defined(__FreeBSD__) && __FreeBSD_version >= 500102
-int DRM(mmap)(struct cdev *kdev, vm_offset_t offset, vm_paddr_t *paddr, 
+int drm_mmap(struct cdev *kdev, vm_offset_t offset, vm_paddr_t *paddr,
     int prot)
 #elif defined(__FreeBSD__)
-int DRM(mmap)(dev_t kdev, vm_offset_t offset, int prot)
-#elif defined(__NetBSD__)
-paddr_t DRM(mmap)(dev_t kdev, off_t offset, int prot)
+int drm_mmap(dev_t kdev, vm_offset_t offset, int prot)
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+paddr_t drm_mmap(dev_t kdev, off_t offset, int prot)
 #endif
 {
 	DRM_DEVICE;
-	drm_local_map_t *map = NULL;
-	drm_map_list_entry_t *listentry = NULL;
+	drm_local_map_t *map;
 	drm_file_t *priv;
+	drm_map_type_t type;
 
-	DRM_GET_PRIV_WITH_RETURN(priv, (DRMFILE)(uintptr_t)DRM_CURRENTPID);
+	DRM_LOCK();
+	priv = drm_find_file_by_proc(dev, DRM_CURPROC);
+	DRM_UNLOCK();
+	if (priv == NULL) {
+		DRM_ERROR("can't find authenticator\n");
+		return EINVAL;
+	}
 
 	if (!priv->authenticated)
 		return DRM_ERR(EACCES);
 
-	if (dev->dma
-	    && offset >= 0
-	    && offset < ptoa(dev->dma->page_count))
+	DRM_SPINLOCK(&dev->dma_lock);
+	if (dev->dma && offset >= 0 && offset < ptoa(dev->dma->page_count)) {
+		drm_device_dma_t *dma = dev->dma;
+
+		if (dma->pagelist != NULL) {
+			unsigned long page = offset >> PAGE_SHIFT;
+			unsigned long phys = dma->pagelist[page];
+
 #if defined(__FreeBSD__) && __FreeBSD_version >= 500102
-		return DRM(dma_mmap)(kdev, offset, paddr, prot);
+			*paddr = phys;
+			DRM_SPINUNLOCK(&dev->dma_lock);
+			return 0;
 #else
-		return DRM(dma_mmap)(kdev, offset, prot);
+			return atop(phys);
 #endif
+		} else {
+			DRM_SPINUNLOCK(&dev->dma_lock);
+			return -1;
+		}
+	}
+	DRM_SPINUNLOCK(&dev->dma_lock);
 
 				/* A sequential search of a linked list is
 				   fine here because: 1) there will only be
@@ -89,23 +80,26 @@ paddr_t DRM(mmap)(dev_t kdev, off_t offset, int prot)
 				   once, so it doesn't have to be optimized
 				   for performance, even if the list was a
 				   bit longer. */
-	TAILQ_FOREACH(listentry, dev->maplist, link) {
-		map = listentry->map;
-/*		DRM_DEBUG("considering 0x%x..0x%x\n", map->offset, map->offset + map->size - 1);*/
-		if (offset >= map->offset
-		    && offset < map->offset + map->size) break;
+	DRM_LOCK();
+	TAILQ_FOREACH(map, &dev->maplist, link) {
+		if (offset >= map->offset && offset < map->offset + map->size)
+			break;
 	}
-	
-	if (!listentry) {
+
+	if (map == NULL) {
+		DRM_UNLOCK();
 		DRM_DEBUG("can't find map\n");
 		return -1;
 	}
 	if (((map->flags&_DRM_RESTRICTED) && DRM_SUSER(DRM_CURPROC))) {
+		DRM_UNLOCK();
 		DRM_DEBUG("restricted map\n");
 		return -1;
 	}
+	type = map->type;
+	DRM_UNLOCK();
 
-	switch (map->type) {
+	switch (type) {
 	case _DRM_FRAME_BUFFER:
 	case _DRM_REGISTERS:
 	case _DRM_AGP:
@@ -127,7 +121,7 @@ paddr_t DRM(mmap)(dev_t kdev, off_t offset, int prot)
 		return -1;	/* This should never happen. */
 	}
 	DRM_DEBUG("bailing out\n");
-	
+
 	return -1;
 }
 
diff --git a/sys/dev/drm/i915_dma.c b/sys/dev/drm/i915_dma.c
new file mode 100644
index 0000000..035bf20
--- /dev/null
+++ b/sys/dev/drm/i915_dma.c
@@ -0,0 +1,728 @@
+/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
+ *
+ * $FreeBSD$
+ */
+/**************************************************************************
+ *
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+/* Really want an OS-independent resettable timer.  Would like to have
+ * this loop run for (eg) 3 sec, but have the timer reset every time
+ * the head pointer changes, so that EBUSY only happens if the ring
+ * actually stalls for (eg) 3 seconds.
+ */
+int i915_wait_ring(drm_device_t * dev, int n, const char *caller)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
+	u32 last_head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
+	int i;
+
+	for (i = 0; i < 10000; i++) {
+		ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
+		ring->space = ring->head - (ring->tail + 8);
+		if (ring->space < 0)
+			ring->space += ring->Size;
+		if (ring->space >= n)
+			return 0;
+
+		dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
+
+		if (ring->head != last_head)
+			i = 0;
+
+		last_head = ring->head;
+	}
+
+	return DRM_ERR(EBUSY);
+}
+
+void i915_kernel_lost_context(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_ring_buffer_t *ring = &(dev_priv->ring);
+
+	ring->head = I915_READ(LP_RING + RING_HEAD) & HEAD_ADDR;
+	ring->tail = I915_READ(LP_RING + RING_TAIL) & TAIL_ADDR;
+	ring->space = ring->head - (ring->tail + 8);
+	if (ring->space < 0)
+		ring->space += ring->Size;
+
+	if (ring->head == ring->tail)
+		dev_priv->sarea_priv->perf_boxes |= I915_BOX_RING_EMPTY;
+}
+
+static int i915_dma_cleanup(drm_device_t * dev)
+{
+	/* Make sure interrupts are disabled here because the uninstall ioctl
+	 * may not have been called from userspace and after dev_private
+	 * is freed, it's too late.
+	 */
+	if (dev->irq)
+		drm_irq_uninstall(dev);
+
+	if (dev->dev_private) {
+		drm_i915_private_t *dev_priv =
+		    (drm_i915_private_t *) dev->dev_private;
+
+		if (dev_priv->ring.virtual_start) {
+			drm_core_ioremapfree(&dev_priv->ring.map, dev);
+		}
+
+		if (dev_priv->hw_status_page) {
+			drm_pci_free(dev, PAGE_SIZE, dev_priv->hw_status_page,
+				     dev_priv->dma_status_page);
+			/* Need to rewrite hardware status page */
+			I915_WRITE(0x02080, 0x1ffff000);
+		}
+
+		drm_free(dev->dev_private, sizeof(drm_i915_private_t),
+			 DRM_MEM_DRIVER);
+
+		dev->dev_private = NULL;
+	}
+
+	return 0;
+}
+
+static int i915_initialize(drm_device_t * dev,
+			   drm_i915_private_t * dev_priv,
+			   drm_i915_init_t * init)
+{
+	memset(dev_priv, 0, sizeof(drm_i915_private_t));
+
+	DRM_GETSAREA();
+	if (!dev_priv->sarea) {
+		DRM_ERROR("can not find sarea!\n");
+		dev->dev_private = (void *)dev_priv;
+		i915_dma_cleanup(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->mmio_map = drm_core_findmap(dev, init->mmio_offset);
+	if (!dev_priv->mmio_map) {
+		dev->dev_private = (void *)dev_priv;
+		i915_dma_cleanup(dev);
+		DRM_ERROR("can not find mmio map!\n");
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->sarea_priv = (drm_i915_sarea_t *)
+	    ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
+
+	dev_priv->ring.Start = init->ring_start;
+	dev_priv->ring.End = init->ring_end;
+	dev_priv->ring.Size = init->ring_size;
+	dev_priv->ring.tail_mask = dev_priv->ring.Size - 1;
+
+	dev_priv->ring.map.offset = init->ring_start;
+	dev_priv->ring.map.size = init->ring_size;
+	dev_priv->ring.map.type = 0;
+	dev_priv->ring.map.flags = 0;
+	dev_priv->ring.map.mtrr = 0;
+
+	drm_core_ioremap(&dev_priv->ring.map, dev);
+
+	if (dev_priv->ring.map.handle == NULL) {
+		dev->dev_private = (void *)dev_priv;
+		i915_dma_cleanup(dev);
+		DRM_ERROR("can not ioremap virtual address for"
+			  " ring buffer\n");
+		return DRM_ERR(ENOMEM);
+	}
+
+	dev_priv->ring.virtual_start = dev_priv->ring.map.handle;
+
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->current_page = 0;
+	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
+
+	/* We are using separate values as placeholders for mechanisms for
+	 * private backbuffer/depthbuffer usage.
+	 */
+	dev_priv->use_mi_batchbuffer_start = 0;
+
+	/* Allow hardware batchbuffers unless told otherwise.
+	 */
+	dev_priv->allow_batchbuffer = 1;
+
+	/* Program Hardware Status Page */
+	dev_priv->hw_status_page = drm_pci_alloc(dev, PAGE_SIZE, PAGE_SIZE, 
+	    0xffffffff, &dev_priv->dma_status_page);
+
+	if (!dev_priv->hw_status_page) {
+		dev->dev_private = (void *)dev_priv;
+		i915_dma_cleanup(dev);
+		DRM_ERROR("Can not allocate hardware status page\n");
+		return DRM_ERR(ENOMEM);
+	}
+	memset(dev_priv->hw_status_page, 0, PAGE_SIZE);
+	DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
+
+	I915_WRITE(0x02080, dev_priv->dma_status_page);
+	DRM_DEBUG("Enabled hardware status page\n");
+
+	dev->dev_private = (void *)dev_priv;
+
+	return 0;
+}
+
+static int i915_dma_resume(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	if (!dev_priv->sarea) {
+		DRM_ERROR("can not find sarea!\n");
+		return DRM_ERR(EINVAL);
+	}
+
+	if (!dev_priv->mmio_map) {
+		DRM_ERROR("can not find mmio map!\n");
+		return DRM_ERR(EINVAL);
+	}
+
+	if (dev_priv->ring.map.handle == NULL) {
+		DRM_ERROR("can not ioremap virtual address for"
+			  " ring buffer\n");
+		return DRM_ERR(ENOMEM);
+	}
+
+	/* Program Hardware Status Page */
+	if (!dev_priv->hw_status_page) {
+		DRM_ERROR("Can not find hardware status page\n");
+		return DRM_ERR(EINVAL);
+	}
+	DRM_DEBUG("hw status page @ %p\n", dev_priv->hw_status_page);
+
+	I915_WRITE(0x02080, dev_priv->dma_status_page);
+	DRM_DEBUG("Enabled hardware status page\n");
+
+	return 0;
+}
+
+static int i915_dma_init(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv;
+	drm_i915_init_t init;
+	int retcode = 0;
+
+	DRM_COPY_FROM_USER_IOCTL(init, (drm_i915_init_t __user *) data,
+				 sizeof(init));
+
+	switch (init.func) {
+	case I915_INIT_DMA:
+		dev_priv = drm_alloc(sizeof(drm_i915_private_t),
+				     DRM_MEM_DRIVER);
+		if (dev_priv == NULL)
+			return DRM_ERR(ENOMEM);
+		retcode = i915_initialize(dev, dev_priv, &init);
+		break;
+	case I915_CLEANUP_DMA:
+		retcode = i915_dma_cleanup(dev);
+		break;
+	case I915_RESUME_DMA:
+		retcode = i915_dma_resume(dev);
+		break;
+	default:
+		retcode = -EINVAL;
+		break;
+	}
+
+	return retcode;
+}
+
+/* Implement basically the same security restrictions as hardware does
+ * for MI_BATCH_NON_SECURE.  These can be made stricter at any time.
+ *
+ * Most of the calculations below involve calculating the size of a
+ * particular instruction.  It's important to get the size right as
+ * that tells us where the next instruction to check is.  Any illegal
+ * instruction detected will be given a size of zero, which is a
+ * signal to abort the rest of the buffer.
+ */
+static int do_validate_cmd(int cmd)
+{
+	switch (((cmd >> 29) & 0x7)) {
+	case 0x0:
+		switch ((cmd >> 23) & 0x3f) {
+		case 0x0:
+			return 1;	/* MI_NOOP */
+		case 0x4:
+			return 1;	/* MI_FLUSH */
+		default:
+			return 0;	/* disallow everything else */
+		}
+		break;
+	case 0x1:
+		return 0;	/* reserved */
+	case 0x2:
+		return (cmd & 0xff) + 2;	/* 2d commands */
+	case 0x3:
+		if (((cmd >> 24) & 0x1f) <= 0x18)
+			return 1;
+
+		switch ((cmd >> 24) & 0x1f) {
+		case 0x1c:
+			return 1;
+		case 0x1d:
+			switch ((cmd >> 16) & 0xff) {
+			case 0x3:
+				return (cmd & 0x1f) + 2;
+			case 0x4:
+				return (cmd & 0xf) + 2;
+			default:
+				return (cmd & 0xffff) + 2;
+			}
+		case 0x1e:
+			if (cmd & (1 << 23))
+				return (cmd & 0xffff) + 1;
+			else
+				return 1;
+		case 0x1f:
+			if ((cmd & (1 << 23)) == 0)	/* inline vertices */
+				return (cmd & 0x1ffff) + 2;
+			else if (cmd & (1 << 17))	/* indirect random */
+				if ((cmd & 0xffff) == 0)
+					return 0;	/* unknown length, too hard */
+				else
+					return (((cmd & 0xffff) + 1) / 2) + 1;
+			else
+				return 2;	/* indirect sequential */
+		default:
+			return 0;
+		}
+	default:
+		return 0;
+	}
+
+	return 0;
+}
+
+static int validate_cmd(int cmd)
+{
+	int ret = do_validate_cmd(cmd);
+
+/* 	printk("validate_cmd( %x ): %d\n", cmd, ret); */
+
+	return ret;
+}
+
+static int i915_emit_cmds(drm_device_t * dev, int __user * buffer, int dwords)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	int i;
+	RING_LOCALS;
+
+	for (i = 0; i < dwords;) {
+		int cmd, sz;
+
+		if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i], sizeof(cmd)))
+			return DRM_ERR(EINVAL);
+
+/* 		printk("%d/%d ", i, dwords); */
+
+		if ((sz = validate_cmd(cmd)) == 0 || i + sz > dwords)
+			return DRM_ERR(EINVAL);
+
+		BEGIN_LP_RING(sz);
+		OUT_RING(cmd);
+
+		while (++i, --sz) {
+			if (DRM_COPY_FROM_USER_UNCHECKED(&cmd, &buffer[i],
+							 sizeof(cmd))) {
+				return DRM_ERR(EINVAL);
+			}
+			OUT_RING(cmd);
+		}
+		ADVANCE_LP_RING();
+	}
+
+	return 0;
+}
+
+static int i915_emit_box(drm_device_t * dev,
+			 drm_clip_rect_t __user * boxes,
+			 int i, int DR1, int DR4)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_clip_rect_t box;
+	RING_LOCALS;
+
+	if (DRM_COPY_FROM_USER_UNCHECKED(&box, &boxes[i], sizeof(box))) {
+		return EFAULT;
+	}
+
+	if (box.y2 <= box.y1 || box.x2 <= box.x1 || box.y2 <= 0 || box.x2 <= 0) {
+		DRM_ERROR("Bad box %d,%d..%d,%d\n",
+			  box.x1, box.y1, box.x2, box.y2);
+		return DRM_ERR(EINVAL);
+	}
+
+	BEGIN_LP_RING(6);
+	OUT_RING(GFX_OP_DRAWRECT_INFO);
+	OUT_RING(DR1);
+	OUT_RING((box.x1 & 0xffff) | (box.y1 << 16));
+	OUT_RING(((box.x2 - 1) & 0xffff) | ((box.y2 - 1) << 16));
+	OUT_RING(DR4);
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+	return 0;
+}
+
+static int i915_dispatch_cmdbuffer(drm_device_t * dev,
+				   drm_i915_cmdbuffer_t * cmd)
+{
+	int nbox = cmd->num_cliprects;
+	int i = 0, count, ret;
+
+	if (cmd->sz & 0x3) {
+		DRM_ERROR("alignment");
+		return DRM_ERR(EINVAL);
+	}
+
+	i915_kernel_lost_context(dev);
+
+	count = nbox ? nbox : 1;
+
+	for (i = 0; i < count; i++) {
+		if (i < nbox) {
+			ret = i915_emit_box(dev, cmd->cliprects, i,
+					    cmd->DR1, cmd->DR4);
+			if (ret)
+				return ret;
+		}
+
+		ret = i915_emit_cmds(dev, (int __user *)cmd->buf, cmd->sz / 4);
+		if (ret)
+			return ret;
+	}
+
+	return 0;
+}
+
+static int i915_dispatch_batchbuffer(drm_device_t * dev,
+				     drm_i915_batchbuffer_t * batch)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_clip_rect_t __user *boxes = batch->cliprects;
+	int nbox = batch->num_cliprects;
+	int i = 0, count;
+	RING_LOCALS;
+
+	if ((batch->start | batch->used) & 0x7) {
+		DRM_ERROR("alignment");
+		return DRM_ERR(EINVAL);
+	}
+
+	i915_kernel_lost_context(dev);
+
+	count = nbox ? nbox : 1;
+
+	for (i = 0; i < count; i++) {
+		if (i < nbox) {
+			int ret = i915_emit_box(dev, boxes, i,
+						batch->DR1, batch->DR4);
+			if (ret)
+				return ret;
+		}
+
+		if (dev_priv->use_mi_batchbuffer_start) {
+			BEGIN_LP_RING(2);
+			OUT_RING(MI_BATCH_BUFFER_START | (2 << 6));
+			OUT_RING(batch->start | MI_BATCH_NON_SECURE);
+			ADVANCE_LP_RING();
+		} else {
+			BEGIN_LP_RING(4);
+			OUT_RING(MI_BATCH_BUFFER);
+			OUT_RING(batch->start | MI_BATCH_NON_SECURE);
+			OUT_RING(batch->start + batch->used - 4);
+			OUT_RING(0);
+			ADVANCE_LP_RING();
+		}
+	}
+
+	dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
+
+	BEGIN_LP_RING(4);
+	OUT_RING(CMD_STORE_DWORD_IDX);
+	OUT_RING(20);
+	OUT_RING(dev_priv->counter);
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+	return 0;
+}
+
+static int i915_dispatch_flip(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	RING_LOCALS;
+
+	DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
+		  __FUNCTION__,
+		  dev_priv->current_page,
+		  dev_priv->sarea_priv->pf_current_page);
+
+	i915_kernel_lost_context(dev);
+
+	BEGIN_LP_RING(2);
+	OUT_RING(INST_PARSER_CLIENT | INST_OP_FLUSH | INST_FLUSH_MAP_CACHE);
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+	BEGIN_LP_RING(6);
+	OUT_RING(CMD_OP_DISPLAYBUFFER_INFO | ASYNC_FLIP);
+	OUT_RING(0);
+	if (dev_priv->current_page == 0) {
+		OUT_RING(dev_priv->back_offset);
+		dev_priv->current_page = 1;
+	} else {
+		OUT_RING(dev_priv->front_offset);
+		dev_priv->current_page = 0;
+	}
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+	BEGIN_LP_RING(2);
+	OUT_RING(MI_WAIT_FOR_EVENT | MI_WAIT_FOR_PLANE_A_FLIP);
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+	dev_priv->sarea_priv->last_enqueue = dev_priv->counter++;
+
+	BEGIN_LP_RING(4);
+	OUT_RING(CMD_STORE_DWORD_IDX);
+	OUT_RING(20);
+	OUT_RING(dev_priv->counter);
+	OUT_RING(0);
+	ADVANCE_LP_RING();
+
+	dev_priv->sarea_priv->pf_current_page = dev_priv->current_page;
+	return 0;
+}
+
+static int i915_quiescent(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+
+	i915_kernel_lost_context(dev);
+	return i915_wait_ring(dev, dev_priv->ring.Size - 8, __FUNCTION__);
+}
+
+static int i915_flush_ioctl(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	return i915_quiescent(dev);
+}
+
+static int i915_batchbuffer(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	u32 *hw_status = dev_priv->hw_status_page;
+	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
+	    dev_priv->sarea_priv;
+	drm_i915_batchbuffer_t batch;
+	int ret;
+
+	if (!dev_priv->allow_batchbuffer) {
+		DRM_ERROR("Batchbuffer ioctl disabled\n");
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(batch, (drm_i915_batchbuffer_t __user *) data,
+				 sizeof(batch));
+
+	DRM_DEBUG("i915 batchbuffer, start %x used %d cliprects %d\n",
+		  batch.start, batch.used, batch.num_cliprects);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	if (batch.num_cliprects && DRM_VERIFYAREA_READ(batch.cliprects,
+						       batch.num_cliprects *
+						       sizeof(drm_clip_rect_t)))
+		return DRM_ERR(EFAULT);
+
+	ret = i915_dispatch_batchbuffer(dev, &batch);
+
+	sarea_priv->last_dispatch = (int)hw_status[5];
+	return ret;
+}
+
+static int i915_cmdbuffer(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	u32 *hw_status = dev_priv->hw_status_page;
+	drm_i915_sarea_t *sarea_priv = (drm_i915_sarea_t *)
+	    dev_priv->sarea_priv;
+	drm_i915_cmdbuffer_t cmdbuf;
+	int ret;
+
+	DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_i915_cmdbuffer_t __user *) data,
+				 sizeof(cmdbuf));
+
+	DRM_DEBUG("i915 cmdbuffer, buf %p sz %d cliprects %d\n",
+		  cmdbuf.buf, cmdbuf.sz, cmdbuf.num_cliprects);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	if (cmdbuf.num_cliprects &&
+	    DRM_VERIFYAREA_READ(cmdbuf.cliprects,
+				cmdbuf.num_cliprects *
+				sizeof(drm_clip_rect_t))) {
+		DRM_ERROR("Fault accessing cliprects\n");
+		return DRM_ERR(EFAULT);
+	}
+
+	ret = i915_dispatch_cmdbuffer(dev, &cmdbuf);
+	if (ret) {
+		DRM_ERROR("i915_dispatch_cmdbuffer failed\n");
+		return ret;
+	}
+
+	sarea_priv->last_dispatch = (int)hw_status[5];
+	return 0;
+}
+
+static int i915_do_cleanup_pageflip(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+	if (dev_priv->current_page != 0)
+		i915_dispatch_flip(dev);
+
+	return 0;
+}
+
+static int i915_flip_bufs(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	return i915_dispatch_flip(dev);
+}
+
+static int i915_getparam(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_getparam_t param;
+	int value;
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_getparam_t __user *) data,
+				 sizeof(param));
+
+	switch (param.param) {
+	case I915_PARAM_IRQ_ACTIVE:
+		value = dev->irq ? 1 : 0;
+		break;
+	case I915_PARAM_ALLOW_BATCHBUFFER:
+		value = dev_priv->allow_batchbuffer ? 1 : 0;
+		break;
+	default:
+		DRM_ERROR("Unkown parameter %d\n", param.param);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
+		DRM_ERROR("DRM_COPY_TO_USER failed\n");
+		return DRM_ERR(EFAULT);
+	}
+
+	return 0;
+}
+
+static int i915_setparam(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_setparam_t param;
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(param, (drm_i915_setparam_t __user *) data,
+				 sizeof(param));
+
+	switch (param.param) {
+	case I915_SETPARAM_USE_MI_BATCHBUFFER_START:
+		dev_priv->use_mi_batchbuffer_start = param.value;
+		break;
+	case I915_SETPARAM_TEX_LRU_LOG_GRANULARITY:
+		dev_priv->tex_lru_log_granularity = param.value;
+		break;
+	case I915_SETPARAM_ALLOW_BATCHBUFFER:
+		dev_priv->allow_batchbuffer = param.value;
+		break;
+	default:
+		DRM_ERROR("unknown parameter %d\n", param.param);
+		return DRM_ERR(EINVAL);
+	}
+
+	return 0;
+}
+
+void i915_driver_pretakedown(drm_device_t * dev)
+{
+	if (dev->dev_private) {
+		drm_i915_private_t *dev_priv = dev->dev_private;
+		i915_mem_takedown(&(dev_priv->agp_heap));
+	}
+	i915_dma_cleanup(dev);
+}
+
+void i915_driver_prerelease(drm_device_t * dev, DRMFILE filp)
+{
+	if (dev->dev_private) {
+		drm_i915_private_t *dev_priv = dev->dev_private;
+		if (dev_priv->page_flipping) {
+			i915_do_cleanup_pageflip(dev);
+		}
+		i915_mem_release(dev, filp, dev_priv->agp_heap);
+	}
+}
+
+drm_ioctl_desc_t i915_ioctls[] = {
+	[DRM_IOCTL_NR(DRM_I915_INIT)] = {i915_dma_init, 1, 1},
+	[DRM_IOCTL_NR(DRM_I915_FLUSH)] = {i915_flush_ioctl, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_FLIP)] = {i915_flip_bufs, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_BATCHBUFFER)] = {i915_batchbuffer, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_IRQ_EMIT)] = {i915_irq_emit, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_IRQ_WAIT)] = {i915_irq_wait, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_GETPARAM)] = {i915_getparam, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_SETPARAM)] = {i915_setparam, 1, 1},
+	[DRM_IOCTL_NR(DRM_I915_ALLOC)] = {i915_mem_alloc, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_FREE)] = {i915_mem_free, 1, 0},
+	[DRM_IOCTL_NR(DRM_I915_INIT_HEAP)] = {i915_mem_init_heap, 1, 1},
+	[DRM_IOCTL_NR(DRM_I915_CMDBUFFER)] = {i915_cmdbuffer, 1, 0}
+};
+
+int i915_max_ioctl = DRM_ARRAY_SIZE(i915_ioctls);
diff --git a/sys/dev/drm/i915_drm.h b/sys/dev/drm/i915_drm.h
new file mode 100644
index 0000000..8d54d9c
--- /dev/null
+++ b/sys/dev/drm/i915_drm.h
@@ -0,0 +1,169 @@
+/* $FreeBSD$ */
+
+#ifndef _I915_DRM_H_
+#define _I915_DRM_H_
+
+/* Please note that modifications to all structs defined here are
+ * subject to backwards-compatibility constraints.
+ */
+
+#include "drm.h"
+
+/* Each region is a minimum of 16k, and there are at most 255 of them.
+ */
+#define I915_NR_TEX_REGIONS 255	/* table size 2k - maximum due to use
+				 * of chars for next/prev indices */
+#define I915_LOG_MIN_TEX_REGION_SIZE 14
+
+typedef struct _drm_i915_init {
+	enum {
+		I915_INIT_DMA = 0x01,
+		I915_CLEANUP_DMA = 0x02,
+		I915_RESUME_DMA = 0x03
+	} func;
+	unsigned int mmio_offset;
+	int sarea_priv_offset;
+	unsigned int ring_start;
+	unsigned int ring_end;
+	unsigned int ring_size;
+	unsigned int front_offset;
+	unsigned int back_offset;
+	unsigned int depth_offset;
+	unsigned int w;
+	unsigned int h;
+	unsigned int pitch;
+	unsigned int pitch_bits;
+	unsigned int back_pitch;
+	unsigned int depth_pitch;
+	unsigned int cpp;
+	unsigned int chipset;
+} drm_i915_init_t;
+
+typedef struct _drm_i915_sarea {
+	drm_tex_region_t texList[I915_NR_TEX_REGIONS + 1];
+	int last_upload;	/* last time texture was uploaded */
+	int last_enqueue;	/* last time a buffer was enqueued */
+	int last_dispatch;	/* age of the most recently dispatched buffer */
+	int ctxOwner;		/* last context to upload state */
+	int texAge;
+	int pf_enabled;		/* is pageflipping allowed? */
+	int pf_active;
+	int pf_current_page;	/* which buffer is being displayed? */
+	int perf_boxes;		/* performance boxes to be displayed */
+} drm_i915_sarea_t;
+
+/* Flags for perf_boxes
+ */
+#define I915_BOX_RING_EMPTY    0x1
+#define I915_BOX_FLIP          0x2
+#define I915_BOX_WAIT          0x4
+#define I915_BOX_TEXTURE_LOAD  0x8
+#define I915_BOX_LOST_CONTEXT  0x10
+
+/* I915 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+#define DRM_I915_INIT		0x00
+#define DRM_I915_FLUSH		0x01
+#define DRM_I915_FLIP		0x02
+#define DRM_I915_BATCHBUFFER	0x03
+#define DRM_I915_IRQ_EMIT	0x04
+#define DRM_I915_IRQ_WAIT	0x05
+#define DRM_I915_GETPARAM	0x06
+#define DRM_I915_SETPARAM	0x07
+#define DRM_I915_ALLOC		0x08
+#define DRM_I915_FREE		0x09
+#define DRM_I915_INIT_HEAP	0x0a
+#define DRM_I915_CMDBUFFER	0x0b
+
+#define DRM_IOCTL_I915_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT, drm_i915_init_t)
+#define DRM_IOCTL_I915_FLUSH		DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLUSH)
+#define DRM_IOCTL_I915_FLIP		DRM_IO ( DRM_COMMAND_BASE + DRM_I915_FLIP)
+#define DRM_IOCTL_I915_BATCHBUFFER	DRM_IOW( DRM_COMMAND_BASE + DRM_I915_BATCHBUFFER, drm_i915_batchbuffer_t)
+#define DRM_IOCTL_I915_IRQ_EMIT         DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_IRQ_EMIT, drm_i915_irq_emit_t)
+#define DRM_IOCTL_I915_IRQ_WAIT         DRM_IOW( DRM_COMMAND_BASE + DRM_I915_IRQ_WAIT, drm_i915_irq_wait_t)
+#define DRM_IOCTL_I915_GETPARAM         DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_GETPARAM, drm_i915_getparam_t)
+#define DRM_IOCTL_I915_SETPARAM         DRM_IOW( DRM_COMMAND_BASE + DRM_I915_SETPARAM, drm_i915_setparam_t)
+#define DRM_IOCTL_I915_ALLOC            DRM_IOWR(DRM_COMMAND_BASE + DRM_I915_ALLOC, drm_i915_mem_alloc_t)
+#define DRM_IOCTL_I915_FREE             DRM_IOW( DRM_COMMAND_BASE + DRM_I915_FREE, drm_i915_mem_free_t)
+#define DRM_IOCTL_I915_INIT_HEAP        DRM_IOW( DRM_COMMAND_BASE + DRM_I915_INIT_HEAP, drm_i915_mem_init_heap_t)
+#define DRM_IOCTL_I915_CMDBUFFER	DRM_IOW( DRM_COMMAND_BASE + DRM_I915_CMDBUFFER, drm_i915_cmdbuffer_t)
+
+/* Allow drivers to submit batchbuffers directly to hardware, relying
+ * on the security mechanisms provided by hardware.
+ */
+typedef struct _drm_i915_batchbuffer {
+	int start;		/* agp offset */
+	int used;		/* nr bytes in use */
+	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
+	int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO */
+	int num_cliprects;	/* mulitpass with multiple cliprects? */
+	drm_clip_rect_t __user *cliprects;	/* pointer to userspace cliprects */
+} drm_i915_batchbuffer_t;
+
+/* As above, but pass a pointer to userspace buffer which can be
+ * validated by the kernel prior to sending to hardware.
+ */
+typedef struct _drm_i915_cmdbuffer {
+	char __user *buf;	/* pointer to userspace command buffer */
+	int sz;			/* nr bytes in buf */
+	int DR1;		/* hw flags for GFX_OP_DRAWRECT_INFO */
+	int DR4;		/* window origin for GFX_OP_DRAWRECT_INFO */
+	int num_cliprects;	/* mulitpass with multiple cliprects? */
+	drm_clip_rect_t __user *cliprects;	/* pointer to userspace cliprects */
+} drm_i915_cmdbuffer_t;
+
+/* Userspace can request & wait on irq's:
+ */
+typedef struct drm_i915_irq_emit {
+	int __user *irq_seq;
+} drm_i915_irq_emit_t;
+
+typedef struct drm_i915_irq_wait {
+	int irq_seq;
+} drm_i915_irq_wait_t;
+
+/* Ioctl to query kernel params:
+ */
+#define I915_PARAM_IRQ_ACTIVE            1
+#define I915_PARAM_ALLOW_BATCHBUFFER     2
+
+typedef struct drm_i915_getparam {
+	int param;
+	int __user *value;
+} drm_i915_getparam_t;
+
+/* Ioctl to set kernel params:
+ */
+#define I915_SETPARAM_USE_MI_BATCHBUFFER_START            1
+#define I915_SETPARAM_TEX_LRU_LOG_GRANULARITY             2
+#define I915_SETPARAM_ALLOW_BATCHBUFFER                   3
+
+typedef struct drm_i915_setparam {
+	int param;
+	int value;
+} drm_i915_setparam_t;
+
+/* A memory manager for regions of shared memory:
+ */
+#define I915_MEM_REGION_AGP 1
+
+typedef struct drm_i915_mem_alloc {
+	int region;
+	int alignment;
+	int size;
+	int __user *region_offset;	/* offset from start of fb or agp */
+} drm_i915_mem_alloc_t;
+
+typedef struct drm_i915_mem_free {
+	int region;
+	int region_offset;
+} drm_i915_mem_free_t;
+
+typedef struct drm_i915_mem_init_heap {
+	int region;
+	int size;
+	int start;
+} drm_i915_mem_init_heap_t;
+
+#endif				/* _I915_DRM_H_ */
diff --git a/sys/dev/drm/i915_drv.c b/sys/dev/drm/i915_drv.c
new file mode 100644
index 0000000..126fff1
--- /dev/null
+++ b/sys/dev/drm/i915_drv.c
@@ -0,0 +1,111 @@
+/* i915_drv.c -- ATI Radeon driver -*- linux-c -*-
+ * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
+ */
+/*-
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD$
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+#include "drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t i915_pciidlist[] = {
+	i915_PCI_IDS
+};
+
+extern drm_ioctl_desc_t i915_ioctls[];
+extern int i915_max_ioctl;
+
+static void i915_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = 1;	/* No dev_priv */
+	dev->prerelease = i915_driver_prerelease;
+	dev->pretakedown = i915_driver_pretakedown;
+	dev->irq_preinstall = i915_driver_irq_preinstall;
+	dev->irq_postinstall = i915_driver_irq_postinstall;
+	dev->irq_uninstall = i915_driver_irq_uninstall;
+	dev->irq_handler = i915_driver_irq_handler;
+
+	dev->driver_ioctls = i915_ioctls;
+	dev->max_driver_ioctl = i915_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->require_agp = 1;
+	dev->use_mtrr = 1;
+	dev->use_irq = 1;
+}
+
+#ifdef __FreeBSD__
+static int
+i915_probe(device_t dev)
+{
+	return drm_probe(dev, i915_pciidlist);
+}
+
+static int
+i915_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	i915_configure(dev);
+	return drm_attach(nbdev, i915_pciidlist);
+}
+
+static device_method_t i915_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		i915_probe),
+	DEVMETHOD(device_attach,	i915_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t i915_driver = {
+	"drmsub",
+	i915_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(i915, pci, i915_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(i915, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+CFDRIVER_DECL(i915, DV_TTY, NULL);
+#endif
diff --git a/sys/dev/drm/i915_drv.h b/sys/dev/drm/i915_drv.h
new file mode 100644
index 0000000..df4dda3
--- /dev/null
+++ b/sys/dev/drm/i915_drv.h
@@ -0,0 +1,239 @@
+/* i915_drv.h -- Private header for the I915 driver -*- linux-c -*-
+ *
+ * $FreeBSD$
+ */
+/**************************************************************************
+ *
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ **************************************************************************/
+
+#ifndef _I915_DRV_H_
+#define _I915_DRV_H_
+
+/* General customization:
+ */
+
+#define DRIVER_AUTHOR		"Tungsten Graphics, Inc."
+
+#define DRIVER_NAME		"i915"
+#define DRIVER_DESC		"Intel Graphics"
+#define DRIVER_DATE		"20041217"
+
+/* Interface history:
+ *
+ * 1.1: Original.
+ * 1.2: Add Power Management
+ */
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		2
+#define DRIVER_PATCHLEVEL	0
+
+typedef struct _drm_i915_ring_buffer {
+	int tail_mask;
+	unsigned long Start;
+	unsigned long End;
+	unsigned long Size;
+	u8 *virtual_start;
+	int head;
+	int tail;
+	int space;
+	drm_local_map_t map;
+} drm_i915_ring_buffer_t;
+
+struct mem_block {
+	struct mem_block *next;
+	struct mem_block *prev;
+	int start;
+	int size;
+	DRMFILE filp;		/* 0: free, -1: heap, other: real files */
+};
+
+typedef struct drm_i915_private {
+	drm_local_map_t *sarea;
+	drm_local_map_t *mmio_map;
+
+	drm_i915_sarea_t *sarea_priv;
+	drm_i915_ring_buffer_t ring;
+
+	void *hw_status_page;
+	unsigned long counter;
+	dma_addr_t dma_status_page;
+
+	int back_offset;
+	int front_offset;
+	int current_page;
+	int page_flipping;
+	int use_mi_batchbuffer_start;
+
+	wait_queue_head_t irq_queue;
+	atomic_t irq_received;
+	atomic_t irq_emitted;
+
+	int tex_lru_log_granularity;
+	int allow_batchbuffer;
+	struct mem_block *agp_heap;
+	unsigned int sr01, adpa, ppcr, dvob, dvoc, lvds;
+} drm_i915_private_t;
+
+				/* i915_dma.c */
+extern void i915_kernel_lost_context(drm_device_t * dev);
+extern void i915_driver_pretakedown(drm_device_t * dev);
+extern void i915_driver_prerelease(drm_device_t * dev, DRMFILE filp);
+
+/* i915_irq.c */
+extern int i915_irq_emit(DRM_IOCTL_ARGS);
+extern int i915_irq_wait(DRM_IOCTL_ARGS);
+
+extern irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS);
+extern void i915_driver_irq_preinstall(drm_device_t * dev);
+extern void i915_driver_irq_postinstall(drm_device_t * dev);
+extern void i915_driver_irq_uninstall(drm_device_t * dev);
+
+/* i915_mem.c */
+extern int i915_mem_alloc(DRM_IOCTL_ARGS);
+extern int i915_mem_free(DRM_IOCTL_ARGS);
+extern int i915_mem_init_heap(DRM_IOCTL_ARGS);
+extern void i915_mem_takedown(struct mem_block **heap);
+extern void i915_mem_release(drm_device_t * dev,
+			     DRMFILE filp, struct mem_block *heap);
+
+#define I915_READ(reg)          DRM_READ32(dev_priv->mmio_map, (reg))
+#define I915_WRITE(reg,val)     DRM_WRITE32(dev_priv->mmio_map, (reg), (val))
+#define I915_READ16(reg) 	DRM_READ16(dev_priv->mmio_map, (reg))
+#define I915_WRITE16(reg,val)	DRM_WRITE16(dev_priv->mmio_map, (reg), (val))
+
+#define I915_VERBOSE 0
+
+#define RING_LOCALS	unsigned int outring, ringmask, outcount; \
+                        volatile char *virt;
+
+#define BEGIN_LP_RING(n) do {				\
+	if (I915_VERBOSE)				\
+		DRM_DEBUG("BEGIN_LP_RING(%d) in %s\n",	\
+			  n, __FUNCTION__);		\
+	if (dev_priv->ring.space < n*4)			\
+		i915_wait_ring(dev, n*4, __FUNCTION__);		\
+	outcount = 0;					\
+	outring = dev_priv->ring.tail;			\
+	ringmask = dev_priv->ring.tail_mask;		\
+	virt = dev_priv->ring.virtual_start;		\
+} while (0)
+
+#define OUT_RING(n) do {					\
+	if (I915_VERBOSE) DRM_DEBUG("   OUT_RING %x\n", (int)(n));	\
+	*(volatile unsigned int *)(virt + outring) = n;		\
+        outcount++;						\
+	outring += 4;						\
+	outring &= ringmask;					\
+} while (0)
+
+#define ADVANCE_LP_RING() do {						\
+	if (I915_VERBOSE) DRM_DEBUG("ADVANCE_LP_RING %x\n", outring);	\
+	dev_priv->ring.tail = outring;					\
+	dev_priv->ring.space -= outcount * 4;				\
+	I915_WRITE(LP_RING + RING_TAIL, outring);			\
+} while(0)
+
+extern int i915_wait_ring(drm_device_t * dev, int n, const char *caller);
+
+#define GFX_OP_USER_INTERRUPT 		((0<<29)|(2<<23))
+#define GFX_OP_BREAKPOINT_INTERRUPT	((0<<29)|(1<<23))
+#define CMD_REPORT_HEAD			(7<<23)
+#define CMD_STORE_DWORD_IDX		((0x21<<23) | 0x1)
+#define CMD_OP_BATCH_BUFFER  ((0x0<<29)|(0x30<<23)|0x1)
+
+#define INST_PARSER_CLIENT   0x00000000
+#define INST_OP_FLUSH        0x02000000
+#define INST_FLUSH_MAP_CACHE 0x00000001
+
+#define BB1_START_ADDR_MASK   (~0x7)
+#define BB1_PROTECTED         (1<<0)
+#define BB1_UNPROTECTED       (0<<0)
+#define BB2_END_ADDR_MASK     (~0x7)
+
+#define I915REG_HWSTAM		0x02098
+#define I915REG_INT_IDENTITY_R	0x020a4
+#define I915REG_INT_MASK_R 	0x020a8
+#define I915REG_INT_ENABLE_R	0x020a0
+
+#define SRX_INDEX		0x3c4
+#define SRX_DATA		0x3c5
+#define SR01			1
+#define SR01_SCREEN_OFF 	(1<<5)
+
+#define PPCR			0x61204
+#define PPCR_ON			(1<<0)
+
+#define DVOB			0x61140
+#define DVOB_ON			(1<<31)
+#define DVOC			0x61160
+#define DVOC_ON			(1<<31)
+#define LVDS			0x61180
+#define LVDS_ON			(1<<31)
+
+#define ADPA			0x61100
+#define ADPA_DPMS_MASK		(~(3<<10))
+#define ADPA_DPMS_ON		(0<<10)
+#define ADPA_DPMS_SUSPEND	(1<<10)
+#define ADPA_DPMS_STANDBY	(2<<10)
+#define ADPA_DPMS_OFF		(3<<10)
+
+#define NOPID                   0x2094
+#define LP_RING     		0x2030
+#define HP_RING     		0x2040
+#define RING_TAIL      		0x00
+#define TAIL_ADDR		0x001FFFF8
+#define RING_HEAD      		0x04
+#define HEAD_WRAP_COUNT     	0xFFE00000
+#define HEAD_WRAP_ONE       	0x00200000
+#define HEAD_ADDR           	0x001FFFFC
+#define RING_START     		0x08
+#define START_ADDR          	0x0xFFFFF000
+#define RING_LEN       		0x0C
+#define RING_NR_PAGES       	0x001FF000
+#define RING_REPORT_MASK    	0x00000006
+#define RING_REPORT_64K     	0x00000002
+#define RING_REPORT_128K    	0x00000004
+#define RING_NO_REPORT      	0x00000000
+#define RING_VALID_MASK     	0x00000001
+#define RING_VALID          	0x00000001
+#define RING_INVALID        	0x00000000
+
+#define GFX_OP_SCISSOR         ((0x3<<29)|(0x1c<<24)|(0x10<<19))
+#define SC_UPDATE_SCISSOR       (0x1<<1)
+#define SC_ENABLE_MASK          (0x1<<0)
+#define SC_ENABLE               (0x1<<0)
+
+#define GFX_OP_SCISSOR_INFO    ((0x3<<29)|(0x1d<<24)|(0x81<<16)|(0x1))
+#define SCI_YMIN_MASK      (0xffff<<16)
+#define SCI_XMIN_MASK      (0xffff<<0)
+#define SCI_YMAX_MASK      (0xffff<<16)
+#define SCI_XMAX_MASK      (0xffff<<0)
+
+#define GFX_OP_SCISSOR_ENABLE	 ((0x3<<29)|(0x1c<<24)|(0x10<<19))
+#define GFX_OP_SCISSOR_RECT	 ((0x3<<29)|(0x1d<<24)|(0x81<<16)|1)
+#define GFX_OP_COLOR_FACTOR      ((0x3<<29)|(0x1d<<24)|(0x1<<16)|0x0)
+#define GFX_OP_STIPPLE           ((0x3<<29)|(0x1d<<24)|(0x83<<16))
+#define GFX_OP_MAP_INFO          ((0x3<<29)|(0x1d<<24)|0x4)
+#define GFX_OP_DESTBUFFER_VARS   ((0x3<<29)|(0x1d<<24)|(0x85<<16)|0x0)
+#define GFX_OP_DRAWRECT_INFO     ((0x3<<29)|(0x1d<<24)|(0x80<<16)|(0x3))
+
+#define MI_BATCH_BUFFER 	((0x30<<23)|1)
+#define MI_BATCH_BUFFER_START 	(0x31<<23)
+#define MI_BATCH_BUFFER_END 	(0xA<<23)
+#define MI_BATCH_NON_SECURE	(1)
+
+#define MI_WAIT_FOR_EVENT       ((0x3<<23))
+#define MI_WAIT_FOR_PLANE_A_FLIP      (1<<2)
+#define MI_WAIT_FOR_PLANE_A_SCANLINES (1<<1)
+
+#define MI_LOAD_SCAN_LINES_INCL  ((0x12<<23))
+
+#define CMD_OP_DISPLAYBUFFER_INFO ((0x0<<29)|(0x14<<23)|2)
+#define ASYNC_FLIP                (1<<22)
+
+#define CMD_OP_DESTBUFFER_INFO	 ((0x3<<29)|(0x1d<<24)|(0x8e<<16)|1)
+
+#endif
diff --git a/sys/dev/drm/i915_irq.c b/sys/dev/drm/i915_irq.c
new file mode 100644
index 0000000..64a5913
--- /dev/null
+++ b/sys/dev/drm/i915_irq.c
@@ -0,0 +1,163 @@
+/* i915_dma.c -- DMA support for the I915 -*- linux-c -*-
+ *
+ * $FreeBSD$
+ */
+/**************************************************************************
+ *
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+#define USER_INT_FLAG 0x2
+#define MAX_NOPID ((u32)~0)
+#define READ_BREADCRUMB(dev_priv)  (((u32*)(dev_priv->hw_status_page))[5])
+
+irqreturn_t i915_driver_irq_handler(DRM_IRQ_ARGS)
+{
+	drm_device_t *dev = (drm_device_t *) arg;
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	u16 temp;
+
+	temp = I915_READ16(I915REG_INT_IDENTITY_R);
+	temp &= USER_INT_FLAG;
+
+	DRM_DEBUG("%s flag=%08x\n", __FUNCTION__, temp);
+
+	if (temp == 0)
+		return IRQ_NONE;
+
+	I915_WRITE16(I915REG_INT_IDENTITY_R, temp);
+	DRM_WAKEUP(&dev_priv->irq_queue);
+
+	return IRQ_HANDLED;
+}
+
+static int i915_emit_irq(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	u32 ret;
+	RING_LOCALS;
+
+	i915_kernel_lost_context(dev);
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	ret = dev_priv->counter;
+
+	BEGIN_LP_RING(2);
+	OUT_RING(0);
+	OUT_RING(GFX_OP_USER_INTERRUPT);
+	ADVANCE_LP_RING();
+
+	return ret;
+}
+
+static int i915_wait_irq(drm_device_t * dev, int irq_nr)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	int ret = 0;
+
+	DRM_DEBUG("%s irq_nr=%d breadcrumb=%d\n", __FUNCTION__, irq_nr,
+		  READ_BREADCRUMB(dev_priv));
+
+	if (READ_BREADCRUMB(dev_priv) >= irq_nr)
+		return 0;
+
+	dev_priv->sarea_priv->perf_boxes |= I915_BOX_WAIT;
+
+	DRM_WAIT_ON(ret, dev_priv->irq_queue, 3 * DRM_HZ,
+		    READ_BREADCRUMB(dev_priv) >= irq_nr);
+
+	if (ret == DRM_ERR(EBUSY)) {
+		DRM_ERROR("%s: EBUSY -- rec: %d emitted: %d\n",
+			  __FUNCTION__,
+			  READ_BREADCRUMB(dev_priv), (int)dev_priv->counter);
+	}
+
+	dev_priv->sarea_priv->last_dispatch = READ_BREADCRUMB(dev_priv);
+	return ret;
+}
+
+/* Needs the lock as it touches the ring.
+ */
+int i915_irq_emit(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_irq_emit_t emit;
+	int result;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(emit, (drm_i915_irq_emit_t __user *) data,
+				 sizeof(emit));
+
+	result = i915_emit_irq(dev);
+
+	if (DRM_COPY_TO_USER(emit.irq_seq, &result, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
+		return DRM_ERR(EFAULT);
+	}
+
+	return 0;
+}
+
+/* Doesn't need the hardware lock.
+ */
+int i915_irq_wait(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_irq_wait_t irqwait;
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(irqwait, (drm_i915_irq_wait_t __user *) data,
+				 sizeof(irqwait));
+
+	return i915_wait_irq(dev, irqwait.irq_seq);
+}
+
+/* drm_dma.h hooks
+*/
+void i915_driver_irq_preinstall(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+
+	I915_WRITE16(I915REG_HWSTAM, 0xfffe);
+	I915_WRITE16(I915REG_INT_MASK_R, 0x0);
+	I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
+}
+
+void i915_driver_irq_postinstall(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+
+	I915_WRITE16(I915REG_INT_ENABLE_R, USER_INT_FLAG);
+	DRM_INIT_WAITQUEUE(&dev_priv->irq_queue);
+}
+
+void i915_driver_irq_uninstall(drm_device_t * dev)
+{
+	drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private;
+	if (!dev_priv)
+		return;
+
+	I915_WRITE16(I915REG_HWSTAM, 0xffff);
+	I915_WRITE16(I915REG_INT_MASK_R, 0xffff);
+	I915_WRITE16(I915REG_INT_ENABLE_R, 0x0);
+}
diff --git a/sys/dev/drm/i915_mem.c b/sys/dev/drm/i915_mem.c
new file mode 100644
index 0000000..2ef6d77
--- /dev/null
+++ b/sys/dev/drm/i915_mem.c
@@ -0,0 +1,350 @@
+/* i915_mem.c -- Simple agp/fb memory manager for i915 -*- linux-c -*-
+ *
+ * $FreeBSD$
+ */
+/**************************************************************************
+ *
+ * Copyright 2003 Tungsten Graphics, Inc., Cedar Park, Texas.
+ * All Rights Reserved.
+ *
+ **************************************************************************/
+
+#include "drmP.h"
+#include "drm.h"
+#include "i915_drm.h"
+#include "i915_drv.h"
+
+/* This memory manager is integrated into the global/local lru
+ * mechanisms used by the clients.  Specifically, it operates by
+ * setting the 'in_use' fields of the global LRU to indicate whether
+ * this region is privately allocated to a client.
+ *
+ * This does require the client to actually respect that field.
+ *
+ * Currently no effort is made to allocate 'private' memory in any
+ * clever way - the LRU information isn't used to determine which
+ * block to allocate, and the ring is drained prior to allocations --
+ * in other words allocation is expensive.
+ */
+static void mark_block(drm_device_t * dev, struct mem_block *p, int in_use)
+{
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_tex_region_t *list;
+	unsigned shift, nr;
+	unsigned start;
+	unsigned end;
+	unsigned i;
+	int age;
+
+	shift = dev_priv->tex_lru_log_granularity;
+	nr = I915_NR_TEX_REGIONS;
+
+	start = p->start >> shift;
+	end = (p->start + p->size - 1) >> shift;
+
+	age = ++sarea_priv->texAge;
+	list = sarea_priv->texList;
+
+	/* Mark the regions with the new flag and update their age.  Move
+	 * them to head of list to preserve LRU semantics.
+	 */
+	for (i = start; i <= end; i++) {
+		list[i].in_use = in_use;
+		list[i].age = age;
+
+		/* remove_from_list(i)
+		 */
+		list[(unsigned)list[i].next].prev = list[i].prev;
+		list[(unsigned)list[i].prev].next = list[i].next;
+
+		/* insert_at_head(list, i)
+		 */
+		list[i].prev = nr;
+		list[i].next = list[nr].next;
+		list[(unsigned)list[nr].next].prev = i;
+		list[nr].next = i;
+	}
+}
+
+/* Very simple allocator for agp memory, working on a static range
+ * already mapped into each client's address space.
+ */
+
+static struct mem_block *split_block(struct mem_block *p, int start, int size,
+				     DRMFILE filp)
+{
+	/* Maybe cut off the start of an existing block */
+	if (start > p->start) {
+		struct mem_block *newblock =
+		    drm_alloc(sizeof(*newblock), DRM_MEM_BUFLISTS);
+		if (!newblock)
+			goto out;
+		newblock->start = start;
+		newblock->size = p->size - (start - p->start);
+		newblock->filp = NULL;
+		newblock->next = p->next;
+		newblock->prev = p;
+		p->next->prev = newblock;
+		p->next = newblock;
+		p->size -= newblock->size;
+		p = newblock;
+	}
+
+	/* Maybe cut off the end of an existing block */
+	if (size < p->size) {
+		struct mem_block *newblock =
+		    drm_alloc(sizeof(*newblock), DRM_MEM_BUFLISTS);
+		if (!newblock)
+			goto out;
+		newblock->start = start + size;
+		newblock->size = p->size - size;
+		newblock->filp = NULL;
+		newblock->next = p->next;
+		newblock->prev = p;
+		p->next->prev = newblock;
+		p->next = newblock;
+		p->size = size;
+	}
+
+      out:
+	/* Our block is in the middle */
+	p->filp = filp;
+	return p;
+}
+
+static struct mem_block *alloc_block(struct mem_block *heap, int size,
+				     int align2, DRMFILE filp)
+{
+	struct mem_block *p;
+	int mask = (1 << align2) - 1;
+
+	for (p = heap->next; p != heap; p = p->next) {
+		int start = (p->start + mask) & ~mask;
+		if (p->filp == NULL && start + size <= p->start + p->size)
+			return split_block(p, start, size, filp);
+	}
+
+	return NULL;
+}
+
+static struct mem_block *find_block(struct mem_block *heap, int start)
+{
+	struct mem_block *p;
+
+	for (p = heap->next; p != heap; p = p->next)
+		if (p->start == start)
+			return p;
+
+	return NULL;
+}
+
+static void free_block(struct mem_block *p)
+{
+	p->filp = NULL;
+
+	/* Assumes a single contiguous range.  Needs a special filp in
+	 * 'heap' to stop it being subsumed.
+	 */
+	if (p->next->filp == NULL) {
+		struct mem_block *q = p->next;
+		p->size += q->size;
+		p->next = q->next;
+		p->next->prev = p;
+		drm_free(q, sizeof(*q), DRM_MEM_BUFLISTS);
+	}
+
+	if (p->prev->filp == NULL) {
+		struct mem_block *q = p->prev;
+		q->size += p->size;
+		q->next = p->next;
+		q->next->prev = q;
+		drm_free(p, sizeof(*q), DRM_MEM_BUFLISTS);
+	}
+}
+
+/* Initialize.  How to check for an uninitialized heap?
+ */
+static int init_heap(struct mem_block **heap, int start, int size)
+{
+	struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFLISTS);
+
+	if (!blocks)
+		return -ENOMEM;
+
+	*heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFLISTS);
+	if (!*heap) {
+		drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFLISTS);
+		return -ENOMEM;
+	}
+
+	blocks->start = start;
+	blocks->size = size;
+	blocks->filp = NULL;
+	blocks->next = blocks->prev = *heap;
+
+	memset(*heap, 0, sizeof(**heap));
+	(*heap)->filp = (DRMFILE) - 1;
+	(*heap)->next = (*heap)->prev = blocks;
+	return 0;
+}
+
+/* Free all blocks associated with the releasing file.
+ */
+void i915_mem_release(drm_device_t * dev, DRMFILE filp, struct mem_block *heap)
+{
+	struct mem_block *p;
+
+	if (!heap || !heap->next)
+		return;
+
+	for (p = heap->next; p != heap; p = p->next) {
+		if (p->filp == filp) {
+			p->filp = NULL;
+			mark_block(dev, p, 0);
+		}
+	}
+
+	/* Assumes a single contiguous range.  Needs a special filp in
+	 * 'heap' to stop it being subsumed.
+	 */
+	for (p = heap->next; p != heap; p = p->next) {
+		while (p->filp == NULL && p->next->filp == NULL) {
+			struct mem_block *q = p->next;
+			p->size += q->size;
+			p->next = q->next;
+			p->next->prev = p;
+			drm_free(q, sizeof(*q), DRM_MEM_BUFLISTS);
+		}
+	}
+}
+
+/* Shutdown.
+ */
+void i915_mem_takedown(struct mem_block **heap)
+{
+	struct mem_block *p;
+
+	if (!*heap)
+		return;
+
+	for (p = (*heap)->next; p != *heap;) {
+		struct mem_block *q = p;
+		p = p->next;
+		drm_free(q, sizeof(*q), DRM_MEM_BUFLISTS);
+	}
+
+	drm_free(*heap, sizeof(**heap), DRM_MEM_BUFLISTS);
+	*heap = NULL;
+}
+
+static struct mem_block **get_heap(drm_i915_private_t * dev_priv, int region)
+{
+	switch (region) {
+	case I915_MEM_REGION_AGP:
+		return &dev_priv->agp_heap;
+	default:
+		return NULL;
+	}
+}
+
+/* IOCTL HANDLERS */
+
+int i915_mem_alloc(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_mem_alloc_t alloc;
+	struct mem_block *block, **heap;
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(alloc, (drm_i915_mem_alloc_t __user *) data,
+				 sizeof(alloc));
+
+	heap = get_heap(dev_priv, alloc.region);
+	if (!heap || !*heap)
+		return DRM_ERR(EFAULT);
+
+	/* Make things easier on ourselves: all allocations at least
+	 * 4k aligned.
+	 */
+	if (alloc.alignment < 12)
+		alloc.alignment = 12;
+
+	block = alloc_block(*heap, alloc.size, alloc.alignment, filp);
+
+	if (!block)
+		return DRM_ERR(ENOMEM);
+
+	mark_block(dev, block, 1);
+
+	if (DRM_COPY_TO_USER(alloc.region_offset, &block->start, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
+		return DRM_ERR(EFAULT);
+	}
+
+	return 0;
+}
+
+int i915_mem_free(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_mem_free_t memfree;
+	struct mem_block *block, **heap;
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(memfree, (drm_i915_mem_free_t __user *) data,
+				 sizeof(memfree));
+
+	heap = get_heap(dev_priv, memfree.region);
+	if (!heap || !*heap)
+		return DRM_ERR(EFAULT);
+
+	block = find_block(*heap, memfree.region_offset);
+	if (!block)
+		return DRM_ERR(EFAULT);
+
+	if (block->filp != filp)
+		return DRM_ERR(EPERM);
+
+	mark_block(dev, block, 0);
+	free_block(block);
+	return 0;
+}
+
+int i915_mem_init_heap(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_i915_private_t *dev_priv = dev->dev_private;
+	drm_i915_mem_init_heap_t initheap;
+	struct mem_block **heap;
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(initheap,
+				 (drm_i915_mem_init_heap_t __user *) data,
+				 sizeof(initheap));
+
+	heap = get_heap(dev_priv, initheap.region);
+	if (!heap)
+		return DRM_ERR(EFAULT);
+
+	if (*heap) {
+		DRM_ERROR("heap already initialized?");
+		return DRM_ERR(EFAULT);
+	}
+
+	return init_heap(heap, initheap.start, initheap.size);
+}
diff --git a/sys/dev/drm/mach64_dma.c b/sys/dev/drm/mach64_dma.c
new file mode 100644
index 0000000..f995167
--- /dev/null
+++ b/sys/dev/drm/mach64_dma.c
@@ -0,0 +1,1532 @@
+/* mach64_dma.c -- DMA support for mach64 (Rage Pro) driver -*- linux-c -*- */
+/**
+ * \file mach64_dma.c
+ * DMA support for mach64 (Rage Pro) driver
+ *
+ * \author Gareth Hughes <gareth@valinux.com>
+ * \author Frank C. Earl <fearl@airmail.net>
+ * \author Leif Delgass <ldelgass@retinalburn.net>
+ * \author Jose Fonseca <j_r_fonseca@yahoo.co.uk>
+ */
+
+/*
+ * Copyright 2000 Gareth Hughes
+ * Copyright 2002 Frank C. Earl
+ * Copyright 2002-2003 Leif Delgass
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
+#include "dev/drm/mach64_drm.h"
+#include "dev/drm/mach64_drv.h"
+
+/*******************************************************************/
+/** \name Engine, FIFO control */
+/*@{*/
+
+/**
+ * Waits for free entries in the FIFO.
+ *
+ * \note Most writes to Mach64 registers are automatically routed through
+ * command FIFO which is 16 entry deep. Prior to writing to any draw engine
+ * register one has to ensure that enough FIFO entries are available by calling
+ * this function.  Failure to do so may cause the engine to lock.
+ *
+ * \param dev_priv pointer to device private data structure.
+ * \param entries number of free entries in the FIFO to wait for.
+ * 
+ * \returns zero on success, or -EBUSY if the timeout (specificed by
+ * drm_mach64_private::usec_timeout) occurs.
+ */
+int mach64_do_wait_for_fifo(drm_mach64_private_t * dev_priv, int entries)
+{
+	int slots = 0, i;
+
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		slots = (MACH64_READ(MACH64_FIFO_STAT) & MACH64_FIFO_SLOT_MASK);
+		if (slots <= (0x8000 >> entries))
+			return 0;
+		DRM_UDELAY(1);
+	}
+
+	DRM_INFO("%s failed! slots=%d entries=%d\n", __FUNCTION__, slots,
+		 entries);
+	return DRM_ERR(EBUSY);
+}
+
+/**
+ * Wait for the draw engine to be idle.
+ */
+int mach64_do_wait_for_idle(drm_mach64_private_t * dev_priv)
+{
+	int i, ret;
+
+	ret = mach64_do_wait_for_fifo(dev_priv, 16);
+	if (ret < 0)
+		return ret;
+
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (!(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) {
+			return 0;
+		}
+		DRM_UDELAY(1);
+	}
+
+	DRM_INFO("%s failed! GUI_STAT=0x%08x\n", __FUNCTION__,
+		 MACH64_READ(MACH64_GUI_STAT));
+	mach64_dump_ring_info(dev_priv);
+	return DRM_ERR(EBUSY);
+}
+
+/**
+ * Wait for free entries in the ring buffer.
+ *
+ * The Mach64 bus master can be configured to act as a virtual FIFO, using a
+ * circular buffer (commonly referred as "ring buffer" in other drivers) with
+ * pointers to engine commands. This allows the CPU to do other things while
+ * the graphics engine is busy, i.e., DMA mode.
+ *
+ * This function should be called before writing new entries to the ring
+ * buffer.
+ * 
+ * \param dev_priv pointer to device private data structure.
+ * \param n number of free entries in the ring buffer to wait for.
+ * 
+ * \returns zero on success, or -EBUSY if the timeout (specificed by
+ * drm_mach64_private_t::usec_timeout) occurs.
+ *
+ * \sa mach64_dump_ring_info()
+ */
+int mach64_wait_ring(drm_mach64_private_t * dev_priv, int n)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+	int i;
+
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		mach64_update_ring_snapshot(dev_priv);
+		if (ring->space >= n) {
+			if (i > 0) {
+				DRM_DEBUG("%s: %d usecs\n", __FUNCTION__, i);
+			}
+			return 0;
+		}
+		DRM_UDELAY(1);
+	}
+
+	/* FIXME: This is being ignored... */
+	DRM_ERROR("failed!\n");
+	mach64_dump_ring_info(dev_priv);
+	return DRM_ERR(EBUSY);
+}
+
+/**
+ * Wait until all DMA requests have been processed... 
+ *
+ * \sa mach64_wait_ring()
+ */
+static int mach64_ring_idle(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+	u32 head;
+	int i;
+
+	head = ring->head;
+	i = 0;
+	while (i < dev_priv->usec_timeout) {
+		mach64_update_ring_snapshot(dev_priv);
+		if (ring->head == ring->tail &&
+		    !(MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE)) {
+			if (i > 0) {
+				DRM_DEBUG("%s: %d usecs\n", __FUNCTION__, i);
+			}
+			return 0;
+		}
+		if (ring->head == head) {
+			++i;
+		} else {
+			head = ring->head;
+			i = 0;
+		}
+		DRM_UDELAY(1);
+	}
+
+	DRM_INFO("%s failed! GUI_STAT=0x%08x\n", __FUNCTION__,
+		 MACH64_READ(MACH64_GUI_STAT));
+	mach64_dump_ring_info(dev_priv);
+	return DRM_ERR(EBUSY);
+}
+
+/**
+ * Reset the the ring buffer descriptors.
+ *
+ * \sa mach64_do_engine_reset()
+ */
+static void mach64_ring_reset(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+
+	mach64_do_release_used_buffers(dev_priv);
+	ring->head_addr = ring->start_addr;
+	ring->head = ring->tail = 0;
+	ring->space = ring->size;
+
+	MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
+		     ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
+
+	dev_priv->ring_running = 0;
+}
+
+/**
+ * Ensure the all the queued commands will be processed.
+ */
+int mach64_do_dma_flush(drm_mach64_private_t * dev_priv)
+{
+	/* FIXME: It's not necessary to wait for idle when flushing
+	 * we just need to ensure the ring will be completely processed
+	 * in finite time without another ioctl
+	 */
+	return mach64_ring_idle(dev_priv);
+}
+
+/**
+ * Stop all DMA activity.
+ */
+int mach64_do_dma_idle(drm_mach64_private_t * dev_priv)
+{
+	int ret;
+
+	/* wait for completion */
+	if ((ret = mach64_ring_idle(dev_priv)) < 0) {
+		DRM_ERROR("%s failed BM_GUI_TABLE=0x%08x tail: %u\n",
+			  __FUNCTION__, MACH64_READ(MACH64_BM_GUI_TABLE),
+			  dev_priv->ring.tail);
+		return ret;
+	}
+
+	mach64_ring_stop(dev_priv);
+
+	/* clean up after pass */
+	mach64_do_release_used_buffers(dev_priv);
+	return 0;
+}
+
+/**
+ * Reset the engine.  This will stop the DMA if it is running.
+ */
+int mach64_do_engine_reset(drm_mach64_private_t * dev_priv)
+{
+	u32 tmp;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	/* Kill off any outstanding DMA transfers.
+	 */
+	tmp = MACH64_READ(MACH64_BUS_CNTL);
+	MACH64_WRITE(MACH64_BUS_CNTL, tmp | MACH64_BUS_MASTER_DIS);
+
+	/* Reset the GUI engine (high to low transition).
+	 */
+	tmp = MACH64_READ(MACH64_GEN_TEST_CNTL);
+	MACH64_WRITE(MACH64_GEN_TEST_CNTL, tmp & ~MACH64_GUI_ENGINE_ENABLE);
+	/* Enable the GUI engine
+	 */
+	tmp = MACH64_READ(MACH64_GEN_TEST_CNTL);
+	MACH64_WRITE(MACH64_GEN_TEST_CNTL, tmp | MACH64_GUI_ENGINE_ENABLE);
+
+	/* ensure engine is not locked up by clearing any FIFO or HOST errors
+	 */
+	tmp = MACH64_READ(MACH64_BUS_CNTL);
+	MACH64_WRITE(MACH64_BUS_CNTL, tmp | 0x00a00000);
+
+	/* Once GUI engine is restored, disable bus mastering */
+	MACH64_WRITE(MACH64_SRC_CNTL, 0);
+
+	/* Reset descriptor ring */
+	mach64_ring_reset(dev_priv);
+
+	return 0;
+}
+
+/*@}*/
+
+
+/*******************************************************************/
+/** \name Debugging output */
+/*@{*/
+
+/**
+ * Dump engine registers values.
+ */
+void mach64_dump_engine_info(drm_mach64_private_t * dev_priv)
+{
+	DRM_INFO("\n");
+	if (!dev_priv->is_pci) {
+		DRM_INFO("           AGP_BASE = 0x%08x\n",
+			 MACH64_READ(MACH64_AGP_BASE));
+		DRM_INFO("           AGP_CNTL = 0x%08x\n",
+			 MACH64_READ(MACH64_AGP_CNTL));
+	}
+	DRM_INFO("     ALPHA_TST_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_ALPHA_TST_CNTL));
+	DRM_INFO("\n");
+	DRM_INFO("         BM_COMMAND = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_COMMAND));
+	DRM_INFO("BM_FRAME_BUF_OFFSET = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_FRAME_BUF_OFFSET));
+	DRM_INFO("       BM_GUI_TABLE = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_GUI_TABLE));
+	DRM_INFO("          BM_STATUS = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_STATUS));
+	DRM_INFO(" BM_SYSTEM_MEM_ADDR = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR));
+	DRM_INFO("    BM_SYSTEM_TABLE = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_SYSTEM_TABLE));
+	DRM_INFO("           BUS_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_BUS_CNTL));
+	DRM_INFO("\n");
+	/* DRM_INFO( "         CLOCK_CNTL = 0x%08x\n", MACH64_READ( MACH64_CLOCK_CNTL ) ); */
+	DRM_INFO("        CLR_CMP_CLR = 0x%08x\n",
+		 MACH64_READ(MACH64_CLR_CMP_CLR));
+	DRM_INFO("       CLR_CMP_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_CLR_CMP_CNTL));
+	/* DRM_INFO( "        CLR_CMP_MSK = 0x%08x\n", MACH64_READ( MACH64_CLR_CMP_MSK ) ); */
+	DRM_INFO("     CONFIG_CHIP_ID = 0x%08x\n",
+		 MACH64_READ(MACH64_CONFIG_CHIP_ID));
+	DRM_INFO("        CONFIG_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_CONFIG_CNTL));
+	DRM_INFO("       CONFIG_STAT0 = 0x%08x\n",
+		 MACH64_READ(MACH64_CONFIG_STAT0));
+	DRM_INFO("       CONFIG_STAT1 = 0x%08x\n",
+		 MACH64_READ(MACH64_CONFIG_STAT1));
+	DRM_INFO("       CONFIG_STAT2 = 0x%08x\n",
+		 MACH64_READ(MACH64_CONFIG_STAT2));
+	DRM_INFO("            CRC_SIG = 0x%08x\n", MACH64_READ(MACH64_CRC_SIG));
+	DRM_INFO("  CUSTOM_MACRO_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_CUSTOM_MACRO_CNTL));
+	DRM_INFO("\n");
+	/* DRM_INFO( "           DAC_CNTL = 0x%08x\n", MACH64_READ( MACH64_DAC_CNTL ) ); */
+	/* DRM_INFO( "           DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_DAC_REGS ) ); */
+	DRM_INFO("        DP_BKGD_CLR = 0x%08x\n",
+		 MACH64_READ(MACH64_DP_BKGD_CLR));
+	DRM_INFO("        DP_FRGD_CLR = 0x%08x\n",
+		 MACH64_READ(MACH64_DP_FRGD_CLR));
+	DRM_INFO("             DP_MIX = 0x%08x\n", MACH64_READ(MACH64_DP_MIX));
+	DRM_INFO("       DP_PIX_WIDTH = 0x%08x\n",
+		 MACH64_READ(MACH64_DP_PIX_WIDTH));
+	DRM_INFO("             DP_SRC = 0x%08x\n", MACH64_READ(MACH64_DP_SRC));
+	DRM_INFO("      DP_WRITE_MASK = 0x%08x\n",
+		 MACH64_READ(MACH64_DP_WRITE_MASK));
+	DRM_INFO("         DSP_CONFIG = 0x%08x\n",
+		 MACH64_READ(MACH64_DSP_CONFIG));
+	DRM_INFO("         DSP_ON_OFF = 0x%08x\n",
+		 MACH64_READ(MACH64_DSP_ON_OFF));
+	DRM_INFO("           DST_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_DST_CNTL));
+	DRM_INFO("      DST_OFF_PITCH = 0x%08x\n",
+		 MACH64_READ(MACH64_DST_OFF_PITCH));
+	DRM_INFO("\n");
+	/* DRM_INFO( "       EXT_DAC_REGS = 0x%08x\n", MACH64_READ( MACH64_EXT_DAC_REGS ) ); */
+	DRM_INFO("       EXT_MEM_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_EXT_MEM_CNTL));
+	DRM_INFO("\n");
+	DRM_INFO("          FIFO_STAT = 0x%08x\n",
+		 MACH64_READ(MACH64_FIFO_STAT));
+	DRM_INFO("\n");
+	DRM_INFO("      GEN_TEST_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_GEN_TEST_CNTL));
+	/* DRM_INFO( "              GP_IO = 0x%08x\n", MACH64_READ( MACH64_GP_IO ) ); */
+	DRM_INFO("   GUI_CMDFIFO_DATA = 0x%08x\n",
+		 MACH64_READ(MACH64_GUI_CMDFIFO_DATA));
+	DRM_INFO("  GUI_CMDFIFO_DEBUG = 0x%08x\n",
+		 MACH64_READ(MACH64_GUI_CMDFIFO_DEBUG));
+	DRM_INFO("           GUI_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_GUI_CNTL));
+	DRM_INFO("           GUI_STAT = 0x%08x\n",
+		 MACH64_READ(MACH64_GUI_STAT));
+	DRM_INFO("      GUI_TRAJ_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_GUI_TRAJ_CNTL));
+	DRM_INFO("\n");
+	DRM_INFO("          HOST_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_HOST_CNTL));
+	DRM_INFO("           HW_DEBUG = 0x%08x\n",
+		 MACH64_READ(MACH64_HW_DEBUG));
+	DRM_INFO("\n");
+	DRM_INFO("    MEM_ADDR_CONFIG = 0x%08x\n",
+		 MACH64_READ(MACH64_MEM_ADDR_CONFIG));
+	DRM_INFO("       MEM_BUF_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_MEM_BUF_CNTL));
+	DRM_INFO("\n");
+	DRM_INFO("           PAT_REG0 = 0x%08x\n",
+		 MACH64_READ(MACH64_PAT_REG0));
+	DRM_INFO("           PAT_REG1 = 0x%08x\n",
+		 MACH64_READ(MACH64_PAT_REG1));
+	DRM_INFO("\n");
+	DRM_INFO("            SC_LEFT = 0x%08x\n", MACH64_READ(MACH64_SC_LEFT));
+	DRM_INFO("           SC_RIGHT = 0x%08x\n",
+		 MACH64_READ(MACH64_SC_RIGHT));
+	DRM_INFO("             SC_TOP = 0x%08x\n", MACH64_READ(MACH64_SC_TOP));
+	DRM_INFO("          SC_BOTTOM = 0x%08x\n",
+		 MACH64_READ(MACH64_SC_BOTTOM));
+	DRM_INFO("\n");
+	DRM_INFO("      SCALE_3D_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_SCALE_3D_CNTL));
+	DRM_INFO("       SCRATCH_REG0 = 0x%08x\n",
+		 MACH64_READ(MACH64_SCRATCH_REG0));
+	DRM_INFO("       SCRATCH_REG1 = 0x%08x\n",
+		 MACH64_READ(MACH64_SCRATCH_REG1));
+	DRM_INFO("         SETUP_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_SETUP_CNTL));
+	DRM_INFO("           SRC_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_SRC_CNTL));
+	DRM_INFO("\n");
+	DRM_INFO("           TEX_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_TEX_CNTL));
+	DRM_INFO("     TEX_SIZE_PITCH = 0x%08x\n",
+		 MACH64_READ(MACH64_TEX_SIZE_PITCH));
+	DRM_INFO("       TIMER_CONFIG = 0x%08x\n",
+		 MACH64_READ(MACH64_TIMER_CONFIG));
+	DRM_INFO("\n");
+	DRM_INFO("             Z_CNTL = 0x%08x\n", MACH64_READ(MACH64_Z_CNTL));
+	DRM_INFO("        Z_OFF_PITCH = 0x%08x\n",
+		 MACH64_READ(MACH64_Z_OFF_PITCH));
+	DRM_INFO("\n");
+}
+
+#define MACH64_DUMP_CONTEXT	3
+
+/**
+ * Used by mach64_dump_ring_info() to dump the contents of the current buffer
+ * pointed by the ring head.
+ */
+static void mach64_dump_buf_info(drm_mach64_private_t * dev_priv,
+				 drm_buf_t * buf)
+{
+	u32 addr = GETBUFADDR(buf);
+	u32 used = buf->used >> 2;
+	u32 sys_addr = MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR);
+	u32 *p = GETBUFPTR(buf);
+	int skipped = 0;
+
+	DRM_INFO("buffer contents:\n");
+
+	while (used) {
+		u32 reg, count;
+
+		reg = le32_to_cpu(*p++);
+		if (addr <= GETBUFADDR(buf) + MACH64_DUMP_CONTEXT * 4 ||
+		    (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 &&
+		     addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) ||
+		    addr >=
+		    GETBUFADDR(buf) + buf->used - MACH64_DUMP_CONTEXT * 4) {
+			DRM_INFO("%08x:  0x%08x\n", addr, reg);
+		}
+		addr += 4;
+		used--;
+
+		count = (reg >> 16) + 1;
+		reg = reg & 0xffff;
+		reg = MMSELECT(reg);
+		while (count && used) {
+			if (addr <= GETBUFADDR(buf) + MACH64_DUMP_CONTEXT * 4 ||
+			    (addr >= sys_addr - MACH64_DUMP_CONTEXT * 4 &&
+			     addr <= sys_addr + MACH64_DUMP_CONTEXT * 4) ||
+			    addr >=
+			    GETBUFADDR(buf) + buf->used -
+			    MACH64_DUMP_CONTEXT * 4) {
+				DRM_INFO("%08x:    0x%04x = 0x%08x\n", addr,
+					 reg, le32_to_cpu(*p));
+				skipped = 0;
+			} else {
+				if (!skipped) {
+					DRM_INFO("  ...\n");
+					skipped = 1;
+				}
+			}
+			p++;
+			addr += 4;
+			used--;
+
+			reg += 4;
+			count--;
+		}
+	}
+
+	DRM_INFO("\n");
+}
+
+/**
+ * Dump the ring state and contents, including the contents of the buffer being
+ * processed by the graphics engine.
+ */
+void mach64_dump_ring_info(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+	int i, skipped;
+
+	DRM_INFO("\n");
+
+	DRM_INFO("ring contents:\n");
+	DRM_INFO("  head_addr: 0x%08x head: %u tail: %u\n\n",
+		 ring->head_addr, ring->head, ring->tail);
+
+	skipped = 0;
+	for (i = 0; i < ring->size / sizeof(u32); i += 4) {
+		if (i <= MACH64_DUMP_CONTEXT * 4 ||
+		    i >= ring->size / sizeof(u32) - MACH64_DUMP_CONTEXT * 4 ||
+		    (i >= ring->tail - MACH64_DUMP_CONTEXT * 4 &&
+		     i <= ring->tail + MACH64_DUMP_CONTEXT * 4) ||
+		    (i >= ring->head - MACH64_DUMP_CONTEXT * 4 &&
+		     i <= ring->head + MACH64_DUMP_CONTEXT * 4)) {
+			DRM_INFO("  0x%08x:  0x%08x 0x%08x 0x%08x 0x%08x%s%s\n",
+				 (u32)(ring->start_addr + i * sizeof(u32)),
+				 le32_to_cpu(((u32 *) ring->start)[i + 0]),
+				 le32_to_cpu(((u32 *) ring->start)[i + 1]),
+				 le32_to_cpu(((u32 *) ring->start)[i + 2]),
+				 le32_to_cpu(((u32 *) ring->start)[i + 3]),
+				 i == ring->head ? " (head)" : "",
+				 i == ring->tail ? " (tail)" : "");
+			skipped = 0;
+		} else {
+			if (!skipped) {
+				DRM_INFO("  ...\n");
+				skipped = 1;
+			}
+		}
+	}
+
+	DRM_INFO("\n");
+
+	if (ring->head >= 0 && ring->head < ring->size / sizeof(u32)) {
+		struct list_head *ptr;
+		u32 addr = le32_to_cpu(((u32 *) ring->start)[ring->head + 1]);
+
+		list_for_each(ptr, &dev_priv->pending) {
+			drm_mach64_freelist_t *entry =
+			    list_entry(ptr, drm_mach64_freelist_t, list);
+			drm_buf_t *buf = entry->buf;
+
+			u32 buf_addr = GETBUFADDR(buf);
+
+			if (buf_addr <= addr && addr < buf_addr + buf->used) {
+				mach64_dump_buf_info(dev_priv, buf);
+			}
+		}
+	}
+
+	DRM_INFO("\n");
+	DRM_INFO("       BM_GUI_TABLE = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_GUI_TABLE));
+	DRM_INFO("\n");
+	DRM_INFO("BM_FRAME_BUF_OFFSET = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_FRAME_BUF_OFFSET));
+	DRM_INFO(" BM_SYSTEM_MEM_ADDR = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_SYSTEM_MEM_ADDR));
+	DRM_INFO("         BM_COMMAND = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_COMMAND));
+	DRM_INFO("\n");
+	DRM_INFO("          BM_STATUS = 0x%08x\n",
+		 MACH64_READ(MACH64_BM_STATUS));
+	DRM_INFO("           BUS_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_BUS_CNTL));
+	DRM_INFO("          FIFO_STAT = 0x%08x\n",
+		 MACH64_READ(MACH64_FIFO_STAT));
+	DRM_INFO("           GUI_STAT = 0x%08x\n",
+		 MACH64_READ(MACH64_GUI_STAT));
+	DRM_INFO("           SRC_CNTL = 0x%08x\n",
+		 MACH64_READ(MACH64_SRC_CNTL));
+}
+
+/*@}*/
+
+
+/*******************************************************************/
+/** \name DMA test and initialization */
+/*@{*/
+
+/**
+ * Perform a simple DMA operation using the pattern registers to test whether
+ * DMA works.
+ *
+ * \return zero if successful.
+ *
+ * \note This function was the testbed for many experiences regarding Mach64
+ * DMA operation. It is left here since it so tricky to get DMA operating
+ * properly in some architectures and hardware.
+ */
+static int mach64_bm_dma_test(drm_device_t * dev)
+{
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	dma_addr_t data_handle;
+	void *cpu_addr_data;
+	u32 data_addr;
+	u32 *table, *data;
+	u32 expected[2];
+	u32 src_cntl, pat_reg0, pat_reg1;
+	int i, count, failed;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	table = (u32 *) dev_priv->ring.start;
+
+	/* FIXME: get a dma buffer from the freelist here */
+	DRM_DEBUG("Allocating data memory ...\n");
+	cpu_addr_data =
+	    drm_pci_alloc(dev, 0x1000, 0x1000, 0xfffffffful, &data_handle);
+	if (!cpu_addr_data || !data_handle) {
+		DRM_INFO("data-memory allocation failed!\n");
+		return DRM_ERR(ENOMEM);
+	} else {
+		data = (u32 *) cpu_addr_data;
+		data_addr = (u32) data_handle;
+	}
+
+	/* Save the X server's value for SRC_CNTL and restore it
+	 * in case our test fails.  This prevents the X server
+	 * from disabling it's cache for this register
+	 */
+	src_cntl = MACH64_READ(MACH64_SRC_CNTL);
+	pat_reg0 = MACH64_READ(MACH64_PAT_REG0);
+	pat_reg1 = MACH64_READ(MACH64_PAT_REG1);
+
+	mach64_do_wait_for_fifo(dev_priv, 3);
+
+	MACH64_WRITE(MACH64_SRC_CNTL, 0);
+	MACH64_WRITE(MACH64_PAT_REG0, 0x11111111);
+	MACH64_WRITE(MACH64_PAT_REG1, 0x11111111);
+
+	mach64_do_wait_for_idle(dev_priv);
+
+	for (i = 0; i < 2; i++) {
+		u32 reg;
+		reg = MACH64_READ((MACH64_PAT_REG0 + i * 4));
+		DRM_DEBUG("(Before DMA Transfer) reg %d = 0x%08x\n", i, reg);
+		if (reg != 0x11111111) {
+			DRM_INFO("Error initializing test registers\n");
+			DRM_INFO("resetting engine ...\n");
+			mach64_do_engine_reset(dev_priv);
+			DRM_INFO("freeing data buffer memory.\n");
+			drm_pci_free(dev, 0x1000, cpu_addr_data, data_handle);
+			return DRM_ERR(EIO);
+		}
+	}
+
+	/* fill up a buffer with sets of 2 consecutive writes starting with PAT_REG0 */
+	count = 0;
+
+	data[count++] = cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16));
+	data[count++] = expected[0] = 0x22222222;
+	data[count++] = expected[1] = 0xaaaaaaaa;
+
+	while (count < 1020) {
+		data[count++] =
+		    cpu_to_le32(DMAREG(MACH64_PAT_REG0) | (1 << 16));
+		data[count++] = 0x22222222;
+		data[count++] = 0xaaaaaaaa;
+	}
+	data[count++] = cpu_to_le32(DMAREG(MACH64_SRC_CNTL) | (0 << 16));
+	data[count++] = 0;
+
+	DRM_DEBUG("Preparing table ...\n");
+	table[MACH64_DMA_FRAME_BUF_OFFSET] = cpu_to_le32(MACH64_BM_ADDR +
+							 MACH64_APERTURE_OFFSET);
+	table[MACH64_DMA_SYS_MEM_ADDR] = cpu_to_le32(data_addr);
+	table[MACH64_DMA_COMMAND] = cpu_to_le32(count * sizeof(u32)
+						| MACH64_DMA_HOLD_OFFSET
+						| MACH64_DMA_EOL);
+	table[MACH64_DMA_RESERVED] = 0;
+
+	DRM_DEBUG("table[0] = 0x%08x\n", table[0]);
+	DRM_DEBUG("table[1] = 0x%08x\n", table[1]);
+	DRM_DEBUG("table[2] = 0x%08x\n", table[2]);
+	DRM_DEBUG("table[3] = 0x%08x\n", table[3]);
+
+	for (i = 0; i < 6; i++) {
+		DRM_DEBUG(" data[%d] = 0x%08x\n", i, data[i]);
+	}
+	DRM_DEBUG(" ...\n");
+	for (i = count - 5; i < count; i++) {
+		DRM_DEBUG(" data[%d] = 0x%08x\n", i, data[i]);
+	}
+
+	DRM_MEMORYBARRIER();
+
+	DRM_DEBUG("waiting for idle...\n");
+	if ((i = mach64_do_wait_for_idle(dev_priv))) {
+		DRM_INFO("mach64_do_wait_for_idle failed (result=%d)\n", i);
+		DRM_INFO("resetting engine ...\n");
+		mach64_do_engine_reset(dev_priv);
+		mach64_do_wait_for_fifo(dev_priv, 3);
+		MACH64_WRITE(MACH64_SRC_CNTL, src_cntl);
+		MACH64_WRITE(MACH64_PAT_REG0, pat_reg0);
+		MACH64_WRITE(MACH64_PAT_REG1, pat_reg1);
+		DRM_INFO("freeing data buffer memory.\n");
+		drm_pci_free(dev, 0x1000, cpu_addr_data, data_handle);
+		return i;
+	}
+	DRM_DEBUG("waiting for idle...done\n");
+
+	DRM_DEBUG("BUS_CNTL = 0x%08x\n", MACH64_READ(MACH64_BUS_CNTL));
+	DRM_DEBUG("SRC_CNTL = 0x%08x\n", MACH64_READ(MACH64_SRC_CNTL));
+	DRM_DEBUG("\n");
+	DRM_DEBUG("data bus addr = 0x%08x\n", data_addr);
+	DRM_DEBUG("table bus addr = 0x%08x\n", dev_priv->ring.start_addr);
+
+	DRM_DEBUG("starting DMA transfer...\n");
+	MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
+		     dev_priv->ring.start_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
+
+	MACH64_WRITE(MACH64_SRC_CNTL,
+		     MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC |
+		     MACH64_SRC_BM_OP_SYSTEM_TO_REG);
+
+	/* Kick off the transfer */
+	DRM_DEBUG("starting DMA transfer... done.\n");
+	MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0);
+
+	DRM_DEBUG("waiting for idle...\n");
+
+	if ((i = mach64_do_wait_for_idle(dev_priv))) {
+		/* engine locked up, dump register state and reset */
+		DRM_INFO("mach64_do_wait_for_idle failed (result=%d)\n", i);
+		mach64_dump_engine_info(dev_priv);
+		DRM_INFO("resetting engine ...\n");
+		mach64_do_engine_reset(dev_priv);
+		mach64_do_wait_for_fifo(dev_priv, 3);
+		MACH64_WRITE(MACH64_SRC_CNTL, src_cntl);
+		MACH64_WRITE(MACH64_PAT_REG0, pat_reg0);
+		MACH64_WRITE(MACH64_PAT_REG1, pat_reg1);
+		DRM_INFO("freeing data buffer memory.\n");
+		drm_pci_free(dev, 0x1000, cpu_addr_data, data_handle);
+		return i;
+	}
+
+	DRM_DEBUG("waiting for idle...done\n");
+
+	/* restore SRC_CNTL */
+	mach64_do_wait_for_fifo(dev_priv, 1);
+	MACH64_WRITE(MACH64_SRC_CNTL, src_cntl);
+
+	failed = 0;
+
+	/* Check register values to see if the GUI master operation succeeded */
+	for (i = 0; i < 2; i++) {
+		u32 reg;
+		reg = MACH64_READ((MACH64_PAT_REG0 + i * 4));
+		DRM_DEBUG("(After DMA Transfer) reg %d = 0x%08x\n", i, reg);
+		if (reg != expected[i]) {
+			failed = -1;
+		}
+	}
+
+	/* restore pattern registers */
+	mach64_do_wait_for_fifo(dev_priv, 2);
+	MACH64_WRITE(MACH64_PAT_REG0, pat_reg0);
+	MACH64_WRITE(MACH64_PAT_REG1, pat_reg1);
+
+	DRM_DEBUG("freeing data buffer memory.\n");
+	drm_pci_free(dev, 0x1000, cpu_addr_data, data_handle);
+	DRM_DEBUG("returning ...\n");
+
+	return failed;
+}
+
+/**
+ * Called during the DMA initialization ioctl to initialize all the necessary
+ * software and hardware state for DMA operation.
+ */
+static int mach64_do_dma_init(drm_device_t * dev, drm_mach64_init_t * init)
+{
+	drm_mach64_private_t *dev_priv;
+	u32 tmp;
+	int i, ret;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	dev_priv = drm_alloc(sizeof(drm_mach64_private_t), DRM_MEM_DRIVER);
+	if (dev_priv == NULL)
+		return DRM_ERR(ENOMEM);
+
+	memset(dev_priv, 0, sizeof(drm_mach64_private_t));
+
+	dev_priv->is_pci = init->is_pci;
+
+	dev_priv->fb_bpp = init->fb_bpp;
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->front_pitch = init->front_pitch;
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->back_pitch = init->back_pitch;
+
+	dev_priv->depth_bpp = init->depth_bpp;
+	dev_priv->depth_offset = init->depth_offset;
+	dev_priv->depth_pitch = init->depth_pitch;
+
+	dev_priv->front_offset_pitch = (((dev_priv->front_pitch / 8) << 22) |
+					(dev_priv->front_offset >> 3));
+	dev_priv->back_offset_pitch = (((dev_priv->back_pitch / 8) << 22) |
+				       (dev_priv->back_offset >> 3));
+	dev_priv->depth_offset_pitch = (((dev_priv->depth_pitch / 8) << 22) |
+					(dev_priv->depth_offset >> 3));
+
+	dev_priv->usec_timeout = 1000000;
+
+	/* Set up the freelist, placeholder list and pending list */
+	INIT_LIST_HEAD(&dev_priv->free_list);
+	INIT_LIST_HEAD(&dev_priv->placeholders);
+	INIT_LIST_HEAD(&dev_priv->pending);
+
+	DRM_GETSAREA();
+
+	if (!dev_priv->sarea) {
+		DRM_ERROR("can not find sarea!\n");
+		dev->dev_private = (void *)dev_priv;
+		mach64_do_cleanup_dma(dev);
+		return DRM_ERR(EINVAL);
+	}
+	dev_priv->fb = drm_core_findmap(dev, init->fb_offset);
+	if (!dev_priv->fb) {
+		DRM_ERROR("can not find frame buffer map!\n");
+		dev->dev_private = (void *)dev_priv;
+		mach64_do_cleanup_dma(dev);
+		return DRM_ERR(EINVAL);
+	}
+	dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
+	if (!dev_priv->mmio) {
+		DRM_ERROR("can not find mmio map!\n");
+		dev->dev_private = (void *)dev_priv;
+		mach64_do_cleanup_dma(dev);
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->sarea_priv = (drm_mach64_sarea_t *)
+	    ((u8 *) dev_priv->sarea->handle + init->sarea_priv_offset);
+
+	if (!dev_priv->is_pci) {
+		dev_priv->ring_map = drm_core_findmap(dev, init->ring_offset);
+		if (!dev_priv->ring_map) {
+			DRM_ERROR("can not find ring map!\n");
+			dev->dev_private = (void *)dev_priv;
+			mach64_do_cleanup_dma(dev);
+			return DRM_ERR(EINVAL);
+		}
+		drm_core_ioremap(dev_priv->ring_map, dev);
+		if (!dev_priv->ring_map->handle) {
+			DRM_ERROR("can not ioremap virtual address for"
+				  " descriptor ring\n");
+			dev->dev_private = (void *)dev_priv;
+			mach64_do_cleanup_dma(dev);
+			return DRM_ERR(ENOMEM);
+		}
+		dev->agp_buffer_map =
+		    drm_core_findmap(dev, init->buffers_offset);
+		if (!dev->agp_buffer_map) {
+			DRM_ERROR("can not find dma buffer map!\n");
+			dev->dev_private = (void *)dev_priv;
+			mach64_do_cleanup_dma(dev);
+			return DRM_ERR(EINVAL);
+		}
+		/* there might be a nicer way to do this -
+		   dev isn't passed all the way though the mach64 - DA */
+		dev_priv->dev_buffers = dev->agp_buffer_map;
+
+		drm_core_ioremap(dev->agp_buffer_map, dev);
+		if (!dev->agp_buffer_map->handle) {
+			DRM_ERROR("can not ioremap virtual address for"
+				  " dma buffer\n");
+			dev->dev_private = (void *)dev_priv;
+			mach64_do_cleanup_dma(dev);
+			return DRM_ERR(ENOMEM);
+		}
+		dev_priv->agp_textures =
+		    drm_core_findmap(dev, init->agp_textures_offset);
+		if (!dev_priv->agp_textures) {
+			DRM_ERROR("can not find agp texture region!\n");
+			dev->dev_private = (void *)dev_priv;
+			mach64_do_cleanup_dma(dev);
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+	dev->dev_private = (void *)dev_priv;
+
+	dev_priv->driver_mode = init->dma_mode;
+
+	/* changing the FIFO size from the default causes problems with DMA */
+	tmp = MACH64_READ(MACH64_GUI_CNTL);
+	if ((tmp & MACH64_CMDFIFO_SIZE_MASK) != MACH64_CMDFIFO_SIZE_128) {
+		DRM_INFO("Setting FIFO size to 128 entries\n");
+		/* FIFO must be empty to change the FIFO depth */
+		if ((ret = mach64_do_wait_for_idle(dev_priv))) {
+			DRM_ERROR
+			    ("wait for idle failed before changing FIFO depth!\n");
+			mach64_do_cleanup_dma(dev);
+			return ret;
+		}
+		MACH64_WRITE(MACH64_GUI_CNTL, ((tmp & ~MACH64_CMDFIFO_SIZE_MASK)
+					       | MACH64_CMDFIFO_SIZE_128));
+		/* need to read GUI_STAT for proper sync according to docs */
+		if ((ret = mach64_do_wait_for_idle(dev_priv))) {
+			DRM_ERROR
+			    ("wait for idle failed when changing FIFO depth!\n");
+			mach64_do_cleanup_dma(dev);
+			return ret;
+		}
+	}
+
+	/* allocate descriptor memory from pci pool */
+	DRM_DEBUG("Allocating dma descriptor ring\n");
+	dev_priv->ring.size = 0x4000;	/* 16KB */
+
+	if (dev_priv->is_pci) {
+		dev_priv->ring.start = drm_pci_alloc(dev, dev_priv->ring.size,
+						     dev_priv->ring.size,
+						     0xfffffffful,
+						     &dev_priv->ring.handle);
+
+		if (!dev_priv->ring.start || !dev_priv->ring.handle) {
+			DRM_ERROR("Allocating dma descriptor ring failed\n");
+			return DRM_ERR(ENOMEM);
+		} else {
+			dev_priv->ring.start_addr = (u32) dev_priv->ring.handle;
+		}
+	} else {
+		dev_priv->ring.start = dev_priv->ring_map->handle;
+		dev_priv->ring.start_addr = (u32) dev_priv->ring_map->offset;
+	}
+
+	memset(dev_priv->ring.start, 0, dev_priv->ring.size);
+	DRM_INFO("descriptor ring: cpu addr %p, bus addr: 0x%08x\n",
+		 dev_priv->ring.start, dev_priv->ring.start_addr);
+
+	ret = 0;
+	if (dev_priv->driver_mode != MACH64_MODE_MMIO) {
+
+		/* enable block 1 registers and bus mastering */
+		MACH64_WRITE(MACH64_BUS_CNTL, ((MACH64_READ(MACH64_BUS_CNTL)
+						| MACH64_BUS_EXT_REG_EN)
+					       & ~MACH64_BUS_MASTER_DIS));
+
+		/* try a DMA GUI-mastering pass and fall back to MMIO if it fails */
+		DRM_DEBUG("Starting DMA test...\n");
+		if ((ret = mach64_bm_dma_test(dev))) {
+			dev_priv->driver_mode = MACH64_MODE_MMIO;
+		}
+	}
+
+	switch (dev_priv->driver_mode) {
+	case MACH64_MODE_MMIO:
+		MACH64_WRITE(MACH64_BUS_CNTL, (MACH64_READ(MACH64_BUS_CNTL)
+					       | MACH64_BUS_EXT_REG_EN
+					       | MACH64_BUS_MASTER_DIS));
+		if (init->dma_mode == MACH64_MODE_MMIO)
+			DRM_INFO("Forcing pseudo-DMA mode\n");
+		else
+			DRM_INFO
+			    ("DMA test failed (ret=%d), using pseudo-DMA mode\n",
+			     ret);
+		break;
+	case MACH64_MODE_DMA_SYNC:
+		DRM_INFO("DMA test succeeded, using synchronous DMA mode\n");
+		break;
+	case MACH64_MODE_DMA_ASYNC:
+	default:
+		DRM_INFO("DMA test succeeded, using asynchronous DMA mode\n");
+	}
+
+	dev_priv->ring_running = 0;
+
+	/* setup offsets for physical address of table start and end */
+	dev_priv->ring.head_addr = dev_priv->ring.start_addr;
+	dev_priv->ring.head = dev_priv->ring.tail = 0;
+	dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
+	dev_priv->ring.space = dev_priv->ring.size;
+
+	/* setup physical address and size of descriptor table */
+	mach64_do_wait_for_fifo(dev_priv, 1);
+	MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
+		     (dev_priv->ring.
+		      head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB));
+
+	/* init frame counter */
+	dev_priv->sarea_priv->frames_queued = 0;
+	for (i = 0; i < MACH64_MAX_QUEUED_FRAMES; i++) {
+		dev_priv->frame_ofs[i] = ~0;	/* All ones indicates placeholder */
+	}
+
+	/* Allocate the DMA buffer freelist */
+	if ((ret = mach64_init_freelist(dev))) {
+		DRM_ERROR("Freelist allocation failed\n");
+		mach64_do_cleanup_dma(dev);
+		return ret;
+	}
+
+	return 0;
+}
+
+/*******************************************************************/
+/** MMIO Pseudo-DMA (intended primarily for debugging, not performance)
+ */
+
+int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+	volatile u32 *ring_read;
+	struct list_head *ptr;
+	drm_mach64_freelist_t *entry;
+	drm_buf_t *buf = NULL;
+	u32 *buf_ptr;
+	u32 used, reg, target;
+	int fifo, count, found, ret, no_idle_wait;
+
+	fifo = count = reg = no_idle_wait = 0;
+	target = MACH64_BM_ADDR;
+
+	if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) {
+		DRM_INFO
+		    ("%s: idle failed before pseudo-dma dispatch, resetting engine\n",
+		     __FUNCTION__);
+		mach64_dump_engine_info(dev_priv);
+		mach64_do_engine_reset(dev_priv);
+		return ret;
+	}
+
+	ring_read = (u32 *) ring->start;
+
+	while (ring->tail != ring->head) {
+		u32 buf_addr, new_target, offset;
+		u32 bytes, remaining, head, eol;
+
+		head = ring->head;
+
+		new_target =
+		    le32_to_cpu(ring_read[head++]) - MACH64_APERTURE_OFFSET;
+		buf_addr = le32_to_cpu(ring_read[head++]);
+		eol = le32_to_cpu(ring_read[head]) & MACH64_DMA_EOL;
+		bytes = le32_to_cpu(ring_read[head++])
+		    & ~(MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL);
+		head++;
+		head &= ring->tail_mask;
+
+		/* can't wait for idle between a blit setup descriptor
+		 * and a HOSTDATA descriptor or the engine will lock
+		 */
+		if (new_target == MACH64_BM_HOSTDATA
+		    && target == MACH64_BM_ADDR)
+			no_idle_wait = 1;
+
+		target = new_target;
+
+		found = 0;
+		offset = 0;
+		list_for_each(ptr, &dev_priv->pending) {
+			entry = list_entry(ptr, drm_mach64_freelist_t, list);
+			buf = entry->buf;
+			offset = buf_addr - GETBUFADDR(buf);
+			if (offset >= 0 && offset < MACH64_BUFFER_SIZE) {
+				found = 1;
+				break;
+			}
+		}
+
+		if (!found || buf == NULL) {
+			DRM_ERROR
+			    ("Couldn't find pending buffer: head: %u tail: %u buf_addr: 0x%08x %s\n",
+			     head, ring->tail, buf_addr, (eol ? "eol" : ""));
+			mach64_dump_ring_info(dev_priv);
+			mach64_do_engine_reset(dev_priv);
+			return DRM_ERR(EINVAL);
+		}
+
+		/* Hand feed the buffer to the card via MMIO, waiting for the fifo
+		 * every 16 writes
+		 */
+		DRM_DEBUG("target: (0x%08x) %s\n", target,
+			  (target ==
+			   MACH64_BM_HOSTDATA ? "BM_HOSTDATA" : "BM_ADDR"));
+		DRM_DEBUG("offset: %u bytes: %u used: %u\n", offset, bytes,
+			  buf->used);
+
+		remaining = (buf->used - offset) >> 2;	/* dwords remaining in buffer */
+		used = bytes >> 2;	/* dwords in buffer for this descriptor */
+		buf_ptr = (u32 *) ((char *)GETBUFPTR(buf) + offset);
+
+		while (used) {
+
+			if (count == 0) {
+				if (target == MACH64_BM_HOSTDATA) {
+					reg = DMAREG(MACH64_HOST_DATA0);
+					count =
+					    (remaining > 16) ? 16 : remaining;
+					fifo = 0;
+				} else {
+					reg = le32_to_cpu(*buf_ptr++);
+					used--;
+					count = (reg >> 16) + 1;
+				}
+
+				reg = reg & 0xffff;
+				reg = MMSELECT(reg);
+			}
+			while (count && used) {
+				if (!fifo) {
+					if (no_idle_wait) {
+						if ((ret =
+						     mach64_do_wait_for_fifo
+						     (dev_priv, 16)) < 0) {
+							no_idle_wait = 0;
+							return ret;
+						}
+					} else {
+						if ((ret =
+						     mach64_do_wait_for_idle
+						     (dev_priv)) < 0) {
+							return ret;
+						}
+					}
+					fifo = 16;
+				}
+				--fifo;
+				MACH64_WRITE(reg, le32_to_cpu(*buf_ptr++));
+				used--;
+				remaining--;
+
+				reg += 4;
+				count--;
+			}
+		}
+		ring->head = head;
+		ring->head_addr = ring->start_addr + (ring->head * sizeof(u32));
+		ring->space += (4 * sizeof(u32));
+	}
+
+	if ((ret = mach64_do_wait_for_idle(dev_priv)) < 0) {
+		return ret;
+	}
+	MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
+		     ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
+
+	DRM_DEBUG("%s completed\n", __FUNCTION__);
+	return 0;
+}
+
+/*@}*/
+
+
+/*******************************************************************/
+/** \name DMA cleanup */
+/*@{*/
+
+int mach64_do_cleanup_dma(drm_device_t * dev)
+{
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	/* Make sure interrupts are disabled here because the uninstall ioctl
+	 * may not have been called from userspace and after dev_private
+	 * is freed, it's too late.
+	 */
+	if (dev->irq)
+		drm_irq_uninstall(dev);
+
+	if (dev->dev_private) {
+		drm_mach64_private_t *dev_priv = dev->dev_private;
+
+		if (dev_priv->is_pci) {
+			if ((dev_priv->ring.start != NULL)
+			    && dev_priv->ring.handle) {
+				drm_pci_free(dev, dev_priv->ring.size,
+					     dev_priv->ring.start,
+					     dev_priv->ring.handle);
+			}
+		} else {
+			if (dev_priv->ring_map)
+				drm_core_ioremapfree(dev_priv->ring_map, dev);
+		}
+
+		if (dev->agp_buffer_map) {
+			drm_core_ioremapfree(dev->agp_buffer_map, dev);
+			dev->agp_buffer_map = NULL;
+		}
+
+		mach64_destroy_freelist(dev);
+
+		drm_free(dev_priv, sizeof(drm_mach64_private_t),
+			 DRM_MEM_DRIVER);
+		dev->dev_private = NULL;
+	}
+
+	return 0;
+}
+
+/*@}*/
+
+
+/*******************************************************************/
+/** \name IOCTL handlers */
+/*@{*/
+
+int mach64_dma_init(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_init_t init;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(init, (drm_mach64_init_t *) data,
+				 sizeof(init));
+
+	switch (init.func) {
+	case DRM_MACH64_INIT_DMA:
+		return mach64_do_dma_init(dev, &init);
+	case DRM_MACH64_CLEANUP_DMA:
+		return mach64_do_cleanup_dma(dev);
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+int mach64_dma_idle(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	return mach64_do_dma_idle(dev_priv);
+}
+
+int mach64_dma_flush(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	return mach64_do_dma_flush(dev_priv);
+}
+
+int mach64_engine_reset(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	return mach64_do_engine_reset(dev_priv);
+}
+
+/*@}*/
+
+
+/*******************************************************************/
+/** \name Freelist management */
+/*@{*/
+
+int mach64_init_freelist(drm_device_t * dev)
+{
+	drm_device_dma_t *dma = dev->dma;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_freelist_t *entry;
+	struct list_head *ptr;
+	int i;
+
+	DRM_DEBUG("%s: adding %d buffers to freelist\n", __FUNCTION__,
+		  dma->buf_count);
+
+	for (i = 0; i < dma->buf_count; i++) {
+		if ((entry =
+		     (drm_mach64_freelist_t *)
+		     drm_alloc(sizeof(drm_mach64_freelist_t),
+			       DRM_MEM_BUFLISTS)) == NULL)
+			return DRM_ERR(ENOMEM);
+		memset(entry, 0, sizeof(drm_mach64_freelist_t));
+		entry->buf = dma->buflist[i];
+		ptr = &entry->list;
+		list_add_tail(ptr, &dev_priv->free_list);
+	}
+
+	return 0;
+}
+
+void mach64_destroy_freelist(drm_device_t * dev)
+{
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_freelist_t *entry;
+	struct list_head *ptr;
+	struct list_head *tmp;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	list_for_each_safe(ptr, tmp, &dev_priv->pending) {
+		list_del(ptr);
+		entry = list_entry(ptr, drm_mach64_freelist_t, list);
+		drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS);
+	}
+	list_for_each_safe(ptr, tmp, &dev_priv->placeholders) {
+		list_del(ptr);
+		entry = list_entry(ptr, drm_mach64_freelist_t, list);
+		drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS);
+	}
+
+	list_for_each_safe(ptr, tmp, &dev_priv->free_list) {
+		list_del(ptr);
+		entry = list_entry(ptr, drm_mach64_freelist_t, list);
+		drm_free(entry, sizeof(*entry), DRM_MEM_BUFLISTS);
+	}
+}
+
+/* IMPORTANT: This function should only be called when the engine is idle or locked up,
+ * as it assumes all buffers in the pending list have been completed by the hardware.
+ */
+int mach64_do_release_used_buffers(drm_mach64_private_t * dev_priv)
+{
+	struct list_head *ptr;
+	struct list_head *tmp;
+	drm_mach64_freelist_t *entry;
+	int i;
+
+	if (list_empty(&dev_priv->pending))
+		return 0;
+
+	/* Iterate the pending list and move all buffers into the freelist... */
+	i = 0;
+	list_for_each_safe(ptr, tmp, &dev_priv->pending) {
+		entry = list_entry(ptr, drm_mach64_freelist_t, list);
+		if (entry->discard) {
+			entry->buf->pending = 0;
+			list_del(ptr);
+			list_add_tail(ptr, &dev_priv->free_list);
+			i++;
+		}
+	}
+
+	DRM_DEBUG("%s: released %d buffers from pending list\n", __FUNCTION__,
+		  i);
+
+	return 0;
+}
+
+drm_buf_t *mach64_freelist_get(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+	drm_mach64_freelist_t *entry;
+	struct list_head *ptr;
+	struct list_head *tmp;
+	int t;
+
+	if (list_empty(&dev_priv->free_list)) {
+		u32 head, tail, ofs;
+
+		if (list_empty(&dev_priv->pending)) {
+			DRM_ERROR
+			    ("Couldn't get buffer - pending and free lists empty\n");
+			t = 0;
+			list_for_each(ptr, &dev_priv->placeholders) {
+				t++;
+			}
+			DRM_INFO("Placeholders: %d\n", t);
+			return NULL;
+		}
+
+		tail = ring->tail;
+		for (t = 0; t < dev_priv->usec_timeout; t++) {
+			mach64_ring_tick(dev_priv, ring);
+			head = ring->head;
+
+			if (head == tail) {
+#if MACH64_EXTRA_CHECKING
+				if (MACH64_READ(MACH64_GUI_STAT) &
+				    MACH64_GUI_ACTIVE) {
+					DRM_ERROR
+					    ("Empty ring with non-idle engine!\n");
+					mach64_dump_ring_info(dev_priv);
+					return NULL;
+				}
+#endif
+				/* last pass is complete, so release everything */
+				mach64_do_release_used_buffers(dev_priv);
+				DRM_DEBUG
+				    ("%s: idle engine, freed all buffers.\n",
+				     __FUNCTION__);
+				if (list_empty(&dev_priv->free_list)) {
+					DRM_ERROR
+					    ("Freelist empty with idle engine\n");
+					return NULL;
+				}
+				goto _freelist_entry_found;
+			}
+			/* Look for a completed buffer and bail out of the loop
+			 * as soon as we find one -- don't waste time trying
+			 * to free extra bufs here, leave that to do_release_used_buffers
+			 */
+			list_for_each_safe(ptr, tmp, &dev_priv->pending) {
+				entry =
+				    list_entry(ptr, drm_mach64_freelist_t,
+					       list);
+				ofs = entry->ring_ofs;
+				if (entry->discard &&
+				    ((head < tail
+				      && (ofs < head || ofs >= tail))
+				     || (head > tail
+					 && (ofs < head && ofs >= tail)))) {
+#if MACH64_EXTRA_CHECKING
+					int i;
+
+					for (i = head; i != tail;
+					     i = (i + 4) & ring->tail_mask) {
+						u32 o1 =
+						    le32_to_cpu(((u32 *) ring->
+								 start)[i + 1]);
+						u32 o2 = GETBUFADDR(entry->buf);
+
+						if (o1 == o2) {
+							DRM_ERROR
+							    ("Attempting to free used buffer: "
+							     "i=%d  buf=0x%08x\n",
+							     i, o1);
+							mach64_dump_ring_info
+							    (dev_priv);
+							return NULL;
+						}
+					}
+#endif
+					/* found a processed buffer */
+					entry->buf->pending = 0;
+					list_del(ptr);
+					entry->buf->used = 0;
+					list_add_tail(ptr,
+						      &dev_priv->placeholders);
+					DRM_DEBUG
+					    ("%s: freed processed buffer (head=%d tail=%d "
+					     "buf ring ofs=%d).\n",
+					     __FUNCTION__, head, tail, ofs);
+					return entry->buf;
+				}
+			}
+			DRM_UDELAY(1);
+		}
+		mach64_dump_ring_info(dev_priv);
+		DRM_ERROR
+		    ("timeout waiting for buffers: ring head_addr: 0x%08x head: %d tail: %d\n",
+		     ring->head_addr, ring->head, ring->tail);
+		return NULL;
+	}
+
+      _freelist_entry_found:
+	ptr = dev_priv->free_list.next;
+	list_del(ptr);
+	entry = list_entry(ptr, drm_mach64_freelist_t, list);
+	entry->buf->used = 0;
+	list_add_tail(ptr, &dev_priv->placeholders);
+	return entry->buf;
+}
+
+/*@}*/
+
+
+/*******************************************************************/
+/** \name DMA buffer request and submission IOCTL handler */
+/*@{*/
+
+static int mach64_dma_get_buffers(DRMFILE filp, drm_device_t * dev,
+				  drm_dma_t * d)
+{
+	int i;
+	drm_buf_t *buf;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+
+	for (i = d->granted_count; i < d->request_count; i++) {
+		buf = mach64_freelist_get(dev_priv);
+#if MACH64_EXTRA_CHECKING
+		if (!buf)
+			return DRM_ERR(EFAULT);
+#else
+		if (!buf)
+			return DRM_ERR(EAGAIN);
+#endif
+
+		buf->filp = filp;
+
+		if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx,
+				     sizeof(buf->idx)))
+			return DRM_ERR(EFAULT);
+		if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total,
+				     sizeof(buf->total)))
+			return DRM_ERR(EFAULT);
+
+		d->granted_count++;
+	}
+	return 0;
+}
+
+int mach64_dma_buffers(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	drm_dma_t d;
+	int ret = 0;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(d, (drm_dma_t *) data, sizeof(d));
+
+	/* Please don't send us buffers.
+	 */
+	if (d.send_count != 0) {
+		DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
+			  DRM_CURRENTPID, d.send_count);
+		return DRM_ERR(EINVAL);
+	}
+
+	/* We'll send you buffers.
+	 */
+	if (d.request_count < 0 || d.request_count > dma->buf_count) {
+		DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
+			  DRM_CURRENTPID, d.request_count, dma->buf_count);
+		ret = DRM_ERR(EINVAL);
+	}
+
+	d.granted_count = 0;
+
+	if (d.request_count) {
+		ret = mach64_dma_get_buffers(filp, dev, &d);
+	}
+
+	DRM_COPY_TO_USER_IOCTL((drm_dma_t *) data, d, sizeof(d));
+
+	return ret;
+}
+
+void mach64_driver_pretakedown(drm_device_t * dev)
+{
+	mach64_do_cleanup_dma(dev);
+}
+
+/*@}*/
diff --git a/sys/dev/drm/mach64_drm.h b/sys/dev/drm/mach64_drm.h
new file mode 100644
index 0000000..43d0f7f
--- /dev/null
+++ b/sys/dev/drm/mach64_drm.h
@@ -0,0 +1,257 @@
+/* mach64_drm.h -- Public header for the mach64 driver -*- linux-c -*-
+ * Created: Thu Nov 30 20:04:32 2000 by gareth@valinux.com
+ *
+ * Copyright 2000 Gareth Hughes
+ * Copyright 2002 Frank C. Earl
+ * Copyright 2002-2003 Leif Delgass
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Frank C. Earl <fearl@airmail.net>
+ *    Leif Delgass <ldelgass@retinalburn.net>
+ *
+ * $FreeBSD$
+ */
+
+#ifndef __MACH64_DRM_H__
+#define __MACH64_DRM_H__
+
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (mach64_sarea.h)
+ */
+#ifndef __MACH64_SAREA_DEFINES__
+#define __MACH64_SAREA_DEFINES__
+
+/* What needs to be changed for the current vertex buffer?
+ * GH: We're going to be pedantic about this.  We want the card to do as
+ * little as possible, so let's avoid having it fetch a whole bunch of
+ * register values that don't change all that often, if at all.
+ */
+#define MACH64_UPLOAD_DST_OFF_PITCH	0x0001
+#define MACH64_UPLOAD_Z_OFF_PITCH	0x0002
+#define MACH64_UPLOAD_Z_ALPHA_CNTL	0x0004
+#define MACH64_UPLOAD_SCALE_3D_CNTL	0x0008
+#define MACH64_UPLOAD_DP_FOG_CLR	0x0010
+#define MACH64_UPLOAD_DP_WRITE_MASK	0x0020
+#define MACH64_UPLOAD_DP_PIX_WIDTH	0x0040
+#define MACH64_UPLOAD_SETUP_CNTL	0x0080
+#define MACH64_UPLOAD_MISC		0x0100
+#define MACH64_UPLOAD_TEXTURE		0x0200
+#define MACH64_UPLOAD_TEX0IMAGE		0x0400
+#define MACH64_UPLOAD_TEX1IMAGE		0x0800
+#define MACH64_UPLOAD_CLIPRECTS		0x1000	/* handled client-side */
+#define MACH64_UPLOAD_CONTEXT		0x00ff
+#define MACH64_UPLOAD_ALL		0x1fff
+
+/* DMA buffer size
+ */
+#define MACH64_BUFFER_SIZE		16384
+
+/* Max number of swaps allowed on the ring
+ * before the client must wait
+ */
+#define MACH64_MAX_QUEUED_FRAMES        3
+
+/* Byte offsets for host blit buffer data
+ */
+#define MACH64_HOSTDATA_BLIT_OFFSET	104
+
+/* Keep these small for testing.
+ */
+#define MACH64_NR_SAREA_CLIPRECTS	8
+
+#define MACH64_CARD_HEAP		0
+#define MACH64_AGP_HEAP			1
+#define MACH64_NR_TEX_HEAPS		2
+#define MACH64_NR_TEX_REGIONS		64
+#define MACH64_LOG_TEX_GRANULARITY	16
+
+#define MACH64_TEX_MAXLEVELS		1
+
+#define MACH64_NR_CONTEXT_REGS		15
+#define MACH64_NR_TEXTURE_REGS		4
+
+#endif				/* __MACH64_SAREA_DEFINES__ */
+
+typedef struct {
+	unsigned int dst_off_pitch;
+
+	unsigned int z_off_pitch;
+	unsigned int z_cntl;
+	unsigned int alpha_tst_cntl;
+
+	unsigned int scale_3d_cntl;
+
+	unsigned int sc_left_right;
+	unsigned int sc_top_bottom;
+
+	unsigned int dp_fog_clr;
+	unsigned int dp_write_mask;
+	unsigned int dp_pix_width;
+	unsigned int dp_mix;
+	unsigned int dp_src;
+
+	unsigned int clr_cmp_cntl;
+	unsigned int gui_traj_cntl;
+
+	unsigned int setup_cntl;
+
+	unsigned int tex_size_pitch;
+	unsigned int tex_cntl;
+	unsigned int secondary_tex_off;
+	unsigned int tex_offset;
+} drm_mach64_context_regs_t;
+
+typedef struct drm_mach64_sarea {
+	/* The channel for communication of state information to the kernel
+	 * on firing a vertex dma buffer.
+	 */
+	drm_mach64_context_regs_t context_state;
+	unsigned int dirty;
+	unsigned int vertsize;
+
+	/* The current cliprects, or a subset thereof.
+	 */
+	drm_clip_rect_t boxes[MACH64_NR_SAREA_CLIPRECTS];
+	unsigned int nbox;
+
+	/* Counters for client-side throttling of rendering clients.
+	 */
+	unsigned int frames_queued;
+
+	/* Texture memory LRU.
+	 */
+	drm_tex_region_t tex_list[MACH64_NR_TEX_HEAPS][MACH64_NR_TEX_REGIONS +
+						       1];
+	unsigned int tex_age[MACH64_NR_TEX_HEAPS];
+	int ctx_owner;
+} drm_mach64_sarea_t;
+
+/* WARNING: If you change any of these defines, make sure to change the
+ * defines in the Xserver file (mach64_common.h)
+ */
+
+/* Mach64 specific ioctls
+ * The device specific ioctl range is 0x40 to 0x79.
+ */
+
+#define DRM_MACH64_INIT           0x00
+#define DRM_MACH64_IDLE           0x01
+#define DRM_MACH64_RESET          0x02
+#define DRM_MACH64_SWAP           0x03
+#define DRM_MACH64_CLEAR          0x04
+#define DRM_MACH64_VERTEX         0x05
+#define DRM_MACH64_BLIT           0x06
+#define DRM_MACH64_FLUSH          0x07
+#define DRM_MACH64_GETPARAM       0x08
+
+#define DRM_IOCTL_MACH64_INIT           DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_INIT, drm_mach64_init_t)
+#define DRM_IOCTL_MACH64_IDLE           DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_IDLE )
+#define DRM_IOCTL_MACH64_RESET          DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_RESET )
+#define DRM_IOCTL_MACH64_SWAP           DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_SWAP )
+#define DRM_IOCTL_MACH64_CLEAR          DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_CLEAR, drm_mach64_clear_t)
+#define DRM_IOCTL_MACH64_VERTEX         DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_VERTEX, drm_mach64_vertex_t)
+#define DRM_IOCTL_MACH64_BLIT           DRM_IOW( DRM_COMMAND_BASE + DRM_MACH64_BLIT, drm_mach64_blit_t)
+#define DRM_IOCTL_MACH64_FLUSH          DRM_IO(  DRM_COMMAND_BASE + DRM_MACH64_FLUSH )
+#define DRM_IOCTL_MACH64_GETPARAM       DRM_IOWR( DRM_COMMAND_BASE + DRM_MACH64_GETPARAM, drm_mach64_getparam_t)
+
+/* Buffer flags for clears
+ */
+#define MACH64_FRONT			0x1
+#define MACH64_BACK			0x2
+#define MACH64_DEPTH			0x4
+
+/* Primitive types for vertex buffers
+ */
+#define MACH64_PRIM_POINTS		0x00000000
+#define MACH64_PRIM_LINES		0x00000001
+#define MACH64_PRIM_LINE_LOOP		0x00000002
+#define MACH64_PRIM_LINE_STRIP		0x00000003
+#define MACH64_PRIM_TRIANGLES		0x00000004
+#define MACH64_PRIM_TRIANGLE_STRIP	0x00000005
+#define MACH64_PRIM_TRIANGLE_FAN	0x00000006
+#define MACH64_PRIM_QUADS		0x00000007
+#define MACH64_PRIM_QUAD_STRIP		0x00000008
+#define MACH64_PRIM_POLYGON		0x00000009
+
+typedef enum _drm_mach64_dma_mode_t {
+	MACH64_MODE_DMA_ASYNC,
+	MACH64_MODE_DMA_SYNC,
+	MACH64_MODE_MMIO
+} drm_mach64_dma_mode_t;
+
+typedef struct drm_mach64_init {
+	enum {
+		DRM_MACH64_INIT_DMA = 0x01,
+		DRM_MACH64_CLEANUP_DMA = 0x02
+	} func;
+
+	unsigned long sarea_priv_offset;
+	int is_pci;
+	drm_mach64_dma_mode_t dma_mode;
+
+	unsigned int fb_bpp;
+	unsigned int front_offset, front_pitch;
+	unsigned int back_offset, back_pitch;
+
+	unsigned int depth_bpp;
+	unsigned int depth_offset, depth_pitch;
+
+	unsigned long fb_offset;
+	unsigned long mmio_offset;
+	unsigned long ring_offset;
+	unsigned long buffers_offset;
+	unsigned long agp_textures_offset;
+} drm_mach64_init_t;
+
+typedef struct drm_mach64_clear {
+	unsigned int flags;
+	int x, y, w, h;
+	unsigned int clear_color;
+	unsigned int clear_depth;
+} drm_mach64_clear_t;
+
+typedef struct drm_mach64_vertex {
+	int prim;
+	void *buf;		/* Address of vertex buffer */
+	unsigned long used;	/* Number of bytes in buffer */
+	int discard;		/* Client finished with buffer? */
+} drm_mach64_vertex_t;
+
+typedef struct drm_mach64_blit {
+	int idx;
+	int pitch;
+	int offset;
+	int format;
+	unsigned short x, y;
+	unsigned short width, height;
+} drm_mach64_blit_t;
+
+typedef struct drm_mach64_getparam {
+	enum {
+		MACH64_PARAM_FRAMES_QUEUED = 0x01,
+		MACH64_PARAM_IRQ_NR = 0x02
+	} param;
+	void *value;
+} drm_mach64_getparam_t;
+
+#endif
diff --git a/sys/dev/drm/mach64_drv.c b/sys/dev/drm/mach64_drv.c
new file mode 100644
index 0000000..9c5b483
--- /dev/null
+++ b/sys/dev/drm/mach64_drv.c
@@ -0,0 +1,119 @@
+/* mach64_drv.c -- ATI Rage 128 driver -*- linux-c -*-
+ * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
+ */
+/*-
+ * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
+ * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
+ * OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Rickard E. (Rik) Faith <faith@valinux.com>
+ *    Gareth Hughes <gareth@valinux.com>
+ *
+ * $FreeBSD$
+ */
+
+
+#include <sys/types.h>
+
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
+#include "dev/drm/mach64_drm.h"
+#include "dev/drm/mach64_drv.h"
+#include "dev/drm/drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t mach64_pciidlist[] = {
+	mach64_PCI_IDS
+};
+
+extern drm_ioctl_desc_t mach64_ioctls[];
+extern int mach64_max_ioctl;
+
+static void mach64_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = 1; /* No dev_priv */
+	dev->pretakedown = mach64_driver_pretakedown;
+	dev->vblank_wait = mach64_driver_vblank_wait;
+	dev->irq_preinstall = mach64_driver_irq_preinstall;
+	dev->irq_postinstall = mach64_driver_irq_postinstall;
+	dev->irq_uninstall = mach64_driver_irq_uninstall;
+	dev->irq_handler = mach64_driver_irq_handler;
+	dev->dma_ioctl = mach64_dma_buffers;
+
+	dev->driver_ioctls = mach64_ioctls;
+	dev->max_driver_ioctl = mach64_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->use_mtrr = 1;
+	dev->use_pci_dma = 1;
+	dev->use_dma = 1;
+	dev->use_irq = 1;
+	dev->use_vbl_irq = 1;
+}
+
+#ifdef __FreeBSD__
+static int
+mach64_probe(device_t dev)
+{
+	return drm_probe(dev, mach64_pciidlist);
+}
+
+static int
+mach64_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	mach64_configure(dev);
+	return drm_attach(nbdev, mach64_pciidlist);
+}
+
+static device_method_t mach64_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		mach64_probe),
+	DEVMETHOD(device_attach,	mach64_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t mach64_driver = {
+	"drm",
+	mach64_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(mach64, pci, mach64_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(mach64, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+CFDRIVER_DECL(mach64, DV_TTY, NULL);
+#endif
diff --git a/sys/dev/drm/mach64_drv.h b/sys/dev/drm/mach64_drv.h
new file mode 100644
index 0000000..9c33af2
--- /dev/null
+++ b/sys/dev/drm/mach64_drv.h
@@ -0,0 +1,1045 @@
+/* mach64_drv.h -- Private header for mach64 driver -*- linux-c -*-
+ * Created: Fri Nov 24 22:07:58 2000 by gareth@valinux.com
+ *
+ * Copyright 2000 Gareth Hughes
+ * Copyright 2002 Frank C. Earl
+ * Copyright 2002-2003 Leif Delgass
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Frank C. Earl <fearl@airmail.net>
+ *    Leif Delgass <ldelgass@retinalburn.net>
+ *    Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
+ *
+ * $FreeBSD$
+ */
+
+#ifndef __MACH64_DRV_H__
+#define __MACH64_DRV_H__
+
+/* General customization:
+ */
+
+#define DRIVER_AUTHOR		"Gareth Hughes, Leif Delgass, José Fonseca"
+
+#define DRIVER_NAME		"mach64"
+#define DRIVER_DESC		"DRM module for the ATI Rage Pro"
+#define DRIVER_DATE		"20020904"
+
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		0
+#define DRIVER_PATCHLEVEL	0
+
+/* FIXME: remove these when not needed */
+/* Development driver options */
+#define MACH64_EXTRA_CHECKING     0	/* Extra sanity checks for DMA/freelist management */
+#define MACH64_VERBOSE		  0	/* Verbose debugging output */
+
+typedef struct drm_mach64_freelist {
+	struct list_head list;	/* List pointers for free_list, placeholders, or pending list */
+	drm_buf_t *buf;		/* Pointer to the buffer */
+	int discard;		/* This flag is set when we're done (re)using a buffer */
+	u32 ring_ofs;		/* dword offset in ring of last descriptor for this buffer */
+} drm_mach64_freelist_t;
+
+typedef struct drm_mach64_descriptor_ring {
+	dma_addr_t handle;	/* handle (bus address) of ring returned by pci_alloc_consistent() */
+	void *start;		/* write pointer (cpu address) to start of descriptor ring */
+	u32 start_addr;		/* bus address of beginning of descriptor ring */
+	int size;		/* size of ring in bytes */
+
+	u32 head_addr;		/* bus address of descriptor ring head */
+	u32 head;		/* dword offset of descriptor ring head */
+	u32 tail;		/* dword offset of descriptor ring tail */
+	u32 tail_mask;		/* mask used to wrap ring */
+	int space;		/* number of free bytes in ring */
+} drm_mach64_descriptor_ring_t;
+
+typedef struct drm_mach64_private {
+	drm_mach64_sarea_t *sarea_priv;
+
+	int is_pci;
+	drm_mach64_dma_mode_t driver_mode;	/* Async DMA, sync DMA, or MMIO */
+
+	int usec_timeout;	/* Timeout for the wait functions */
+
+	drm_mach64_descriptor_ring_t ring;	/* DMA descriptor table (ring buffer) */
+	int ring_running;	/* Is bus mastering is enabled */
+
+	struct list_head free_list;	/* Free-list head */
+	struct list_head placeholders;	/* Placeholder list for buffers held by clients */
+	struct list_head pending;	/* Buffers pending completion */
+
+	u32 frame_ofs[MACH64_MAX_QUEUED_FRAMES];	/* dword ring offsets of most recent frame swaps */
+
+	unsigned int fb_bpp;
+	unsigned int front_offset, front_pitch;
+	unsigned int back_offset, back_pitch;
+
+	unsigned int depth_bpp;
+	unsigned int depth_offset, depth_pitch;
+
+	u32 front_offset_pitch;
+	u32 back_offset_pitch;
+	u32 depth_offset_pitch;
+
+	drm_local_map_t *sarea;
+	drm_local_map_t *fb;
+	drm_local_map_t *mmio;
+	drm_local_map_t *ring_map;
+	drm_local_map_t *dev_buffers;	/* this is a pointer to a structure in dev */
+	drm_local_map_t *agp_textures;
+} drm_mach64_private_t;
+
+				/* mach64_dma.c */
+extern int mach64_dma_init(DRM_IOCTL_ARGS);
+extern int mach64_dma_idle(DRM_IOCTL_ARGS);
+extern int mach64_dma_flush(DRM_IOCTL_ARGS);
+extern int mach64_engine_reset(DRM_IOCTL_ARGS);
+extern int mach64_dma_buffers(DRM_IOCTL_ARGS);
+extern void mach64_driver_pretakedown(drm_device_t * dev);
+
+extern int mach64_init_freelist(drm_device_t * dev);
+extern void mach64_destroy_freelist(drm_device_t * dev);
+extern drm_buf_t *mach64_freelist_get(drm_mach64_private_t * dev_priv);
+
+extern int mach64_do_wait_for_fifo(drm_mach64_private_t * dev_priv,
+				   int entries);
+extern int mach64_do_wait_for_idle(drm_mach64_private_t * dev_priv);
+extern int mach64_wait_ring(drm_mach64_private_t * dev_priv, int n);
+extern int mach64_do_dispatch_pseudo_dma(drm_mach64_private_t * dev_priv);
+extern int mach64_do_release_used_buffers(drm_mach64_private_t * dev_priv);
+extern void mach64_dump_engine_info(drm_mach64_private_t * dev_priv);
+extern void mach64_dump_ring_info(drm_mach64_private_t * dev_priv);
+extern int mach64_do_engine_reset(drm_mach64_private_t * dev_priv);
+
+extern int mach64_do_dma_idle(drm_mach64_private_t * dev_priv);
+extern int mach64_do_dma_flush(drm_mach64_private_t * dev_priv);
+extern int mach64_do_cleanup_dma(drm_device_t * dev);
+
+				/* mach64_state.c */
+extern int mach64_dma_clear(DRM_IOCTL_ARGS);
+extern int mach64_dma_swap(DRM_IOCTL_ARGS);
+extern int mach64_dma_vertex(DRM_IOCTL_ARGS);
+extern int mach64_dma_blit(DRM_IOCTL_ARGS);
+extern int mach64_get_param(DRM_IOCTL_ARGS);
+extern int mach64_driver_vblank_wait(drm_device_t * dev,
+				     unsigned int *sequence);
+
+extern irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS);
+extern void mach64_driver_irq_preinstall(drm_device_t * dev);
+extern void mach64_driver_irq_postinstall(drm_device_t * dev);
+extern void mach64_driver_irq_uninstall(drm_device_t * dev);
+
+/* ================================================================
+ * Registers
+ */
+
+#define MACH64_AGP_BASE				0x0148
+#define MACH64_AGP_CNTL				0x014c
+#define MACH64_ALPHA_TST_CNTL			0x0550
+
+#define MACH64_DSP_CONFIG 			0x0420
+#define MACH64_DSP_ON_OFF 			0x0424
+#define MACH64_EXT_MEM_CNTL 			0x04ac
+#define MACH64_GEN_TEST_CNTL 			0x04d0
+#define MACH64_HW_DEBUG 			0x047c
+#define MACH64_MEM_ADDR_CONFIG 			0x0434
+#define MACH64_MEM_BUF_CNTL 			0x042c
+#define MACH64_MEM_CNTL 			0x04b0
+
+#define MACH64_BM_ADDR				0x0648
+#define MACH64_BM_COMMAND			0x0188
+#define MACH64_BM_DATA				0x0648
+#define MACH64_BM_FRAME_BUF_OFFSET		0x0180
+#define MACH64_BM_GUI_TABLE			0x01b8
+#define MACH64_BM_GUI_TABLE_CMD			0x064c
+#	define MACH64_CIRCULAR_BUF_SIZE_16KB		(0 << 0)
+#	define MACH64_CIRCULAR_BUF_SIZE_32KB		(1 << 0)
+#	define MACH64_CIRCULAR_BUF_SIZE_64KB		(2 << 0)
+#	define MACH64_CIRCULAR_BUF_SIZE_128KB		(3 << 0)
+#	define MACH64_LAST_DESCRIPTOR			(1 << 31)
+#define MACH64_BM_HOSTDATA			0x0644
+#define MACH64_BM_STATUS			0x018c
+#define MACH64_BM_SYSTEM_MEM_ADDR		0x0184
+#define MACH64_BM_SYSTEM_TABLE			0x01bc
+#define MACH64_BUS_CNTL				0x04a0
+#	define MACH64_BUS_MSTR_RESET			(1 << 1)
+#	define MACH64_BUS_APER_REG_DIS			(1 << 4)
+#	define MACH64_BUS_FLUSH_BUF			(1 << 2)
+#	define MACH64_BUS_MASTER_DIS			(1 << 6)
+#	define MACH64_BUS_EXT_REG_EN			(1 << 27)
+
+#define MACH64_CLR_CMP_CLR			0x0700
+#define MACH64_CLR_CMP_CNTL			0x0708
+#define MACH64_CLR_CMP_MASK			0x0704
+#define MACH64_CONFIG_CHIP_ID 			0x04e0
+#define MACH64_CONFIG_CNTL 			0x04dc
+#define MACH64_CONFIG_STAT0 			0x04e4
+#define MACH64_CONFIG_STAT1 			0x0494
+#define MACH64_CONFIG_STAT2 			0x0498
+#define MACH64_CONTEXT_LOAD_CNTL		0x072c
+#define MACH64_CONTEXT_MASK			0x0720
+#define MACH64_COMPOSITE_SHADOW_ID		0x0798
+#define MACH64_CRC_SIG 				0x04e8
+#define MACH64_CUSTOM_MACRO_CNTL 		0x04d4
+
+#define MACH64_DP_BKGD_CLR			0x06c0
+#define MACH64_DP_FOG_CLR			0x06c4
+#define MACH64_DP_FGRD_BKGD_CLR			0x06e0
+#define MACH64_DP_FRGD_CLR			0x06c4
+#define MACH64_DP_FGRD_CLR_MIX			0x06dc
+
+#define MACH64_DP_MIX				0x06d4
+#	define BKGD_MIX_NOT_D				(0 << 0)
+#	define BKGD_MIX_ZERO				(1 << 0)
+#	define BKGD_MIX_ONE				(2 << 0)
+#	define MACH64_BKGD_MIX_D			(3 << 0)
+#	define BKGD_MIX_NOT_S				(4 << 0)
+#	define BKGD_MIX_D_XOR_S				(5 << 0)
+#	define BKGD_MIX_NOT_D_XOR_S			(6 << 0)
+#	define MACH64_BKGD_MIX_S			(7 << 0)
+#	define BKGD_MIX_NOT_D_OR_NOT_S			(8 << 0)
+#	define BKGD_MIX_D_OR_NOT_S			(9 << 0)
+#	define BKGD_MIX_NOT_D_OR_S			(10 << 0)
+#	define BKGD_MIX_D_OR_S				(11 << 0)
+#	define BKGD_MIX_D_AND_S				(12 << 0)
+#	define BKGD_MIX_NOT_D_AND_S			(13 << 0)
+#	define BKGD_MIX_D_AND_NOT_S			(14 << 0)
+#	define BKGD_MIX_NOT_D_AND_NOT_S			(15 << 0)
+#	define BKGD_MIX_D_PLUS_S_DIV2			(23 << 0)
+#	define FRGD_MIX_NOT_D				(0 << 16)
+#	define FRGD_MIX_ZERO				(1 << 16)
+#	define FRGD_MIX_ONE				(2 << 16)
+#	define FRGD_MIX_D				(3 << 16)
+#	define FRGD_MIX_NOT_S				(4 << 16)
+#	define FRGD_MIX_D_XOR_S				(5 << 16)
+#	define FRGD_MIX_NOT_D_XOR_S			(6 << 16)
+#	define MACH64_FRGD_MIX_S			(7 << 16)
+#	define FRGD_MIX_NOT_D_OR_NOT_S			(8 << 16)
+#	define FRGD_MIX_D_OR_NOT_S			(9 << 16)
+#	define FRGD_MIX_NOT_D_OR_S			(10 << 16)
+#	define FRGD_MIX_D_OR_S				(11 << 16)
+#	define FRGD_MIX_D_AND_S				(12 << 16)
+#	define FRGD_MIX_NOT_D_AND_S			(13 << 16)
+#	define FRGD_MIX_D_AND_NOT_S			(14 << 16)
+#	define FRGD_MIX_NOT_D_AND_NOT_S			(15 << 16)
+#	define FRGD_MIX_D_PLUS_S_DIV2			(23 << 16)
+
+#define MACH64_DP_PIX_WIDTH			0x06d0
+#	define MACH64_HOST_TRIPLE_ENABLE		(1 << 13)
+#	define MACH64_BYTE_ORDER_MSB_TO_LSB		(0 << 24)
+#	define MACH64_BYTE_ORDER_LSB_TO_MSB		(1 << 24)
+
+#define MACH64_DP_SRC				0x06d8
+#	define MACH64_BKGD_SRC_BKGD_CLR			(0 << 0)
+#	define MACH64_BKGD_SRC_FRGD_CLR			(1 << 0)
+#	define MACH64_BKGD_SRC_HOST			(2 << 0)
+#	define MACH64_BKGD_SRC_BLIT			(3 << 0)
+#	define MACH64_BKGD_SRC_PATTERN			(4 << 0)
+#	define MACH64_BKGD_SRC_3D			(5 << 0)
+#	define MACH64_FRGD_SRC_BKGD_CLR			(0 << 8)
+#	define MACH64_FRGD_SRC_FRGD_CLR			(1 << 8)
+#	define MACH64_FRGD_SRC_HOST			(2 << 8)
+#	define MACH64_FRGD_SRC_BLIT			(3 << 8)
+#	define MACH64_FRGD_SRC_PATTERN			(4 << 8)
+#	define MACH64_FRGD_SRC_3D			(5 << 8)
+#	define MACH64_MONO_SRC_ONE			(0 << 16)
+#	define MACH64_MONO_SRC_PATTERN			(1 << 16)
+#	define MACH64_MONO_SRC_HOST			(2 << 16)
+#	define MACH64_MONO_SRC_BLIT			(3 << 16)
+
+#define MACH64_DP_WRITE_MASK			0x06c8
+
+#define MACH64_DST_CNTL				0x0530
+#	define MACH64_DST_X_RIGHT_TO_LEFT		(0 << 0)
+#	define MACH64_DST_X_LEFT_TO_RIGHT		(1 << 0)
+#	define MACH64_DST_Y_BOTTOM_TO_TOP		(0 << 1)
+#	define MACH64_DST_Y_TOP_TO_BOTTOM		(1 << 1)
+#	define MACH64_DST_X_MAJOR			(0 << 2)
+#	define MACH64_DST_Y_MAJOR			(1 << 2)
+#	define MACH64_DST_X_TILE			(1 << 3)
+#	define MACH64_DST_Y_TILE			(1 << 4)
+#	define MACH64_DST_LAST_PEL			(1 << 5)
+#	define MACH64_DST_POLYGON_ENABLE		(1 << 6)
+#	define MACH64_DST_24_ROTATION_ENABLE		(1 << 7)
+
+#define MACH64_DST_HEIGHT_WIDTH			0x0518
+#define MACH64_DST_OFF_PITCH			0x0500
+#define MACH64_DST_WIDTH_HEIGHT			0x06ec
+#define MACH64_DST_X_Y				0x06e8
+#define MACH64_DST_Y_X				0x050c
+
+#define MACH64_FIFO_STAT			0x0710
+#	define MACH64_FIFO_SLOT_MASK			0x0000ffff
+#	define MACH64_FIFO_ERR				(1 << 31)
+
+#define MACH64_GEN_TEST_CNTL			0x04d0
+#	define MACH64_GUI_ENGINE_ENABLE			(1 << 8)
+#define MACH64_GUI_CMDFIFO_DEBUG		0x0170
+#define MACH64_GUI_CMDFIFO_DATA			0x0174
+#define MACH64_GUI_CNTL				0x0178
+#       define MACH64_CMDFIFO_SIZE_MASK                 0x00000003ul
+#       define MACH64_CMDFIFO_SIZE_192                  0x00000000ul
+#       define MACH64_CMDFIFO_SIZE_128                  0x00000001ul
+#       define MACH64_CMDFIFO_SIZE_64                   0x00000002ul
+#define MACH64_GUI_STAT				0x0738
+#	define MACH64_GUI_ACTIVE			(1 << 0)
+#define MACH64_GUI_TRAJ_CNTL			0x0730
+
+#define MACH64_HOST_CNTL			0x0640
+#define MACH64_HOST_DATA0			0x0600
+
+#define MACH64_ONE_OVER_AREA			0x029c
+#define MACH64_ONE_OVER_AREA_UC			0x0300
+
+#define MACH64_PAT_REG0				0x0680
+#define MACH64_PAT_REG1				0x0684
+
+#define MACH64_SC_LEFT                          0x06a0
+#define MACH64_SC_RIGHT                         0x06a4
+#define MACH64_SC_LEFT_RIGHT                    0x06a8
+#define MACH64_SC_TOP                           0x06ac
+#define MACH64_SC_BOTTOM                        0x06b0
+#define MACH64_SC_TOP_BOTTOM                    0x06b4
+
+#define MACH64_SCALE_3D_CNTL			0x05fc
+#define MACH64_SCRATCH_REG0			0x0480
+#define MACH64_SCRATCH_REG1			0x0484
+#define MACH64_SECONDARY_TEX_OFF		0x0778
+#define MACH64_SETUP_CNTL			0x0304
+#define MACH64_SRC_CNTL				0x05b4
+#	define MACH64_SRC_BM_ENABLE			(1 << 8)
+#	define MACH64_SRC_BM_SYNC			(1 << 9)
+#	define MACH64_SRC_BM_OP_FRAME_TO_SYSTEM		(0 << 10)
+#	define MACH64_SRC_BM_OP_SYSTEM_TO_FRAME		(1 << 10)
+#	define MACH64_SRC_BM_OP_REG_TO_SYSTEM		(2 << 10)
+#	define MACH64_SRC_BM_OP_SYSTEM_TO_REG		(3 << 10)
+#define MACH64_SRC_HEIGHT1			0x0594
+#define MACH64_SRC_HEIGHT2			0x05ac
+#define MACH64_SRC_HEIGHT1_WIDTH1		0x0598
+#define MACH64_SRC_HEIGHT2_WIDTH2		0x05b0
+#define MACH64_SRC_OFF_PITCH			0x0580
+#define MACH64_SRC_WIDTH1			0x0590
+#define MACH64_SRC_Y_X				0x058c
+
+#define MACH64_TEX_0_OFF			0x05c0
+#define MACH64_TEX_CNTL				0x0774
+#define MACH64_TEX_SIZE_PITCH			0x0770
+#define MACH64_TIMER_CONFIG 			0x0428
+
+#define MACH64_VERTEX_1_ARGB			0x0254
+#define MACH64_VERTEX_1_S			0x0240
+#define MACH64_VERTEX_1_SECONDARY_S		0x0328
+#define MACH64_VERTEX_1_SECONDARY_T		0x032c
+#define MACH64_VERTEX_1_SECONDARY_W		0x0330
+#define MACH64_VERTEX_1_SPEC_ARGB		0x024c
+#define MACH64_VERTEX_1_T			0x0244
+#define MACH64_VERTEX_1_W			0x0248
+#define MACH64_VERTEX_1_X_Y			0x0258
+#define MACH64_VERTEX_1_Z			0x0250
+#define MACH64_VERTEX_2_ARGB			0x0274
+#define MACH64_VERTEX_2_S			0x0260
+#define MACH64_VERTEX_2_SECONDARY_S		0x0334
+#define MACH64_VERTEX_2_SECONDARY_T		0x0338
+#define MACH64_VERTEX_2_SECONDARY_W		0x033c
+#define MACH64_VERTEX_2_SPEC_ARGB		0x026c
+#define MACH64_VERTEX_2_T			0x0264
+#define MACH64_VERTEX_2_W			0x0268
+#define MACH64_VERTEX_2_X_Y			0x0278
+#define MACH64_VERTEX_2_Z			0x0270
+#define MACH64_VERTEX_3_ARGB			0x0294
+#define MACH64_VERTEX_3_S			0x0280
+#define MACH64_VERTEX_3_SECONDARY_S		0x02a0
+#define MACH64_VERTEX_3_SECONDARY_T		0x02a4
+#define MACH64_VERTEX_3_SECONDARY_W		0x02a8
+#define MACH64_VERTEX_3_SPEC_ARGB		0x028c
+#define MACH64_VERTEX_3_T			0x0284
+#define MACH64_VERTEX_3_W			0x0288
+#define MACH64_VERTEX_3_X_Y			0x0298
+#define MACH64_VERTEX_3_Z			0x0290
+
+#define MACH64_Z_CNTL				0x054c
+#define MACH64_Z_OFF_PITCH			0x0548
+
+#define MACH64_CRTC_VLINE_CRNT_VLINE		0x0410
+#	define MACH64_CRTC_VLINE_MASK		        0x000007ff
+#	define MACH64_CRTC_CRNT_VLINE_MASK		0x07ff0000
+#define MACH64_CRTC_OFF_PITCH			0x0414
+#define MACH64_CRTC_INT_CNTL			0x0418
+#	define MACH64_CRTC_VBLANK			(1 << 0)
+#	define MACH64_CRTC_VBLANK_INT_EN		(1 << 1)
+#	define MACH64_CRTC_VBLANK_INT			(1 << 2)
+#	define MACH64_CRTC_VLINE_INT_EN			(1 << 3)
+#	define MACH64_CRTC_VLINE_INT			(1 << 4)
+#	define MACH64_CRTC_VLINE_SYNC			(1 << 5)	/* 0=even, 1=odd */
+#	define MACH64_CRTC_FRAME			(1 << 6)	/* 0=even, 1=odd */
+#	define MACH64_CRTC_SNAPSHOT_INT_EN		(1 << 7)
+#	define MACH64_CRTC_SNAPSHOT_INT			(1 << 8)
+#	define MACH64_CRTC_I2C_INT_EN			(1 << 9)
+#	define MACH64_CRTC_I2C_INT			(1 << 10)
+#	define MACH64_CRTC2_VBLANK			(1 << 11)	/* LT Pro */
+#	define MACH64_CRTC2_VBLANK_INT_EN		(1 << 12)	/* LT Pro */
+#	define MACH64_CRTC2_VBLANK_INT			(1 << 13)	/* LT Pro */
+#	define MACH64_CRTC2_VLINE_INT_EN		(1 << 14)	/* LT Pro */
+#	define MACH64_CRTC2_VLINE_INT			(1 << 15)	/* LT Pro */
+#	define MACH64_CRTC_CAPBUF0_INT_EN		(1 << 16)
+#	define MACH64_CRTC_CAPBUF0_INT			(1 << 17)
+#	define MACH64_CRTC_CAPBUF1_INT_EN		(1 << 18)
+#	define MACH64_CRTC_CAPBUF1_INT			(1 << 19)
+#	define MACH64_CRTC_OVERLAY_EOF_INT_EN		(1 << 20)
+#	define MACH64_CRTC_OVERLAY_EOF_INT		(1 << 21)
+#	define MACH64_CRTC_ONESHOT_CAP_INT_EN		(1 << 22)
+#	define MACH64_CRTC_ONESHOT_CAP_INT		(1 << 23)
+#	define MACH64_CRTC_BUSMASTER_EOL_INT_EN		(1 << 24)
+#	define MACH64_CRTC_BUSMASTER_EOL_INT		(1 << 25)
+#	define MACH64_CRTC_GP_INT_EN			(1 << 26)
+#	define MACH64_CRTC_GP_INT			(1 << 27)
+#	define MACH64_CRTC2_VLINE_SYNC			(1 << 28) /* LT Pro */	/* 0=even, 1=odd */
+#	define MACH64_CRTC_SNAPSHOT2_INT_EN		(1 << 29)	/* LT Pro */
+#	define MACH64_CRTC_SNAPSHOT2_INT		(1 << 30)	/* LT Pro */
+#	define MACH64_CRTC_VBLANK2_INT			(1 << 31)
+#	define MACH64_CRTC_INT_ENS				\
+		(						\
+			MACH64_CRTC_VBLANK_INT_EN |		\
+			MACH64_CRTC_VLINE_INT_EN |		\
+			MACH64_CRTC_SNAPSHOT_INT_EN |		\
+			MACH64_CRTC_I2C_INT_EN |		\
+			MACH64_CRTC2_VBLANK_INT_EN |		\
+			MACH64_CRTC2_VLINE_INT_EN |		\
+			MACH64_CRTC_CAPBUF0_INT_EN |		\
+			MACH64_CRTC_CAPBUF1_INT_EN |		\
+			MACH64_CRTC_OVERLAY_EOF_INT_EN |	\
+			MACH64_CRTC_ONESHOT_CAP_INT_EN |	\
+			MACH64_CRTC_BUSMASTER_EOL_INT_EN |	\
+			MACH64_CRTC_GP_INT_EN |			\
+			MACH64_CRTC_SNAPSHOT2_INT_EN |		\
+			0					\
+		)
+#	define MACH64_CRTC_INT_ACKS			\
+		(					\
+			MACH64_CRTC_VBLANK_INT |	\
+			MACH64_CRTC_VLINE_INT |		\
+			MACH64_CRTC_SNAPSHOT_INT |	\
+			MACH64_CRTC_I2C_INT |		\
+			MACH64_CRTC2_VBLANK_INT |	\
+			MACH64_CRTC2_VLINE_INT |	\
+			MACH64_CRTC_CAPBUF0_INT |	\
+			MACH64_CRTC_CAPBUF1_INT |	\
+			MACH64_CRTC_OVERLAY_EOF_INT |	\
+			MACH64_CRTC_ONESHOT_CAP_INT |	\
+			MACH64_CRTC_BUSMASTER_EOL_INT |	\
+			MACH64_CRTC_GP_INT |		\
+			MACH64_CRTC_SNAPSHOT2_INT |	\
+			MACH64_CRTC_VBLANK2_INT |	\
+			0				\
+		)
+
+#define MACH64_DATATYPE_CI8				2
+#define MACH64_DATATYPE_ARGB1555			3
+#define MACH64_DATATYPE_RGB565				4
+#define MACH64_DATATYPE_ARGB8888			6
+#define MACH64_DATATYPE_RGB332				7
+#define MACH64_DATATYPE_Y8				8
+#define MACH64_DATATYPE_RGB8				9
+#define MACH64_DATATYPE_VYUY422				11
+#define MACH64_DATATYPE_YVYU422				12
+#define MACH64_DATATYPE_AYUV444				14
+#define MACH64_DATATYPE_ARGB4444			15
+
+#define MACH64_READ(reg)	DRM_READ32(dev_priv->mmio, (reg) )
+#define MACH64_WRITE(reg,val)	DRM_WRITE32(dev_priv->mmio, (reg), (val) )
+
+#define DWMREG0		0x0400
+#define DWMREG0_END	0x07ff
+#define DWMREG1		0x0000
+#define DWMREG1_END	0x03ff
+
+#define ISREG0(r)	(((r) >= DWMREG0) && ((r) <= DWMREG0_END))
+#define DMAREG0(r)	(((r) - DWMREG0) >> 2)
+#define DMAREG1(r)	((((r) - DWMREG1) >> 2 ) | 0x0100)
+#define DMAREG(r)	(ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
+
+#define MMREG0		0x0000
+#define MMREG0_END	0x00ff
+
+#define ISMMREG0(r)	(((r) >= MMREG0) && ((r) <= MMREG0_END))
+#define MMSELECT0(r)	(((r) << 2) + DWMREG0)
+#define MMSELECT1(r)	(((((r) & 0xff) << 2) + DWMREG1))
+#define MMSELECT(r)	(ISMMREG0(r) ? MMSELECT0(r) : MMSELECT1(r))
+
+/* ================================================================
+ * DMA constants
+ */
+
+/* DMA descriptor field indices:
+ * The descriptor fields are loaded into the read-only
+ * BM_* system bus master registers during a bus-master operation
+ */
+#define MACH64_DMA_FRAME_BUF_OFFSET	0	/* BM_FRAME_BUF_OFFSET */
+#define MACH64_DMA_SYS_MEM_ADDR		1	/* BM_SYSTEM_MEM_ADDR */
+#define MACH64_DMA_COMMAND		2	/* BM_COMMAND */
+#define MACH64_DMA_RESERVED		3	/* BM_STATUS */
+
+/* BM_COMMAND descriptor field flags */
+#define MACH64_DMA_HOLD_OFFSET		(1<<30)	/* Don't increment DMA_FRAME_BUF_OFFSET */
+#define MACH64_DMA_EOL			(1<<31)	/* End of descriptor list flag */
+
+#define MACH64_DMA_CHUNKSIZE	        0x1000	/* 4kB per DMA descriptor */
+#define MACH64_APERTURE_OFFSET	        0x7ff800	/* frame-buffer offset for gui-masters */
+
+/* ================================================================
+ * Misc helper macros
+ */
+
+static __inline__ void mach64_set_dma_eol(volatile u32 * addr)
+{
+#if defined(__i386__)
+	int nr = 31;
+
+	/* Taken from include/asm-i386/bitops.h linux header */
+	__asm__ __volatile__("lock;" "btsl %1,%0":"=m"(*addr)
+			     :"Ir"(nr));
+#elif defined(__powerpc__)
+	u32 old;
+	u32 mask = cpu_to_le32(MACH64_DMA_EOL);
+
+	/* Taken from the include/asm-ppc/bitops.h linux header */
+	__asm__ __volatile__("\n\
+1:	lwarx	%0,0,%3 \n\
+	or	%0,%0,%2 \n\
+	stwcx.	%0,0,%3 \n\
+	bne-	1b":"=&r"(old), "=m"(*addr)
+			     :"r"(mask), "r"(addr), "m"(*addr)
+			     :"cc");
+#elif defined(__alpha__)
+	u32 temp;
+	u32 mask = MACH64_DMA_EOL;
+
+	/* Taken from the include/asm-alpha/bitops.h linux header */
+	__asm__ __volatile__("1:	ldl_l %0,%3\n"
+			     "	bis %0,%2,%0\n"
+			     "	stl_c %0,%1\n"
+			     "	beq %0,2f\n"
+			     ".subsection 2\n"
+			     "2:	br 1b\n"
+			     ".previous":"=&r"(temp), "=m"(*addr)
+			     :"Ir"(mask), "m"(*addr));
+#else
+	u32 mask = cpu_to_le32(MACH64_DMA_EOL);
+
+	*addr |= mask;
+#endif
+}
+
+static __inline__ void mach64_clear_dma_eol(volatile u32 * addr)
+{
+#if defined(__i386__)
+	int nr = 31;
+
+	/* Taken from include/asm-i386/bitops.h linux header */
+	__asm__ __volatile__("lock;" "btrl %1,%0":"=m"(*addr)
+			     :"Ir"(nr));
+#elif defined(__powerpc__)
+	u32 old;
+	u32 mask = cpu_to_le32(MACH64_DMA_EOL);
+
+	/* Taken from the include/asm-ppc/bitops.h linux header */
+	__asm__ __volatile__("\n\
+1:	lwarx	%0,0,%3 \n\
+	andc	%0,%0,%2 \n\
+	stwcx.	%0,0,%3 \n\
+	bne-	1b":"=&r"(old), "=m"(*addr)
+			     :"r"(mask), "r"(addr), "m"(*addr)
+			     :"cc");
+#elif defined(__alpha__)
+	u32 temp;
+	u32 mask = ~MACH64_DMA_EOL;
+
+	/* Taken from the include/asm-alpha/bitops.h linux header */
+	__asm__ __volatile__("1:	ldl_l %0,%3\n"
+			     "	and %0,%2,%0\n"
+			     "	stl_c %0,%1\n"
+			     "	beq %0,2f\n"
+			     ".subsection 2\n"
+			     "2:	br 1b\n"
+			     ".previous":"=&r"(temp), "=m"(*addr)
+			     :"Ir"(mask), "m"(*addr));
+#else
+	u32 mask = cpu_to_le32(~MACH64_DMA_EOL);
+
+	*addr &= mask;
+#endif
+}
+
+static __inline__ void mach64_ring_start(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+
+	DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n",
+		  __FUNCTION__,
+		  ring->head_addr, ring->head, ring->tail, ring->space);
+
+	if (mach64_do_wait_for_idle(dev_priv) < 0) {
+		mach64_do_engine_reset(dev_priv);
+	}
+
+	if (dev_priv->driver_mode != MACH64_MODE_MMIO) {
+		/* enable bus mastering and block 1 registers */
+		MACH64_WRITE(MACH64_BUS_CNTL,
+			     (MACH64_READ(MACH64_BUS_CNTL) &
+			      ~MACH64_BUS_MASTER_DIS)
+			     | MACH64_BUS_EXT_REG_EN);
+		mach64_do_wait_for_idle(dev_priv);
+	}
+
+	/* reset descriptor table ring head */
+	MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
+		     ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
+
+	dev_priv->ring_running = 1;
+}
+
+static __inline__ void mach64_ring_resume(drm_mach64_private_t * dev_priv,
+					  drm_mach64_descriptor_ring_t * ring)
+{
+	DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n",
+		  __FUNCTION__,
+		  ring->head_addr, ring->head, ring->tail, ring->space);
+
+	/* reset descriptor table ring head */
+	MACH64_WRITE(MACH64_BM_GUI_TABLE_CMD,
+		     ring->head_addr | MACH64_CIRCULAR_BUF_SIZE_16KB);
+
+	if (dev_priv->driver_mode == MACH64_MODE_MMIO) {
+		mach64_do_dispatch_pseudo_dma(dev_priv);
+	} else {
+		/* enable GUI bus mastering, and sync the bus master to the GUI */
+		MACH64_WRITE(MACH64_SRC_CNTL,
+			     MACH64_SRC_BM_ENABLE | MACH64_SRC_BM_SYNC |
+			     MACH64_SRC_BM_OP_SYSTEM_TO_REG);
+
+		/* kick off the transfer */
+		MACH64_WRITE(MACH64_DST_HEIGHT_WIDTH, 0);
+		if (dev_priv->driver_mode == MACH64_MODE_DMA_SYNC) {
+			if ((mach64_do_wait_for_idle(dev_priv)) < 0) {
+				DRM_ERROR("%s: idle failed, resetting engine\n",
+					  __FUNCTION__);
+				mach64_dump_engine_info(dev_priv);
+				mach64_do_engine_reset(dev_priv);
+				return;
+			}
+			mach64_do_release_used_buffers(dev_priv);
+		}
+	}
+}
+
+static __inline__ void mach64_ring_tick(drm_mach64_private_t * dev_priv,
+					drm_mach64_descriptor_ring_t * ring)
+{
+	DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n",
+		  __FUNCTION__,
+		  ring->head_addr, ring->head, ring->tail, ring->space);
+
+	if (!dev_priv->ring_running) {
+		mach64_ring_start(dev_priv);
+
+		if (ring->head != ring->tail) {
+			mach64_ring_resume(dev_priv, ring);
+		}
+	} else {
+		/* GUI_ACTIVE must be read before BM_GUI_TABLE to
+		 * correctly determine the ring head
+		 */
+		int gui_active =
+		    MACH64_READ(MACH64_GUI_STAT) & MACH64_GUI_ACTIVE;
+
+		ring->head_addr = MACH64_READ(MACH64_BM_GUI_TABLE) & 0xfffffff0;
+
+		if (gui_active) {
+			/* If not idle, BM_GUI_TABLE points one descriptor
+			 * past the current head
+			 */
+			if (ring->head_addr == ring->start_addr) {
+				ring->head_addr += ring->size;
+			}
+			ring->head_addr -= 4 * sizeof(u32);
+		}
+
+		if (ring->head_addr < ring->start_addr ||
+		    ring->head_addr >= ring->start_addr + ring->size) {
+			DRM_ERROR("bad ring head address: 0x%08x\n",
+				  ring->head_addr);
+			mach64_dump_ring_info(dev_priv);
+			mach64_do_engine_reset(dev_priv);
+			return;
+		}
+
+		ring->head = (ring->head_addr - ring->start_addr) / sizeof(u32);
+
+		if (!gui_active && ring->head != ring->tail) {
+			mach64_ring_resume(dev_priv, ring);
+		}
+	}
+}
+
+static __inline__ void mach64_ring_stop(drm_mach64_private_t * dev_priv)
+{
+	DRM_DEBUG("%s: head_addr: 0x%08x head: %d tail: %d space: %d\n",
+		  __FUNCTION__,
+		  dev_priv->ring.head_addr, dev_priv->ring.head,
+		  dev_priv->ring.tail, dev_priv->ring.space);
+
+	/* restore previous SRC_CNTL to disable busmastering */
+	mach64_do_wait_for_fifo(dev_priv, 1);
+	MACH64_WRITE(MACH64_SRC_CNTL, 0);
+
+	/* disable busmastering but keep the block 1 registers enabled */
+	mach64_do_wait_for_idle(dev_priv);
+	MACH64_WRITE(MACH64_BUS_CNTL, MACH64_READ(MACH64_BUS_CNTL)
+		     | MACH64_BUS_MASTER_DIS | MACH64_BUS_EXT_REG_EN);
+
+	dev_priv->ring_running = 0;
+}
+
+static __inline__ void
+mach64_update_ring_snapshot(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	mach64_ring_tick(dev_priv, ring);
+
+	ring->space = (ring->head - ring->tail) * sizeof(u32);
+	if (ring->space <= 0) {
+		ring->space += ring->size;
+	}
+}
+
+/* ================================================================
+ * DMA descriptor ring macros
+ */
+
+#define RING_LOCALS									\
+	int _ring_tail, _ring_write; unsigned int _ring_mask; volatile u32 *_ring
+
+#define RING_WRITE_OFS  _ring_write
+
+#define BEGIN_RING( n ) 								\
+do {											\
+	if ( MACH64_VERBOSE ) {								\
+		DRM_INFO( "BEGIN_RING( %d ) in %s\n",					\
+			   (n), __FUNCTION__ );						\
+	}										\
+	if ( dev_priv->ring.space <= (n) * sizeof(u32) ) {				\
+		int ret;								\
+		if ((ret=mach64_wait_ring( dev_priv, (n) * sizeof(u32))) < 0 ) {	\
+			DRM_ERROR( "wait_ring failed, resetting engine\n");		\
+			mach64_dump_engine_info( dev_priv );				\
+			mach64_do_engine_reset( dev_priv );				\
+			return ret;							\
+		}									\
+	}										\
+	dev_priv->ring.space -= (n) * sizeof(u32);					\
+	_ring = (u32 *) dev_priv->ring.start;						\
+	_ring_tail = _ring_write = dev_priv->ring.tail;					\
+	_ring_mask = dev_priv->ring.tail_mask;						\
+} while (0)
+
+#define OUT_RING( x )						\
+do {								\
+	if ( MACH64_VERBOSE ) {					\
+		DRM_INFO( "   OUT_RING( 0x%08x ) at 0x%x\n",	\
+			   (unsigned int)(x), _ring_write );	\
+	}							\
+	_ring[_ring_write++] = cpu_to_le32( x );		\
+	_ring_write &= _ring_mask;				\
+} while (0)
+
+#define ADVANCE_RING() 							\
+do {									\
+	if ( MACH64_VERBOSE ) {						\
+		DRM_INFO( "ADVANCE_RING() wr=0x%06x tail=0x%06x\n",	\
+			  _ring_write, _ring_tail );			\
+	}								\
+	DRM_MEMORYBARRIER();						\
+	mach64_clear_dma_eol( &_ring[(_ring_tail - 2) & _ring_mask] );	\
+	DRM_MEMORYBARRIER();						\
+	dev_priv->ring.tail = _ring_write;				\
+	mach64_ring_tick( dev_priv, &(dev_priv)->ring );		\
+} while (0)
+
+/* ================================================================
+ * DMA macros
+ */
+
+#define DMALOCALS				\
+	drm_mach64_freelist_t *_entry = NULL;	\
+	drm_buf_t *_buf = NULL; 		\
+	u32 *_buf_wptr; int _outcount
+
+#define GETBUFPTR( __buf )						\
+((dev_priv->is_pci) ? 							\
+	((u32 *)(__buf)->address) : 					\
+	((u32 *)((char *)dev_priv->dev_buffers->handle + (__buf)->offset)))
+
+#define GETBUFADDR( __buf ) ((u32)(__buf)->bus_address)
+
+#define GETRINGOFFSET() (_entry->ring_ofs)
+
+static __inline__ int mach64_find_pending_buf_entry(drm_mach64_private_t *
+						    dev_priv,
+						    drm_mach64_freelist_t **
+						    entry, drm_buf_t * buf)
+{
+	struct list_head *ptr;
+#if MACH64_EXTRA_CHECKING
+	if (list_empty(&dev_priv->pending)) {
+		DRM_ERROR("Empty pending list in %s\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+#endif
+	ptr = dev_priv->pending.prev;
+	*entry = list_entry(ptr, drm_mach64_freelist_t, list);
+	while ((*entry)->buf != buf) {
+		if (ptr == &dev_priv->pending) {
+			return DRM_ERR(EFAULT);
+		}
+		ptr = ptr->prev;
+		*entry = list_entry(ptr, drm_mach64_freelist_t, list);
+	}
+	return 0;
+}
+
+#define DMASETPTR( _p ) 			\
+do {						\
+	_buf = (_p);				\
+	_outcount = 0;				\
+	_buf_wptr = GETBUFPTR( _buf );		\
+} while(0)
+
+/* FIXME: use a private set of smaller buffers for state emits, clears, and swaps? */
+#define DMAGETPTR( filp, dev_priv, n )					\
+do {									\
+	if ( MACH64_VERBOSE ) {						\
+		DRM_INFO( "DMAGETPTR( %d ) in %s\n",			\
+			  n, __FUNCTION__ );				\
+	}								\
+	_buf = mach64_freelist_get( dev_priv );				\
+	if (_buf == NULL) {						\
+		DRM_ERROR("%s: couldn't get buffer in DMAGETPTR\n",	\
+			   __FUNCTION__ );				\
+		return DRM_ERR(EAGAIN);					\
+	}								\
+	if (_buf->pending) {						\
+	        DRM_ERROR("%s: pending buf in DMAGETPTR\n",		\
+			   __FUNCTION__ );				\
+		return DRM_ERR(EFAULT);					\
+	}								\
+	_buf->filp = filp;						\
+	_outcount = 0;							\
+									\
+        _buf_wptr = GETBUFPTR( _buf );					\
+} while (0)
+
+#define DMAOUTREG( reg, val )					\
+do {								\
+	if ( MACH64_VERBOSE ) {					\
+		DRM_INFO( "   DMAOUTREG( 0x%x = 0x%08x )\n",	\
+			  reg, val );				\
+	}							\
+	_buf_wptr[_outcount++] = cpu_to_le32(DMAREG(reg));	\
+	_buf_wptr[_outcount++] = cpu_to_le32((val));		\
+	_buf->used += 8;					\
+} while (0)
+
+#define DMAADVANCE( dev_priv, _discard )						     \
+do {											     \
+	struct list_head *ptr;								     \
+	RING_LOCALS;									     \
+											     \
+	if ( MACH64_VERBOSE ) {								     \
+		DRM_INFO( "DMAADVANCE() in %s\n", __FUNCTION__ );			     \
+	}										     \
+											     \
+	if (_buf->used <= 0) {								     \
+		DRM_ERROR( "DMAADVANCE() in %s: sending empty buf %d\n",		     \
+				   __FUNCTION__, _buf->idx );				     \
+		return DRM_ERR(EFAULT);							     \
+	}										     \
+	if (_buf->pending) {								     \
+                /* This is a resued buffer, so we need to find it in the pending list */     \
+		int ret;								     \
+		if ( (ret=mach64_find_pending_buf_entry(dev_priv, &_entry, _buf)) ) {	     \
+			DRM_ERROR( "DMAADVANCE() in %s: couldn't find pending buf %d\n",     \
+				   __FUNCTION__, _buf->idx );				     \
+			return ret;							     \
+		}									     \
+		if (_entry->discard) {							     \
+			DRM_ERROR( "DMAADVANCE() in %s: sending discarded pending buf %d\n", \
+				   __FUNCTION__, _buf->idx );				     \
+			return DRM_ERR(EFAULT);						     \
+		}									     \
+     	} else {									     \
+		if (list_empty(&dev_priv->placeholders)) {				     \
+			DRM_ERROR( "DMAADVANCE() in %s: empty placeholder list\n",	     \
+			   	__FUNCTION__ );						     \
+			return DRM_ERR(EFAULT);						     \
+		}									     \
+		ptr = dev_priv->placeholders.next;					     \
+		list_del(ptr);								     \
+		_entry = list_entry(ptr, drm_mach64_freelist_t, list);			     \
+		_buf->pending = 1;							     \
+		_entry->buf = _buf;							     \
+		list_add_tail(ptr, &dev_priv->pending);					     \
+	}										     \
+	_entry->discard = (_discard);							     \
+	ADD_BUF_TO_RING( dev_priv );							     \
+} while (0)
+
+#define DMADISCARDBUF()									\
+do {											\
+	if (_entry == NULL) {								\
+		int ret;								\
+		if ( (ret=mach64_find_pending_buf_entry(dev_priv, &_entry, _buf)) ) {	\
+			DRM_ERROR( "%s: couldn't find pending buf %d\n",		\
+				   __FUNCTION__, _buf->idx );				\
+			return ret;							\
+		}									\
+	}										\
+	_entry->discard = 1;								\
+} while(0)
+
+#define ADD_BUF_TO_RING( dev_priv )							\
+do {											\
+	int bytes, pages, remainder;							\
+	u32 address, page;								\
+	int i;										\
+											\
+	bytes = _buf->used;								\
+	address = GETBUFADDR( _buf );							\
+											\
+	pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE;		\
+											\
+	BEGIN_RING( pages * 4 );							\
+											\
+	for ( i = 0 ; i < pages-1 ; i++ ) {						\
+		page = address + i * MACH64_DMA_CHUNKSIZE;				\
+		OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR );			\
+		OUT_RING( page );							\
+		OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET );		\
+		OUT_RING( 0 );								\
+	}										\
+											\
+	/* generate the final descriptor for any remaining commands in this buffer */	\
+	page = address + i * MACH64_DMA_CHUNKSIZE;					\
+	remainder = bytes - i * MACH64_DMA_CHUNKSIZE;					\
+											\
+	/* Save dword offset of last descriptor for this buffer.			\
+	 * This is needed to check for completion of the buffer in freelist_get		\
+	 */										\
+	_entry->ring_ofs = RING_WRITE_OFS;						\
+											\
+	OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR );				\
+	OUT_RING( page );								\
+	OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL );		\
+	OUT_RING( 0 );									\
+											\
+	ADVANCE_RING();									\
+} while(0)
+
+#define DMAADVANCEHOSTDATA( dev_priv )							\
+do {											\
+	struct list_head *ptr;								\
+	RING_LOCALS;									\
+											\
+	if ( MACH64_VERBOSE ) {								\
+		DRM_INFO( "DMAADVANCEHOSTDATA() in %s\n", __FUNCTION__ );		\
+	}										\
+											\
+	if (_buf->used <= 0) {								\
+		DRM_ERROR( "DMAADVANCEHOSTDATA() in %s: sending empty buf %d\n",	\
+				   __FUNCTION__, _buf->idx );				\
+		return DRM_ERR(EFAULT);							\
+	}										\
+	if (list_empty(&dev_priv->placeholders)) {					\
+		DRM_ERROR( "%s: empty placeholder list in DMAADVANCEHOSTDATA()\n",	\
+			   __FUNCTION__ );						\
+		return DRM_ERR(EFAULT);							\
+	}										\
+											\
+        ptr = dev_priv->placeholders.next;						\
+	list_del(ptr);									\
+	_entry = list_entry(ptr, drm_mach64_freelist_t, list);				\
+	_entry->buf = _buf;								\
+	_entry->buf->pending = 1;							\
+	list_add_tail(ptr, &dev_priv->pending);						\
+	_entry->discard = 1;								\
+	ADD_HOSTDATA_BUF_TO_RING( dev_priv );						\
+} while (0)
+
+#define ADD_HOSTDATA_BUF_TO_RING( dev_priv )						 \
+do {											 \
+	int bytes, pages, remainder;							 \
+	u32 address, page;								 \
+	int i;										 \
+											 \
+	bytes = _buf->used - MACH64_HOSTDATA_BLIT_OFFSET;				 \
+	pages = (bytes + MACH64_DMA_CHUNKSIZE - 1) / MACH64_DMA_CHUNKSIZE;		 \
+	address = GETBUFADDR( _buf );							 \
+											 \
+	BEGIN_RING( 4 + pages * 4 );							 \
+											 \
+	OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_ADDR );				 \
+	OUT_RING( address );								 \
+	OUT_RING( MACH64_HOSTDATA_BLIT_OFFSET | MACH64_DMA_HOLD_OFFSET );		 \
+	OUT_RING( 0 );									 \
+											 \
+	address += MACH64_HOSTDATA_BLIT_OFFSET;						 \
+											 \
+	for ( i = 0 ; i < pages-1 ; i++ ) {						 \
+		page = address + i * MACH64_DMA_CHUNKSIZE;				 \
+		OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA );		 \
+		OUT_RING( page );							 \
+		OUT_RING( MACH64_DMA_CHUNKSIZE | MACH64_DMA_HOLD_OFFSET );		 \
+		OUT_RING( 0 );								 \
+	}										 \
+											 \
+	/* generate the final descriptor for any remaining commands in this buffer */	 \
+	page = address + i * MACH64_DMA_CHUNKSIZE;					 \
+	remainder = bytes - i * MACH64_DMA_CHUNKSIZE;					 \
+											 \
+	/* Save dword offset of last descriptor for this buffer.			 \
+	 * This is needed to check for completion of the buffer in freelist_get		 \
+	 */										 \
+	_entry->ring_ofs = RING_WRITE_OFS;						 \
+											 \
+	OUT_RING( MACH64_APERTURE_OFFSET + MACH64_BM_HOSTDATA );			 \
+	OUT_RING( page );								 \
+	OUT_RING( remainder | MACH64_DMA_HOLD_OFFSET | MACH64_DMA_EOL );		 \
+	OUT_RING( 0 );									 \
+											 \
+	ADVANCE_RING();									 \
+} while(0)
+
+#endif				/* __MACH64_DRV_H__ */
diff --git a/sys/dev/drm/mach64_irq.c b/sys/dev/drm/mach64_irq.c
new file mode 100644
index 0000000..9123729
--- /dev/null
+++ b/sys/dev/drm/mach64_irq.c
@@ -0,0 +1,137 @@
+/* mach64_irq.c -- IRQ handling for ATI Mach64 -*- linux-c -*-
+ * Created: Tue Feb 25, 2003 by Leif Delgass, based on radeon_irq.c/r128_irq.c
+ *
+ * Copyright (C) The Weather Channel, Inc.  2002.
+ * Copyright 2003 Leif Delgass
+ * All Rights Reserved.
+ *
+ * The Weather Channel (TM) funded Tungsten Graphics to develop the
+ * initial release of the Radeon 8500 driver under the XFree86 license.
+ * This notice must be preserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT OWNER(S) AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
+ * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
+ * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
+ * DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Keith Whitwell <keith@tungstengraphics.com>
+ *    Eric Anholt <anholt@FreeBSD.org>
+ *    Leif Delgass <ldelgass@retinalburn.net>
+ *
+ * $FreeBSD$
+ */
+
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
+#include "dev/drm/mach64_drm.h"
+#include "dev/drm/mach64_drv.h"
+
+irqreturn_t mach64_driver_irq_handler(DRM_IRQ_ARGS)
+{
+	drm_device_t *dev = (drm_device_t *) arg;
+	drm_mach64_private_t *dev_priv =
+	    (drm_mach64_private_t *) dev->dev_private;
+	int status;
+
+	status = MACH64_READ(MACH64_CRTC_INT_CNTL);
+
+	/* VBLANK interrupt */
+	if (status & MACH64_CRTC_VBLANK_INT) {
+		/* Mask off all interrupt ack bits before setting the ack bit, since
+		 * there may be other handlers outside the DRM.
+		 *
+		 * NOTE: On mach64, you need to keep the enable bits set when doing
+		 * the ack, despite what the docs say about not acking and enabling
+		 * in a single write.
+		 */
+		MACH64_WRITE(MACH64_CRTC_INT_CNTL,
+			     (status & ~MACH64_CRTC_INT_ACKS)
+			     | MACH64_CRTC_VBLANK_INT);
+
+		atomic_inc(&dev->vbl_received);
+		DRM_WAKEUP(&dev->vbl_queue);
+		drm_vbl_send_signals(dev);
+		return IRQ_HANDLED;
+	}
+	return IRQ_NONE;
+}
+
+int mach64_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
+{
+	unsigned int cur_vblank;
+	int ret = 0;
+
+	/* Assume that the user has missed the current sequence number
+	 * by about a day rather than she wants to wait for years
+	 * using vertical blanks...
+	 */
+	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
+		    (((cur_vblank = atomic_read(&dev->vbl_received))
+		      - *sequence) <= (1 << 23)));
+
+	*sequence = cur_vblank;
+
+	return ret;
+}
+
+/* drm_dma.h hooks
+*/
+void mach64_driver_irq_preinstall(drm_device_t * dev)
+{
+	drm_mach64_private_t *dev_priv =
+	    (drm_mach64_private_t *) dev->dev_private;
+
+	u32 status = MACH64_READ(MACH64_CRTC_INT_CNTL);
+
+	DRM_DEBUG("before install CRTC_INT_CTNL: 0x%08x\n", status);
+
+	/* Disable and clear VBLANK interrupt */
+	MACH64_WRITE(MACH64_CRTC_INT_CNTL, (status & ~MACH64_CRTC_VBLANK_INT_EN)
+		     | MACH64_CRTC_VBLANK_INT);
+}
+
+void mach64_driver_irq_postinstall(drm_device_t * dev)
+{
+	drm_mach64_private_t *dev_priv =
+	    (drm_mach64_private_t *) dev->dev_private;
+
+	/* Turn on VBLANK interrupt */
+	MACH64_WRITE(MACH64_CRTC_INT_CNTL, MACH64_READ(MACH64_CRTC_INT_CNTL)
+		     | MACH64_CRTC_VBLANK_INT_EN);
+
+	DRM_DEBUG("after install CRTC_INT_CTNL: 0x%08x\n",
+		  MACH64_READ(MACH64_CRTC_INT_CNTL));
+
+}
+
+void mach64_driver_irq_uninstall(drm_device_t * dev)
+{
+	drm_mach64_private_t *dev_priv =
+	    (drm_mach64_private_t *) dev->dev_private;
+	if (!dev_priv)
+		return;
+
+	/* Disable and clear VBLANK interrupt */
+	MACH64_WRITE(MACH64_CRTC_INT_CNTL,
+		     (MACH64_READ(MACH64_CRTC_INT_CNTL) &
+		      ~MACH64_CRTC_VBLANK_INT_EN)
+		     | MACH64_CRTC_VBLANK_INT);
+
+	DRM_DEBUG("after uninstall CRTC_INT_CTNL: 0x%08x\n",
+		  MACH64_READ(MACH64_CRTC_INT_CNTL));
+}
diff --git a/sys/dev/drm/mach64_state.c b/sys/dev/drm/mach64_state.c
new file mode 100644
index 0000000..81c54813
--- /dev/null
+++ b/sys/dev/drm/mach64_state.c
@@ -0,0 +1,918 @@
+/* mach64_state.c -- State support for mach64 (Rage Pro) driver -*- linux-c -*-
+ * Created: Sun Dec 03 19:20:26 2000 by gareth@valinux.com
+ *
+ * Copyright 2000 Gareth Hughes
+ * Copyright 2002-2003 Leif Delgass
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * THE COPYRIGHT OWNER(S) BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Gareth Hughes <gareth@valinux.com>
+ *    Leif Delgass <ldelgass@retinalburn.net>
+ *    Jos�Fonseca <j_r_fonseca@yahoo.co.uk>
+ *
+ * $FreeBSD$
+ */
+
+#include "dev/drm/drmP.h"
+#include "dev/drm/drm.h"
+#include "dev/drm/mach64_drm.h"
+#include "dev/drm/mach64_drv.h"
+
+/* Interface history:
+ *
+ * 1.0 - Initial mach64 DRM
+ *
+ */
+drm_ioctl_desc_t mach64_ioctls[] = {
+	[DRM_IOCTL_NR(DRM_MACH64_INIT)] = {mach64_dma_init, 1, 1},
+	[DRM_IOCTL_NR(DRM_MACH64_CLEAR)] = {mach64_dma_clear, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_SWAP)] = {mach64_dma_swap, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_IDLE)] = {mach64_dma_idle, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_RESET)] = {mach64_engine_reset, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_VERTEX)] = {mach64_dma_vertex, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_BLIT)] = {mach64_dma_blit, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_FLUSH)] = {mach64_dma_flush, 1, 0},
+	[DRM_IOCTL_NR(DRM_MACH64_GETPARAM)] = {mach64_get_param, 1, 0},
+};
+
+int mach64_max_ioctl = DRM_ARRAY_SIZE(mach64_ioctls);
+
+/* ================================================================
+ * DMA hardware state programming functions
+ */
+
+static void mach64_print_dirty(const char *msg, unsigned int flags)
+{
+	DRM_DEBUG("%s: (0x%x) %s%s%s%s%s%s%s%s%s%s%s%s\n",
+		  msg,
+		  flags,
+		  (flags & MACH64_UPLOAD_DST_OFF_PITCH) ? "dst_off_pitch, " :
+		  "",
+		  (flags & MACH64_UPLOAD_Z_ALPHA_CNTL) ? "z_alpha_cntl, " : "",
+		  (flags & MACH64_UPLOAD_SCALE_3D_CNTL) ? "scale_3d_cntl, " :
+		  "", (flags & MACH64_UPLOAD_DP_FOG_CLR) ? "dp_fog_clr, " : "",
+		  (flags & MACH64_UPLOAD_DP_WRITE_MASK) ? "dp_write_mask, " :
+		  "",
+		  (flags & MACH64_UPLOAD_DP_PIX_WIDTH) ? "dp_pix_width, " : "",
+		  (flags & MACH64_UPLOAD_SETUP_CNTL) ? "setup_cntl, " : "",
+		  (flags & MACH64_UPLOAD_MISC) ? "misc, " : "",
+		  (flags & MACH64_UPLOAD_TEXTURE) ? "texture, " : "",
+		  (flags & MACH64_UPLOAD_TEX0IMAGE) ? "tex0 image, " : "",
+		  (flags & MACH64_UPLOAD_TEX1IMAGE) ? "tex1 image, " : "",
+		  (flags & MACH64_UPLOAD_CLIPRECTS) ? "cliprects, " : "");
+}
+
+/* Mach64 doesn't have hardware cliprects, just one hardware scissor,
+ * so the GL scissor is intersected with each cliprect here
+ */
+/* This function returns 0 on success, 1 for no intersection, and
+ * negative for an error
+ */
+static int mach64_emit_cliprect(DRMFILE filp, drm_mach64_private_t * dev_priv,
+				drm_clip_rect_t * box)
+{
+	u32 sc_left_right, sc_top_bottom;
+	drm_clip_rect_t scissor;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
+	DMALOCALS;
+
+	DRM_DEBUG("%s: box=%p\n", __FUNCTION__, box);
+
+	/* Get GL scissor */
+	/* FIXME: store scissor in SAREA as a cliprect instead of in
+	 * hardware format, or do intersection client-side
+	 */
+	scissor.x1 = regs->sc_left_right & 0xffff;
+	scissor.x2 = (regs->sc_left_right & 0xffff0000) >> 16;
+	scissor.y1 = regs->sc_top_bottom & 0xffff;
+	scissor.y2 = (regs->sc_top_bottom & 0xffff0000) >> 16;
+
+	/* Intersect GL scissor with cliprect */
+	if (box->x1 > scissor.x1)
+		scissor.x1 = box->x1;
+	if (box->y1 > scissor.y1)
+		scissor.y1 = box->y1;
+	if (box->x2 < scissor.x2)
+		scissor.x2 = box->x2;
+	if (box->y2 < scissor.y2)
+		scissor.y2 = box->y2;
+	/* positive return means skip */
+	if (scissor.x1 >= scissor.x2)
+		return 1;
+	if (scissor.y1 >= scissor.y2)
+		return 1;
+
+	DMAGETPTR(filp, dev_priv, 2);	/* returns on failure to get buffer */
+
+	sc_left_right = ((scissor.x1 << 0) | (scissor.x2 << 16));
+	sc_top_bottom = ((scissor.y1 << 0) | (scissor.y2 << 16));
+
+	DMAOUTREG(MACH64_SC_LEFT_RIGHT, sc_left_right);
+	DMAOUTREG(MACH64_SC_TOP_BOTTOM, sc_top_bottom);
+
+	DMAADVANCE(dev_priv, 1);
+
+	return 0;
+}
+
+static __inline__ int mach64_emit_state(DRMFILE filp,
+					drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mach64_context_regs_t *regs = &sarea_priv->context_state;
+	unsigned int dirty = sarea_priv->dirty;
+	u32 offset = ((regs->tex_size_pitch & 0xf0) >> 2);
+	DMALOCALS;
+
+	if (MACH64_VERBOSE) {
+		mach64_print_dirty(__FUNCTION__, dirty);
+	} else {
+		DRM_DEBUG("%s: dirty=0x%08x\n", __FUNCTION__, dirty);
+	}
+
+	DMAGETPTR(filp, dev_priv, 17);	/* returns on failure to get buffer */
+
+	if (dirty & MACH64_UPLOAD_MISC) {
+		DMAOUTREG(MACH64_DP_MIX, regs->dp_mix);
+		DMAOUTREG(MACH64_DP_SRC, regs->dp_src);
+		DMAOUTREG(MACH64_CLR_CMP_CNTL, regs->clr_cmp_cntl);
+		DMAOUTREG(MACH64_GUI_TRAJ_CNTL, regs->gui_traj_cntl);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_MISC;
+	}
+
+	if (dirty & MACH64_UPLOAD_DST_OFF_PITCH) {
+		DMAOUTREG(MACH64_DST_OFF_PITCH, regs->dst_off_pitch);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_DST_OFF_PITCH;
+	}
+	if (dirty & MACH64_UPLOAD_Z_OFF_PITCH) {
+		DMAOUTREG(MACH64_Z_OFF_PITCH, regs->z_off_pitch);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_Z_OFF_PITCH;
+	}
+	if (dirty & MACH64_UPLOAD_Z_ALPHA_CNTL) {
+		DMAOUTREG(MACH64_Z_CNTL, regs->z_cntl);
+		DMAOUTREG(MACH64_ALPHA_TST_CNTL, regs->alpha_tst_cntl);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_Z_ALPHA_CNTL;
+	}
+	if (dirty & MACH64_UPLOAD_SCALE_3D_CNTL) {
+		DMAOUTREG(MACH64_SCALE_3D_CNTL, regs->scale_3d_cntl);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_SCALE_3D_CNTL;
+	}
+	if (dirty & MACH64_UPLOAD_DP_FOG_CLR) {
+		DMAOUTREG(MACH64_DP_FOG_CLR, regs->dp_fog_clr);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_DP_FOG_CLR;
+	}
+	if (dirty & MACH64_UPLOAD_DP_WRITE_MASK) {
+		DMAOUTREG(MACH64_DP_WRITE_MASK, regs->dp_write_mask);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_DP_WRITE_MASK;
+	}
+	if (dirty & MACH64_UPLOAD_DP_PIX_WIDTH) {
+		DMAOUTREG(MACH64_DP_PIX_WIDTH, regs->dp_pix_width);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_DP_PIX_WIDTH;
+	}
+	if (dirty & MACH64_UPLOAD_SETUP_CNTL) {
+		DMAOUTREG(MACH64_SETUP_CNTL, regs->setup_cntl);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_SETUP_CNTL;
+	}
+
+	if (dirty & MACH64_UPLOAD_TEXTURE) {
+		DMAOUTREG(MACH64_TEX_SIZE_PITCH, regs->tex_size_pitch);
+		DMAOUTREG(MACH64_TEX_CNTL, regs->tex_cntl);
+		DMAOUTREG(MACH64_SECONDARY_TEX_OFF, regs->secondary_tex_off);
+		DMAOUTREG(MACH64_TEX_0_OFF + offset, regs->tex_offset);
+		sarea_priv->dirty &= ~MACH64_UPLOAD_TEXTURE;
+	}
+
+	DMAADVANCE(dev_priv, 1);
+
+	sarea_priv->dirty &= MACH64_UPLOAD_CLIPRECTS;
+
+	return 0;
+
+}
+
+/* ================================================================
+ * DMA command dispatch functions
+ */
+
+static int mach64_dma_dispatch_clear(DRMFILE filp, drm_device_t * dev,
+				     unsigned int flags,
+				     int cx, int cy, int cw, int ch,
+				     unsigned int clear_color,
+				     unsigned int clear_depth)
+{
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mach64_context_regs_t *ctx = &sarea_priv->context_state;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	u32 fb_bpp, depth_bpp;
+	int i;
+	DMALOCALS;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	switch (dev_priv->fb_bpp) {
+	case 16:
+		fb_bpp = MACH64_DATATYPE_RGB565;
+		break;
+	case 32:
+		fb_bpp = MACH64_DATATYPE_ARGB8888;
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+	switch (dev_priv->depth_bpp) {
+	case 16:
+		depth_bpp = MACH64_DATATYPE_RGB565;
+		break;
+	case 24:
+	case 32:
+		depth_bpp = MACH64_DATATYPE_ARGB8888;
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+
+	if (!nbox)
+		return 0;
+
+	DMAGETPTR(filp, dev_priv, nbox * 31);	/* returns on failure to get buffer */
+
+	for (i = 0; i < nbox; i++) {
+		int x = pbox[i].x1;
+		int y = pbox[i].y1;
+		int w = pbox[i].x2 - x;
+		int h = pbox[i].y2 - y;
+
+		DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n",
+			  pbox[i].x1, pbox[i].y1,
+			  pbox[i].x2, pbox[i].y2, flags);
+
+		if (flags & (MACH64_FRONT | MACH64_BACK)) {
+			/* Setup for color buffer clears
+			 */
+
+			DMAOUTREG(MACH64_Z_CNTL, 0);
+			DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
+
+			DMAOUTREG(MACH64_SC_LEFT_RIGHT, ctx->sc_left_right);
+			DMAOUTREG(MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom);
+
+			DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);
+			DMAOUTREG(MACH64_GUI_TRAJ_CNTL,
+				  (MACH64_DST_X_LEFT_TO_RIGHT |
+				   MACH64_DST_Y_TOP_TO_BOTTOM));
+
+			DMAOUTREG(MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) |
+							(fb_bpp << 4) |
+							(fb_bpp << 8) |
+							(fb_bpp << 16) |
+							(fb_bpp << 28)));
+
+			DMAOUTREG(MACH64_DP_FRGD_CLR, clear_color);
+			DMAOUTREG(MACH64_DP_WRITE_MASK, ctx->dp_write_mask);
+			DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
+						  MACH64_FRGD_MIX_S));
+			DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR |
+						  MACH64_FRGD_SRC_FRGD_CLR |
+						  MACH64_MONO_SRC_ONE));
+
+		}
+
+		if (flags & MACH64_FRONT) {
+
+			DMAOUTREG(MACH64_DST_OFF_PITCH,
+				  dev_priv->front_offset_pitch);
+			DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x);
+			DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
+
+		}
+
+		if (flags & MACH64_BACK) {
+
+			DMAOUTREG(MACH64_DST_OFF_PITCH,
+				  dev_priv->back_offset_pitch);
+			DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x);
+			DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
+
+		}
+
+		if (flags & MACH64_DEPTH) {
+			/* Setup for depth buffer clear
+			 */
+			DMAOUTREG(MACH64_Z_CNTL, 0);
+			DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
+
+			DMAOUTREG(MACH64_SC_LEFT_RIGHT, ctx->sc_left_right);
+			DMAOUTREG(MACH64_SC_TOP_BOTTOM, ctx->sc_top_bottom);
+
+			DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);
+			DMAOUTREG(MACH64_GUI_TRAJ_CNTL,
+				  (MACH64_DST_X_LEFT_TO_RIGHT |
+				   MACH64_DST_Y_TOP_TO_BOTTOM));
+
+			DMAOUTREG(MACH64_DP_PIX_WIDTH, ((depth_bpp << 0) |
+							(depth_bpp << 4) |
+							(depth_bpp << 8) |
+							(depth_bpp << 16) |
+							(depth_bpp << 28)));
+
+			DMAOUTREG(MACH64_DP_FRGD_CLR, clear_depth);
+			DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff);
+			DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D |
+						  MACH64_FRGD_MIX_S));
+			DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_FRGD_CLR |
+						  MACH64_FRGD_SRC_FRGD_CLR |
+						  MACH64_MONO_SRC_ONE));
+
+			DMAOUTREG(MACH64_DST_OFF_PITCH,
+				  dev_priv->depth_offset_pitch);
+			DMAOUTREG(MACH64_DST_X_Y, (y << 16) | x);
+			DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
+		}
+	}
+
+	DMAADVANCE(dev_priv, 1);
+
+	return 0;
+}
+
+static int mach64_dma_dispatch_swap(DRMFILE filp, drm_device_t * dev)
+{
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int nbox = sarea_priv->nbox;
+	drm_clip_rect_t *pbox = sarea_priv->boxes;
+	u32 fb_bpp;
+	int i;
+	DMALOCALS;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	switch (dev_priv->fb_bpp) {
+	case 16:
+		fb_bpp = MACH64_DATATYPE_RGB565;
+		break;
+	case 32:
+	default:
+		fb_bpp = MACH64_DATATYPE_ARGB8888;
+		break;
+	}
+
+	if (!nbox)
+		return 0;
+
+	DMAGETPTR(filp, dev_priv, 13 + nbox * 4);	/* returns on failure to get buffer */
+
+	DMAOUTREG(MACH64_Z_CNTL, 0);
+	DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
+
+	DMAOUTREG(MACH64_SC_LEFT_RIGHT, 0 | (8191 << 16));	/* no scissor */
+	DMAOUTREG(MACH64_SC_TOP_BOTTOM, 0 | (16383 << 16));
+
+	DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);
+	DMAOUTREG(MACH64_GUI_TRAJ_CNTL, (MACH64_DST_X_LEFT_TO_RIGHT |
+					 MACH64_DST_Y_TOP_TO_BOTTOM));
+
+	DMAOUTREG(MACH64_DP_PIX_WIDTH, ((fb_bpp << 0) |
+					(fb_bpp << 4) |
+					(fb_bpp << 8) |
+					(fb_bpp << 16) | (fb_bpp << 28)));
+
+	DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff);
+	DMAOUTREG(MACH64_DP_MIX, (MACH64_BKGD_MIX_D | MACH64_FRGD_MIX_S));
+	DMAOUTREG(MACH64_DP_SRC, (MACH64_BKGD_SRC_BKGD_CLR |
+				  MACH64_FRGD_SRC_BLIT | MACH64_MONO_SRC_ONE));
+
+	DMAOUTREG(MACH64_SRC_OFF_PITCH, dev_priv->back_offset_pitch);
+	DMAOUTREG(MACH64_DST_OFF_PITCH, dev_priv->front_offset_pitch);
+
+	for (i = 0; i < nbox; i++) {
+		int x = pbox[i].x1;
+		int y = pbox[i].y1;
+		int w = pbox[i].x2 - x;
+		int h = pbox[i].y2 - y;
+
+		DRM_DEBUG("dispatch swap %d,%d-%d,%d\n",
+			  pbox[i].x1, pbox[i].y1, pbox[i].x2, pbox[i].y2);
+
+		DMAOUTREG(MACH64_SRC_WIDTH1, w);
+		DMAOUTREG(MACH64_SRC_Y_X, (x << 16) | y);
+		DMAOUTREG(MACH64_DST_Y_X, (x << 16) | y);
+		DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (h << 16) | w);
+
+	}
+
+	DMAADVANCE(dev_priv, 1);
+
+	if (dev_priv->driver_mode == MACH64_MODE_DMA_ASYNC) {
+		for (i = 0; i < MACH64_MAX_QUEUED_FRAMES - 1; i++) {
+			dev_priv->frame_ofs[i] = dev_priv->frame_ofs[i + 1];
+		}
+		dev_priv->frame_ofs[i] = GETRINGOFFSET();
+
+		dev_priv->sarea_priv->frames_queued++;
+	}
+
+	return 0;
+}
+
+static int mach64_do_get_frames_queued(drm_mach64_private_t * dev_priv)
+{
+	drm_mach64_descriptor_ring_t *ring = &dev_priv->ring;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int i, start;
+	u32 head, tail, ofs;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	if (sarea_priv->frames_queued == 0)
+		return 0;
+
+	tail = ring->tail;
+	mach64_ring_tick(dev_priv, ring);
+	head = ring->head;
+
+	start = (MACH64_MAX_QUEUED_FRAMES -
+		 DRM_MIN(MACH64_MAX_QUEUED_FRAMES, sarea_priv->frames_queued));
+
+	if (head == tail) {
+		sarea_priv->frames_queued = 0;
+		for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) {
+			dev_priv->frame_ofs[i] = ~0;
+		}
+		return 0;
+	}
+
+	for (i = start; i < MACH64_MAX_QUEUED_FRAMES; i++) {
+		ofs = dev_priv->frame_ofs[i];
+		DRM_DEBUG("frame_ofs[%d] ofs: %d\n", i, ofs);
+		if (ofs == ~0 ||
+		    (head < tail && (ofs < head || ofs >= tail)) ||
+		    (head > tail && (ofs < head && ofs >= tail))) {
+			sarea_priv->frames_queued =
+			    (MACH64_MAX_QUEUED_FRAMES - 1) - i;
+			dev_priv->frame_ofs[i] = ~0;
+		}
+	}
+
+	return sarea_priv->frames_queued;
+}
+
+/* Copy and verify a client submited buffer.
+ * FIXME: Make an assembly optimized version
+ */
+static __inline__ int copy_and_verify_from_user(u32 * to, const u32 * from,
+						unsigned long bytes)
+{
+	unsigned long n = bytes;	/* dwords remaining in buffer */
+
+	if (DRM_VERIFYAREA_READ(from, n)) {
+		DRM_ERROR("%s: verify_area\n", __FUNCTION__);
+		return DRM_ERR(EFAULT);
+	}
+
+	n >>= 2;
+
+	while (n > 1) {
+		u32 data, reg, count;
+
+		if (DRM_GET_USER_UNCHECKED(data, from++)) {
+			DRM_ERROR("%s: get_user\n", __FUNCTION__);
+			return DRM_ERR(EFAULT);
+		}
+
+		n--;
+
+		reg = le32_to_cpu(data);
+		count = (reg >> 16) + 1;
+		if (count <= n) {
+			n -= count;
+			reg &= 0xffff;
+
+			/* This is an exact match of Mach64's Setup Engine registers,
+			 * excluding SETUP_CNTL (1_C1).
+			 */
+			if ((reg >= 0x0190 && reg < 0x01c1) ||
+			    (reg >= 0x01ca && reg <= 0x01cf)) {
+				*to++ = data;
+				if (DRM_COPY_FROM_USER_UNCHECKED
+				    (to, from, count << 2)) {
+					DRM_ERROR("%s: copy_from_user\n",
+						  __FUNCTION__);
+					return DRM_ERR(EFAULT);
+				}
+				to += count;
+			} else {
+				DRM_ERROR("%s: Got bad command: 0x%04x\n",
+					  __FUNCTION__, reg);
+				return DRM_ERR(EACCES);
+			}
+
+			from += count;
+		} else {
+			DRM_ERROR
+			    ("%s: Got bad command count(=%u) dwords remaining=%lu\n",
+			     __FUNCTION__, count, n);
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+	if (n == 0)
+		return 0;
+	else {
+		DRM_ERROR("%s: Bad buf->used(=%lu)\n", __FUNCTION__, bytes);
+		return DRM_ERR(EINVAL);
+	}
+}
+
+static int mach64_dma_dispatch_vertex(DRMFILE filp, drm_device_t * dev,
+				      int prim, void *buf, unsigned long used,
+				      int discard)
+{
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_buf_t *copy_buf;
+	int done = 0;
+	int verify_ret = 0;
+	DMALOCALS;
+
+	DRM_DEBUG("%s: buf=%p used=%lu nbox=%d\n",
+		  __FUNCTION__, buf, used, sarea_priv->nbox);
+
+	if (used) {
+		int ret = 0;
+		int i = 0;
+
+		copy_buf = mach64_freelist_get(dev_priv);
+		if (copy_buf == NULL) {
+			DRM_ERROR("%s: couldn't get buffer in DMAGETPTR\n",
+				  __FUNCTION__);
+			return DRM_ERR(EAGAIN);
+		}
+
+		if ((verify_ret =
+		     copy_and_verify_from_user(GETBUFPTR(copy_buf), buf,
+					       used)) == 0) {
+
+			copy_buf->used = used;
+
+			DMASETPTR(copy_buf);
+
+			if (sarea_priv->dirty & ~MACH64_UPLOAD_CLIPRECTS) {
+				ret = mach64_emit_state(filp, dev_priv);
+				if (ret < 0)
+					return ret;
+			}
+
+			do {
+				/* Emit the next cliprect */
+				if (i < sarea_priv->nbox) {
+					ret =
+					    mach64_emit_cliprect(filp, dev_priv,
+								 &sarea_priv->
+								 boxes[i]);
+					if (ret < 0) {
+						/* failed to get buffer */
+						return ret;
+					} else if (ret != 0) {
+						/* null intersection with scissor */
+						continue;
+					}
+				}
+				if ((i >= sarea_priv->nbox - 1))
+					done = 1;
+
+				/* Add the buffer to the DMA queue */
+				DMAADVANCE(dev_priv, done);
+
+			} while (++i < sarea_priv->nbox);
+		}
+
+		if (copy_buf->pending && !done) {
+			DMADISCARDBUF();
+		} else if (!done) {
+			/* This buffer wasn't used (no cliprects or verify failed), so place it back
+			 * on the free list
+			 */
+			struct list_head *ptr;
+			drm_mach64_freelist_t *entry;
+#if MACH64_EXTRA_CHECKING
+			list_for_each(ptr, &dev_priv->pending) {
+				entry =
+				    list_entry(ptr, drm_mach64_freelist_t,
+					       list);
+				if (copy_buf == entry->buf) {
+					DRM_ERROR
+					    ("%s: Trying to release a pending buf\n",
+					     __FUNCTION__);
+					return DRM_ERR(EFAULT);
+				}
+			}
+#endif
+			ptr = dev_priv->placeholders.next;
+			entry = list_entry(ptr, drm_mach64_freelist_t, list);
+			copy_buf->pending = 0;
+			copy_buf->used = 0;
+			entry->buf = copy_buf;
+			entry->discard = 1;
+			list_del(ptr);
+			list_add_tail(ptr, &dev_priv->free_list);
+		}
+	}
+
+	sarea_priv->dirty &= ~MACH64_UPLOAD_CLIPRECTS;
+	sarea_priv->nbox = 0;
+
+	return verify_ret;
+}
+
+static int mach64_dma_dispatch_blit(DRMFILE filp, drm_device_t * dev,
+				    drm_mach64_blit_t * blit)
+{
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	int dword_shift, dwords;
+	drm_buf_t *buf;
+	DMALOCALS;
+
+	/* The compiler won't optimize away a division by a variable,
+	 * even if the only legal values are powers of two.  Thus, we'll
+	 * use a shift instead.
+	 */
+	switch (blit->format) {
+	case MACH64_DATATYPE_ARGB8888:
+		dword_shift = 0;
+		break;
+	case MACH64_DATATYPE_ARGB1555:
+	case MACH64_DATATYPE_RGB565:
+	case MACH64_DATATYPE_VYUY422:
+	case MACH64_DATATYPE_YVYU422:
+	case MACH64_DATATYPE_ARGB4444:
+		dword_shift = 1;
+		break;
+	case MACH64_DATATYPE_CI8:
+	case MACH64_DATATYPE_RGB8:
+		dword_shift = 2;
+		break;
+	default:
+		DRM_ERROR("invalid blit format %d\n", blit->format);
+		return DRM_ERR(EINVAL);
+	}
+
+	/* Dispatch the blit buffer.
+	 */
+	buf = dma->buflist[blit->idx];
+
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d (filp %p) using buffer with filp %p\n",
+			  DRM_CURRENTPID, filp, buf->filp);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", blit->idx);
+		return DRM_ERR(EINVAL);
+	}
+
+	/* Set buf->used to the bytes of blit data based on the blit dimensions
+	 * and verify the size.  When the setup is emitted to the buffer with
+	 * the DMA* macros below, buf->used is incremented to include the bytes
+	 * used for setup as well as the blit data.
+	 */
+	dwords = (blit->width * blit->height) >> dword_shift;
+	buf->used = dwords << 2;
+	if (buf->used <= 0 ||
+	    buf->used > MACH64_BUFFER_SIZE - MACH64_HOSTDATA_BLIT_OFFSET) {
+		DRM_ERROR("Invalid blit size: %d bytes\n", buf->used);
+		return DRM_ERR(EINVAL);
+	}
+
+	/* FIXME: Use a last buffer flag and reduce the state emitted for subsequent,
+	 * continuation buffers?
+	 */
+
+	/* Blit via BM_HOSTDATA (gui-master) - like HOST_DATA[0-15], but doesn't require
+	 * a register command every 16 dwords.  State setup is added at the start of the
+	 * buffer -- the client leaves space for this based on MACH64_HOSTDATA_BLIT_OFFSET
+	 */
+	DMASETPTR(buf);
+
+	DMAOUTREG(MACH64_Z_CNTL, 0);
+	DMAOUTREG(MACH64_SCALE_3D_CNTL, 0);
+
+	DMAOUTREG(MACH64_SC_LEFT_RIGHT, 0 | (8191 << 16));	/* no scissor */
+	DMAOUTREG(MACH64_SC_TOP_BOTTOM, 0 | (16383 << 16));
+
+	DMAOUTREG(MACH64_CLR_CMP_CNTL, 0);	/* disable */
+	DMAOUTREG(MACH64_GUI_TRAJ_CNTL,
+		  MACH64_DST_X_LEFT_TO_RIGHT | MACH64_DST_Y_TOP_TO_BOTTOM);
+
+	DMAOUTREG(MACH64_DP_PIX_WIDTH, (blit->format << 0)	/* dst pix width */
+		  |(blit->format << 4)	/* composite pix width */
+		  |(blit->format << 8)	/* src pix width */
+		  |(blit->format << 16)	/* host data pix width */
+		  |(blit->format << 28)	/* scaler/3D pix width */
+	    );
+
+	DMAOUTREG(MACH64_DP_WRITE_MASK, 0xffffffff);	/* enable all planes */
+	DMAOUTREG(MACH64_DP_MIX, MACH64_BKGD_MIX_D | MACH64_FRGD_MIX_S);
+	DMAOUTREG(MACH64_DP_SRC,
+		  MACH64_BKGD_SRC_BKGD_CLR
+		  | MACH64_FRGD_SRC_HOST | MACH64_MONO_SRC_ONE);
+
+	DMAOUTREG(MACH64_DST_OFF_PITCH,
+		  (blit->pitch << 22) | (blit->offset >> 3));
+	DMAOUTREG(MACH64_DST_X_Y, (blit->y << 16) | blit->x);
+	DMAOUTREG(MACH64_DST_WIDTH_HEIGHT, (blit->height << 16) | blit->width);
+
+	DRM_DEBUG("%s: %d bytes\n", __FUNCTION__, buf->used);
+
+	/* Add the buffer to the queue */
+	DMAADVANCEHOSTDATA(dev_priv);
+
+	return 0;
+}
+
+/* ================================================================
+ * IOCTL functions
+ */
+
+int mach64_dma_clear(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mach64_clear_t clear;
+	int ret;
+
+	DRM_DEBUG("%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(clear, (drm_mach64_clear_t *) data,
+				 sizeof(clear));
+
+	if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS)
+		sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
+
+	ret = mach64_dma_dispatch_clear(filp, dev, clear.flags,
+					clear.x, clear.y, clear.w, clear.h,
+					clear.clear_color, clear.clear_depth);
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC);
+	return ret;
+}
+
+int mach64_dma_swap(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	int ret;
+
+	DRM_DEBUG("%s: pid=%d\n", __FUNCTION__, DRM_CURRENTPID);
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS)
+		sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
+
+	ret = mach64_dma_dispatch_swap(filp, dev);
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT | MACH64_UPLOAD_MISC);
+	return ret;
+}
+
+int mach64_dma_vertex(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mach64_vertex_t vertex;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(vertex, (drm_mach64_vertex_t *) data,
+				 sizeof(vertex));
+
+	DRM_DEBUG("%s: pid=%d buf=%p used=%lu discard=%d\n",
+		  __FUNCTION__, DRM_CURRENTPID,
+		  vertex.buf, vertex.used, vertex.discard);
+
+	if (vertex.prim < 0 || vertex.prim > MACH64_PRIM_POLYGON) {
+		DRM_ERROR("buffer prim %d\n", vertex.prim);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (vertex.used > MACH64_BUFFER_SIZE || (vertex.used & 3) != 0) {
+		DRM_ERROR("Invalid vertex buffer size: %lu bytes\n",
+			  vertex.used);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (sarea_priv->nbox > MACH64_NR_SAREA_CLIPRECTS)
+		sarea_priv->nbox = MACH64_NR_SAREA_CLIPRECTS;
+
+	return mach64_dma_dispatch_vertex(filp, dev, vertex.prim, vertex.buf,
+					  vertex.used, vertex.discard);
+}
+
+int mach64_dma_blit(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_sarea_t *sarea_priv = dev_priv->sarea_priv;
+	drm_mach64_blit_t blit;
+	int ret;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(blit, (drm_mach64_blit_t *) data,
+				 sizeof(blit));
+
+	DRM_DEBUG("%s: pid=%d index=%d\n",
+		  __FUNCTION__, DRM_CURRENTPID, blit.idx);
+
+	if (blit.idx < 0 || blit.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  blit.idx, dma->buf_count - 1);
+		return DRM_ERR(EINVAL);
+	}
+
+	ret = mach64_dma_dispatch_blit(filp, dev, &blit);
+
+	/* Make sure we restore the 3D state next time.
+	 */
+	sarea_priv->dirty |= (MACH64_UPLOAD_CONTEXT |
+			      MACH64_UPLOAD_MISC | MACH64_UPLOAD_CLIPRECTS);
+
+	return ret;
+}
+
+int mach64_get_param(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_mach64_private_t *dev_priv = dev->dev_private;
+	drm_mach64_getparam_t param;
+	int value;
+
+	DRM_DEBUG("%s\n", __FUNCTION__);
+
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(param, (drm_mach64_getparam_t *) data,
+				 sizeof(param));
+
+	switch (param.param) {
+	case MACH64_PARAM_FRAMES_QUEUED:
+		/* Needs lock since it calls mach64_ring_tick() */
+		LOCK_TEST_WITH_RETURN(dev, filp);
+		value = mach64_do_get_frames_queued(dev_priv);
+		break;
+	case MACH64_PARAM_IRQ_NR:
+		value = dev->irq;
+		break;
+	default:
+		return DRM_ERR(EINVAL);
+	}
+
+	if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
+		return DRM_ERR(EFAULT);
+	}
+
+	return 0;
+}
diff --git a/sys/dev/drm/mga.h b/sys/dev/drm/mga.h
deleted file mode 100644
index 6f463c3..0000000
--- a/sys/dev/drm/mga.h
+++ /dev/null
@@ -1,100 +0,0 @@
-/* mga.h -- Matrox G200/G400 DRM template customization -*- linux-c -*-
- * Created: Thu Jan 11 21:29:32 2001 by gareth@valinux.com */
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Gareth Hughes <gareth@valinux.com>
- *
- * $FreeBSD$
- */
-
-#ifndef __MGA_H__
-#define __MGA_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) mga_##x
-
-/* General customization:
- */
-#define __HAVE_AGP		1
-#define __MUST_HAVE_AGP		1
-#define __HAVE_MTRR		1
-#define __HAVE_CTX_BITMAP	1
-
-#define DRIVER_AUTHOR		"Gareth Hughes, VA Linux Systems Inc."
-
-#define DRIVER_NAME		"mga"
-#define DRIVER_DESC		"Matrox G200/G400"
-#define DRIVER_DATE		"20021029"
-
-#define DRIVER_MAJOR		3
-#define DRIVER_MINOR		1
-#define DRIVER_PATCHLEVEL	0
-
-#define DRIVER_IOCTLS							   \
-	[DRM_IOCTL_NR(DRM_IOCTL_DMA)]	      = { mga_dma_buffers, 1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_INIT)]    = { mga_dma_init,    1, 1 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_FLUSH)]   = { mga_dma_flush,   1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_RESET)]   = { mga_dma_reset,   1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_SWAP)]    = { mga_dma_swap,    1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_CLEAR)]   = { mga_dma_clear,   1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_VERTEX)]  = { mga_dma_vertex,  1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_INDICES)] = { mga_dma_indices, 1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_ILOAD)]   = { mga_dma_iload,   1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_BLIT)]    = { mga_dma_blit,    1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_MGA_GETPARAM)]= { mga_getparam,    1, 0 },
-
-#define __HAVE_COUNTERS         3
-#define __HAVE_COUNTER6         _DRM_STAT_IRQ
-#define __HAVE_COUNTER7         _DRM_STAT_PRIMARY
-#define __HAVE_COUNTER8         _DRM_STAT_SECONDARY
-
-/* Driver customization:
- */
-#define DRIVER_PRETAKEDOWN( dev ) do {					\
-	mga_do_cleanup_dma( dev );					\
-} while (0)
-
-/* DMA customization:
- */
-#define __HAVE_DMA		1
-#define __HAVE_IRQ		1
-#define __HAVE_VBL_IRQ		1
-#define __HAVE_SHARED_IRQ       1
-
-#define __HAVE_DMA_QUIESCENT	1
-#define DRIVER_DMA_QUIESCENT() do {					\
-	drm_mga_private_t *dev_priv = dev->dev_private;			\
-	return mga_do_wait_for_idle( dev_priv );			\
-} while (0)
-
-/* Buffer customization:
- */
-#define DRIVER_BUF_PRIV_T	drm_mga_buf_priv_t
-
-#define DRIVER_AGP_BUFFERS_MAP( dev )					\
-	((drm_mga_private_t *)((dev)->dev_private))->buffers
-
-#endif
diff --git a/sys/dev/drm/mga_dma.c b/sys/dev/drm/mga_dma.c
index 57db72d..9feac05 100644
--- a/sys/dev/drm/mga_dma.c
+++ b/sys/dev/drm/mga_dma.c
@@ -35,7 +35,6 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/mga.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/mga_drm.h"
@@ -44,57 +43,40 @@
 #define MGA_DEFAULT_USEC_TIMEOUT	10000
 #define MGA_FREELIST_DEBUG		0
 
+static int mga_do_cleanup_dma(drm_device_t * dev);
 
 /* ================================================================
  * Engine control
  */
 
-int mga_do_wait_for_idle( drm_mga_private_t *dev_priv )
+int mga_do_wait_for_idle(drm_mga_private_t * dev_priv)
 {
 	u32 status = 0;
 	int i;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
-		if ( status == MGA_ENDPRDMASTS ) {
-			MGA_WRITE8( MGA_CRTC_INDEX, 0 );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
+		if (status == MGA_ENDPRDMASTS) {
+			MGA_WRITE8(MGA_CRTC_INDEX, 0);
 			return 0;
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 #if MGA_DMA_DEBUG
-	DRM_ERROR( "failed!\n" );
-	DRM_INFO( "   status=0x%08x\n", status );
+	DRM_ERROR("failed!\n");
+	DRM_INFO("   status=0x%08x\n", status);
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-int mga_do_dma_idle( drm_mga_private_t *dev_priv )
-{
-	u32 status = 0;
-	int i;
-	DRM_DEBUG( "\n" );
-
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		status = MGA_READ( MGA_STATUS ) & MGA_DMA_IDLE_MASK;
-		if ( status == MGA_ENDPRDMASTS ) return 0;
-		DRM_UDELAY( 1 );
-	}
-
-#if MGA_DMA_DEBUG
-	DRM_ERROR( "failed! status=0x%08x\n", status );
-#endif
-	return DRM_ERR(EBUSY);
-}
-
-int mga_do_dma_reset( drm_mga_private_t *dev_priv )
+static int mga_do_dma_reset(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	/* The primary DMA stream should look like new right about now.
 	 */
@@ -113,66 +95,29 @@ int mga_do_dma_reset( drm_mga_private_t *dev_priv )
 	return 0;
 }
 
-int mga_do_engine_reset( drm_mga_private_t *dev_priv )
-{
-	DRM_DEBUG( "\n" );
-
-	/* Okay, so we've completely screwed up and locked the engine.
-	 * How about we clean up after ourselves?
-	 */
-	MGA_WRITE( MGA_RST, MGA_SOFTRESET );
-	DRM_UDELAY( 15 );				/* Wait at least 10 usecs */
-	MGA_WRITE( MGA_RST, 0 );
-
-	/* Initialize the registers that get clobbered by the soft
-	 * reset.  Many of the core register values survive a reset,
-	 * but the drawing registers are basically all gone.
-	 *
-	 * 3D clients should probably die after calling this.  The X
-	 * server should reset the engine state to known values.
-	 */
-#if 0
-	MGA_WRITE( MGA_PRIMPTR,
-		   virt_to_bus((void *)dev_priv->prim.status_page) |
-		   MGA_PRIMPTREN0 |
-		   MGA_PRIMPTREN1 );
-#endif
-
-	MGA_WRITE( MGA_ICLEAR, MGA_SOFTRAPICLR );
-	MGA_WRITE( MGA_IEN,    MGA_SOFTRAPIEN );
-
-	/* The primary DMA stream should look like new right about now.
-	 */
-	mga_do_dma_reset( dev_priv );
-
-	/* This bad boy will never fail.
-	 */
-	return 0;
-}
-
-
 /* ================================================================
  * Primary DMA stream
  */
 
-void mga_do_dma_flush( drm_mga_private_t *dev_priv )
+void mga_do_dma_flush(drm_mga_private_t * dev_priv)
 {
 	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 	u32 head, tail;
 	u32 status = 0;
 	int i;
- 	DMA_LOCALS;
-	DRM_DEBUG( "\n" );
-
-        /* We need to wait so that we can do an safe flush */
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
-		if ( status == MGA_ENDPRDMASTS ) break;
-		DRM_UDELAY( 1 );
+	DMA_LOCALS;
+	DRM_DEBUG("\n");
+
+	/* We need to wait so that we can do an safe flush */
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
+		if (status == MGA_ENDPRDMASTS)
+			break;
+		DRM_UDELAY(1);
 	}
 
-	if ( primary->tail == primary->last_flush ) {
-		DRM_DEBUG( "   bailing out...\n" );
+	if (primary->tail == primary->last_flush) {
+		DRM_DEBUG("   bailing out...\n");
 		return;
 	}
 
@@ -182,48 +127,46 @@ void mga_do_dma_flush( drm_mga_private_t *dev_priv )
 	 * actually (partially?) reads the first of these commands.
 	 * See page 4-16 in the G400 manual, middle of the page or so.
 	 */
-	BEGIN_DMA( 1 );
+	BEGIN_DMA(1);
 
-	DMA_BLOCK( MGA_DMAPAD,  0x00000000,
-		   MGA_DMAPAD,  0x00000000,
-		   MGA_DMAPAD,  0x00000000,
-		   MGA_DMAPAD,	0x00000000 );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
 
 	ADVANCE_DMA();
 
 	primary->last_flush = primary->tail;
 
-	head = MGA_READ( MGA_PRIMADDRESS );
+	head = MGA_READ(MGA_PRIMADDRESS);
 
-	if ( head <= tail ) {
+	if (head <= tail) {
 		primary->space = primary->size - primary->tail;
 	} else {
 		primary->space = head - tail;
 	}
 
-	DRM_DEBUG( "   head = 0x%06lx\n", head - dev_priv->primary->offset );
-	DRM_DEBUG( "   tail = 0x%06lx\n", tail - dev_priv->primary->offset );
-	DRM_DEBUG( "  space = 0x%06x\n", primary->space );
+	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
+	DRM_DEBUG("   tail = 0x%06lx\n", tail - dev_priv->primary->offset);
+	DRM_DEBUG("  space = 0x%06x\n", primary->space);
 
 	mga_flush_write_combine();
-	MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
+	MGA_WRITE(MGA_PRIMEND, tail | MGA_PAGPXFER);
 
-	DRM_DEBUG( "done.\n" );
+	DRM_DEBUG("done.\n");
 }
 
-void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
+void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv)
 {
 	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 	u32 head, tail;
 	DMA_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	BEGIN_DMA_WRAP();
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000 );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000, MGA_DMAPAD, 0x00000000);
 
 	ADVANCE_DMA();
 
@@ -233,45 +176,43 @@ void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv )
 	primary->last_flush = 0;
 	primary->last_wrap++;
 
-	head = MGA_READ( MGA_PRIMADDRESS );
+	head = MGA_READ(MGA_PRIMADDRESS);
 
-	if ( head == dev_priv->primary->offset ) {
+	if (head == dev_priv->primary->offset) {
 		primary->space = primary->size;
 	} else {
 		primary->space = head - dev_priv->primary->offset;
 	}
 
-	DRM_DEBUG( "   head = 0x%06lx\n",
-		  head - dev_priv->primary->offset );
-	DRM_DEBUG( "   tail = 0x%06x\n", primary->tail );
-	DRM_DEBUG( "   wrap = %d\n", primary->last_wrap );
-	DRM_DEBUG( "  space = 0x%06x\n", primary->space );
+	DRM_DEBUG("   head = 0x%06lx\n", head - dev_priv->primary->offset);
+	DRM_DEBUG("   tail = 0x%06x\n", primary->tail);
+	DRM_DEBUG("   wrap = %d\n", primary->last_wrap);
+	DRM_DEBUG("  space = 0x%06x\n", primary->space);
 
 	mga_flush_write_combine();
-	MGA_WRITE( MGA_PRIMEND, tail | MGA_PAGPXFER );
+	MGA_WRITE(MGA_PRIMEND, tail | MGA_PAGPXFER);
 
-	set_bit( 0, &primary->wrapped );
-	DRM_DEBUG( "done.\n" );
+	set_bit(0, &primary->wrapped);
+	DRM_DEBUG("done.\n");
 }
 
-void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
+void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv)
 {
 	drm_mga_primary_buffer_t *primary = &dev_priv->prim;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	u32 head = dev_priv->primary->offset;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	sarea_priv->last_wrap++;
-	DRM_DEBUG( "   wrap = %d\n", sarea_priv->last_wrap );
+	DRM_DEBUG("   wrap = %d\n", sarea_priv->last_wrap);
 
 	mga_flush_write_combine();
-	MGA_WRITE( MGA_PRIMADDRESS, head | MGA_DMA_GENERAL );
+	MGA_WRITE(MGA_PRIMADDRESS, head | MGA_DMA_GENERAL);
 
-	clear_bit( 0, &primary->wrapped );
-	DRM_DEBUG( "done.\n" );
+	clear_bit(0, &primary->wrapped);
+	DRM_DEBUG("done.\n");
 }
 
-
 /* ================================================================
  * Freelist management
  */
@@ -280,63 +221,61 @@ void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv )
 #define MGA_BUFFER_FREE		0
 
 #if MGA_FREELIST_DEBUG
-static void mga_freelist_print( drm_device_t *dev )
+static void mga_freelist_print(drm_device_t * dev)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_freelist_t *entry;
 
-	DRM_INFO( "\n" );
-	DRM_INFO( "current dispatch: last=0x%x done=0x%x\n",
-		  dev_priv->sarea_priv->last_dispatch,
-		  (unsigned int)(MGA_READ( MGA_PRIMADDRESS ) -
-				 dev_priv->primary->offset) );
-	DRM_INFO( "current freelist:\n" );
-
-	for ( entry = dev_priv->head->next ; entry ; entry = entry->next ) {
-		DRM_INFO( "   %p   idx=%2d  age=0x%x 0x%06lx\n",
-			  entry, entry->buf->idx, entry->age.head,
-			  entry->age.head - dev_priv->primary->offset );
+	DRM_INFO("\n");
+	DRM_INFO("current dispatch: last=0x%x done=0x%x\n",
+		 dev_priv->sarea_priv->last_dispatch,
+		 (unsigned int)(MGA_READ(MGA_PRIMADDRESS) -
+				dev_priv->primary->offset));
+	DRM_INFO("current freelist:\n");
+
+	for (entry = dev_priv->head->next; entry; entry = entry->next) {
+		DRM_INFO("   %p   idx=%2d  age=0x%x 0x%06lx\n",
+			 entry, entry->buf->idx, entry->age.head,
+			 entry->age.head - dev_priv->primary->offset);
 	}
-	DRM_INFO( "\n" );
+	DRM_INFO("\n");
 }
 #endif
 
-static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
+static int mga_freelist_init(drm_device_t * dev, drm_mga_private_t * dev_priv)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_freelist_t *entry;
 	int i;
-	DRM_DEBUG( "count=%d\n", dma->buf_count );
+	DRM_DEBUG("count=%d\n", dma->buf_count);
 
-	dev_priv->head = DRM(alloc)( sizeof(drm_mga_freelist_t),
-				     DRM_MEM_DRIVER );
-	if ( dev_priv->head == NULL )
+	dev_priv->head = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
+	if (dev_priv->head == NULL)
 		return DRM_ERR(ENOMEM);
 
-	memset( dev_priv->head, 0, sizeof(drm_mga_freelist_t) );
-	SET_AGE( &dev_priv->head->age, MGA_BUFFER_USED, 0 );
+	memset(dev_priv->head, 0, sizeof(drm_mga_freelist_t));
+	SET_AGE(&dev_priv->head->age, MGA_BUFFER_USED, 0);
 
-	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+	for (i = 0; i < dma->buf_count; i++) {
 		buf = dma->buflist[i];
-	        buf_priv = buf->dev_private;
+		buf_priv = buf->dev_private;
 
-		entry = DRM(alloc)( sizeof(drm_mga_freelist_t),
-				    DRM_MEM_DRIVER );
-		if ( entry == NULL )
+		entry = drm_alloc(sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
+		if (entry == NULL)
 			return DRM_ERR(ENOMEM);
 
-		memset( entry, 0, sizeof(drm_mga_freelist_t) );
+		memset(entry, 0, sizeof(drm_mga_freelist_t));
 
 		entry->next = dev_priv->head->next;
 		entry->prev = dev_priv->head;
-		SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
+		SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
 		entry->buf = buf;
 
-		if ( dev_priv->head->next != NULL )
+		if (dev_priv->head->next != NULL)
 			dev_priv->head->next->prev = entry;
-		if ( entry->next == NULL )
+		if (entry->next == NULL)
 			dev_priv->tail = entry;
 
 		buf_priv->list_entry = entry;
@@ -349,17 +288,17 @@ static int mga_freelist_init( drm_device_t *dev, drm_mga_private_t *dev_priv )
 	return 0;
 }
 
-static void mga_freelist_cleanup( drm_device_t *dev )
+static void mga_freelist_cleanup(drm_device_t * dev)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_freelist_t *entry;
 	drm_mga_freelist_t *next;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	entry = dev_priv->head;
-	while ( entry ) {
+	while (entry) {
 		next = entry->next;
-		DRM(free)( entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER );
+		drm_free(entry, sizeof(drm_mga_freelist_t), DRM_MEM_DRIVER);
 		entry = next;
 	}
 
@@ -369,71 +308,69 @@ static void mga_freelist_cleanup( drm_device_t *dev )
 #if 0
 /* FIXME: Still needed?
  */
-static void mga_freelist_reset( drm_device_t *dev )
+static void mga_freelist_reset(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	int i;
 
-	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+	for (i = 0; i < dma->buf_count; i++) {
 		buf = dma->buflist[i];
-	        buf_priv = buf->dev_private;
-		SET_AGE( &buf_priv->list_entry->age,
-			 MGA_BUFFER_FREE, 0 );
+		buf_priv = buf->dev_private;
+		SET_AGE(&buf_priv->list_entry->age, MGA_BUFFER_FREE, 0);
 	}
 }
 #endif
 
-static drm_buf_t *mga_freelist_get( drm_device_t *dev )
+static drm_buf_t *mga_freelist_get(drm_device_t * dev)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_freelist_t *next;
 	drm_mga_freelist_t *prev;
 	drm_mga_freelist_t *tail = dev_priv->tail;
 	u32 head, wrap;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	head = MGA_READ( MGA_PRIMADDRESS );
+	head = MGA_READ(MGA_PRIMADDRESS);
 	wrap = dev_priv->sarea_priv->last_wrap;
 
-	DRM_DEBUG( "   tail=0x%06lx %d\n",
-		   tail->age.head ?
-		   tail->age.head - dev_priv->primary->offset : 0,
-		   tail->age.wrap );
-	DRM_DEBUG( "   head=0x%06lx %d\n",
-		   head - dev_priv->primary->offset, wrap );
+	DRM_DEBUG("   tail=0x%06lx %d\n",
+		  tail->age.head ?
+		  tail->age.head - dev_priv->primary->offset : 0,
+		  tail->age.wrap);
+	DRM_DEBUG("   head=0x%06lx %d\n",
+		  head - dev_priv->primary->offset, wrap);
 
-	if ( TEST_AGE( &tail->age, head, wrap ) ) {
+	if (TEST_AGE(&tail->age, head, wrap)) {
 		prev = dev_priv->tail->prev;
 		next = dev_priv->tail;
 		prev->next = NULL;
 		next->prev = next->next = NULL;
 		dev_priv->tail = prev;
-		SET_AGE( &next->age, MGA_BUFFER_USED, 0 );
+		SET_AGE(&next->age, MGA_BUFFER_USED, 0);
 		return next->buf;
 	}
 
-	DRM_DEBUG( "returning NULL!\n" );
+	DRM_DEBUG("returning NULL!\n");
 	return NULL;
 }
 
-int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
+int mga_freelist_put(drm_device_t * dev, drm_buf_t * buf)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
 	drm_mga_freelist_t *head, *entry, *prev;
 
-	DRM_DEBUG( "age=0x%06lx wrap=%d\n",
-		   buf_priv->list_entry->age.head -
-		   dev_priv->primary->offset,
-		   buf_priv->list_entry->age.wrap );
+	DRM_DEBUG("age=0x%06lx wrap=%d\n",
+		  buf_priv->list_entry->age.head -
+		  dev_priv->primary->offset, buf_priv->list_entry->age.wrap);
 
 	entry = buf_priv->list_entry;
 	head = dev_priv->head;
 
-	if ( buf_priv->list_entry->age.head == MGA_BUFFER_USED ) {
-		SET_AGE( &entry->age, MGA_BUFFER_FREE, 0 );
+	if (buf_priv->list_entry->age.head == MGA_BUFFER_USED) {
+		SET_AGE(&entry->age, MGA_BUFFER_FREE, 0);
 		prev = dev_priv->tail;
 		prev->next = entry;
 		entry->prev = prev;
@@ -449,43 +386,42 @@ int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf )
 	return 0;
 }
 
-
 /* ================================================================
  * DMA initialization, cleanup
  */
 
-static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
+static int mga_do_init_dma(drm_device_t * dev, drm_mga_init_t * init)
 {
 	drm_mga_private_t *dev_priv;
 	int ret;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	dev_priv = DRM(alloc)( sizeof(drm_mga_private_t), DRM_MEM_DRIVER );
-	if ( !dev_priv )
+	dev_priv = drm_alloc(sizeof(drm_mga_private_t), DRM_MEM_DRIVER);
+	if (!dev_priv)
 		return DRM_ERR(ENOMEM);
 
-	memset( dev_priv, 0, sizeof(drm_mga_private_t) );
+	memset(dev_priv, 0, sizeof(drm_mga_private_t));
 
 	dev_priv->chipset = init->chipset;
 
 	dev_priv->usec_timeout = MGA_DEFAULT_USEC_TIMEOUT;
 
-	if ( init->sgram ) {
+	if (init->sgram) {
 		dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_BLK;
 	} else {
 		dev_priv->clear_cmd = MGA_DWGCTL_CLEAR | MGA_ATYPE_RSTR;
 	}
-	dev_priv->maccess	= init->maccess;
+	dev_priv->maccess = init->maccess;
 
-	dev_priv->fb_cpp	= init->fb_cpp;
-	dev_priv->front_offset	= init->front_offset;
-	dev_priv->front_pitch	= init->front_pitch;
-	dev_priv->back_offset	= init->back_offset;
-	dev_priv->back_pitch	= init->back_pitch;
+	dev_priv->fb_cpp = init->fb_cpp;
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->front_pitch = init->front_pitch;
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->back_pitch = init->back_pitch;
 
-	dev_priv->depth_cpp	= init->depth_cpp;
-	dev_priv->depth_offset	= init->depth_offset;
-	dev_priv->depth_pitch	= init->depth_pitch;
+	dev_priv->depth_cpp = init->depth_cpp;
+	dev_priv->depth_offset = init->depth_offset;
+	dev_priv->depth_pitch = init->depth_pitch;
 
 	/* FIXME: Need to support AGP textures...
 	 */
@@ -494,109 +430,104 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
 
 	DRM_GETSAREA();
 
-	if(!dev_priv->sarea) {
-		DRM_ERROR( "failed to find sarea!\n" );
+	if (!dev_priv->sarea) {
+		DRM_ERROR("failed to find sarea!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
-	if(!dev_priv->mmio) {
-		DRM_ERROR( "failed to find mmio region!\n" );
+	dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
+	if (!dev_priv->mmio) {
+		DRM_ERROR("failed to find mmio region!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->status, init->status_offset );
-	if(!dev_priv->status) {
-		DRM_ERROR( "failed to find status page!\n" );
+	dev_priv->status = drm_core_findmap(dev, init->status_offset);
+	if (!dev_priv->status) {
+		DRM_ERROR("failed to find status page!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(EINVAL);
 	}
-
-	DRM_FIND_MAP( dev_priv->warp, init->warp_offset );
-	if(!dev_priv->warp) {
-		DRM_ERROR( "failed to find warp microcode region!\n" );
+	dev_priv->warp = drm_core_findmap(dev, init->warp_offset);
+	if (!dev_priv->warp) {
+		DRM_ERROR("failed to find warp microcode region!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->primary, init->primary_offset );
-	if(!dev_priv->primary) {
-		DRM_ERROR( "failed to find primary dma region!\n" );
+	dev_priv->primary = drm_core_findmap(dev, init->primary_offset);
+	if (!dev_priv->primary) {
+		DRM_ERROR("failed to find primary dma region!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
-	if(!dev_priv->buffers) {
-		DRM_ERROR( "failed to find dma buffer region!\n" );
+	dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
+	if (!dev->agp_buffer_map) {
+		DRM_ERROR("failed to find dma buffer region!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(EINVAL);
 	}
 
 	dev_priv->sarea_priv =
-		(drm_mga_sarea_t *)((u8 *)dev_priv->sarea->handle +
-				    init->sarea_priv_offset);
+	    (drm_mga_sarea_t *) ((u8 *) dev_priv->sarea->handle +
+				 init->sarea_priv_offset);
 
-	DRM_IOREMAP( dev_priv->warp, dev );
-	DRM_IOREMAP( dev_priv->primary, dev );
-	DRM_IOREMAP( dev_priv->buffers, dev );
+	drm_core_ioremap(dev_priv->warp, dev);
+	drm_core_ioremap(dev_priv->primary, dev);
+	drm_core_ioremap(dev->agp_buffer_map, dev);
 
-	if(!dev_priv->warp->handle ||
-	   !dev_priv->primary->handle ||
-	   !dev_priv->buffers->handle ) {
-		DRM_ERROR( "failed to ioremap agp regions!\n" );
+	if (!dev_priv->warp->handle ||
+	    !dev_priv->primary->handle || !dev->agp_buffer_map->handle) {
+		DRM_ERROR("failed to ioremap agp regions!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(ENOMEM);
 	}
 
-	ret = mga_warp_install_microcode( dev_priv );
-	if ( ret < 0 ) {
-		DRM_ERROR( "failed to install WARP ucode!\n" );
+	ret = mga_warp_install_microcode(dev_priv);
+	if (ret < 0) {
+		DRM_ERROR("failed to install WARP ucode!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return ret;
 	}
 
-	ret = mga_warp_init( dev_priv );
-	if ( ret < 0 ) {
-		DRM_ERROR( "failed to init WARP engine!\n" );
+	ret = mga_warp_init(dev_priv);
+	if (ret < 0) {
+		DRM_ERROR("failed to init WARP engine!\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return ret;
 	}
 
-	dev_priv->prim.status = (u32 *)dev_priv->status->handle;
+	dev_priv->prim.status = (u32 *) dev_priv->status->handle;
 
-	mga_do_wait_for_idle( dev_priv );
+	mga_do_wait_for_idle(dev_priv);
 
 	/* Init the primary DMA registers.
 	 */
-	MGA_WRITE( MGA_PRIMADDRESS,
-		   dev_priv->primary->offset | MGA_DMA_GENERAL );
+	MGA_WRITE(MGA_PRIMADDRESS, dev_priv->primary->offset | MGA_DMA_GENERAL);
 #if 0
-	MGA_WRITE( MGA_PRIMPTR,
-		   virt_to_bus((void *)dev_priv->prim.status) |
-		   MGA_PRIMPTREN0 |	/* Soft trap, SECEND, SETUPEND */
-		   MGA_PRIMPTREN1 );	/* DWGSYNC */
+	MGA_WRITE(MGA_PRIMPTR, virt_to_bus((void *)dev_priv->prim.status) | MGA_PRIMPTREN0 |	/* Soft trap, SECEND, SETUPEND */
+		  MGA_PRIMPTREN1);	/* DWGSYNC */
 #endif
 
-	dev_priv->prim.start = (u8 *)dev_priv->primary->handle;
-	dev_priv->prim.end = ((u8 *)dev_priv->primary->handle
+	dev_priv->prim.start = (u8 *) dev_priv->primary->handle;
+	dev_priv->prim.end = ((u8 *) dev_priv->primary->handle
 			      + dev_priv->primary->size);
 	dev_priv->prim.size = dev_priv->primary->size;
 
@@ -616,11 +547,11 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
 	dev_priv->sarea_priv->last_frame.head = 0;
 	dev_priv->sarea_priv->last_frame.wrap = 0;
 
-	if ( mga_freelist_init( dev, dev_priv ) < 0 ) {
-		DRM_ERROR( "could not initialize freelist\n" );
+	if (mga_freelist_init(dev, dev_priv) < 0) {
+		DRM_ERROR("could not initialize freelist\n");
 		/* Assign dev_private so we can do cleanup. */
 		dev->dev_private = (void *)dev_priv;
-		mga_do_cleanup_dma( dev );
+		mga_do_cleanup_dma(dev);
 		return DRM_ERR(ENOMEM);
 	}
 
@@ -629,131 +560,132 @@ static int mga_do_init_dma( drm_device_t *dev, drm_mga_init_t *init )
 	return 0;
 }
 
-int mga_do_cleanup_dma( drm_device_t *dev )
+static int mga_do_cleanup_dma(drm_device_t * dev)
 {
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-#if __HAVE_IRQ
 	/* Make sure interrupts are disabled here because the uninstall ioctl
 	 * may not have been called from userspace and after dev_private
 	 * is freed, it's too late.
 	 */
-	if ( dev->irq_enabled ) DRM(irq_uninstall)(dev);
-#endif
+	if (dev->irq_enabled)
+		drm_irq_uninstall(dev);
 
-	if ( dev->dev_private ) {
+	if (dev->dev_private) {
 		drm_mga_private_t *dev_priv = dev->dev_private;
 
-		if ( dev_priv->warp != NULL )
-			DRM_IOREMAPFREE( dev_priv->warp, dev );
-		if ( dev_priv->primary != NULL )
-			DRM_IOREMAPFREE( dev_priv->primary, dev );
-		if ( dev_priv->buffers != NULL )
-			DRM_IOREMAPFREE( dev_priv->buffers, dev );
+		if (dev_priv->warp != NULL)
+			drm_core_ioremapfree(dev_priv->warp, dev);
+		if (dev_priv->primary != NULL)
+			drm_core_ioremapfree(dev_priv->primary, dev);
+		if (dev->agp_buffer_map != NULL) {
+			drm_core_ioremapfree(dev->agp_buffer_map, dev);
+			dev->agp_buffer_map = NULL;
+		}
 
-		if ( dev_priv->head != NULL ) {
-			mga_freelist_cleanup( dev );
+		if (dev_priv->head != NULL) {
+			mga_freelist_cleanup(dev);
 		}
 
-		DRM(free)( dev->dev_private, sizeof(drm_mga_private_t),
-			   DRM_MEM_DRIVER );
+		drm_free(dev->dev_private, sizeof(drm_mga_private_t),
+			 DRM_MEM_DRIVER);
 		dev->dev_private = NULL;
 	}
 
 	return 0;
 }
 
-int mga_dma_init( DRM_IOCTL_ARGS )
+int mga_dma_init(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_init_t init;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( init, (drm_mga_init_t *)data, sizeof(init) );
+	DRM_COPY_FROM_USER_IOCTL(init, (drm_mga_init_t __user *) data,
+				 sizeof(init));
 
-	switch ( init.func ) {
+	switch (init.func) {
 	case MGA_INIT_DMA:
-		return mga_do_init_dma( dev, &init );
+		return mga_do_init_dma(dev, &init);
 	case MGA_CLEANUP_DMA:
-		return mga_do_cleanup_dma( dev );
+		return mga_do_cleanup_dma(dev);
 	}
 
 	return DRM_ERR(EINVAL);
 }
 
-
 /* ================================================================
  * Primary DMA stream management
  */
 
-int mga_dma_flush( DRM_IOCTL_ARGS )
+int mga_dma_flush(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
-	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 	drm_lock_t lock;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( lock, (drm_lock_t *)data, sizeof(lock) );
+	DRM_COPY_FROM_USER_IOCTL(lock, (drm_lock_t __user *) data,
+				 sizeof(lock));
 
-	DRM_DEBUG( "%s%s%s\n",
-		   (lock.flags & _DRM_LOCK_FLUSH) ?	"flush, " : "",
-		   (lock.flags & _DRM_LOCK_FLUSH_ALL) ?	"flush all, " : "",
-		   (lock.flags & _DRM_LOCK_QUIESCENT) ?	"idle, " : "" );
+	DRM_DEBUG("%s%s%s\n",
+		  (lock.flags & _DRM_LOCK_FLUSH) ? "flush, " : "",
+		  (lock.flags & _DRM_LOCK_FLUSH_ALL) ? "flush all, " : "",
+		  (lock.flags & _DRM_LOCK_QUIESCENT) ? "idle, " : "");
 
-	WRAP_WAIT_WITH_RETURN( dev_priv );
+	WRAP_WAIT_WITH_RETURN(dev_priv);
 
-	if ( lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL) ) {
-		mga_do_dma_flush( dev_priv );
+	if (lock.flags & (_DRM_LOCK_FLUSH | _DRM_LOCK_FLUSH_ALL)) {
+		mga_do_dma_flush(dev_priv);
 	}
 
-	if ( lock.flags & _DRM_LOCK_QUIESCENT ) {
+	if (lock.flags & _DRM_LOCK_QUIESCENT) {
 #if MGA_DMA_DEBUG
-		int ret = mga_do_wait_for_idle( dev_priv );
-		if ( ret < 0 )
-			DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
+		int ret = mga_do_wait_for_idle(dev_priv);
+		if (ret < 0)
+			DRM_INFO("%s: -EBUSY\n", __FUNCTION__);
 		return ret;
 #else
-		return mga_do_wait_for_idle( dev_priv );
+		return mga_do_wait_for_idle(dev_priv);
 #endif
 	} else {
 		return 0;
 	}
 }
 
-int mga_dma_reset( DRM_IOCTL_ARGS )
+int mga_dma_reset(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
-	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	return mga_do_dma_reset( dev_priv );
+	return mga_do_dma_reset(dev_priv);
 }
 
-
 /* ================================================================
  * DMA buffer management
  */
 
-static int mga_dma_get_buffers( DRMFILE filp,
-				drm_device_t *dev, drm_dma_t *d )
+static int mga_dma_get_buffers(DRMFILE filp, drm_device_t * dev, drm_dma_t * d)
 {
 	drm_buf_t *buf;
 	int i;
 
-	for ( i = d->granted_count ; i < d->request_count ; i++ ) {
-		buf = mga_freelist_get( dev );
-		if ( !buf ) return DRM_ERR(EAGAIN);
+	for (i = d->granted_count; i < d->request_count; i++) {
+		buf = mga_freelist_get(dev);
+		if (!buf)
+			return DRM_ERR(EAGAIN);
 
 		buf->filp = filp;
 
-		if ( DRM_COPY_TO_USER( &d->request_indices[i],
-				   &buf->idx, sizeof(buf->idx) ) )
+		if (DRM_COPY_TO_USER(&d->request_indices[i],
+				     &buf->idx, sizeof(buf->idx)))
 			return DRM_ERR(EFAULT);
-		if ( DRM_COPY_TO_USER( &d->request_sizes[i],
-				   &buf->total, sizeof(buf->total) ) )
+		if (DRM_COPY_TO_USER(&d->request_sizes[i],
+				     &buf->total, sizeof(buf->total)))
 			return DRM_ERR(EFAULT);
 
 		d->granted_count++;
@@ -761,43 +693,55 @@ static int mga_dma_get_buffers( DRMFILE filp,
 	return 0;
 }
 
-int mga_dma_buffers( DRM_IOCTL_ARGS )
+int mga_dma_buffers(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
-	drm_mga_private_t *dev_priv = (drm_mga_private_t *)dev->dev_private;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
+	drm_dma_t __user *argp = (void __user *)data;
 	drm_dma_t d;
 	int ret = 0;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
+	DRM_COPY_FROM_USER_IOCTL(d, argp, sizeof(d));
 
 	/* Please don't send us buffers.
 	 */
-	if ( d.send_count != 0 ) {
-		DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
-			   DRM_CURRENTPID, d.send_count );
+	if (d.send_count != 0) {
+		DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
+			  DRM_CURRENTPID, d.send_count);
 		return DRM_ERR(EINVAL);
 	}
 
 	/* We'll send you buffers.
 	 */
-	if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
-		DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
-			   DRM_CURRENTPID, d.request_count, dma->buf_count );
+	if (d.request_count < 0 || d.request_count > dma->buf_count) {
+		DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
+			  DRM_CURRENTPID, d.request_count, dma->buf_count);
 		return DRM_ERR(EINVAL);
 	}
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
 	d.granted_count = 0;
 
-	if ( d.request_count ) {
-		ret = mga_dma_get_buffers( filp, dev, &d );
+	if (d.request_count) {
+		ret = mga_dma_get_buffers(filp, dev, &d);
 	}
 
-	DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
+	DRM_COPY_TO_USER_IOCTL(argp, d, sizeof(d));
 
 	return ret;
 }
+
+void mga_driver_pretakedown(drm_device_t * dev)
+{
+	mga_do_cleanup_dma(dev);
+}
+
+int mga_driver_dma_quiescent(drm_device_t * dev)
+{
+	drm_mga_private_t *dev_priv = dev->dev_private;
+	return mga_do_wait_for_idle(dev_priv);
+}
diff --git a/sys/dev/drm/mga_drm.h b/sys/dev/drm/mga_drm.h
index fb851a9..60b5153 100644
--- a/sys/dev/drm/mga_drm.h
+++ b/sys/dev/drm/mga_drm.h
@@ -46,10 +46,10 @@
 
 /* WARP pipe flags
  */
-#define MGA_F			0x1		/* fog */
-#define MGA_A			0x2		/* alpha */
-#define MGA_S			0x4		/* specular */
-#define MGA_T2			0x8		/* multitexture */
+#define MGA_F			0x1	/* fog */
+#define MGA_A			0x2	/* alpha */
+#define MGA_S			0x4	/* specular */
+#define MGA_T2			0x8	/* multitexture */
 
 #define MGA_WARP_TGZ		0
 #define MGA_WARP_TGZF		(MGA_F)
@@ -68,15 +68,14 @@
 #define MGA_WARP_T2GZSA		(MGA_T2|MGA_S|MGA_A)
 #define MGA_WARP_T2GZSAF	(MGA_T2|MGA_S|MGA_F|MGA_A)
 
-#define MGA_MAX_G200_PIPES	8		/* no multitex */
+#define MGA_MAX_G200_PIPES	8	/* no multitex */
 #define MGA_MAX_G400_PIPES	16
 #define MGA_MAX_WARP_PIPES	MGA_MAX_G400_PIPES
-#define MGA_WARP_UCODE_SIZE	32768		/* in bytes */
+#define MGA_WARP_UCODE_SIZE	32768	/* in bytes */
 
 #define MGA_CARD_TYPE_G200	1
 #define MGA_CARD_TYPE_G400	2
 
-
 #define MGA_FRONT		0x1
 #define MGA_BACK		0x2
 #define MGA_DEPTH		0x4
@@ -87,14 +86,14 @@
 #define MGA_UPLOAD_TEX0		0x2
 #define MGA_UPLOAD_TEX1		0x4
 #define MGA_UPLOAD_PIPE		0x8
-#define MGA_UPLOAD_TEX0IMAGE	0x10 /* handled client-side */
-#define MGA_UPLOAD_TEX1IMAGE	0x20 /* handled client-side */
+#define MGA_UPLOAD_TEX0IMAGE	0x10	/* handled client-side */
+#define MGA_UPLOAD_TEX1IMAGE	0x20	/* handled client-side */
 #define MGA_UPLOAD_2D		0x40
-#define MGA_WAIT_AGE		0x80 /* handled client-side */
-#define MGA_UPLOAD_CLIPRECTS	0x100 /* handled client-side */
+#define MGA_WAIT_AGE		0x80	/* handled client-side */
+#define MGA_UPLOAD_CLIPRECTS	0x100	/* handled client-side */
 #if 0
-#define MGA_DMA_FLUSH		0x200 /* set when someone gets the lock
-					 quiescent */
+#define MGA_DMA_FLUSH		0x200	/* set when someone gets the lock
+					   quiescent */
 #endif
 
 /* 32 buffers of 64k each, total 2 meg.
@@ -121,8 +120,7 @@
 
 #define  DRM_MGA_IDLE_RETRY          2048
 
-#endif /* __MGA_SAREA_DEFINES__ */
-
+#endif				/* __MGA_SAREA_DEFINES__ */
 
 /* Setup registers for 3D context
  */
@@ -166,25 +164,25 @@ typedef struct {
 /* General aging mechanism
  */
 typedef struct {
-	unsigned int head;		/* Position of head pointer          */
-	unsigned int wrap;		/* Primary DMA wrap count            */
+	unsigned int head;	/* Position of head pointer          */
+	unsigned int wrap;	/* Primary DMA wrap count            */
 } drm_mga_age_t;
 
 typedef struct _drm_mga_sarea {
 	/* The channel for communication of state information to the kernel
 	 * on firing a vertex dma buffer.
 	 */
-   	drm_mga_context_regs_t context_state;
-   	drm_mga_server_regs_t server_state;
-   	drm_mga_texture_regs_t tex_state[2];
-   	unsigned int warp_pipe;
-   	unsigned int dirty;
-   	unsigned int vertsize;
+	drm_mga_context_regs_t context_state;
+	drm_mga_server_regs_t server_state;
+	drm_mga_texture_regs_t tex_state[2];
+	unsigned int warp_pipe;
+	unsigned int dirty;
+	unsigned int vertsize;
 
 	/* The current cliprects, or a subset thereof.
 	 */
-   	drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
-   	unsigned int nbox;
+	drm_clip_rect_t boxes[MGA_NR_SAREA_CLIPRECTS];
+	unsigned int nbox;
 
 	/* Information about the most recently used 3d drawable.  The
 	 * client fills in the req_* fields, the server fills in the
@@ -193,18 +191,18 @@ typedef struct _drm_mga_sarea {
 	 * The client clears the exported_drawable field before
 	 * clobbering the boxes data.
 	 */
-        unsigned int req_drawable;	 /* the X drawable id */
-	unsigned int req_draw_buffer;	 /* MGA_FRONT or MGA_BACK */
+	unsigned int req_drawable;	/* the X drawable id */
+	unsigned int req_draw_buffer;	/* MGA_FRONT or MGA_BACK */
 
-        unsigned int exported_drawable;
+	unsigned int exported_drawable;
 	unsigned int exported_index;
-        unsigned int exported_stamp;
-        unsigned int exported_buffers;
-        unsigned int exported_nfront;
-        unsigned int exported_nback;
+	unsigned int exported_stamp;
+	unsigned int exported_buffers;
+	unsigned int exported_nfront;
+	unsigned int exported_nback;
 	int exported_back_x, exported_front_x, exported_w;
 	int exported_back_y, exported_front_y, exported_h;
-   	drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
+	drm_clip_rect_t exported_boxes[MGA_NR_SAREA_CLIPRECTS];
 
 	/* Counters for aging textures and for client-side throttling.
 	 */
@@ -212,21 +210,20 @@ typedef struct _drm_mga_sarea {
 	unsigned int last_wrap;
 
 	drm_mga_age_t last_frame;
-        unsigned int last_enqueue;	/* last time a buffer was enqueued */
+	unsigned int last_enqueue;	/* last time a buffer was enqueued */
 	unsigned int last_dispatch;	/* age of the most recently dispatched buffer */
-	unsigned int last_quiescent;     /*  */
+	unsigned int last_quiescent;	/*  */
 
 	/* LRU lists for texture memory in agp space and on the card.
 	 */
-	drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS+1];
+	drm_tex_region_t texList[MGA_NR_TEX_HEAPS][MGA_NR_TEX_REGIONS + 1];
 	unsigned int texAge[MGA_NR_TEX_HEAPS];
 
 	/* Mechanism to validate card state.
 	 */
-   	int ctxOwner;
+	int ctxOwner;
 } drm_mga_sarea_t;
 
-
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmMga.h)
  */
@@ -257,33 +254,33 @@ typedef struct _drm_mga_sarea {
 #define DRM_IOCTL_MGA_GETPARAM DRM_IOWR(DRM_COMMAND_BASE + DRM_MGA_GETPARAM, drm_mga_getparam_t)
 
 typedef struct _drm_mga_warp_index {
-   	int installed;
-   	unsigned long phys_addr;
-   	int size;
+	int installed;
+	unsigned long phys_addr;
+	int size;
 } drm_mga_warp_index_t;
 
 typedef struct drm_mga_init {
-   	enum {
-	   	MGA_INIT_DMA    = 0x01,
-	       	MGA_CLEANUP_DMA = 0x02
+	enum {
+		MGA_INIT_DMA = 0x01,
+		MGA_CLEANUP_DMA = 0x02
 	} func;
 
-   	unsigned long sarea_priv_offset;
+	unsigned long sarea_priv_offset;
 
 	int chipset;
-   	int sgram;
+	int sgram;
 
 	unsigned int maccess;
 
-   	unsigned int fb_cpp;
+	unsigned int fb_cpp;
 	unsigned int front_offset, front_pitch;
-   	unsigned int back_offset, back_pitch;
+	unsigned int back_offset, back_pitch;
 
-   	unsigned int depth_cpp;
-   	unsigned int depth_offset, depth_pitch;
+	unsigned int depth_cpp;
+	unsigned int depth_offset, depth_pitch;
 
-   	unsigned int texture_offset[MGA_NR_TEX_HEAPS];
-   	unsigned int texture_size[MGA_NR_TEX_HEAPS];
+	unsigned int texture_offset[MGA_NR_TEX_HEAPS];
+	unsigned int texture_size[MGA_NR_TEX_HEAPS];
 
 	unsigned long fb_offset;
 	unsigned long mmio_offset;
@@ -295,7 +292,7 @@ typedef struct drm_mga_init {
 
 typedef struct drm_mga_fullscreen {
 	enum {
-		MGA_INIT_FULLSCREEN    = 0x01,
+		MGA_INIT_FULLSCREEN = 0x01,
 		MGA_CLEANUP_FULLSCREEN = 0x02
 	} func;
 } drm_mga_fullscreen_t;
@@ -309,16 +306,16 @@ typedef struct drm_mga_clear {
 } drm_mga_clear_t;
 
 typedef struct drm_mga_vertex {
-   	int idx;			/* buffer to queue */
-	int used;			/* bytes in use */
-	int discard;			/* client finished with buffer?  */
+	int idx;		/* buffer to queue */
+	int used;		/* bytes in use */
+	int discard;		/* client finished with buffer?  */
 } drm_mga_vertex_t;
 
 typedef struct drm_mga_indices {
-   	int idx;			/* buffer to queue */
+	int idx;		/* buffer to queue */
 	unsigned int start;
 	unsigned int end;
-	int discard;			/* client finished with buffer?  */
+	int discard;		/* client finished with buffer?  */
 } drm_mga_indices_t;
 
 typedef struct drm_mga_iload {
@@ -334,18 +331,18 @@ typedef struct _drm_mga_blit {
 	int src_pitch, dst_pitch;
 	int delta_sx, delta_sy;
 	int delta_dx, delta_dy;
-	int height, ydir;		/* flip image vertically */
+	int height, ydir;	/* flip image vertically */
 	int source_pitch, dest_pitch;
 } drm_mga_blit_t;
 
 /* 3.1: An ioctl to get parameters that aren't available to the 3d
- * client any other way.  
+ * client any other way.
  */
 #define MGA_PARAM_IRQ_NR            1
 
 typedef struct drm_mga_getparam {
 	int param;
-	void *value;
+	void __user *value;
 } drm_mga_getparam_t;
 
 #endif
diff --git a/sys/dev/drm/mga_drv.c b/sys/dev/drm/mga_drv.c
index 6de110a..05569a9 100644
--- a/sys/dev/drm/mga_drv.c
+++ b/sys/dev/drm/mga_drv.c
@@ -1,5 +1,6 @@
 /* mga_drv.c -- Matrox G200/G400 driver -*- linux-c -*-
- * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com */
+ * Created: Mon Dec 13 01:56:22 1999 by jhartmann@precisioninsight.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -31,29 +32,87 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/mga.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/mga_drm.h"
 #include "dev/drm/mga_drv.h"
+#include "dev/drm/drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t mga_pciidlist[] = {
+	mga_PCI_IDS
+};
+
+extern drm_ioctl_desc_t mga_ioctls[];
+extern int mga_max_ioctl;
+
+static void mga_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = sizeof(drm_mga_buf_priv_t);
+	/* XXX dev->prerelease = mga_driver_prerelease; */
+	dev->pretakedown = mga_driver_pretakedown;
+	dev->vblank_wait = mga_driver_vblank_wait;
+	dev->irq_preinstall = mga_driver_irq_preinstall;
+	dev->irq_postinstall = mga_driver_irq_postinstall;
+	dev->irq_uninstall = mga_driver_irq_uninstall;
+	dev->irq_handler = mga_driver_irq_handler;
+	dev->dma_ioctl = mga_dma_buffers;
+	dev->dma_quiescent = mga_driver_dma_quiescent;
 
-#include "dev/drm/drm_agpsupport.h"
-#include "dev/drm/drm_auth.h"
-#include "dev/drm/drm_bufs.h"
-#include "dev/drm/drm_context.h"
-#include "dev/drm/drm_dma.h"
-#include "dev/drm/drm_drawable.h"
-#include "dev/drm/drm_drv.h"
-#include "dev/drm/drm_fops.h"
-#include "dev/drm/drm_ioctl.h"
-#include "dev/drm/drm_irq.h"
-#include "dev/drm/drm_lock.h"
-#include "dev/drm/drm_memory.h"
-#include "dev/drm/drm_vm.h"
-#include "dev/drm/drm_sysctl.h"
+	dev->driver_ioctls = mga_ioctls;
+	dev->max_driver_ioctl = mga_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->require_agp = 1;
+	dev->use_mtrr = 1;
+	dev->use_dma = 1;
+	dev->use_irq = 1;
+	dev->use_vbl_irq = 1;
+}
 
 #ifdef __FreeBSD__
-DRIVER_MODULE(mga, pci, mga_driver, mga_devclass, 0, 0);
-#elif defined(__NetBSD__)
+static int
+mga_probe(device_t dev)
+{
+	return drm_probe(dev, mga_pciidlist);
+}
+
+static int
+mga_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	mga_configure(dev);
+	return drm_attach(nbdev, mga_pciidlist);
+}
+
+static device_method_t mga_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		mga_probe),
+	DEVMETHOD(device_attach,	mga_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t mga_driver = {
+	"drm",
+	mga_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(mga, pci, mga_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(mga, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 CFDRIVER_DECL(mga, DV_TTY, NULL);
 #endif
diff --git a/sys/dev/drm/mga_drv.h b/sys/dev/drm/mga_drv.h
index b4f333a..5bca56a 100644
--- a/sys/dev/drm/mga_drv.h
+++ b/sys/dev/drm/mga_drv.h
@@ -33,6 +33,19 @@
 #ifndef __MGA_DRV_H__
 #define __MGA_DRV_H__
 
+/* General customization:
+ */
+
+#define DRIVER_AUTHOR		"Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME		"mga"
+#define DRIVER_DESC		"Matrox G200/G400"
+#define DRIVER_DATE		"20021029"
+
+#define DRIVER_MAJOR		3
+#define DRIVER_MINOR		1
+#define DRIVER_PATCHLEVEL	0
+
 typedef struct drm_mga_primary_buffer {
 	u8 *start;
 	u8 *end;
@@ -51,14 +64,14 @@ typedef struct drm_mga_primary_buffer {
 } drm_mga_primary_buffer_t;
 
 typedef struct drm_mga_freelist {
-   	struct drm_mga_freelist *next;
-   	struct drm_mga_freelist *prev;
+	struct drm_mga_freelist *next;
+	struct drm_mga_freelist *prev;
 	drm_mga_age_t age;
-   	drm_buf_t *buf;
+	drm_buf_t *buf;
 } drm_mga_freelist_t;
 
 typedef struct {
-   	drm_mga_freelist_t *list_entry;
+	drm_mga_freelist_t *list_entry;
 	int discard;
 	int dispatched;
 } drm_mga_buf_priv_t;
@@ -67,8 +80,8 @@ typedef struct drm_mga_private {
 	drm_mga_primary_buffer_t prim;
 	drm_mga_sarea_t *sarea_priv;
 
-   	drm_mga_freelist_t *head;
-   	drm_mga_freelist_t *tail;
+	drm_mga_freelist_t *head;
+	drm_mga_freelist_t *tail;
 
 	unsigned int warp_pipe;
 	unsigned long warp_pipe_phys[MGA_MAX_WARP_PIPES];
@@ -102,35 +115,30 @@ typedef struct drm_mga_private {
 } drm_mga_private_t;
 
 				/* mga_dma.c */
-extern int mga_dma_init( DRM_IOCTL_ARGS );
-extern int mga_dma_flush( DRM_IOCTL_ARGS );
-extern int mga_dma_reset( DRM_IOCTL_ARGS );
-extern int mga_dma_buffers( DRM_IOCTL_ARGS );
-
-extern int mga_do_wait_for_idle( drm_mga_private_t *dev_priv );
-extern int mga_do_dma_idle( drm_mga_private_t *dev_priv );
-extern int mga_do_dma_reset( drm_mga_private_t *dev_priv );
-extern int mga_do_engine_reset( drm_mga_private_t *dev_priv );
-extern int mga_do_cleanup_dma( drm_device_t *dev );
-
-extern void mga_do_dma_flush( drm_mga_private_t *dev_priv );
-extern void mga_do_dma_wrap_start( drm_mga_private_t *dev_priv );
-extern void mga_do_dma_wrap_end( drm_mga_private_t *dev_priv );
-
-extern int mga_freelist_put( drm_device_t *dev, drm_buf_t *buf );
-
-				/* mga_state.c */
-extern int  mga_dma_clear( DRM_IOCTL_ARGS );
-extern int  mga_dma_swap( DRM_IOCTL_ARGS );
-extern int  mga_dma_vertex( DRM_IOCTL_ARGS );
-extern int  mga_dma_indices( DRM_IOCTL_ARGS );
-extern int  mga_dma_iload( DRM_IOCTL_ARGS );
-extern int  mga_dma_blit( DRM_IOCTL_ARGS );
-extern int  mga_getparam( DRM_IOCTL_ARGS );
+extern int mga_dma_init(DRM_IOCTL_ARGS);
+extern int mga_dma_flush(DRM_IOCTL_ARGS);
+extern int mga_dma_reset(DRM_IOCTL_ARGS);
+extern int mga_dma_buffers(DRM_IOCTL_ARGS);
+extern void mga_driver_pretakedown(drm_device_t * dev);
+extern int mga_driver_dma_quiescent(drm_device_t * dev);
+
+extern int mga_do_wait_for_idle(drm_mga_private_t * dev_priv);
+
+extern void mga_do_dma_flush(drm_mga_private_t * dev_priv);
+extern void mga_do_dma_wrap_start(drm_mga_private_t * dev_priv);
+extern void mga_do_dma_wrap_end(drm_mga_private_t * dev_priv);
+
+extern int mga_freelist_put(drm_device_t * dev, drm_buf_t * buf);
 
 				/* mga_warp.c */
-extern int mga_warp_install_microcode( drm_mga_private_t *dev_priv );
-extern int mga_warp_init( drm_mga_private_t *dev_priv );
+extern int mga_warp_install_microcode(drm_mga_private_t * dev_priv);
+extern int mga_warp_init(drm_mga_private_t * dev_priv);
+
+extern int mga_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
+extern irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS);
+extern void mga_driver_irq_preinstall(drm_device_t * dev);
+extern void mga_driver_irq_postinstall(drm_device_t * dev);
+extern void mga_driver_irq_uninstall(drm_device_t * dev);
 
 #define mga_flush_write_combine()	DRM_WRITEMEMORYBARRIER()
 
@@ -146,7 +154,7 @@ extern int mga_warp_init( drm_mga_private_t *dev_priv );
 #define MGA_WRITE( reg, val )	do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF( reg ) = val; } while (0)
 #define MGA_WRITE8( reg, val )  do { DRM_WRITEMEMORYBARRIER(); MGA_DEREF8( reg ) = val; } while (0)
 
-static inline u32 _MGA_READ(u32 *addr)
+static inline u32 _MGA_READ(u32 * addr)
 {
 	DRM_MEMORYBARRIER();
 	return *(volatile u32 *)addr;
@@ -168,8 +176,6 @@ static inline u32 _MGA_READ(u32 *addr)
 #define DMAREG1(r)	(u8)(((r - DWGREG1) >> 2) | 0x80)
 #define DMAREG(r)	(ISREG0(r) ? DMAREG0(r) : DMAREG1(r))
 
-
-
 /* ================================================================
  * Helper macross...
  */
@@ -211,7 +217,6 @@ do {									\
 	}								\
 } while (0)
 
-
 /* ================================================================
  * Primary DMA command stream
  */
@@ -296,7 +301,6 @@ do {									\
 	write += DMA_BLOCK_SIZE;					\
 } while (0)
 
-
 /* Buffer aging via primary DMA stream head pointer.
  */
 
@@ -323,7 +327,6 @@ do {									\
 	}								\
 } while (0)
 
-
 #define MGA_ENGINE_IDLE_MASK		(MGA_SOFTRAPEN |		\
 					 MGA_DWGENGSTS |		\
 					 MGA_ENDPRDMASTS)
@@ -332,8 +335,6 @@ do {									\
 
 #define MGA_DMA_DEBUG			0
 
-
-
 /* A reduced set of the mga registers.
  */
 #define MGA_CRTC_INDEX			0x1fd4
@@ -588,7 +589,6 @@ do {									\
 #	define MGA_G400_WR_MAGIC		(1 << 6)
 #	define MGA_G400_WR56_MAGIC		0x46480000	/* 12800.0f */
 
-
 #define MGA_ILOAD_ALIGN		64
 #define MGA_ILOAD_MASK		(MGA_ILOAD_ALIGN - 1)
 
@@ -623,10 +623,10 @@ do {									\
 
 /* Simple idle test.
  */
-static __inline__ int mga_is_idle( drm_mga_private_t *dev_priv )
+static __inline__ int mga_is_idle(drm_mga_private_t * dev_priv)
 {
-	u32 status = MGA_READ( MGA_STATUS ) & MGA_ENGINE_IDLE_MASK;
-	return ( status == MGA_ENDPRDMASTS );
+	u32 status = MGA_READ(MGA_STATUS) & MGA_ENGINE_IDLE_MASK;
+	return (status == MGA_ENDPRDMASTS);
 }
 
 #endif
diff --git a/sys/dev/drm/mga_irq.c b/sys/dev/drm/mga_irq.c
index 82a2705..2aaef9c 100644
--- a/sys/dev/drm/mga_irq.c
+++ b/sys/dev/drm/mga_irq.c
@@ -1,7 +1,7 @@
 /* mga_irq.c -- IRQ handling for radeon -*- linux-c -*- */
 /*-
  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
- * 
+ *
  * The Weather Channel (TM) funded Tungsten Graphics to develop the
  * initial release of the Radeon 8500 driver under the XFree86 license.
  * This notice must be preserved.
@@ -32,74 +32,72 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/mga.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/mga_drm.h"
 #include "dev/drm/mga_drv.h"
 
-irqreturn_t mga_irq_handler( DRM_IRQ_ARGS )
+irqreturn_t mga_driver_irq_handler(DRM_IRQ_ARGS)
 {
 	drm_device_t *dev = (drm_device_t *) arg;
-	drm_mga_private_t *dev_priv = 
-	   (drm_mga_private_t *)dev->dev_private;
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 	int status;
 
-	status = MGA_READ( MGA_STATUS );
-	
+	status = MGA_READ(MGA_STATUS);
+
 	/* VBLANK interrupt */
-	if ( status & MGA_VLINEPEN ) {
-		MGA_WRITE( MGA_ICLEAR, MGA_VLINEICLR );
+	if (status & MGA_VLINEPEN) {
+		MGA_WRITE(MGA_ICLEAR, MGA_VLINEICLR);
 		atomic_inc(&dev->vbl_received);
 		DRM_WAKEUP(&dev->vbl_queue);
-		DRM(vbl_send_signals)( dev );
+		drm_vbl_send_signals(dev);
 		return IRQ_HANDLED;
 	}
 	return IRQ_NONE;
 }
 
-int mga_vblank_wait(drm_device_t *dev, unsigned int *sequence)
+int mga_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
 {
 	unsigned int cur_vblank;
 	int ret = 0;
 
 	/* Assume that the user has missed the current sequence number
 	 * by about a day rather than she wants to wait for years
-	 * using vertical blanks... 
+	 * using vertical blanks...
 	 */
-	DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, 
-		     ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
-			 - *sequence ) <= (1<<23) ) );
+	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
+		    (((cur_vblank = atomic_read(&dev->vbl_received))
+		      - *sequence) <= (1 << 23)));
 
 	*sequence = cur_vblank;
 
 	return ret;
 }
 
-void mga_driver_irq_preinstall( drm_device_t *dev ) {
-  	drm_mga_private_t *dev_priv = 
-	   (drm_mga_private_t *)dev->dev_private;
+void mga_driver_irq_preinstall(drm_device_t * dev)
+{
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 
 	/* Disable *all* interrupts */
-      	MGA_WRITE( MGA_IEN, 0 );
+	MGA_WRITE(MGA_IEN, 0);
 	/* Clear bits if they're already high */
-   	MGA_WRITE( MGA_ICLEAR, ~0 );
+	MGA_WRITE(MGA_ICLEAR, ~0);
 }
 
-void mga_driver_irq_postinstall( drm_device_t *dev ) {
-  	drm_mga_private_t *dev_priv = 
-	   (drm_mga_private_t *)dev->dev_private;
+void mga_driver_irq_postinstall(drm_device_t * dev)
+{
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 
 	/* Turn on VBL interrupt */
-   	MGA_WRITE( MGA_IEN, MGA_VLINEIEN );
+	MGA_WRITE(MGA_IEN, MGA_VLINEIEN);
 }
 
-void mga_driver_irq_uninstall( drm_device_t *dev ) {
-  	drm_mga_private_t *dev_priv = 
-	   (drm_mga_private_t *)dev->dev_private;
+void mga_driver_irq_uninstall(drm_device_t * dev)
+{
+	drm_mga_private_t *dev_priv = (drm_mga_private_t *) dev->dev_private;
 	if (!dev_priv)
 		return;
 
 	/* Disable *all* interrupts */
-	MGA_WRITE( MGA_IEN, 0 );
+	MGA_WRITE(MGA_IEN, 0);
 }
diff --git a/sys/dev/drm/mga_state.c b/sys/dev/drm/mga_state.c
index 8e72f22..136ff16 100644
--- a/sys/dev/drm/mga_state.c
+++ b/sys/dev/drm/mga_state.c
@@ -30,138 +30,135 @@
  *
  * Rewritten by:
  *    Gareth Hughes <gareth@valinux.com>
+ * $FreeBSD$
  *
+ * $FreeBSD$
  */
 
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "dev/drm/mga.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/mga_drm.h"
 #include "dev/drm/mga_drv.h"
 
-
 /* ================================================================
  * DMA hardware state programming functions
  */
 
-static void mga_emit_clip_rect( drm_mga_private_t *dev_priv,
-				drm_clip_rect_t *box )
+static void mga_emit_clip_rect(drm_mga_private_t * dev_priv,
+			       drm_clip_rect_t * box)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
 	unsigned int pitch = dev_priv->front_pitch;
 	DMA_LOCALS;
 
-	BEGIN_DMA( 2 );
+	BEGIN_DMA(2);
 
 	/* Force reset of DWGCTL on G400 (eliminates clip disable bit).
 	 */
-	if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {
-		DMA_BLOCK( MGA_DWGCTL,		ctx->dwgctl,
-			   MGA_LEN + MGA_EXEC,	0x80000000,
-			   MGA_DWGCTL,		ctx->dwgctl,
-			   MGA_LEN + MGA_EXEC,	0x80000000 );
+	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
+		DMA_BLOCK(MGA_DWGCTL, ctx->dwgctl,
+			  MGA_LEN + MGA_EXEC, 0x80000000,
+			  MGA_DWGCTL, ctx->dwgctl,
+			  MGA_LEN + MGA_EXEC, 0x80000000);
 	}
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_CXBNDRY,	(box->x2 << 16) | box->x1,
-		   MGA_YTOP,	box->y1 * pitch,
-		   MGA_YBOT,	box->y2 * pitch );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_CXBNDRY, ((box->x2 - 1) << 16) | box->x1,
+		  MGA_YTOP, box->y1 * pitch,
+		  MGA_YBOT, (box->y2 - 1) * pitch);
 
 	ADVANCE_DMA();
 }
 
-static __inline__ void mga_g200_emit_context( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g200_emit_context(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
 	DMA_LOCALS;
 
-	BEGIN_DMA( 3 );
+	BEGIN_DMA(3);
 
-	DMA_BLOCK( MGA_DSTORG,		ctx->dstorg,
-		   MGA_MACCESS,		ctx->maccess,
-		   MGA_PLNWT,		ctx->plnwt,
-		   MGA_DWGCTL,		ctx->dwgctl );
+	DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
+		  MGA_MACCESS, ctx->maccess,
+		  MGA_PLNWT, ctx->plnwt,
+		  MGA_DWGCTL, ctx->dwgctl);
 
-	DMA_BLOCK( MGA_ALPHACTRL,	ctx->alphactrl,
-		   MGA_FOGCOL,		ctx->fogcolor,
-		   MGA_WFLAG,		ctx->wflag,
-		   MGA_ZORG,		dev_priv->depth_offset );
+	DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
+		  MGA_FOGCOL, ctx->fogcolor,
+		  MGA_WFLAG, ctx->wflag,
+		  MGA_ZORG, dev_priv->depth_offset);
 
-	DMA_BLOCK( MGA_FCOL,		ctx->fcol,
-		   MGA_DMAPAD,		0x00000000,
-		   MGA_DMAPAD,		0x00000000,
-		   MGA_DMAPAD,		0x00000000 );
+	DMA_BLOCK(MGA_FCOL, ctx->fcol,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000);
 
 	ADVANCE_DMA();
 }
 
-static __inline__ void mga_g400_emit_context( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g400_emit_context(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
 	DMA_LOCALS;
 
-	BEGIN_DMA( 4 );
+	BEGIN_DMA(4);
 
-	DMA_BLOCK( MGA_DSTORG,		ctx->dstorg,
-		   MGA_MACCESS,		ctx->maccess,
-		   MGA_PLNWT,		ctx->plnwt,
-		   MGA_DWGCTL,		ctx->dwgctl );
+	DMA_BLOCK(MGA_DSTORG, ctx->dstorg,
+		  MGA_MACCESS, ctx->maccess,
+		  MGA_PLNWT, ctx->plnwt,
+		  MGA_DWGCTL, ctx->dwgctl);
 
-	DMA_BLOCK( MGA_ALPHACTRL,	ctx->alphactrl,
-		   MGA_FOGCOL,		ctx->fogcolor,
-		   MGA_WFLAG,		ctx->wflag,
-		   MGA_ZORG,		dev_priv->depth_offset );
+	DMA_BLOCK(MGA_ALPHACTRL, ctx->alphactrl,
+		  MGA_FOGCOL, ctx->fogcolor,
+		  MGA_WFLAG, ctx->wflag,
+		  MGA_ZORG, dev_priv->depth_offset);
 
-	DMA_BLOCK( MGA_WFLAG1,		ctx->wflag,
-		   MGA_TDUALSTAGE0,	ctx->tdualstage0,
-		   MGA_TDUALSTAGE1,	ctx->tdualstage1,
-		   MGA_FCOL,		ctx->fcol );
+	DMA_BLOCK(MGA_WFLAG1, ctx->wflag,
+		  MGA_TDUALSTAGE0, ctx->tdualstage0,
+		  MGA_TDUALSTAGE1, ctx->tdualstage1,
+		  MGA_FCOL, ctx->fcol);
 
-	DMA_BLOCK( MGA_STENCIL,		ctx->stencil,
-		   MGA_STENCILCTL,	ctx->stencilctl,
-		   MGA_DMAPAD,		0x00000000,
-		   MGA_DMAPAD,		0x00000000 );
+	DMA_BLOCK(MGA_STENCIL, ctx->stencil,
+		  MGA_STENCILCTL, ctx->stencilctl,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000);
 
 	ADVANCE_DMA();
 }
 
-static __inline__ void mga_g200_emit_tex0( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g200_emit_tex0(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
 	DMA_LOCALS;
 
-	BEGIN_DMA( 4 );
+	BEGIN_DMA(4);
 
-	DMA_BLOCK( MGA_TEXCTL2,		tex->texctl2,
-		   MGA_TEXCTL,		tex->texctl,
-		   MGA_TEXFILTER,	tex->texfilter,
-		   MGA_TEXBORDERCOL,	tex->texbordercol );
+	DMA_BLOCK(MGA_TEXCTL2, tex->texctl2,
+		  MGA_TEXCTL, tex->texctl,
+		  MGA_TEXFILTER, tex->texfilter,
+		  MGA_TEXBORDERCOL, tex->texbordercol);
 
-	DMA_BLOCK( MGA_TEXORG,		tex->texorg,
-		   MGA_TEXORG1,		tex->texorg1,
-		   MGA_TEXORG2,		tex->texorg2,
-		   MGA_TEXORG3,		tex->texorg3 );
+	DMA_BLOCK(MGA_TEXORG, tex->texorg,
+		  MGA_TEXORG1, tex->texorg1,
+		  MGA_TEXORG2, tex->texorg2,
+		  MGA_TEXORG3, tex->texorg3);
 
-	DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,
-		   MGA_TEXWIDTH,	tex->texwidth,
-		   MGA_TEXHEIGHT,	tex->texheight,
-		   MGA_WR24,		tex->texwidth );
+	DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
+		  MGA_TEXWIDTH, tex->texwidth,
+		  MGA_TEXHEIGHT, tex->texheight,
+		  MGA_WR24, tex->texwidth);
 
-	DMA_BLOCK( MGA_WR34,		tex->texheight,
-		   MGA_TEXTRANS,	0x0000ffff,
-		   MGA_TEXTRANSHIGH,	0x0000ffff,
-		   MGA_DMAPAD,		0x00000000 );
+	DMA_BLOCK(MGA_WR34, tex->texheight,
+		  MGA_TEXTRANS, 0x0000ffff,
+		  MGA_TEXTRANSHIGH, 0x0000ffff,
+		  MGA_DMAPAD, 0x00000000);
 
 	ADVANCE_DMA();
 }
 
-static /*__inline__*/ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g400_emit_tex0(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[0];
@@ -170,42 +167,42 @@ static /*__inline__*/ void mga_g400_emit_tex0( drm_mga_private_t *dev_priv )
 /*  	printk("mga_g400_emit_tex0 %x %x %x\n", tex->texorg, */
 /*  	       tex->texctl, tex->texctl2); */
 
-	BEGIN_DMA( 6 );
+	BEGIN_DMA(6);
 
-	DMA_BLOCK( MGA_TEXCTL2,		tex->texctl2 | MGA_G400_TC2_MAGIC,
-		   MGA_TEXCTL,		tex->texctl,
-		   MGA_TEXFILTER,	tex->texfilter,
-		   MGA_TEXBORDERCOL,	tex->texbordercol );
+	DMA_BLOCK(MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC,
+		  MGA_TEXCTL, tex->texctl,
+		  MGA_TEXFILTER, tex->texfilter,
+		  MGA_TEXBORDERCOL, tex->texbordercol);
 
-	DMA_BLOCK( MGA_TEXORG,		tex->texorg,
-		   MGA_TEXORG1,		tex->texorg1,
-		   MGA_TEXORG2,		tex->texorg2,
-		   MGA_TEXORG3,		tex->texorg3 );
+	DMA_BLOCK(MGA_TEXORG, tex->texorg,
+		  MGA_TEXORG1, tex->texorg1,
+		  MGA_TEXORG2, tex->texorg2,
+		  MGA_TEXORG3, tex->texorg3);
 
-	DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,
-		   MGA_TEXWIDTH,	tex->texwidth,
-		   MGA_TEXHEIGHT,	tex->texheight,
-		   MGA_WR49,		0x00000000 );
+	DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
+		  MGA_TEXWIDTH, tex->texwidth,
+		  MGA_TEXHEIGHT, tex->texheight,
+		  MGA_WR49, 0x00000000);
 
-	DMA_BLOCK( MGA_WR57,		0x00000000,
-		   MGA_WR53,		0x00000000,
-		   MGA_WR61,		0x00000000,
-		   MGA_WR52,		MGA_G400_WR_MAGIC );
+	DMA_BLOCK(MGA_WR57, 0x00000000,
+		  MGA_WR53, 0x00000000,
+		  MGA_WR61, 0x00000000,
+		  MGA_WR52, MGA_G400_WR_MAGIC);
 
-	DMA_BLOCK( MGA_WR60,		MGA_G400_WR_MAGIC,
-		   MGA_WR54,		tex->texwidth | MGA_G400_WR_MAGIC,
-		   MGA_WR62,		tex->texheight | MGA_G400_WR_MAGIC,
-		   MGA_DMAPAD,		0x00000000 );
+	DMA_BLOCK(MGA_WR60, MGA_G400_WR_MAGIC,
+		  MGA_WR54, tex->texwidth | MGA_G400_WR_MAGIC,
+		  MGA_WR62, tex->texheight | MGA_G400_WR_MAGIC,
+		  MGA_DMAPAD, 0x00000000);
 
-	DMA_BLOCK( MGA_DMAPAD,		0x00000000,
-		   MGA_DMAPAD,		0x00000000,
-		   MGA_TEXTRANS,	0x0000ffff,
-		   MGA_TEXTRANSHIGH,	0x0000ffff );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_TEXTRANS, 0x0000ffff,
+		  MGA_TEXTRANSHIGH, 0x0000ffff);
 
 	ADVANCE_DMA();
 }
 
-static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g400_emit_tex1(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[1];
@@ -214,69 +211,68 @@ static __inline__ void mga_g400_emit_tex1( drm_mga_private_t *dev_priv )
 /*  	printk("mga_g400_emit_tex1 %x %x %x\n", tex->texorg,  */
 /*  	       tex->texctl, tex->texctl2); */
 
-	BEGIN_DMA( 5 );
+	BEGIN_DMA(5);
 
-	DMA_BLOCK( MGA_TEXCTL2,		(tex->texctl2 |
-					 MGA_MAP1_ENABLE |
-					 MGA_G400_TC2_MAGIC),
-		   MGA_TEXCTL,		tex->texctl,
-		   MGA_TEXFILTER,	tex->texfilter,
-		   MGA_TEXBORDERCOL,	tex->texbordercol );
+	DMA_BLOCK(MGA_TEXCTL2, (tex->texctl2 |
+				MGA_MAP1_ENABLE |
+				MGA_G400_TC2_MAGIC),
+		  MGA_TEXCTL, tex->texctl,
+		  MGA_TEXFILTER, tex->texfilter,
+		  MGA_TEXBORDERCOL, tex->texbordercol);
 
-	DMA_BLOCK( MGA_TEXORG,		tex->texorg,
-		   MGA_TEXORG1,		tex->texorg1,
-		   MGA_TEXORG2,		tex->texorg2,
-		   MGA_TEXORG3,		tex->texorg3 );
+	DMA_BLOCK(MGA_TEXORG, tex->texorg,
+		  MGA_TEXORG1, tex->texorg1,
+		  MGA_TEXORG2, tex->texorg2,
+		  MGA_TEXORG3, tex->texorg3);
 
-	DMA_BLOCK( MGA_TEXORG4,		tex->texorg4,
-		   MGA_TEXWIDTH,	tex->texwidth,
-		   MGA_TEXHEIGHT,	tex->texheight,
-		   MGA_WR49,		0x00000000 );
+	DMA_BLOCK(MGA_TEXORG4, tex->texorg4,
+		  MGA_TEXWIDTH, tex->texwidth,
+		  MGA_TEXHEIGHT, tex->texheight,
+		  MGA_WR49, 0x00000000);
 
-	DMA_BLOCK( MGA_WR57,		0x00000000,
-		   MGA_WR53,		0x00000000,
-		   MGA_WR61,		0x00000000,
-		   MGA_WR52,		tex->texwidth | MGA_G400_WR_MAGIC );
+	DMA_BLOCK(MGA_WR57, 0x00000000,
+		  MGA_WR53, 0x00000000,
+		  MGA_WR61, 0x00000000,
+		  MGA_WR52, tex->texwidth | MGA_G400_WR_MAGIC);
 
-	DMA_BLOCK( MGA_WR60,		tex->texheight | MGA_G400_WR_MAGIC,
-		   MGA_TEXTRANS,	0x0000ffff,
-		   MGA_TEXTRANSHIGH,	0x0000ffff,
-		   MGA_TEXCTL2,		tex->texctl2 | MGA_G400_TC2_MAGIC );
+	DMA_BLOCK(MGA_WR60, tex->texheight | MGA_G400_WR_MAGIC,
+		  MGA_TEXTRANS, 0x0000ffff,
+		  MGA_TEXTRANSHIGH, 0x0000ffff,
+		  MGA_TEXCTL2, tex->texctl2 | MGA_G400_TC2_MAGIC);
 
 	ADVANCE_DMA();
 }
 
-static __inline__ void mga_g200_emit_pipe( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g200_emit_pipe(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->warp_pipe;
 	DMA_LOCALS;
 
-	BEGIN_DMA( 3 );
+	BEGIN_DMA(3);
 
-	DMA_BLOCK( MGA_WIADDR,	MGA_WMODE_SUSPEND,
-		   MGA_WVRTXSZ,	0x00000007,
-		   MGA_WFLAG,	0x00000000,
-		   MGA_WR24,	0x00000000 );
+	DMA_BLOCK(MGA_WIADDR, MGA_WMODE_SUSPEND,
+		  MGA_WVRTXSZ, 0x00000007,
+		  MGA_WFLAG, 0x00000000,
+		  MGA_WR24, 0x00000000);
 
-	DMA_BLOCK( MGA_WR25,	0x00000100,
-		   MGA_WR34,	0x00000000,
-		   MGA_WR42,	0x0000ffff,
-		   MGA_WR60,	0x0000ffff );
+	DMA_BLOCK(MGA_WR25, 0x00000100,
+		  MGA_WR34, 0x00000000,
+		  MGA_WR42, 0x0000ffff,
+		  MGA_WR60, 0x0000ffff);
 
 	/* Padding required to to hardware bug.
 	 */
-	DMA_BLOCK( MGA_DMAPAD,	0xffffffff,
-		   MGA_DMAPAD,	0xffffffff,
-		   MGA_DMAPAD,	0xffffffff,
-		   MGA_WIADDR,	(dev_priv->warp_pipe_phys[pipe] |
-				 MGA_WMODE_START |
-				 MGA_WAGP_ENABLE) );
+	DMA_BLOCK(MGA_DMAPAD, 0xffffffff,
+		  MGA_DMAPAD, 0xffffffff,
+		  MGA_DMAPAD, 0xffffffff,
+		  MGA_WIADDR, (dev_priv->warp_pipe_phys[pipe] |
+			       MGA_WMODE_START | MGA_WAGP_ENABLE));
 
 	ADVANCE_DMA();
 }
 
-static /*__inline__*/ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
+static __inline__ void mga_g400_emit_pipe(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int pipe = sarea_priv->warp_pipe;
@@ -284,145 +280,143 @@ static /*__inline__*/ void mga_g400_emit_pipe( drm_mga_private_t *dev_priv )
 
 /*  	printk("mga_g400_emit_pipe %x\n", pipe); */
 
-	BEGIN_DMA( 10 );
+	BEGIN_DMA(10);
 
-	DMA_BLOCK( MGA_WIADDR2,	MGA_WMODE_SUSPEND,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000 );
+	DMA_BLOCK(MGA_WIADDR2, MGA_WMODE_SUSPEND,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000);
 
-	if ( pipe & MGA_T2 ) {
-		DMA_BLOCK( MGA_WVRTXSZ,		0x00001e09,
-			   MGA_DMAPAD,		0x00000000,
-			   MGA_DMAPAD,		0x00000000,
-			   MGA_DMAPAD,		0x00000000 );
+	if (pipe & MGA_T2) {
+		DMA_BLOCK(MGA_WVRTXSZ, 0x00001e09,
+			  MGA_DMAPAD, 0x00000000,
+			  MGA_DMAPAD, 0x00000000,
+			  MGA_DMAPAD, 0x00000000);
 
-		DMA_BLOCK( MGA_WACCEPTSEQ,	0x00000000,
-			   MGA_WACCEPTSEQ,	0x00000000,
-			   MGA_WACCEPTSEQ,	0x00000000,
-			   MGA_WACCEPTSEQ,	0x1e000000 );
+		DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,
+			  MGA_WACCEPTSEQ, 0x00000000,
+			  MGA_WACCEPTSEQ, 0x00000000,
+			  MGA_WACCEPTSEQ, 0x1e000000);
 	} else {
-		if ( dev_priv->warp_pipe & MGA_T2 ) {
+		if (dev_priv->warp_pipe & MGA_T2) {
 			/* Flush the WARP pipe */
-			DMA_BLOCK( MGA_YDST,		0x00000000,
-				   MGA_FXLEFT,		0x00000000,
-				   MGA_FXRIGHT,		0x00000001,
-				   MGA_DWGCTL,		MGA_DWGCTL_FLUSH );
-
-			DMA_BLOCK( MGA_LEN + MGA_EXEC,	0x00000001,
-				   MGA_DWGSYNC,		0x00007000,
-				   MGA_TEXCTL2,		MGA_G400_TC2_MAGIC,
-				   MGA_LEN + MGA_EXEC,	0x00000000 );
-
-			DMA_BLOCK( MGA_TEXCTL2,		(MGA_DUALTEX |
-							 MGA_G400_TC2_MAGIC),
-				   MGA_LEN + MGA_EXEC,	0x00000000,
-				   MGA_TEXCTL2,		MGA_G400_TC2_MAGIC,
-				   MGA_DMAPAD,		0x00000000 );
+			DMA_BLOCK(MGA_YDST, 0x00000000,
+				  MGA_FXLEFT, 0x00000000,
+				  MGA_FXRIGHT, 0x00000001,
+				  MGA_DWGCTL, MGA_DWGCTL_FLUSH);
+
+			DMA_BLOCK(MGA_LEN + MGA_EXEC, 0x00000001,
+				  MGA_DWGSYNC, 0x00007000,
+				  MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
+				  MGA_LEN + MGA_EXEC, 0x00000000);
+
+			DMA_BLOCK(MGA_TEXCTL2, (MGA_DUALTEX |
+						MGA_G400_TC2_MAGIC),
+				  MGA_LEN + MGA_EXEC, 0x00000000,
+				  MGA_TEXCTL2, MGA_G400_TC2_MAGIC,
+				  MGA_DMAPAD, 0x00000000);
 		}
 
-		DMA_BLOCK( MGA_WVRTXSZ,		0x00001807,
-			   MGA_DMAPAD,		0x00000000,
-			   MGA_DMAPAD,		0x00000000,
-			   MGA_DMAPAD,		0x00000000 );
+		DMA_BLOCK(MGA_WVRTXSZ, 0x00001807,
+			  MGA_DMAPAD, 0x00000000,
+			  MGA_DMAPAD, 0x00000000,
+			  MGA_DMAPAD, 0x00000000);
 
-		DMA_BLOCK( MGA_WACCEPTSEQ,	0x00000000,
-			   MGA_WACCEPTSEQ,	0x00000000,
-			   MGA_WACCEPTSEQ,	0x00000000,
-			   MGA_WACCEPTSEQ,	0x18000000 );
+		DMA_BLOCK(MGA_WACCEPTSEQ, 0x00000000,
+			  MGA_WACCEPTSEQ, 0x00000000,
+			  MGA_WACCEPTSEQ, 0x00000000,
+			  MGA_WACCEPTSEQ, 0x18000000);
 	}
 
-	DMA_BLOCK( MGA_WFLAG,	0x00000000,
-		   MGA_WFLAG1,	0x00000000,
-		   MGA_WR56,	MGA_G400_WR56_MAGIC,
-		   MGA_DMAPAD,	0x00000000 );
+	DMA_BLOCK(MGA_WFLAG, 0x00000000,
+		  MGA_WFLAG1, 0x00000000,
+		  MGA_WR56, MGA_G400_WR56_MAGIC,
+		  MGA_DMAPAD, 0x00000000);
 
-	DMA_BLOCK( MGA_WR49,	0x00000000,		/* tex0              */
-		   MGA_WR57,	0x00000000,		/* tex0              */
-		   MGA_WR53,	0x00000000,		/* tex1              */
-		   MGA_WR61,	0x00000000 );		/* tex1              */
+	DMA_BLOCK(MGA_WR49, 0x00000000,	/* tex0              */
+		  MGA_WR57, 0x00000000,	/* tex0              */
+		  MGA_WR53, 0x00000000,	/* tex1              */
+		  MGA_WR61, 0x00000000);	/* tex1              */
 
-	DMA_BLOCK( MGA_WR54,	MGA_G400_WR_MAGIC,	/* tex0 width        */
-		   MGA_WR62,	MGA_G400_WR_MAGIC,	/* tex0 height       */
-		   MGA_WR52,	MGA_G400_WR_MAGIC,	/* tex1 width        */
-		   MGA_WR60,	MGA_G400_WR_MAGIC );	/* tex1 height       */
+	DMA_BLOCK(MGA_WR54, MGA_G400_WR_MAGIC,	/* tex0 width        */
+		  MGA_WR62, MGA_G400_WR_MAGIC,	/* tex0 height       */
+		  MGA_WR52, MGA_G400_WR_MAGIC,	/* tex1 width        */
+		  MGA_WR60, MGA_G400_WR_MAGIC);	/* tex1 height       */
 
 	/* Padding required to to hardware bug */
-	DMA_BLOCK( MGA_DMAPAD,	0xffffffff,
-		   MGA_DMAPAD,	0xffffffff,
-		   MGA_DMAPAD,	0xffffffff,
-		   MGA_WIADDR2,	(dev_priv->warp_pipe_phys[pipe] |
-				 MGA_WMODE_START |
-				 MGA_WAGP_ENABLE) );
+	DMA_BLOCK(MGA_DMAPAD, 0xffffffff,
+		  MGA_DMAPAD, 0xffffffff,
+		  MGA_DMAPAD, 0xffffffff,
+		  MGA_WIADDR2, (dev_priv->warp_pipe_phys[pipe] |
+				MGA_WMODE_START | MGA_WAGP_ENABLE));
 
 	ADVANCE_DMA();
 }
 
-static void mga_g200_emit_state( drm_mga_private_t *dev_priv )
+static void mga_g200_emit_state(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
 
-	if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) {
-		mga_g200_emit_pipe( dev_priv );
+	if (sarea_priv->warp_pipe != dev_priv->warp_pipe) {
+		mga_g200_emit_pipe(dev_priv);
 		dev_priv->warp_pipe = sarea_priv->warp_pipe;
 	}
 
-	if ( dirty & MGA_UPLOAD_CONTEXT ) {
-		mga_g200_emit_context( dev_priv );
+	if (dirty & MGA_UPLOAD_CONTEXT) {
+		mga_g200_emit_context(dev_priv);
 		sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
 	}
 
-	if ( dirty & MGA_UPLOAD_TEX0 ) {
-		mga_g200_emit_tex0( dev_priv );
+	if (dirty & MGA_UPLOAD_TEX0) {
+		mga_g200_emit_tex0(dev_priv);
 		sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
 	}
 }
 
-static void mga_g400_emit_state( drm_mga_private_t *dev_priv )
+static void mga_g400_emit_state(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
 	int multitex = sarea_priv->warp_pipe & MGA_T2;
 
-	if ( sarea_priv->warp_pipe != dev_priv->warp_pipe ) {
-		mga_g400_emit_pipe( dev_priv );
+	if (sarea_priv->warp_pipe != dev_priv->warp_pipe) {
+		mga_g400_emit_pipe(dev_priv);
 		dev_priv->warp_pipe = sarea_priv->warp_pipe;
 	}
 
-	if ( dirty & MGA_UPLOAD_CONTEXT ) {
-		mga_g400_emit_context( dev_priv );
+	if (dirty & MGA_UPLOAD_CONTEXT) {
+		mga_g400_emit_context(dev_priv);
 		sarea_priv->dirty &= ~MGA_UPLOAD_CONTEXT;
 	}
 
-	if ( dirty & MGA_UPLOAD_TEX0 ) {
-		mga_g400_emit_tex0( dev_priv );
+	if (dirty & MGA_UPLOAD_TEX0) {
+		mga_g400_emit_tex0(dev_priv);
 		sarea_priv->dirty &= ~MGA_UPLOAD_TEX0;
 	}
 
-	if ( (dirty & MGA_UPLOAD_TEX1) && multitex ) {
-		mga_g400_emit_tex1( dev_priv );
+	if ((dirty & MGA_UPLOAD_TEX1) && multitex) {
+		mga_g400_emit_tex1(dev_priv);
 		sarea_priv->dirty &= ~MGA_UPLOAD_TEX1;
 	}
 }
 
-
 /* ================================================================
  * SAREA state verification
  */
 
 /* Disallow all write destinations except the front and backbuffer.
  */
-static int mga_verify_context( drm_mga_private_t *dev_priv )
+static int mga_verify_context(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_context_regs_t *ctx = &sarea_priv->context_state;
 
-	if ( ctx->dstorg != dev_priv->front_offset &&
-	     ctx->dstorg != dev_priv->back_offset ) {
-		DRM_ERROR( "*** bad DSTORG: %x (front %x, back %x)\n\n",
-			   ctx->dstorg, dev_priv->front_offset,
-			   dev_priv->back_offset );
+	if (ctx->dstorg != dev_priv->front_offset &&
+	    ctx->dstorg != dev_priv->back_offset) {
+		DRM_ERROR("*** bad DSTORG: %x (front %x, back %x)\n\n",
+			  ctx->dstorg, dev_priv->front_offset,
+			  dev_priv->back_offset);
 		ctx->dstorg = 0;
 		return DRM_ERR(EINVAL);
 	}
@@ -432,7 +426,7 @@ static int mga_verify_context( drm_mga_private_t *dev_priv )
 
 /* Disallow texture reads from PCI space.
  */
-static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
+static int mga_verify_tex(drm_mga_private_t * dev_priv, int unit)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_texture_regs_t *tex = &sarea_priv->tex_state[unit];
@@ -440,9 +434,8 @@ static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
 
 	org = tex->texorg & (MGA_TEXORGMAP_MASK | MGA_TEXORGACC_MASK);
 
-	if ( org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI) ) {
-		DRM_ERROR( "*** bad TEXORG: 0x%x, unit %d\n",
-			   tex->texorg, unit );
+	if (org == (MGA_TEXORGMAP_SYSMEM | MGA_TEXORGACC_PCI)) {
+		DRM_ERROR("*** bad TEXORG: 0x%x, unit %d\n", tex->texorg, unit);
 		tex->texorg = 0;
 		return DRM_ERR(EINVAL);
 	}
@@ -450,73 +443,70 @@ static int mga_verify_tex( drm_mga_private_t *dev_priv, int unit )
 	return 0;
 }
 
-static int mga_verify_state( drm_mga_private_t *dev_priv )
+static int mga_verify_state(drm_mga_private_t * dev_priv)
 {
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
 	int ret = 0;
 
-	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
-	if ( dirty & MGA_UPLOAD_CONTEXT )
-		ret |= mga_verify_context( dev_priv );
+	if (dirty & MGA_UPLOAD_CONTEXT)
+		ret |= mga_verify_context(dev_priv);
 
-	if ( dirty & MGA_UPLOAD_TEX0 )
-		ret |= mga_verify_tex( dev_priv, 0 );
+	if (dirty & MGA_UPLOAD_TEX0)
+		ret |= mga_verify_tex(dev_priv, 0);
 
-	if ( dev_priv->chipset == MGA_CARD_TYPE_G400 ) {
-		if ( dirty & MGA_UPLOAD_TEX1 )
-			ret |= mga_verify_tex( dev_priv, 1 );
+	if (dev_priv->chipset == MGA_CARD_TYPE_G400) {
+		if (dirty & MGA_UPLOAD_TEX1)
+			ret |= mga_verify_tex(dev_priv, 1);
 
-		if ( dirty & MGA_UPLOAD_PIPE )
-			ret |= ( sarea_priv->warp_pipe > MGA_MAX_G400_PIPES );
+		if (dirty & MGA_UPLOAD_PIPE)
+			ret |= (sarea_priv->warp_pipe > MGA_MAX_G400_PIPES);
 	} else {
-		if ( dirty & MGA_UPLOAD_PIPE )
-			ret |= ( sarea_priv->warp_pipe > MGA_MAX_G200_PIPES );
+		if (dirty & MGA_UPLOAD_PIPE)
+			ret |= (sarea_priv->warp_pipe > MGA_MAX_G200_PIPES);
 	}
 
-	return ( ret == 0 );
+	return (ret == 0);
 }
 
-static int mga_verify_iload( drm_mga_private_t *dev_priv,
-			     unsigned int dstorg, unsigned int length )
+static int mga_verify_iload(drm_mga_private_t * dev_priv,
+			    unsigned int dstorg, unsigned int length)
 {
-	if ( dstorg < dev_priv->texture_offset ||
-	     dstorg + length > (dev_priv->texture_offset +
-				dev_priv->texture_size) ) {
-		DRM_ERROR( "*** bad iload DSTORG: 0x%x\n", dstorg );
+	if (dstorg < dev_priv->texture_offset ||
+	    dstorg + length > (dev_priv->texture_offset +
+			       dev_priv->texture_size)) {
+		DRM_ERROR("*** bad iload DSTORG: 0x%x\n", dstorg);
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( length & MGA_ILOAD_MASK ) {
-		DRM_ERROR( "*** bad iload length: 0x%x\n",
-			   length & MGA_ILOAD_MASK );
+	if (length & MGA_ILOAD_MASK) {
+		DRM_ERROR("*** bad iload length: 0x%x\n",
+			  length & MGA_ILOAD_MASK);
 		return DRM_ERR(EINVAL);
 	}
 
 	return 0;
 }
 
-static int mga_verify_blit( drm_mga_private_t *dev_priv,
-			    unsigned int srcorg, unsigned int dstorg )
+static int mga_verify_blit(drm_mga_private_t * dev_priv,
+			   unsigned int srcorg, unsigned int dstorg)
 {
-	if ( (srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
-	     (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ) {
-		DRM_ERROR( "*** bad blit: src=0x%x dst=0x%x\n",
-			   srcorg, dstorg );
+	if ((srcorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM) ||
+	    (dstorg & 0x3) == (MGA_SRCACC_PCI | MGA_SRCMAP_SYSMEM)) {
+		DRM_ERROR("*** bad blit: src=0x%x dst=0x%x\n", srcorg, dstorg);
 		return DRM_ERR(EINVAL);
 	}
 	return 0;
 }
 
-
 /* ================================================================
  *
  */
 
-static void mga_dma_dispatch_clear( drm_device_t *dev,
-				    drm_mga_clear_t *clear )
+static void mga_dma_dispatch_clear(drm_device_t * dev, drm_mga_clear_t * clear)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -525,92 +515,88 @@ static void mga_dma_dispatch_clear( drm_device_t *dev,
 	int nbox = sarea_priv->nbox;
 	int i;
 	DMA_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	BEGIN_DMA( 1 );
+	BEGIN_DMA(1);
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DWGSYNC,	0x00007100,
-		   MGA_DWGSYNC,	0x00007000 );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DWGSYNC, 0x00007100,
+		  MGA_DWGSYNC, 0x00007000);
 
 	ADVANCE_DMA();
 
-	for ( i = 0 ; i < nbox ; i++ ) {
+	for (i = 0; i < nbox; i++) {
 		drm_clip_rect_t *box = &pbox[i];
 		u32 height = box->y2 - box->y1;
 
-		DRM_DEBUG( "   from=%d,%d to=%d,%d\n",
-			   box->x1, box->y1, box->x2, box->y2 );
+		DRM_DEBUG("   from=%d,%d to=%d,%d\n",
+			  box->x1, box->y1, box->x2, box->y2);
 
-		if ( clear->flags & MGA_FRONT ) {
-			BEGIN_DMA( 2 );
+		if (clear->flags & MGA_FRONT) {
+			BEGIN_DMA(2);
 
-			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-				   MGA_PLNWT,	clear->color_mask,
-				   MGA_YDSTLEN, (box->y1 << 16) | height,
-				   MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_PLNWT, clear->color_mask,
+				  MGA_YDSTLEN, (box->y1 << 16) | height,
+				  MGA_FXBNDRY, (box->x2 << 16) | box->x1);
 
-			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-				   MGA_FCOL,	clear->clear_color,
-				   MGA_DSTORG,	dev_priv->front_offset,
-				   MGA_DWGCTL + MGA_EXEC,
-						dev_priv->clear_cmd );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_FCOL, clear->clear_color,
+				  MGA_DSTORG, dev_priv->front_offset,
+				  MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
 
 			ADVANCE_DMA();
 		}
 
+		if (clear->flags & MGA_BACK) {
+			BEGIN_DMA(2);
 
-		if ( clear->flags & MGA_BACK ) {
-			BEGIN_DMA( 2 );
-
-			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-				   MGA_PLNWT,	clear->color_mask,
-				   MGA_YDSTLEN, (box->y1 << 16) | height,
-				   MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_PLNWT, clear->color_mask,
+				  MGA_YDSTLEN, (box->y1 << 16) | height,
+				  MGA_FXBNDRY, (box->x2 << 16) | box->x1);
 
-			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-				   MGA_FCOL,	clear->clear_color,
-				   MGA_DSTORG,	dev_priv->back_offset,
-				   MGA_DWGCTL + MGA_EXEC,
-						dev_priv->clear_cmd );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_FCOL, clear->clear_color,
+				  MGA_DSTORG, dev_priv->back_offset,
+				  MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
 
 			ADVANCE_DMA();
 		}
 
-		if ( clear->flags & MGA_DEPTH ) {
-			BEGIN_DMA( 2 );
+		if (clear->flags & MGA_DEPTH) {
+			BEGIN_DMA(2);
 
-			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-				   MGA_PLNWT,	clear->depth_mask,
-				   MGA_YDSTLEN, (box->y1 << 16) | height,
-				   MGA_FXBNDRY, (box->x2 << 16) | box->x1 );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_PLNWT, clear->depth_mask,
+				  MGA_YDSTLEN, (box->y1 << 16) | height,
+				  MGA_FXBNDRY, (box->x2 << 16) | box->x1);
 
-			DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-				   MGA_FCOL,	clear->clear_depth,
-				   MGA_DSTORG,	dev_priv->depth_offset,
-				   MGA_DWGCTL + MGA_EXEC,
-						dev_priv->clear_cmd );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_FCOL, clear->clear_depth,
+				  MGA_DSTORG, dev_priv->depth_offset,
+				  MGA_DWGCTL + MGA_EXEC, dev_priv->clear_cmd);
 
 			ADVANCE_DMA();
 		}
 
 	}
 
-	BEGIN_DMA( 1 );
+	BEGIN_DMA(1);
 
 	/* Force reset of DWGCTL */
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_PLNWT,	ctx->plnwt,
-		   MGA_DWGCTL,	ctx->dwgctl );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_PLNWT, ctx->plnwt,
+		  MGA_DWGCTL, ctx->dwgctl);
 
 	ADVANCE_DMA();
 
 	FLUSH_DMA();
 }
 
-static void mga_dma_dispatch_swap( drm_device_t *dev )
+static void mga_dma_dispatch_swap(drm_device_t * dev)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -619,56 +605,55 @@ static void mga_dma_dispatch_swap( drm_device_t *dev )
 	int nbox = sarea_priv->nbox;
 	int i;
 	DMA_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	sarea_priv->last_frame.head = dev_priv->prim.tail;
 	sarea_priv->last_frame.wrap = dev_priv->prim.last_wrap;
 
-	BEGIN_DMA( 4 + nbox );
+	BEGIN_DMA(4 + nbox);
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DWGSYNC,	0x00007100,
-		   MGA_DWGSYNC,	0x00007000 );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DWGSYNC, 0x00007100,
+		  MGA_DWGSYNC, 0x00007000);
 
-	DMA_BLOCK( MGA_DSTORG,	dev_priv->front_offset,
-		   MGA_MACCESS,	dev_priv->maccess,
-		   MGA_SRCORG,	dev_priv->back_offset,
-		   MGA_AR5,	dev_priv->front_pitch );
+	DMA_BLOCK(MGA_DSTORG, dev_priv->front_offset,
+		  MGA_MACCESS, dev_priv->maccess,
+		  MGA_SRCORG, dev_priv->back_offset,
+		  MGA_AR5, dev_priv->front_pitch);
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_PLNWT,	0xffffffff,
-		   MGA_DWGCTL,	MGA_DWGCTL_COPY );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_PLNWT, 0xffffffff,
+		  MGA_DWGCTL, MGA_DWGCTL_COPY);
 
-	for ( i = 0 ; i < nbox ; i++ ) {
+	for (i = 0; i < nbox; i++) {
 		drm_clip_rect_t *box = &pbox[i];
 		u32 height = box->y2 - box->y1;
 		u32 start = box->y1 * dev_priv->front_pitch;
 
-		DRM_DEBUG( "   from=%d,%d to=%d,%d\n",
-			   box->x1, box->y1, box->x2, box->y2 );
+		DRM_DEBUG("   from=%d,%d to=%d,%d\n",
+			  box->x1, box->y1, box->x2, box->y2);
 
-		DMA_BLOCK( MGA_AR0,	start + box->x2 - 1,
-			   MGA_AR3,	start + box->x1,
-			   MGA_FXBNDRY,	((box->x2 - 1) << 16) | box->x1,
-			   MGA_YDSTLEN + MGA_EXEC,
-					(box->y1 << 16) | height );
+		DMA_BLOCK(MGA_AR0, start + box->x2 - 1,
+			  MGA_AR3, start + box->x1,
+			  MGA_FXBNDRY, ((box->x2 - 1) << 16) | box->x1,
+			  MGA_YDSTLEN + MGA_EXEC, (box->y1 << 16) | height);
 	}
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_PLNWT,	ctx->plnwt,
-		   MGA_SRCORG,	dev_priv->front_offset,
-		   MGA_DWGCTL,	ctx->dwgctl );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_PLNWT, ctx->plnwt,
+		  MGA_SRCORG, dev_priv->front_offset,
+		  MGA_DWGCTL, ctx->dwgctl);
 
 	ADVANCE_DMA();
 
 	FLUSH_DMA();
 
-	DRM_DEBUG( "%s... done.\n", __FUNCTION__ );
+	DRM_DEBUG("%s... done.\n", __FUNCTION__);
 }
 
-static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
+static void mga_dma_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -677,46 +662,46 @@ static void mga_dma_dispatch_vertex( drm_device_t *dev, drm_buf_t *buf )
 	u32 length = (u32) buf->used;
 	int i = 0;
 	DMA_LOCALS;
-	DRM_DEBUG( "vertex: buf=%d used=%d\n", buf->idx, buf->used );
+	DRM_DEBUG("vertex: buf=%d used=%d\n", buf->idx, buf->used);
 
-	if ( buf->used ) {
+	if (buf->used) {
 		buf_priv->dispatched = 1;
 
-		MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
+		MGA_EMIT_STATE(dev_priv, sarea_priv->dirty);
 
 		do {
-			if ( i < sarea_priv->nbox ) {
-				mga_emit_clip_rect( dev_priv,
-						    &sarea_priv->boxes[i] );
+			if (i < sarea_priv->nbox) {
+				mga_emit_clip_rect(dev_priv,
+						   &sarea_priv->boxes[i]);
 			}
 
-			BEGIN_DMA( 1 );
+			BEGIN_DMA(1);
 
-			DMA_BLOCK( MGA_DMAPAD,		0x00000000,
-				   MGA_DMAPAD,		0x00000000,
-				   MGA_SECADDRESS,	(address |
-							 MGA_DMA_VERTEX),
-				   MGA_SECEND,		((address + length) |
-							 MGA_PAGPXFER) );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_DMAPAD, 0x00000000,
+				  MGA_SECADDRESS, (address |
+						   MGA_DMA_VERTEX),
+				  MGA_SECEND, ((address + length) |
+					       MGA_PAGPXFER));
 
 			ADVANCE_DMA();
-		} while ( ++i < sarea_priv->nbox );
+		} while (++i < sarea_priv->nbox);
 	}
 
-	if ( buf_priv->discard ) {
-		AGE_BUFFER( buf_priv );
+	if (buf_priv->discard) {
+		AGE_BUFFER(buf_priv);
 		buf->pending = 0;
 		buf->used = 0;
 		buf_priv->dispatched = 0;
 
-		mga_freelist_put( dev, buf );
+		mga_freelist_put(dev, buf);
 	}
 
 	FLUSH_DMA();
 }
 
-static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf,
-				      unsigned int start, unsigned int end )
+static void mga_dma_dispatch_indices(drm_device_t * dev, drm_buf_t * buf,
+				     unsigned int start, unsigned int end)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -724,38 +709,38 @@ static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf,
 	u32 address = (u32) buf->bus_address;
 	int i = 0;
 	DMA_LOCALS;
-	DRM_DEBUG( "indices: buf=%d start=%d end=%d\n", buf->idx, start, end );
+	DRM_DEBUG("indices: buf=%d start=%d end=%d\n", buf->idx, start, end);
 
-	if ( start != end ) {
+	if (start != end) {
 		buf_priv->dispatched = 1;
 
-		MGA_EMIT_STATE( dev_priv, sarea_priv->dirty );
+		MGA_EMIT_STATE(dev_priv, sarea_priv->dirty);
 
 		do {
-			if ( i < sarea_priv->nbox ) {
-				mga_emit_clip_rect( dev_priv,
-						    &sarea_priv->boxes[i] );
+			if (i < sarea_priv->nbox) {
+				mga_emit_clip_rect(dev_priv,
+						   &sarea_priv->boxes[i]);
 			}
 
-			BEGIN_DMA( 1 );
+			BEGIN_DMA(1);
 
-			DMA_BLOCK( MGA_DMAPAD,		0x00000000,
-				   MGA_DMAPAD,		0x00000000,
-				   MGA_SETUPADDRESS,	address + start,
-				   MGA_SETUPEND,	((address + end) |
-							 MGA_PAGPXFER) );
+			DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+				  MGA_DMAPAD, 0x00000000,
+				  MGA_SETUPADDRESS, address + start,
+				  MGA_SETUPEND, ((address + end) |
+						 MGA_PAGPXFER));
 
 			ADVANCE_DMA();
-		} while ( ++i < sarea_priv->nbox );
+		} while (++i < sarea_priv->nbox);
 	}
 
-	if ( buf_priv->discard ) {
-		AGE_BUFFER( buf_priv );
+	if (buf_priv->discard) {
+		AGE_BUFFER(buf_priv);
 		buf->pending = 0;
 		buf->used = 0;
 		buf_priv->dispatched = 0;
 
-		mga_freelist_put( dev, buf );
+		mga_freelist_put(dev, buf);
 	}
 
 	FLUSH_DMA();
@@ -764,8 +749,8 @@ static void mga_dma_dispatch_indices( drm_device_t *dev, drm_buf_t *buf,
 /* This copies a 64 byte aligned agp region to the frambuffer with a
  * standard blit, the ioctl needs to do checking.
  */
-static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
-				    unsigned int dstorg, unsigned int length )
+static void mga_dma_dispatch_iload(drm_device_t * dev, drm_buf_t * buf,
+				   unsigned int dstorg, unsigned int length)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_buf_priv_t *buf_priv = buf->dev_private;
@@ -773,52 +758,51 @@ static void mga_dma_dispatch_iload( drm_device_t *dev, drm_buf_t *buf,
 	u32 srcorg = buf->bus_address | MGA_SRCACC_AGP | MGA_SRCMAP_SYSMEM;
 	u32 y2;
 	DMA_LOCALS;
-	DRM_DEBUG( "buf=%d used=%d\n", buf->idx, buf->used );
+	DRM_DEBUG("buf=%d used=%d\n", buf->idx, buf->used);
 
 	y2 = length / 64;
 
-	BEGIN_DMA( 5 );
+	BEGIN_DMA(5);
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DWGSYNC,	0x00007100,
-		   MGA_DWGSYNC,	0x00007000 );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DWGSYNC, 0x00007100,
+		  MGA_DWGSYNC, 0x00007000);
 
-	DMA_BLOCK( MGA_DSTORG,	dstorg,
-		   MGA_MACCESS,	0x00000000,
-		   MGA_SRCORG,	srcorg,
-		   MGA_AR5,	64 );
+	DMA_BLOCK(MGA_DSTORG, dstorg,
+		  MGA_MACCESS, 0x00000000,
+		  MGA_SRCORG, srcorg,
+		  MGA_AR5, 64);
 
-	DMA_BLOCK( MGA_PITCH,	64,
-		   MGA_PLNWT,	0xffffffff,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DWGCTL,	MGA_DWGCTL_COPY );
+	DMA_BLOCK(MGA_PITCH, 64,
+		  MGA_PLNWT, 0xffffffff,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DWGCTL, MGA_DWGCTL_COPY);
 
-	DMA_BLOCK( MGA_AR0,	63,
-		   MGA_AR3,	0,
-		   MGA_FXBNDRY,	(63 << 16) | 0,
-		   MGA_YDSTLEN + MGA_EXEC, y2 );
+	DMA_BLOCK(MGA_AR0, 63,
+		  MGA_AR3, 0,
+		  MGA_FXBNDRY, (63 << 16) | 0,
+		  MGA_YDSTLEN + MGA_EXEC, y2);
 
-	DMA_BLOCK( MGA_PLNWT,	ctx->plnwt,
-		   MGA_SRCORG,	dev_priv->front_offset,
-		   MGA_PITCH,	dev_priv->front_pitch,
-		   MGA_DWGSYNC,	0x00007000 );
+	DMA_BLOCK(MGA_PLNWT, ctx->plnwt,
+		  MGA_SRCORG, dev_priv->front_offset,
+		  MGA_PITCH, dev_priv->front_pitch,
+		  MGA_DWGSYNC, 0x00007000);
 
 	ADVANCE_DMA();
 
-	AGE_BUFFER( buf_priv );
+	AGE_BUFFER(buf_priv);
 
 	buf->pending = 0;
 	buf->used = 0;
 	buf_priv->dispatched = 0;
 
-	mga_freelist_put( dev, buf );
+	mga_freelist_put(dev, buf);
 
 	FLUSH_DMA();
 }
 
-static void mga_dma_dispatch_blit( drm_device_t *dev,
-				   drm_mga_blit_t *blit )
+static void mga_dma_dispatch_blit(drm_device_t * dev, drm_mga_blit_t * blit)
 {
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -827,26 +811,26 @@ static void mga_dma_dispatch_blit( drm_device_t *dev,
 	int nbox = sarea_priv->nbox;
 	u32 scandir = 0, i;
 	DMA_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	BEGIN_DMA( 4 + nbox );
+	BEGIN_DMA(4 + nbox);
 
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_DMAPAD,	0x00000000,
-		   MGA_DWGSYNC,	0x00007100,
-		   MGA_DWGSYNC,	0x00007000 );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_DMAPAD, 0x00000000,
+		  MGA_DWGSYNC, 0x00007100,
+		  MGA_DWGSYNC, 0x00007000);
 
-	DMA_BLOCK( MGA_DWGCTL,	MGA_DWGCTL_COPY,
-		   MGA_PLNWT,	blit->planemask,
-		   MGA_SRCORG,	blit->srcorg,
-		   MGA_DSTORG,	blit->dstorg );
+	DMA_BLOCK(MGA_DWGCTL, MGA_DWGCTL_COPY,
+		  MGA_PLNWT, blit->planemask,
+		  MGA_SRCORG, blit->srcorg,
+		  MGA_DSTORG, blit->dstorg);
 
-	DMA_BLOCK( MGA_SGN,	scandir,
-		   MGA_MACCESS,	dev_priv->maccess,
-		   MGA_AR5,	blit->ydir * blit->src_pitch,
-		   MGA_PITCH,	blit->dst_pitch );
+	DMA_BLOCK(MGA_SGN, scandir,
+		  MGA_MACCESS, dev_priv->maccess,
+		  MGA_AR5, blit->ydir * blit->src_pitch,
+		  MGA_PITCH, blit->dst_pitch);
 
-	for ( i = 0 ; i < nbox ; i++ ) {
+	for (i = 0; i < nbox; i++) {
 		int srcx = pbox[i].x1 + blit->delta_sx;
 		int srcy = pbox[i].y1 + blit->delta_sy;
 		int dstx = pbox[i].x1 + blit->delta_dx;
@@ -855,52 +839,52 @@ static void mga_dma_dispatch_blit( drm_device_t *dev,
 		int w = pbox[i].x2 - pbox[i].x1 - 1;
 		int start;
 
-		if ( blit->ydir == -1 ) {
+		if (blit->ydir == -1) {
 			srcy = blit->height - srcy - 1;
 		}
 
 		start = srcy * blit->src_pitch + srcx;
 
-		DMA_BLOCK( MGA_AR0,	start + w,
-			   MGA_AR3,	start,
-			   MGA_FXBNDRY,	((dstx + w) << 16) | (dstx & 0xffff),
-			   MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h );
+		DMA_BLOCK(MGA_AR0, start + w,
+			  MGA_AR3, start,
+			  MGA_FXBNDRY, ((dstx + w) << 16) | (dstx & 0xffff),
+			  MGA_YDSTLEN + MGA_EXEC, (dsty << 16) | h);
 	}
 
 	/* Do something to flush AGP?
 	 */
 
 	/* Force reset of DWGCTL */
-	DMA_BLOCK( MGA_DMAPAD,	0x00000000,
-		   MGA_PLNWT,	ctx->plnwt,
-		   MGA_PITCH,	dev_priv->front_pitch,
-		   MGA_DWGCTL,	ctx->dwgctl );
+	DMA_BLOCK(MGA_DMAPAD, 0x00000000,
+		  MGA_PLNWT, ctx->plnwt,
+		  MGA_PITCH, dev_priv->front_pitch,
+		  MGA_DWGCTL, ctx->dwgctl);
 
 	ADVANCE_DMA();
 }
 
-
 /* ================================================================
  *
  */
 
-int mga_dma_clear( DRM_IOCTL_ARGS )
+static int mga_dma_clear(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_clear_t clear;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( clear, (drm_mga_clear_t *)data, sizeof(clear) );
+	DRM_COPY_FROM_USER_IOCTL(clear, (drm_mga_clear_t __user *) data,
+				 sizeof(clear));
 
-	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
-	mga_dma_dispatch_clear( dev, &clear );
+	mga_dma_dispatch_clear(dev, &clear);
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -909,20 +893,20 @@ int mga_dma_clear( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int mga_dma_swap( DRM_IOCTL_ARGS )
+static int mga_dma_swap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
-	mga_dma_dispatch_swap( dev );
+	mga_dma_dispatch_swap(dev);
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -931,7 +915,7 @@ int mga_dma_swap( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int mga_dma_vertex( DRM_IOCTL_ARGS )
+static int mga_dma_vertex(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_private_t *dev_priv = dev->dev_private;
@@ -940,37 +924,38 @@ int mga_dma_vertex( DRM_IOCTL_ARGS )
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_vertex_t vertex;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( vertex,
-			     (drm_mga_vertex_t *)data,
-			     sizeof(vertex) );
+	DRM_COPY_FROM_USER_IOCTL(vertex,
+				 (drm_mga_vertex_t __user *) data,
+				 sizeof(vertex));
 
-        if(vertex.idx < 0 || vertex.idx > dma->buf_count) return DRM_ERR(EINVAL);
+	if (vertex.idx < 0 || vertex.idx > dma->buf_count)
+		return DRM_ERR(EINVAL);
 	buf = dma->buflist[vertex.idx];
 	buf_priv = buf->dev_private;
 
 	buf->used = vertex.used;
 	buf_priv->discard = vertex.discard;
 
-	if ( !mga_verify_state( dev_priv ) ) {
-		if ( vertex.discard ) {
-			if ( buf_priv->dispatched == 1 )
-				AGE_BUFFER( buf_priv );
+	if (!mga_verify_state(dev_priv)) {
+		if (vertex.discard) {
+			if (buf_priv->dispatched == 1)
+				AGE_BUFFER(buf_priv);
 			buf_priv->dispatched = 0;
-			mga_freelist_put( dev, buf );
+			mga_freelist_put(dev, buf);
 		}
 		return DRM_ERR(EINVAL);
 	}
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
-	mga_dma_dispatch_vertex( dev, buf );
+	mga_dma_dispatch_vertex(dev, buf);
 
 	return 0;
 }
 
-int mga_dma_indices( DRM_IOCTL_ARGS )
+static int mga_dma_indices(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_private_t *dev_priv = dev->dev_private;
@@ -979,37 +964,38 @@ int mga_dma_indices( DRM_IOCTL_ARGS )
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_indices_t indices;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( indices,
-			     (drm_mga_indices_t *)data,
-			     sizeof(indices) );
+	DRM_COPY_FROM_USER_IOCTL(indices,
+				 (drm_mga_indices_t __user *) data,
+				 sizeof(indices));
 
-        if(indices.idx < 0 || indices.idx > dma->buf_count) return DRM_ERR(EINVAL);
+	if (indices.idx < 0 || indices.idx > dma->buf_count)
+		return DRM_ERR(EINVAL);
 
 	buf = dma->buflist[indices.idx];
 	buf_priv = buf->dev_private;
 
 	buf_priv->discard = indices.discard;
 
-	if ( !mga_verify_state( dev_priv ) ) {
-		if ( indices.discard ) {
-			if ( buf_priv->dispatched == 1 )
-				AGE_BUFFER( buf_priv );
+	if (!mga_verify_state(dev_priv)) {
+		if (indices.discard) {
+			if (buf_priv->dispatched == 1)
+				AGE_BUFFER(buf_priv);
 			buf_priv->dispatched = 0;
-			mga_freelist_put( dev, buf );
+			mga_freelist_put(dev, buf);
 		}
 		return DRM_ERR(EINVAL);
 	}
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
-	mga_dma_dispatch_indices( dev, buf, indices.start, indices.end );
+	mga_dma_dispatch_indices(dev, buf, indices.start, indices.end);
 
 	return 0;
 }
 
-int mga_dma_iload( DRM_IOCTL_ARGS )
+static int mga_dma_iload(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
@@ -1017,32 +1003,34 @@ int mga_dma_iload( DRM_IOCTL_ARGS )
 	drm_buf_t *buf;
 	drm_mga_buf_priv_t *buf_priv;
 	drm_mga_iload_t iload;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( iload, (drm_mga_iload_t *)data, sizeof(iload) );
+	DRM_COPY_FROM_USER_IOCTL(iload, (drm_mga_iload_t __user *) data,
+				 sizeof(iload));
 
 #if 0
-	if ( mga_do_wait_for_idle( dev_priv ) < 0 ) {
-		if ( MGA_DMA_DEBUG )
-			DRM_INFO( "%s: -EBUSY\n", __FUNCTION__ );
+	if (mga_do_wait_for_idle(dev_priv) < 0) {
+		if (MGA_DMA_DEBUG)
+			DRM_INFO("%s: -EBUSY\n", __FUNCTION__);
 		return DRM_ERR(EBUSY);
 	}
 #endif
-        if(iload.idx < 0 || iload.idx > dma->buf_count) return DRM_ERR(EINVAL);
+	if (iload.idx < 0 || iload.idx > dma->buf_count)
+		return DRM_ERR(EINVAL);
 
 	buf = dma->buflist[iload.idx];
 	buf_priv = buf->dev_private;
 
-	if ( mga_verify_iload( dev_priv, iload.dstorg, iload.length ) ) {
-		mga_freelist_put( dev, buf );
+	if (mga_verify_iload(dev_priv, iload.dstorg, iload.length)) {
+		mga_freelist_put(dev, buf);
 		return DRM_ERR(EINVAL);
 	}
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
-	mga_dma_dispatch_iload( dev, buf, iload.dstorg, iload.length );
+	mga_dma_dispatch_iload(dev, buf, iload.dstorg, iload.length);
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -1051,27 +1039,28 @@ int mga_dma_iload( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int mga_dma_blit( DRM_IOCTL_ARGS )
+static int mga_dma_blit(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_mga_blit_t blit;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( blit, (drm_mga_blit_t *)data, sizeof(blit) );
+	DRM_COPY_FROM_USER_IOCTL(blit, (drm_mga_blit_t __user *) data,
+				 sizeof(blit));
 
-	if ( sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > MGA_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = MGA_NR_SAREA_CLIPRECTS;
 
-	if ( mga_verify_blit( dev_priv, blit.srcorg, blit.dstorg ) )
+	if (mga_verify_blit(dev_priv, blit.srcorg, blit.dstorg))
 		return DRM_ERR(EINVAL);
 
-	WRAP_TEST_WITH_RETURN( dev_priv );
+	WRAP_TEST_WITH_RETURN(dev_priv);
 
-	mga_dma_dispatch_blit( dev, &blit );
+	mga_dma_dispatch_blit(dev, &blit);
 
 	/* Make sure we restore the 3D state next time.
 	 */
@@ -1080,24 +1069,24 @@ int mga_dma_blit( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int mga_getparam( DRM_IOCTL_ARGS )
+static int mga_getparam(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_mga_private_t *dev_priv = dev->dev_private;
 	drm_mga_getparam_t param;
 	int value;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( param, (drm_mga_getparam_t *)data,
-			     sizeof(param) );
+	DRM_COPY_FROM_USER_IOCTL(param, (drm_mga_getparam_t __user *) data,
+				 sizeof(param));
 
-	DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
+	DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
 
-	switch( param.param ) {
+	switch (param.param) {
 	case MGA_PARAM_IRQ_NR:
 		value = dev->irq;
 		break;
@@ -1105,10 +1094,25 @@ int mga_getparam( DRM_IOCTL_ARGS )
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
-		DRM_ERROR( "copy_to_user\n" );
+	if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
 		return DRM_ERR(EFAULT);
 	}
-	
+
 	return 0;
 }
+
+drm_ioctl_desc_t mga_ioctls[] = {
+	[DRM_IOCTL_NR(DRM_MGA_INIT)] = {mga_dma_init, 1, 1},
+	[DRM_IOCTL_NR(DRM_MGA_FLUSH)] = {mga_dma_flush, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_RESET)] = {mga_dma_reset, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_SWAP)] = {mga_dma_swap, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_CLEAR)] = {mga_dma_clear, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_VERTEX)] = {mga_dma_vertex, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_INDICES)] = {mga_dma_indices, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_ILOAD)] = {mga_dma_iload, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_BLIT)] = {mga_dma_blit, 1, 0},
+	[DRM_IOCTL_NR(DRM_MGA_GETPARAM)] = {mga_getparam, 1, 0},
+};
+
+int mga_max_ioctl = DRM_ARRAY_SIZE(mga_ioctls);
diff --git a/sys/dev/drm/mga_ucode.h b/sys/dev/drm/mga_ucode.h
index 575166e..dbf9eba 100644
--- a/sys/dev/drm/mga_ucode.h
+++ b/sys/dev/drm/mga_ucode.h
@@ -42,11606 +42,11606 @@
 
 static unsigned char warp_g200_tgz[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x72, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
+	0x72, 0x80, 0x07, 0xEA,
+	0x24, 0x1F, 0x20, 0xE9,
 
-0x15, 0x41, 0x49, 0xBD,
-0x1D, 0x41, 0x51, 0xBD,
+	0x15, 0x41, 0x49, 0xBD,
+	0x1D, 0x41, 0x51, 0xBD,
 
-0x2E, 0x41, 0x2A, 0xB8,
-0x34, 0x53, 0xA0, 0xE8,
+	0x2E, 0x41, 0x2A, 0xB8,
+	0x34, 0x53, 0xA0, 0xE8,
 
-0x15, 0x30,
-0x1D, 0x30,
-0x58, 0xE3,
-0x00, 0xE0,
+	0x15, 0x30,
+	0x1D, 0x30,
+	0x58, 0xE3,
+	0x00, 0xE0,
 
-0xB5, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0xB5, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x24, 0x43, 0xA0, 0xE8,
-0x2C, 0x4B, 0xA0, 0xE8,
+	0x24, 0x43, 0xA0, 0xE8,
+	0x2C, 0x4B, 0xA0, 0xE8,
 
-0x15, 0x72,
-0x09, 0xE3,
-0x00, 0xE0,
-0x1D, 0x72,
+	0x15, 0x72,
+	0x09, 0xE3,
+	0x00, 0xE0,
+	0x1D, 0x72,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0x97, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x97, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6C, 0x64, 0xC8, 0xEC,
-0x98, 0xE1,
-0xB5, 0x05,
+	0x6C, 0x64, 0xC8, 0xEC,
+	0x98, 0xE1,
+	0xB5, 0x05,
 
-0xBD, 0x05,
-0x2E, 0x30,
-0x32, 0xC0, 0xA0, 0xE8,
+	0xBD, 0x05,
+	0x2E, 0x30,
+	0x32, 0xC0, 0xA0, 0xE8,
 
-0x33, 0xC0, 0xA0, 0xE8,
-0x74, 0x64, 0xC8, 0xEC,
+	0x33, 0xC0, 0xA0, 0xE8,
+	0x74, 0x64, 0xC8, 0xEC,
 
-0x40, 0x3C, 0x40, 0xAD,
-0x32, 0x6A,
-0x2A, 0x30,
+	0x40, 0x3C, 0x40, 0xAD,
+	0x32, 0x6A,
+	0x2A, 0x30,
 
-0x20, 0x73,
-0x33, 0x6A,
-0x00, 0xE0,
-0x28, 0x73,
+	0x20, 0x73,
+	0x33, 0x6A,
+	0x00, 0xE0,
+	0x28, 0x73,
 
-0x1C, 0x72,
-0x83, 0xE2,
-0x60, 0x80, 0x15, 0xEA,
+	0x1C, 0x72,
+	0x83, 0xE2,
+	0x60, 0x80, 0x15, 0xEA,
 
-0xB8, 0x3D, 0x28, 0xDF,
-0x30, 0x35, 0x20, 0xDF,
+	0xB8, 0x3D, 0x28, 0xDF,
+	0x30, 0x35, 0x20, 0xDF,
 
-0x40, 0x30,
-0x00, 0xE0,
-0xCC, 0xE2,
-0x64, 0x72,
+	0x40, 0x30,
+	0x00, 0xE0,
+	0xCC, 0xE2,
+	0x64, 0x72,
 
-0x25, 0x42, 0x52, 0xBF,
-0x2D, 0x42, 0x4A, 0xBF,
+	0x25, 0x42, 0x52, 0xBF,
+	0x2D, 0x42, 0x4A, 0xBF,
 
-0x30, 0x2E, 0x30, 0xDF,
-0x38, 0x2E, 0x38, 0xDF,
+	0x30, 0x2E, 0x30, 0xDF,
+	0x38, 0x2E, 0x38, 0xDF,
 
-0x18, 0x1D, 0x45, 0xE9,
-0x1E, 0x15, 0x45, 0xE9,
+	0x18, 0x1D, 0x45, 0xE9,
+	0x1E, 0x15, 0x45, 0xE9,
 
-0x2B, 0x49, 0x51, 0xBD,
-0x00, 0xE0,
-0x1F, 0x73,
+	0x2B, 0x49, 0x51, 0xBD,
+	0x00, 0xE0,
+	0x1F, 0x73,
 
-0x38, 0x38, 0x40, 0xAF,
-0x30, 0x30, 0x40, 0xAF,
+	0x38, 0x38, 0x40, 0xAF,
+	0x30, 0x30, 0x40, 0xAF,
 
-0x24, 0x1F, 0x24, 0xDF,
-0x1D, 0x32, 0x20, 0xE9,
+	0x24, 0x1F, 0x24, 0xDF,
+	0x1D, 0x32, 0x20, 0xE9,
 
-0x2C, 0x1F, 0x2C, 0xDF,
-0x1A, 0x33, 0x20, 0xE9,
+	0x2C, 0x1F, 0x2C, 0xDF,
+	0x1A, 0x33, 0x20, 0xE9,
 
-0xB0, 0x10,
-0x08, 0xE3,
-0x40, 0x10,
-0xB8, 0x10,
+	0xB0, 0x10,
+	0x08, 0xE3,
+	0x40, 0x10,
+	0xB8, 0x10,
 
-0x26, 0xF0, 0x30, 0xCD,
-0x2F, 0xF0, 0x38, 0xCD,
+	0x26, 0xF0, 0x30, 0xCD,
+	0x2F, 0xF0, 0x38, 0xCD,
 
-0x2B, 0x80, 0x20, 0xE9,
-0x2A, 0x80, 0x20, 0xE9,
+	0x2B, 0x80, 0x20, 0xE9,
+	0x2A, 0x80, 0x20, 0xE9,
 
-0xA6, 0x20,
-0x88, 0xE2,
-0x00, 0xE0,
-0xAF, 0x20,
+	0xA6, 0x20,
+	0x88, 0xE2,
+	0x00, 0xE0,
+	0xAF, 0x20,
 
-0x28, 0x2A, 0x26, 0xAF,
-0x20, 0x2A, 0xC0, 0xAF,
+	0x28, 0x2A, 0x26, 0xAF,
+	0x20, 0x2A, 0xC0, 0xAF,
 
-0x34, 0x1F, 0x34, 0xDF,
-0x46, 0x24, 0x46, 0xDF,
+	0x34, 0x1F, 0x34, 0xDF,
+	0x46, 0x24, 0x46, 0xDF,
 
-0x28, 0x30, 0x80, 0xBF,
-0x20, 0x38, 0x80, 0xBF,
+	0x28, 0x30, 0x80, 0xBF,
+	0x20, 0x38, 0x80, 0xBF,
 
-0x47, 0x24, 0x47, 0xDF,
-0x4E, 0x2C, 0x4E, 0xDF,
+	0x47, 0x24, 0x47, 0xDF,
+	0x4E, 0x2C, 0x4E, 0xDF,
 
-0x4F, 0x2C, 0x4F, 0xDF,
-0x56, 0x34, 0x56, 0xDF,
+	0x4F, 0x2C, 0x4F, 0xDF,
+	0x56, 0x34, 0x56, 0xDF,
 
-0x28, 0x15, 0x28, 0xDF,
-0x20, 0x1D, 0x20, 0xDF,
+	0x28, 0x15, 0x28, 0xDF,
+	0x20, 0x1D, 0x20, 0xDF,
 
-0x57, 0x34, 0x57, 0xDF,
-0x00, 0xE0,
-0x1D, 0x05,
+	0x57, 0x34, 0x57, 0xDF,
+	0x00, 0xE0,
+	0x1D, 0x05,
 
-0x04, 0x80, 0x10, 0xEA,
-0x89, 0xE2,
-0x2B, 0x30,
+	0x04, 0x80, 0x10, 0xEA,
+	0x89, 0xE2,
+	0x2B, 0x30,
 
-0x3F, 0xC1, 0x1D, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0xC1, 0x1D, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA0, 0x68,
-0xBF, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x68,
+	0xBF, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x20, 0xC0, 0x20, 0xAF,
-0x28, 0x05,
-0x97, 0x74,
+	0x20, 0xC0, 0x20, 0xAF,
+	0x28, 0x05,
+	0x97, 0x74,
 
-0x00, 0xE0,
-0x2A, 0x10,
-0x16, 0xC0, 0x20, 0xE9,
+	0x00, 0xE0,
+	0x2A, 0x10,
+	0x16, 0xC0, 0x20, 0xE9,
 
-0x04, 0x80, 0x10, 0xEA,
-0x8C, 0xE2,
-0x95, 0x05,
+	0x04, 0x80, 0x10, 0xEA,
+	0x8C, 0xE2,
+	0x95, 0x05,
 
-0x28, 0xC1, 0x28, 0xAD,
-0x1F, 0xC1, 0x15, 0xBD,
+	0x28, 0xC1, 0x28, 0xAD,
+	0x1F, 0xC1, 0x15, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA8, 0x67,
-0x9F, 0x6B,
-0x00, 0x80, 0x00, 0xE8,
+	0xA8, 0x67,
+	0x9F, 0x6B,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x28, 0xC0, 0x28, 0xAD,
-0x1D, 0x25,
-0x20, 0x05,
+	0x28, 0xC0, 0x28, 0xAD,
+	0x1D, 0x25,
+	0x20, 0x05,
 
-0x28, 0x32, 0x80, 0xAD,
-0x40, 0x2A, 0x40, 0xBD,
+	0x28, 0x32, 0x80, 0xAD,
+	0x40, 0x2A, 0x40, 0xBD,
 
-0x1C, 0x80, 0x20, 0xE9,
-0x20, 0x33, 0x20, 0xAD,
+	0x1C, 0x80, 0x20, 0xE9,
+	0x20, 0x33, 0x20, 0xAD,
 
-0x20, 0x73,
-0x00, 0xE0,
-0xB6, 0x49, 0x51, 0xBB,
+	0x20, 0x73,
+	0x00, 0xE0,
+	0xB6, 0x49, 0x51, 0xBB,
 
-0x26, 0x2F, 0xB0, 0xE8,
-0x19, 0x20, 0x20, 0xE9,
+	0x26, 0x2F, 0xB0, 0xE8,
+	0x19, 0x20, 0x20, 0xE9,
 
-0x35, 0x20, 0x35, 0xDF,
-0x3D, 0x20, 0x3D, 0xDF,
+	0x35, 0x20, 0x35, 0xDF,
+	0x3D, 0x20, 0x3D, 0xDF,
 
-0x15, 0x20, 0x15, 0xDF,
-0x1D, 0x20, 0x1D, 0xDF,
+	0x15, 0x20, 0x15, 0xDF,
+	0x1D, 0x20, 0x1D, 0xDF,
 
-0x26, 0xD0, 0x26, 0xCD,
-0x29, 0x49, 0x2A, 0xB8,
+	0x26, 0xD0, 0x26, 0xCD,
+	0x29, 0x49, 0x2A, 0xB8,
 
-0x26, 0x40, 0x80, 0xBD,
-0x3B, 0x48, 0x50, 0xBD,
+	0x26, 0x40, 0x80, 0xBD,
+	0x3B, 0x48, 0x50, 0xBD,
 
-0x3E, 0x54, 0x57, 0x9F,
-0x00, 0xE0,
-0x82, 0xE1,
+	0x3E, 0x54, 0x57, 0x9F,
+	0x00, 0xE0,
+	0x82, 0xE1,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x26, 0x30,
-0x29, 0x30,
-0x48, 0x3C, 0x48, 0xAD,
+	0x26, 0x30,
+	0x29, 0x30,
+	0x48, 0x3C, 0x48, 0xAD,
 
-0x2B, 0x72,
-0xC2, 0xE1,
-0x2C, 0xC0, 0x44, 0xC2,
+	0x2B, 0x72,
+	0xC2, 0xE1,
+	0x2C, 0xC0, 0x44, 0xC2,
 
-0x05, 0x24, 0x34, 0xBF,
-0x0D, 0x24, 0x2C, 0xBF,
+	0x05, 0x24, 0x34, 0xBF,
+	0x0D, 0x24, 0x2C, 0xBF,
 
-0x2D, 0x46, 0x4E, 0xBF,
-0x25, 0x46, 0x56, 0xBF,
+	0x2D, 0x46, 0x4E, 0xBF,
+	0x25, 0x46, 0x56, 0xBF,
 
-0x20, 0x1D, 0x6F, 0x8F,
-0x32, 0x3E, 0x5F, 0xE9,
+	0x20, 0x1D, 0x6F, 0x8F,
+	0x32, 0x3E, 0x5F, 0xE9,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x30,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x30,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x33, 0x1E, 0x5F, 0xE9,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x33, 0x1E, 0x5F, 0xE9,
 
-0x05, 0x44, 0x54, 0xB2,
-0x0D, 0x44, 0x4C, 0xB2,
+	0x05, 0x44, 0x54, 0xB2,
+	0x0D, 0x44, 0x4C, 0xB2,
 
-0x19, 0xC0, 0xB0, 0xE8,
-0x34, 0xC0, 0x44, 0xC4,
+	0x19, 0xC0, 0xB0, 0xE8,
+	0x34, 0xC0, 0x44, 0xC4,
 
-0x33, 0x73,
-0x00, 0xE0,
-0x3E, 0x62, 0x57, 0x9F,
+	0x33, 0x73,
+	0x00, 0xE0,
+	0x3E, 0x62, 0x57, 0x9F,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0xE0,
-0x0D, 0x20,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0xE0,
+	0x0D, 0x20,
 
-0x84, 0x3E, 0x58, 0xE9,
-0x28, 0x1D, 0x6F, 0x8F,
+	0x84, 0x3E, 0x58, 0xE9,
+	0x28, 0x1D, 0x6F, 0x8F,
 
-0x05, 0x20,
-0x00, 0xE0,
-0x85, 0x1E, 0x58, 0xE9,
+	0x05, 0x20,
+	0x00, 0xE0,
+	0x85, 0x1E, 0x58, 0xE9,
 
-0x9B, 0x3B, 0x33, 0xDF,
-0x20, 0x20, 0x42, 0xAF,
+	0x9B, 0x3B, 0x33, 0xDF,
+	0x20, 0x20, 0x42, 0xAF,
 
-0x30, 0x42, 0x56, 0x9F,
-0x80, 0x3E, 0x57, 0xE9,
+	0x30, 0x42, 0x56, 0x9F,
+	0x80, 0x3E, 0x57, 0xE9,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x30, 0x80, 0x5F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x30, 0x80, 0x5F, 0xE9,
 
-0x28, 0x28, 0x24, 0xAF,
-0x81, 0x1E, 0x57, 0xE9,
+	0x28, 0x28, 0x24, 0xAF,
+	0x81, 0x1E, 0x57, 0xE9,
 
-0x05, 0x47, 0x57, 0xBF,
-0x0D, 0x47, 0x4F, 0xBF,
+	0x05, 0x47, 0x57, 0xBF,
+	0x0D, 0x47, 0x4F, 0xBF,
 
-0x88, 0x80, 0x58, 0xE9,
-0x1B, 0x29, 0x1B, 0xDF,
+	0x88, 0x80, 0x58, 0xE9,
+	0x1B, 0x29, 0x1B, 0xDF,
 
-0x30, 0x1D, 0x6F, 0x8F,
-0x3A, 0x30, 0x4F, 0xE9,
+	0x30, 0x1D, 0x6F, 0x8F,
+	0x3A, 0x30, 0x4F, 0xE9,
 
-0x1C, 0x30, 0x26, 0xDF,
-0x09, 0xE3,
-0x3B, 0x05,
+	0x1C, 0x30, 0x26, 0xDF,
+	0x09, 0xE3,
+	0x3B, 0x05,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x3B, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x3B, 0x3F, 0x4F, 0xE9,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x00, 0xE0,
-0xAC, 0x20,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x00, 0xE0,
+	0xAC, 0x20,
 
-0x2D, 0x44, 0x4C, 0xB4,
-0x2C, 0x1C, 0xC0, 0xAF,
+	0x2D, 0x44, 0x4C, 0xB4,
+	0x2C, 0x1C, 0xC0, 0xAF,
 
-0x25, 0x44, 0x54, 0xB4,
-0x00, 0xE0,
-0xC8, 0x30,
+	0x25, 0x44, 0x54, 0xB4,
+	0x00, 0xE0,
+	0xC8, 0x30,
 
-0x30, 0x46, 0x30, 0xAF,
-0x1B, 0x1B, 0x48, 0xAF,
+	0x30, 0x46, 0x30, 0xAF,
+	0x1B, 0x1B, 0x48, 0xAF,
 
-0x00, 0xE0,
-0x25, 0x20,
-0x38, 0x2C, 0x4F, 0xE9,
+	0x00, 0xE0,
+	0x25, 0x20,
+	0x38, 0x2C, 0x4F, 0xE9,
 
-0x86, 0x80, 0x57, 0xE9,
-0x38, 0x1D, 0x6F, 0x8F,
+	0x86, 0x80, 0x57, 0xE9,
+	0x38, 0x1D, 0x6F, 0x8F,
 
-0x28, 0x74,
-0x00, 0xE0,
-0x0D, 0x44, 0x4C, 0xB0,
+	0x28, 0x74,
+	0x00, 0xE0,
+	0x0D, 0x44, 0x4C, 0xB0,
 
-0x05, 0x44, 0x54, 0xB0,
-0x2D, 0x20,
-0x9B, 0x10,
+	0x05, 0x44, 0x54, 0xB0,
+	0x2D, 0x20,
+	0x9B, 0x10,
 
-0x82, 0x3E, 0x57, 0xE9,
-0x32, 0xF0, 0x1B, 0xCD,
+	0x82, 0x3E, 0x57, 0xE9,
+	0x32, 0xF0, 0x1B, 0xCD,
 
-0x1E, 0xBD, 0x59, 0x9F,
-0x83, 0x1E, 0x57, 0xE9,
+	0x1E, 0xBD, 0x59, 0x9F,
+	0x83, 0x1E, 0x57, 0xE9,
 
-0x38, 0x47, 0x38, 0xAF,
-0x34, 0x20,
-0x2A, 0x30,
+	0x38, 0x47, 0x38, 0xAF,
+	0x34, 0x20,
+	0x2A, 0x30,
 
-0x00, 0xE0,
-0x0D, 0x20,
-0x32, 0x20,
-0x05, 0x20,
+	0x00, 0xE0,
+	0x0D, 0x20,
+	0x32, 0x20,
+	0x05, 0x20,
 
-0x87, 0x80, 0x57, 0xE9,
-0x1F, 0x54, 0x57, 0x9F,
+	0x87, 0x80, 0x57, 0xE9,
+	0x1F, 0x54, 0x57, 0x9F,
 
-0x17, 0x42, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x6A,
+	0x17, 0x42, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x6A,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x37, 0x1E, 0x4F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x37, 0x1E, 0x4F, 0xE9,
 
-0x37, 0x32, 0x2A, 0xAF,
-0x00, 0xE0,
-0x32, 0x00,
+	0x37, 0x32, 0x2A, 0xAF,
+	0x00, 0xE0,
+	0x32, 0x00,
 
-0x00, 0x80, 0x00, 0xE8,
-0x27, 0xC0, 0x44, 0xC0,
+	0x00, 0x80, 0x00, 0xE8,
+	0x27, 0xC0, 0x44, 0xC0,
 
-0x36, 0x1F, 0x4F, 0xE9,
-0x1F, 0x1F, 0x26, 0xDF,
+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x03, 0x80, 0x0A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x0A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x57, 0x39, 0x20, 0xE9,
-0x28, 0x19, 0x60, 0xEC,
+	0x57, 0x39, 0x20, 0xE9,
+	0x28, 0x19, 0x60, 0xEC,
 
-0x2B, 0x32, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0xB3, 0x05,
-0x00, 0xE0,
-0x16, 0x28, 0x20, 0xE9,
+	0xB3, 0x05,
+	0x00, 0xE0,
+	0x16, 0x28, 0x20, 0xE9,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x1E, 0x2B, 0x20, 0xE9,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x1E, 0x2B, 0x20, 0xE9,
 
-0x1C, 0x80, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x80, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x85, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x85, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x84, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x84, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x82, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x82, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x7F, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x7F, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgza[] = {
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
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+	0x3B, 0x6A,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x37, 0x1E, 0x4F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x37, 0x1E, 0x4F, 0xE9,
 
-0x37, 0x32, 0x2A, 0xAF,
-0x00, 0xE0,
-0x32, 0x00,
+	0x37, 0x32, 0x2A, 0xAF,
+	0x00, 0xE0,
+	0x32, 0x00,
 
-0x00, 0x80, 0x00, 0xE8,
-0x27, 0xC0, 0x44, 0xC0,
+	0x00, 0x80, 0x00, 0xE8,
+	0x27, 0xC0, 0x44, 0xC0,
 
-0x36, 0x1F, 0x4F, 0xE9,
-0x1F, 0x1F, 0x26, 0xDF,
+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2D, 0x44, 0x4C, 0xB6,
-0x25, 0x44, 0x54, 0xB6,
+	0x2D, 0x44, 0x4C, 0xB6,
+	0x25, 0x44, 0x54, 0xB6,
 
-0x03, 0x80, 0x2A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x2A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x2D, 0x20,
-0x25, 0x20,
-0x07, 0xC0, 0x44, 0xC6,
+	0x2D, 0x20,
+	0x25, 0x20,
+	0x07, 0xC0, 0x44, 0xC6,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x1F, 0x62, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x62, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x3F, 0x3D, 0x5D, 0x9F,
-0x00, 0xE0,
-0x07, 0x20,
+	0x3F, 0x3D, 0x5D, 0x9F,
+	0x00, 0xE0,
+	0x07, 0x20,
 
-0x00, 0x80, 0x00, 0xE8,
-0x28, 0x19, 0x60, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
+	0x28, 0x19, 0x60, 0xEC,
 
-0xB3, 0x05,
-0x00, 0xE0,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x05,
+	0x00, 0xE0,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x00, 0x80, 0x00, 0xE8,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0x26, 0x1F, 0xDF,
-0x9D, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x26, 0x1F, 0xDF,
+	0x9D, 0x1F, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x9E, 0x3F, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x9E, 0x3F, 0x4F, 0xE9,
 
-0x07, 0x07, 0x1F, 0xAF,
-0x00, 0x80, 0x00, 0xE8,
+	0x07, 0x07, 0x1F, 0xAF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x9C, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x7A, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x7A, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x79, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x79, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x77, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x77, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x74, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x74, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgzaf[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x83, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
+	0x83, 0x80, 0x07, 0xEA,
+	0x24, 0x1F, 0x20, 0xE9,
 
-0x21, 0x45, 0x80, 0xE8,
-0x1A, 0x4D, 0x80, 0xE8,
+	0x21, 0x45, 0x80, 0xE8,
+	0x1A, 0x4D, 0x80, 0xE8,
 
-0x31, 0x55, 0x80, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x55, 0x80, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0x41, 0x49, 0xBD,
-0x1D, 0x41, 0x51, 0xBD,
+	0x15, 0x41, 0x49, 0xBD,
+	0x1D, 0x41, 0x51, 0xBD,
 
-0x2E, 0x41, 0x2A, 0xB8,
-0x34, 0x53, 0xA0, 0xE8,
+	0x2E, 0x41, 0x2A, 0xB8,
+	0x34, 0x53, 0xA0, 0xE8,
 
-0x15, 0x30,
-0x1D, 0x30,
-0x58, 0xE3,
-0x00, 0xE0,
+	0x15, 0x30,
+	0x1D, 0x30,
+	0x58, 0xE3,
+	0x00, 0xE0,
 
-0xB5, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0xB5, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x24, 0x43, 0xA0, 0xE8,
-0x2C, 0x4B, 0xA0, 0xE8,
+	0x24, 0x43, 0xA0, 0xE8,
+	0x2C, 0x4B, 0xA0, 0xE8,
 
-0x15, 0x72,
-0x09, 0xE3,
-0x00, 0xE0,
-0x1D, 0x72,
+	0x15, 0x72,
+	0x09, 0xE3,
+	0x00, 0xE0,
+	0x1D, 0x72,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0x97, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x97, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6C, 0x64, 0xC8, 0xEC,
-0x98, 0xE1,
-0xB5, 0x05,
+	0x6C, 0x64, 0xC8, 0xEC,
+	0x98, 0xE1,
+	0xB5, 0x05,
 
-0xBD, 0x05,
-0x2E, 0x30,
-0x32, 0xC0, 0xA0, 0xE8,
+	0xBD, 0x05,
+	0x2E, 0x30,
+	0x32, 0xC0, 0xA0, 0xE8,
 
-0x33, 0xC0, 0xA0, 0xE8,
-0x74, 0x64, 0xC8, 0xEC,
+	0x33, 0xC0, 0xA0, 0xE8,
+	0x74, 0x64, 0xC8, 0xEC,
 
-0x40, 0x3C, 0x40, 0xAD,
-0x32, 0x6A,
-0x2A, 0x30,
+	0x40, 0x3C, 0x40, 0xAD,
+	0x32, 0x6A,
+	0x2A, 0x30,
 
-0x20, 0x73,
-0x33, 0x6A,
-0x00, 0xE0,
-0x28, 0x73,
+	0x20, 0x73,
+	0x33, 0x6A,
+	0x00, 0xE0,
+	0x28, 0x73,
 
-0x1C, 0x72,
-0x83, 0xE2,
-0x6F, 0x80, 0x15, 0xEA,
+	0x1C, 0x72,
+	0x83, 0xE2,
+	0x6F, 0x80, 0x15, 0xEA,
 
-0xB8, 0x3D, 0x28, 0xDF,
-0x30, 0x35, 0x20, 0xDF,
+	0xB8, 0x3D, 0x28, 0xDF,
+	0x30, 0x35, 0x20, 0xDF,
 
-0x40, 0x30,
-0x00, 0xE0,
-0xCC, 0xE2,
-0x64, 0x72,
+	0x40, 0x30,
+	0x00, 0xE0,
+	0xCC, 0xE2,
+	0x64, 0x72,
 
-0x25, 0x42, 0x52, 0xBF,
-0x2D, 0x42, 0x4A, 0xBF,
+	0x25, 0x42, 0x52, 0xBF,
+	0x2D, 0x42, 0x4A, 0xBF,
 
-0x30, 0x2E, 0x30, 0xDF,
-0x38, 0x2E, 0x38, 0xDF,
+	0x30, 0x2E, 0x30, 0xDF,
+	0x38, 0x2E, 0x38, 0xDF,
 
-0x18, 0x1D, 0x45, 0xE9,
-0x1E, 0x15, 0x45, 0xE9,
+	0x18, 0x1D, 0x45, 0xE9,
+	0x1E, 0x15, 0x45, 0xE9,
 
-0x2B, 0x49, 0x51, 0xBD,
-0x00, 0xE0,
-0x1F, 0x73,
+	0x2B, 0x49, 0x51, 0xBD,
+	0x00, 0xE0,
+	0x1F, 0x73,
 
-0x38, 0x38, 0x40, 0xAF,
-0x30, 0x30, 0x40, 0xAF,
+	0x38, 0x38, 0x40, 0xAF,
+	0x30, 0x30, 0x40, 0xAF,
 
-0x24, 0x1F, 0x24, 0xDF,
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-0x07, 0x07, 0x1F, 0xAF,
-0x00, 0x80, 0x00, 0xE8,
+	0x07, 0x07, 0x1F, 0xAF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x31, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x9C, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x74, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x74, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x73, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x73, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x71, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x71, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6E, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x6E, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgzf[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x7F, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
+	0x7F, 0x80, 0x07, 0xEA,
+	0x24, 0x1F, 0x20, 0xE9,
 
-0x21, 0x45, 0x80, 0xE8,
-0x1A, 0x4D, 0x80, 0xE8,
+	0x21, 0x45, 0x80, 0xE8,
+	0x1A, 0x4D, 0x80, 0xE8,
 
-0x31, 0x55, 0x80, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x55, 0x80, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0x41, 0x49, 0xBD,
-0x1D, 0x41, 0x51, 0xBD,
+	0x15, 0x41, 0x49, 0xBD,
+	0x1D, 0x41, 0x51, 0xBD,
 
-0x2E, 0x41, 0x2A, 0xB8,
-0x34, 0x53, 0xA0, 0xE8,
+	0x2E, 0x41, 0x2A, 0xB8,
+	0x34, 0x53, 0xA0, 0xE8,
 
-0x15, 0x30,
-0x1D, 0x30,
-0x58, 0xE3,
-0x00, 0xE0,
+	0x15, 0x30,
+	0x1D, 0x30,
+	0x58, 0xE3,
+	0x00, 0xE0,
 
-0xB5, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0xB5, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x24, 0x43, 0xA0, 0xE8,
-0x2C, 0x4B, 0xA0, 0xE8,
+	0x24, 0x43, 0xA0, 0xE8,
+	0x2C, 0x4B, 0xA0, 0xE8,
 
-0x15, 0x72,
-0x09, 0xE3,
-0x00, 0xE0,
-0x1D, 0x72,
+	0x15, 0x72,
+	0x09, 0xE3,
+	0x00, 0xE0,
+	0x1D, 0x72,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0x97, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x97, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6C, 0x64, 0xC8, 0xEC,
-0x98, 0xE1,
-0xB5, 0x05,
+	0x6C, 0x64, 0xC8, 0xEC,
+	0x98, 0xE1,
+	0xB5, 0x05,
 
-0xBD, 0x05,
-0x2E, 0x30,
-0x32, 0xC0, 0xA0, 0xE8,
+	0xBD, 0x05,
+	0x2E, 0x30,
+	0x32, 0xC0, 0xA0, 0xE8,
 
-0x33, 0xC0, 0xA0, 0xE8,
-0x74, 0x64, 0xC8, 0xEC,
+	0x33, 0xC0, 0xA0, 0xE8,
+	0x74, 0x64, 0xC8, 0xEC,
 
-0x40, 0x3C, 0x40, 0xAD,
-0x32, 0x6A,
-0x2A, 0x30,
+	0x40, 0x3C, 0x40, 0xAD,
+	0x32, 0x6A,
+	0x2A, 0x30,
 
-0x20, 0x73,
-0x33, 0x6A,
-0x00, 0xE0,
-0x28, 0x73,
+	0x20, 0x73,
+	0x33, 0x6A,
+	0x00, 0xE0,
+	0x28, 0x73,
 
-0x1C, 0x72,
-0x83, 0xE2,
-0x6B, 0x80, 0x15, 0xEA,
+	0x1C, 0x72,
+	0x83, 0xE2,
+	0x6B, 0x80, 0x15, 0xEA,
 
-0xB8, 0x3D, 0x28, 0xDF,
-0x30, 0x35, 0x20, 0xDF,
+	0xB8, 0x3D, 0x28, 0xDF,
+	0x30, 0x35, 0x20, 0xDF,
 
-0x40, 0x30,
-0x00, 0xE0,
-0xCC, 0xE2,
-0x64, 0x72,
+	0x40, 0x30,
+	0x00, 0xE0,
+	0xCC, 0xE2,
+	0x64, 0x72,
 
-0x25, 0x42, 0x52, 0xBF,
-0x2D, 0x42, 0x4A, 0xBF,
+	0x25, 0x42, 0x52, 0xBF,
+	0x2D, 0x42, 0x4A, 0xBF,
 
-0x30, 0x2E, 0x30, 0xDF,
-0x38, 0x2E, 0x38, 0xDF,
+	0x30, 0x2E, 0x30, 0xDF,
+	0x38, 0x2E, 0x38, 0xDF,
 
-0x18, 0x1D, 0x45, 0xE9,
-0x1E, 0x15, 0x45, 0xE9,
+	0x18, 0x1D, 0x45, 0xE9,
+	0x1E, 0x15, 0x45, 0xE9,
 
-0x2B, 0x49, 0x51, 0xBD,
-0x00, 0xE0,
-0x1F, 0x73,
+	0x2B, 0x49, 0x51, 0xBD,
+	0x00, 0xE0,
+	0x1F, 0x73,
 
-0x38, 0x38, 0x40, 0xAF,
-0x30, 0x30, 0x40, 0xAF,
+	0x38, 0x38, 0x40, 0xAF,
+	0x30, 0x30, 0x40, 0xAF,
 
-0x24, 0x1F, 0x24, 0xDF,
-0x1D, 0x32, 0x20, 0xE9,
+	0x24, 0x1F, 0x24, 0xDF,
+	0x1D, 0x32, 0x20, 0xE9,
 
-0x2C, 0x1F, 0x2C, 0xDF,
-0x1A, 0x33, 0x20, 0xE9,
+	0x2C, 0x1F, 0x2C, 0xDF,
+	0x1A, 0x33, 0x20, 0xE9,
 
-0xB0, 0x10,
-0x08, 0xE3,
-0x40, 0x10,
-0xB8, 0x10,
+	0xB0, 0x10,
+	0x08, 0xE3,
+	0x40, 0x10,
+	0xB8, 0x10,
 
-0x26, 0xF0, 0x30, 0xCD,
-0x2F, 0xF0, 0x38, 0xCD,
+	0x26, 0xF0, 0x30, 0xCD,
+	0x2F, 0xF0, 0x38, 0xCD,
 
-0x2B, 0x80, 0x20, 0xE9,
-0x2A, 0x80, 0x20, 0xE9,
+	0x2B, 0x80, 0x20, 0xE9,
+	0x2A, 0x80, 0x20, 0xE9,
 
-0xA6, 0x20,
-0x88, 0xE2,
-0x00, 0xE0,
-0xAF, 0x20,
+	0xA6, 0x20,
+	0x88, 0xE2,
+	0x00, 0xE0,
+	0xAF, 0x20,
 
-0x28, 0x2A, 0x26, 0xAF,
-0x20, 0x2A, 0xC0, 0xAF,
+	0x28, 0x2A, 0x26, 0xAF,
+	0x20, 0x2A, 0xC0, 0xAF,
 
-0x34, 0x1F, 0x34, 0xDF,
-0x46, 0x24, 0x46, 0xDF,
+	0x34, 0x1F, 0x34, 0xDF,
+	0x46, 0x24, 0x46, 0xDF,
 
-0x28, 0x30, 0x80, 0xBF,
-0x20, 0x38, 0x80, 0xBF,
+	0x28, 0x30, 0x80, 0xBF,
+	0x20, 0x38, 0x80, 0xBF,
 
-0x47, 0x24, 0x47, 0xDF,
-0x4E, 0x2C, 0x4E, 0xDF,
+	0x47, 0x24, 0x47, 0xDF,
+	0x4E, 0x2C, 0x4E, 0xDF,
 
-0x4F, 0x2C, 0x4F, 0xDF,
-0x56, 0x34, 0x56, 0xDF,
+	0x4F, 0x2C, 0x4F, 0xDF,
+	0x56, 0x34, 0x56, 0xDF,
 
-0x28, 0x15, 0x28, 0xDF,
-0x20, 0x1D, 0x20, 0xDF,
+	0x28, 0x15, 0x28, 0xDF,
+	0x20, 0x1D, 0x20, 0xDF,
 
-0x57, 0x34, 0x57, 0xDF,
-0x00, 0xE0,
-0x1D, 0x05,
+	0x57, 0x34, 0x57, 0xDF,
+	0x00, 0xE0,
+	0x1D, 0x05,
 
-0x04, 0x80, 0x10, 0xEA,
-0x89, 0xE2,
-0x2B, 0x30,
+	0x04, 0x80, 0x10, 0xEA,
+	0x89, 0xE2,
+	0x2B, 0x30,
 
-0x3F, 0xC1, 0x1D, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0xC1, 0x1D, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA0, 0x68,
-0xBF, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x68,
+	0xBF, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x20, 0xC0, 0x20, 0xAF,
-0x28, 0x05,
-0x97, 0x74,
+	0x20, 0xC0, 0x20, 0xAF,
+	0x28, 0x05,
+	0x97, 0x74,
 
-0x00, 0xE0,
-0x2A, 0x10,
-0x16, 0xC0, 0x20, 0xE9,
+	0x00, 0xE0,
+	0x2A, 0x10,
+	0x16, 0xC0, 0x20, 0xE9,
 
-0x04, 0x80, 0x10, 0xEA,
-0x8C, 0xE2,
-0x95, 0x05,
+	0x04, 0x80, 0x10, 0xEA,
+	0x8C, 0xE2,
+	0x95, 0x05,
 
-0x28, 0xC1, 0x28, 0xAD,
-0x1F, 0xC1, 0x15, 0xBD,
+	0x28, 0xC1, 0x28, 0xAD,
+	0x1F, 0xC1, 0x15, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA8, 0x67,
-0x9F, 0x6B,
-0x00, 0x80, 0x00, 0xE8,
+	0xA8, 0x67,
+	0x9F, 0x6B,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x28, 0xC0, 0x28, 0xAD,
-0x1D, 0x25,
-0x20, 0x05,
+	0x28, 0xC0, 0x28, 0xAD,
+	0x1D, 0x25,
+	0x20, 0x05,
 
-0x28, 0x32, 0x80, 0xAD,
-0x40, 0x2A, 0x40, 0xBD,
+	0x28, 0x32, 0x80, 0xAD,
+	0x40, 0x2A, 0x40, 0xBD,
 
-0x1C, 0x80, 0x20, 0xE9,
-0x20, 0x33, 0x20, 0xAD,
+	0x1C, 0x80, 0x20, 0xE9,
+	0x20, 0x33, 0x20, 0xAD,
 
-0x20, 0x73,
-0x00, 0xE0,
-0xB6, 0x49, 0x51, 0xBB,
+	0x20, 0x73,
+	0x00, 0xE0,
+	0xB6, 0x49, 0x51, 0xBB,
 
-0x26, 0x2F, 0xB0, 0xE8,
-0x19, 0x20, 0x20, 0xE9,
+	0x26, 0x2F, 0xB0, 0xE8,
+	0x19, 0x20, 0x20, 0xE9,
 
-0x35, 0x20, 0x35, 0xDF,
-0x3D, 0x20, 0x3D, 0xDF,
+	0x35, 0x20, 0x35, 0xDF,
+	0x3D, 0x20, 0x3D, 0xDF,
 
-0x15, 0x20, 0x15, 0xDF,
-0x1D, 0x20, 0x1D, 0xDF,
+	0x15, 0x20, 0x15, 0xDF,
+	0x1D, 0x20, 0x1D, 0xDF,
 
-0x26, 0xD0, 0x26, 0xCD,
-0x29, 0x49, 0x2A, 0xB8,
+	0x26, 0xD0, 0x26, 0xCD,
+	0x29, 0x49, 0x2A, 0xB8,
 
-0x26, 0x40, 0x80, 0xBD,
-0x3B, 0x48, 0x50, 0xBD,
+	0x26, 0x40, 0x80, 0xBD,
+	0x3B, 0x48, 0x50, 0xBD,
 
-0x3E, 0x54, 0x57, 0x9F,
-0x00, 0xE0,
-0x82, 0xE1,
+	0x3E, 0x54, 0x57, 0x9F,
+	0x00, 0xE0,
+	0x82, 0xE1,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x26, 0x30,
-0x29, 0x30,
-0x48, 0x3C, 0x48, 0xAD,
+	0x26, 0x30,
+	0x29, 0x30,
+	0x48, 0x3C, 0x48, 0xAD,
 
-0x2B, 0x72,
-0xC2, 0xE1,
-0x2C, 0xC0, 0x44, 0xC2,
+	0x2B, 0x72,
+	0xC2, 0xE1,
+	0x2C, 0xC0, 0x44, 0xC2,
 
-0x05, 0x24, 0x34, 0xBF,
-0x0D, 0x24, 0x2C, 0xBF,
+	0x05, 0x24, 0x34, 0xBF,
+	0x0D, 0x24, 0x2C, 0xBF,
 
-0x2D, 0x46, 0x4E, 0xBF,
-0x25, 0x46, 0x56, 0xBF,
+	0x2D, 0x46, 0x4E, 0xBF,
+	0x25, 0x46, 0x56, 0xBF,
 
-0x20, 0x1D, 0x6F, 0x8F,
-0x32, 0x3E, 0x5F, 0xE9,
+	0x20, 0x1D, 0x6F, 0x8F,
+	0x32, 0x3E, 0x5F, 0xE9,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x30,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x30,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x33, 0x1E, 0x5F, 0xE9,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x33, 0x1E, 0x5F, 0xE9,
 
-0x05, 0x44, 0x54, 0xB2,
-0x0D, 0x44, 0x4C, 0xB2,
+	0x05, 0x44, 0x54, 0xB2,
+	0x0D, 0x44, 0x4C, 0xB2,
 
-0x19, 0xC0, 0xB0, 0xE8,
-0x34, 0xC0, 0x44, 0xC4,
+	0x19, 0xC0, 0xB0, 0xE8,
+	0x34, 0xC0, 0x44, 0xC4,
 
-0x33, 0x73,
-0x00, 0xE0,
-0x3E, 0x62, 0x57, 0x9F,
+	0x33, 0x73,
+	0x00, 0xE0,
+	0x3E, 0x62, 0x57, 0x9F,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0xE0,
-0x0D, 0x20,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0xE0,
+	0x0D, 0x20,
 
-0x84, 0x3E, 0x58, 0xE9,
-0x28, 0x1D, 0x6F, 0x8F,
+	0x84, 0x3E, 0x58, 0xE9,
+	0x28, 0x1D, 0x6F, 0x8F,
 
-0x05, 0x20,
-0x00, 0xE0,
-0x85, 0x1E, 0x58, 0xE9,
+	0x05, 0x20,
+	0x00, 0xE0,
+	0x85, 0x1E, 0x58, 0xE9,
 
-0x9B, 0x3B, 0x33, 0xDF,
-0x20, 0x20, 0x42, 0xAF,
+	0x9B, 0x3B, 0x33, 0xDF,
+	0x20, 0x20, 0x42, 0xAF,
 
-0x30, 0x42, 0x56, 0x9F,
-0x80, 0x3E, 0x57, 0xE9,
+	0x30, 0x42, 0x56, 0x9F,
+	0x80, 0x3E, 0x57, 0xE9,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x30, 0x80, 0x5F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x30, 0x80, 0x5F, 0xE9,
 
-0x28, 0x28, 0x24, 0xAF,
-0x81, 0x1E, 0x57, 0xE9,
+	0x28, 0x28, 0x24, 0xAF,
+	0x81, 0x1E, 0x57, 0xE9,
 
-0x05, 0x47, 0x57, 0xBF,
-0x0D, 0x47, 0x4F, 0xBF,
+	0x05, 0x47, 0x57, 0xBF,
+	0x0D, 0x47, 0x4F, 0xBF,
 
-0x88, 0x80, 0x58, 0xE9,
-0x1B, 0x29, 0x1B, 0xDF,
+	0x88, 0x80, 0x58, 0xE9,
+	0x1B, 0x29, 0x1B, 0xDF,
 
-0x30, 0x1D, 0x6F, 0x8F,
-0x3A, 0x30, 0x4F, 0xE9,
+	0x30, 0x1D, 0x6F, 0x8F,
+	0x3A, 0x30, 0x4F, 0xE9,
 
-0x1C, 0x30, 0x26, 0xDF,
-0x09, 0xE3,
-0x3B, 0x05,
+	0x1C, 0x30, 0x26, 0xDF,
+	0x09, 0xE3,
+	0x3B, 0x05,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x3B, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x3B, 0x3F, 0x4F, 0xE9,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x00, 0xE0,
-0xAC, 0x20,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x00, 0xE0,
+	0xAC, 0x20,
 
-0x2D, 0x44, 0x4C, 0xB4,
-0x2C, 0x1C, 0xC0, 0xAF,
+	0x2D, 0x44, 0x4C, 0xB4,
+	0x2C, 0x1C, 0xC0, 0xAF,
 
-0x25, 0x44, 0x54, 0xB4,
-0x00, 0xE0,
-0xC8, 0x30,
+	0x25, 0x44, 0x54, 0xB4,
+	0x00, 0xE0,
+	0xC8, 0x30,
 
-0x30, 0x46, 0x30, 0xAF,
-0x1B, 0x1B, 0x48, 0xAF,
+	0x30, 0x46, 0x30, 0xAF,
+	0x1B, 0x1B, 0x48, 0xAF,
 
-0x00, 0xE0,
-0x25, 0x20,
-0x38, 0x2C, 0x4F, 0xE9,
+	0x00, 0xE0,
+	0x25, 0x20,
+	0x38, 0x2C, 0x4F, 0xE9,
 
-0x86, 0x80, 0x57, 0xE9,
-0x38, 0x1D, 0x6F, 0x8F,
+	0x86, 0x80, 0x57, 0xE9,
+	0x38, 0x1D, 0x6F, 0x8F,
 
-0x28, 0x74,
-0x00, 0xE0,
-0x0D, 0x44, 0x4C, 0xB0,
+	0x28, 0x74,
+	0x00, 0xE0,
+	0x0D, 0x44, 0x4C, 0xB0,
 
-0x05, 0x44, 0x54, 0xB0,
-0x2D, 0x20,
-0x9B, 0x10,
+	0x05, 0x44, 0x54, 0xB0,
+	0x2D, 0x20,
+	0x9B, 0x10,
 
-0x82, 0x3E, 0x57, 0xE9,
-0x32, 0xF0, 0x1B, 0xCD,
+	0x82, 0x3E, 0x57, 0xE9,
+	0x32, 0xF0, 0x1B, 0xCD,
 
-0x1E, 0xBD, 0x59, 0x9F,
-0x83, 0x1E, 0x57, 0xE9,
+	0x1E, 0xBD, 0x59, 0x9F,
+	0x83, 0x1E, 0x57, 0xE9,
 
-0x38, 0x47, 0x38, 0xAF,
-0x34, 0x20,
-0x2A, 0x30,
+	0x38, 0x47, 0x38, 0xAF,
+	0x34, 0x20,
+	0x2A, 0x30,
 
-0x00, 0xE0,
-0x0D, 0x20,
-0x32, 0x20,
-0x05, 0x20,
+	0x00, 0xE0,
+	0x0D, 0x20,
+	0x32, 0x20,
+	0x05, 0x20,
 
-0x87, 0x80, 0x57, 0xE9,
-0x1F, 0x54, 0x57, 0x9F,
+	0x87, 0x80, 0x57, 0xE9,
+	0x1F, 0x54, 0x57, 0x9F,
 
-0x17, 0x42, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x6A,
+	0x17, 0x42, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x6A,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x37, 0x1E, 0x4F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x37, 0x1E, 0x4F, 0xE9,
 
-0x37, 0x32, 0x2A, 0xAF,
-0x00, 0xE0,
-0x32, 0x00,
+	0x37, 0x32, 0x2A, 0xAF,
+	0x00, 0xE0,
+	0x32, 0x00,
 
-0x00, 0x80, 0x00, 0xE8,
-0x27, 0xC0, 0x44, 0xC0,
+	0x00, 0x80, 0x00, 0xE8,
+	0x27, 0xC0, 0x44, 0xC0,
 
-0x36, 0x1F, 0x4F, 0xE9,
-0x1F, 0x1F, 0x26, 0xDF,
+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0D, 0x21, 0x1A, 0xB6,
-0x05, 0x21, 0x31, 0xB6,
+	0x0D, 0x21, 0x1A, 0xB6,
+	0x05, 0x21, 0x31, 0xB6,
 
-0x03, 0x80, 0x2A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x2A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x0D, 0x20,
-0x05, 0x20,
-0x2F, 0xC0, 0x21, 0xC6,
+	0x0D, 0x20,
+	0x05, 0x20,
+	0x2F, 0xC0, 0x21, 0xC6,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x17, 0x50, 0x56, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x17, 0x50, 0x56, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0xE0,
-0x2F, 0x20,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0xE0,
+	0x2F, 0x20,
 
-0x00, 0x80, 0x00, 0xE8,
-0x28, 0x19, 0x60, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
+	0x28, 0x19, 0x60, 0xEC,
 
-0xB3, 0x05,
-0x00, 0xE0,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x05,
+	0x00, 0xE0,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x00, 0x80, 0x00, 0xE8,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x17, 0x26, 0x17, 0xDF,
-0x35, 0x17, 0x4F, 0xE9,
+	0x17, 0x26, 0x17, 0xDF,
+	0x35, 0x17, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x39, 0x37, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x39, 0x37, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x17, 0xAF,
-0x00, 0x80, 0x00, 0xE8,
+	0x2F, 0x2F, 0x17, 0xAF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x31, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x78, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x78, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x77, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x77, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x75, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x75, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x72, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x72, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgzs[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x8B, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
+	0x8B, 0x80, 0x07, 0xEA,
+	0x24, 0x1F, 0x20, 0xE9,
 
-0x21, 0x45, 0x80, 0xE8,
-0x1A, 0x4D, 0x80, 0xE8,
+	0x21, 0x45, 0x80, 0xE8,
+	0x1A, 0x4D, 0x80, 0xE8,
 
-0x31, 0x55, 0x80, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x55, 0x80, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0x41, 0x49, 0xBD,
-0x1D, 0x41, 0x51, 0xBD,
+	0x15, 0x41, 0x49, 0xBD,
+	0x1D, 0x41, 0x51, 0xBD,
 
-0x2E, 0x41, 0x2A, 0xB8,
-0x34, 0x53, 0xA0, 0xE8,
+	0x2E, 0x41, 0x2A, 0xB8,
+	0x34, 0x53, 0xA0, 0xE8,
 
-0x15, 0x30,
-0x1D, 0x30,
-0x58, 0xE3,
-0x00, 0xE0,
+	0x15, 0x30,
+	0x1D, 0x30,
+	0x58, 0xE3,
+	0x00, 0xE0,
 
-0xB5, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0xB5, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x24, 0x43, 0xA0, 0xE8,
-0x2C, 0x4B, 0xA0, 0xE8,
+	0x24, 0x43, 0xA0, 0xE8,
+	0x2C, 0x4B, 0xA0, 0xE8,
 
-0x15, 0x72,
-0x09, 0xE3,
-0x00, 0xE0,
-0x1D, 0x72,
+	0x15, 0x72,
+	0x09, 0xE3,
+	0x00, 0xE0,
+	0x1D, 0x72,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0x97, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x97, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6C, 0x64, 0xC8, 0xEC,
-0x98, 0xE1,
-0xB5, 0x05,
+	0x6C, 0x64, 0xC8, 0xEC,
+	0x98, 0xE1,
+	0xB5, 0x05,
 
-0xBD, 0x05,
-0x2E, 0x30,
-0x32, 0xC0, 0xA0, 0xE8,
+	0xBD, 0x05,
+	0x2E, 0x30,
+	0x32, 0xC0, 0xA0, 0xE8,
 
-0x33, 0xC0, 0xA0, 0xE8,
-0x74, 0x64, 0xC8, 0xEC,
+	0x33, 0xC0, 0xA0, 0xE8,
+	0x74, 0x64, 0xC8, 0xEC,
 
-0x40, 0x3C, 0x40, 0xAD,
-0x32, 0x6A,
-0x2A, 0x30,
+	0x40, 0x3C, 0x40, 0xAD,
+	0x32, 0x6A,
+	0x2A, 0x30,
 
-0x20, 0x73,
-0x33, 0x6A,
-0x00, 0xE0,
-0x28, 0x73,
+	0x20, 0x73,
+	0x33, 0x6A,
+	0x00, 0xE0,
+	0x28, 0x73,
 
-0x1C, 0x72,
-0x83, 0xE2,
-0x77, 0x80, 0x15, 0xEA,
+	0x1C, 0x72,
+	0x83, 0xE2,
+	0x77, 0x80, 0x15, 0xEA,
 
-0xB8, 0x3D, 0x28, 0xDF,
-0x30, 0x35, 0x20, 0xDF,
+	0xB8, 0x3D, 0x28, 0xDF,
+	0x30, 0x35, 0x20, 0xDF,
 
-0x40, 0x30,
-0x00, 0xE0,
-0xCC, 0xE2,
-0x64, 0x72,
+	0x40, 0x30,
+	0x00, 0xE0,
+	0xCC, 0xE2,
+	0x64, 0x72,
 
-0x25, 0x42, 0x52, 0xBF,
-0x2D, 0x42, 0x4A, 0xBF,
+	0x25, 0x42, 0x52, 0xBF,
+	0x2D, 0x42, 0x4A, 0xBF,
 
-0x30, 0x2E, 0x30, 0xDF,
-0x38, 0x2E, 0x38, 0xDF,
+	0x30, 0x2E, 0x30, 0xDF,
+	0x38, 0x2E, 0x38, 0xDF,
 
-0x18, 0x1D, 0x45, 0xE9,
-0x1E, 0x15, 0x45, 0xE9,
+	0x18, 0x1D, 0x45, 0xE9,
+	0x1E, 0x15, 0x45, 0xE9,
 
-0x2B, 0x49, 0x51, 0xBD,
-0x00, 0xE0,
-0x1F, 0x73,
+	0x2B, 0x49, 0x51, 0xBD,
+	0x00, 0xE0,
+	0x1F, 0x73,
 
-0x38, 0x38, 0x40, 0xAF,
-0x30, 0x30, 0x40, 0xAF,
+	0x38, 0x38, 0x40, 0xAF,
+	0x30, 0x30, 0x40, 0xAF,
 
-0x24, 0x1F, 0x24, 0xDF,
-0x1D, 0x32, 0x20, 0xE9,
+	0x24, 0x1F, 0x24, 0xDF,
+	0x1D, 0x32, 0x20, 0xE9,
 
-0x2C, 0x1F, 0x2C, 0xDF,
-0x1A, 0x33, 0x20, 0xE9,
+	0x2C, 0x1F, 0x2C, 0xDF,
+	0x1A, 0x33, 0x20, 0xE9,
 
-0xB0, 0x10,
-0x08, 0xE3,
-0x40, 0x10,
-0xB8, 0x10,
+	0xB0, 0x10,
+	0x08, 0xE3,
+	0x40, 0x10,
+	0xB8, 0x10,
 
-0x26, 0xF0, 0x30, 0xCD,
-0x2F, 0xF0, 0x38, 0xCD,
+	0x26, 0xF0, 0x30, 0xCD,
+	0x2F, 0xF0, 0x38, 0xCD,
 
-0x2B, 0x80, 0x20, 0xE9,
-0x2A, 0x80, 0x20, 0xE9,
+	0x2B, 0x80, 0x20, 0xE9,
+	0x2A, 0x80, 0x20, 0xE9,
 
-0xA6, 0x20,
-0x88, 0xE2,
-0x00, 0xE0,
-0xAF, 0x20,
+	0xA6, 0x20,
+	0x88, 0xE2,
+	0x00, 0xE0,
+	0xAF, 0x20,
 
-0x28, 0x2A, 0x26, 0xAF,
-0x20, 0x2A, 0xC0, 0xAF,
+	0x28, 0x2A, 0x26, 0xAF,
+	0x20, 0x2A, 0xC0, 0xAF,
 
-0x34, 0x1F, 0x34, 0xDF,
-0x46, 0x24, 0x46, 0xDF,
+	0x34, 0x1F, 0x34, 0xDF,
+	0x46, 0x24, 0x46, 0xDF,
 
-0x28, 0x30, 0x80, 0xBF,
-0x20, 0x38, 0x80, 0xBF,
+	0x28, 0x30, 0x80, 0xBF,
+	0x20, 0x38, 0x80, 0xBF,
 
-0x47, 0x24, 0x47, 0xDF,
-0x4E, 0x2C, 0x4E, 0xDF,
+	0x47, 0x24, 0x47, 0xDF,
+	0x4E, 0x2C, 0x4E, 0xDF,
 
-0x4F, 0x2C, 0x4F, 0xDF,
-0x56, 0x34, 0x56, 0xDF,
+	0x4F, 0x2C, 0x4F, 0xDF,
+	0x56, 0x34, 0x56, 0xDF,
 
-0x28, 0x15, 0x28, 0xDF,
-0x20, 0x1D, 0x20, 0xDF,
+	0x28, 0x15, 0x28, 0xDF,
+	0x20, 0x1D, 0x20, 0xDF,
 
-0x57, 0x34, 0x57, 0xDF,
-0x00, 0xE0,
-0x1D, 0x05,
+	0x57, 0x34, 0x57, 0xDF,
+	0x00, 0xE0,
+	0x1D, 0x05,
 
-0x04, 0x80, 0x10, 0xEA,
-0x89, 0xE2,
-0x2B, 0x30,
+	0x04, 0x80, 0x10, 0xEA,
+	0x89, 0xE2,
+	0x2B, 0x30,
 
-0x3F, 0xC1, 0x1D, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0xC1, 0x1D, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA0, 0x68,
-0xBF, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x68,
+	0xBF, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x20, 0xC0, 0x20, 0xAF,
-0x28, 0x05,
-0x97, 0x74,
+	0x20, 0xC0, 0x20, 0xAF,
+	0x28, 0x05,
+	0x97, 0x74,
 
-0x00, 0xE0,
-0x2A, 0x10,
-0x16, 0xC0, 0x20, 0xE9,
+	0x00, 0xE0,
+	0x2A, 0x10,
+	0x16, 0xC0, 0x20, 0xE9,
 
-0x04, 0x80, 0x10, 0xEA,
-0x8C, 0xE2,
-0x95, 0x05,
+	0x04, 0x80, 0x10, 0xEA,
+	0x8C, 0xE2,
+	0x95, 0x05,
 
-0x28, 0xC1, 0x28, 0xAD,
-0x1F, 0xC1, 0x15, 0xBD,
+	0x28, 0xC1, 0x28, 0xAD,
+	0x1F, 0xC1, 0x15, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA8, 0x67,
-0x9F, 0x6B,
-0x00, 0x80, 0x00, 0xE8,
+	0xA8, 0x67,
+	0x9F, 0x6B,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x28, 0xC0, 0x28, 0xAD,
-0x1D, 0x25,
-0x20, 0x05,
+	0x28, 0xC0, 0x28, 0xAD,
+	0x1D, 0x25,
+	0x20, 0x05,
 
-0x28, 0x32, 0x80, 0xAD,
-0x40, 0x2A, 0x40, 0xBD,
+	0x28, 0x32, 0x80, 0xAD,
+	0x40, 0x2A, 0x40, 0xBD,
 
-0x1C, 0x80, 0x20, 0xE9,
-0x20, 0x33, 0x20, 0xAD,
+	0x1C, 0x80, 0x20, 0xE9,
+	0x20, 0x33, 0x20, 0xAD,
 
-0x20, 0x73,
-0x00, 0xE0,
-0xB6, 0x49, 0x51, 0xBB,
+	0x20, 0x73,
+	0x00, 0xE0,
+	0xB6, 0x49, 0x51, 0xBB,
 
-0x26, 0x2F, 0xB0, 0xE8,
-0x19, 0x20, 0x20, 0xE9,
+	0x26, 0x2F, 0xB0, 0xE8,
+	0x19, 0x20, 0x20, 0xE9,
 
-0x35, 0x20, 0x35, 0xDF,
-0x3D, 0x20, 0x3D, 0xDF,
+	0x35, 0x20, 0x35, 0xDF,
+	0x3D, 0x20, 0x3D, 0xDF,
 
-0x15, 0x20, 0x15, 0xDF,
-0x1D, 0x20, 0x1D, 0xDF,
+	0x15, 0x20, 0x15, 0xDF,
+	0x1D, 0x20, 0x1D, 0xDF,
 
-0x26, 0xD0, 0x26, 0xCD,
-0x29, 0x49, 0x2A, 0xB8,
+	0x26, 0xD0, 0x26, 0xCD,
+	0x29, 0x49, 0x2A, 0xB8,
 
-0x26, 0x40, 0x80, 0xBD,
-0x3B, 0x48, 0x50, 0xBD,
+	0x26, 0x40, 0x80, 0xBD,
+	0x3B, 0x48, 0x50, 0xBD,
 
-0x3E, 0x54, 0x57, 0x9F,
-0x00, 0xE0,
-0x82, 0xE1,
+	0x3E, 0x54, 0x57, 0x9F,
+	0x00, 0xE0,
+	0x82, 0xE1,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x26, 0x30,
-0x29, 0x30,
-0x48, 0x3C, 0x48, 0xAD,
+	0x26, 0x30,
+	0x29, 0x30,
+	0x48, 0x3C, 0x48, 0xAD,
 
-0x2B, 0x72,
-0xC2, 0xE1,
-0x2C, 0xC0, 0x44, 0xC2,
+	0x2B, 0x72,
+	0xC2, 0xE1,
+	0x2C, 0xC0, 0x44, 0xC2,
 
-0x05, 0x24, 0x34, 0xBF,
-0x0D, 0x24, 0x2C, 0xBF,
+	0x05, 0x24, 0x34, 0xBF,
+	0x0D, 0x24, 0x2C, 0xBF,
 
-0x2D, 0x46, 0x4E, 0xBF,
-0x25, 0x46, 0x56, 0xBF,
+	0x2D, 0x46, 0x4E, 0xBF,
+	0x25, 0x46, 0x56, 0xBF,
 
-0x20, 0x1D, 0x6F, 0x8F,
-0x32, 0x3E, 0x5F, 0xE9,
+	0x20, 0x1D, 0x6F, 0x8F,
+	0x32, 0x3E, 0x5F, 0xE9,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x30,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x30,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x33, 0x1E, 0x5F, 0xE9,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x33, 0x1E, 0x5F, 0xE9,
 
-0x05, 0x44, 0x54, 0xB2,
-0x0D, 0x44, 0x4C, 0xB2,
+	0x05, 0x44, 0x54, 0xB2,
+	0x0D, 0x44, 0x4C, 0xB2,
 
-0x19, 0xC0, 0xB0, 0xE8,
-0x34, 0xC0, 0x44, 0xC4,
+	0x19, 0xC0, 0xB0, 0xE8,
+	0x34, 0xC0, 0x44, 0xC4,
 
-0x33, 0x73,
-0x00, 0xE0,
-0x3E, 0x62, 0x57, 0x9F,
+	0x33, 0x73,
+	0x00, 0xE0,
+	0x3E, 0x62, 0x57, 0x9F,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0xE0,
-0x0D, 0x20,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0xE0,
+	0x0D, 0x20,
 
-0x84, 0x3E, 0x58, 0xE9,
-0x28, 0x1D, 0x6F, 0x8F,
+	0x84, 0x3E, 0x58, 0xE9,
+	0x28, 0x1D, 0x6F, 0x8F,
 
-0x05, 0x20,
-0x00, 0xE0,
-0x85, 0x1E, 0x58, 0xE9,
+	0x05, 0x20,
+	0x00, 0xE0,
+	0x85, 0x1E, 0x58, 0xE9,
 
-0x9B, 0x3B, 0x33, 0xDF,
-0x20, 0x20, 0x42, 0xAF,
+	0x9B, 0x3B, 0x33, 0xDF,
+	0x20, 0x20, 0x42, 0xAF,
 
-0x30, 0x42, 0x56, 0x9F,
-0x80, 0x3E, 0x57, 0xE9,
+	0x30, 0x42, 0x56, 0x9F,
+	0x80, 0x3E, 0x57, 0xE9,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x30, 0x80, 0x5F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x30, 0x80, 0x5F, 0xE9,
 
-0x28, 0x28, 0x24, 0xAF,
-0x81, 0x1E, 0x57, 0xE9,
+	0x28, 0x28, 0x24, 0xAF,
+	0x81, 0x1E, 0x57, 0xE9,
 
-0x05, 0x47, 0x57, 0xBF,
-0x0D, 0x47, 0x4F, 0xBF,
+	0x05, 0x47, 0x57, 0xBF,
+	0x0D, 0x47, 0x4F, 0xBF,
 
-0x88, 0x80, 0x58, 0xE9,
-0x1B, 0x29, 0x1B, 0xDF,
+	0x88, 0x80, 0x58, 0xE9,
+	0x1B, 0x29, 0x1B, 0xDF,
 
-0x30, 0x1D, 0x6F, 0x8F,
-0x3A, 0x30, 0x4F, 0xE9,
+	0x30, 0x1D, 0x6F, 0x8F,
+	0x3A, 0x30, 0x4F, 0xE9,
 
-0x1C, 0x30, 0x26, 0xDF,
-0x09, 0xE3,
-0x3B, 0x05,
+	0x1C, 0x30, 0x26, 0xDF,
+	0x09, 0xE3,
+	0x3B, 0x05,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x3B, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x3B, 0x3F, 0x4F, 0xE9,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x00, 0xE0,
-0xAC, 0x20,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x00, 0xE0,
+	0xAC, 0x20,
 
-0x2D, 0x44, 0x4C, 0xB4,
-0x2C, 0x1C, 0xC0, 0xAF,
+	0x2D, 0x44, 0x4C, 0xB4,
+	0x2C, 0x1C, 0xC0, 0xAF,
 
-0x25, 0x44, 0x54, 0xB4,
-0x00, 0xE0,
-0xC8, 0x30,
+	0x25, 0x44, 0x54, 0xB4,
+	0x00, 0xE0,
+	0xC8, 0x30,
 
-0x30, 0x46, 0x30, 0xAF,
-0x1B, 0x1B, 0x48, 0xAF,
+	0x30, 0x46, 0x30, 0xAF,
+	0x1B, 0x1B, 0x48, 0xAF,
 
-0x00, 0xE0,
-0x25, 0x20,
-0x38, 0x2C, 0x4F, 0xE9,
+	0x00, 0xE0,
+	0x25, 0x20,
+	0x38, 0x2C, 0x4F, 0xE9,
 
-0x86, 0x80, 0x57, 0xE9,
-0x38, 0x1D, 0x6F, 0x8F,
+	0x86, 0x80, 0x57, 0xE9,
+	0x38, 0x1D, 0x6F, 0x8F,
 
-0x28, 0x74,
-0x00, 0xE0,
-0x0D, 0x44, 0x4C, 0xB0,
+	0x28, 0x74,
+	0x00, 0xE0,
+	0x0D, 0x44, 0x4C, 0xB0,
 
-0x05, 0x44, 0x54, 0xB0,
-0x2D, 0x20,
-0x9B, 0x10,
+	0x05, 0x44, 0x54, 0xB0,
+	0x2D, 0x20,
+	0x9B, 0x10,
 
-0x82, 0x3E, 0x57, 0xE9,
-0x32, 0xF0, 0x1B, 0xCD,
+	0x82, 0x3E, 0x57, 0xE9,
+	0x32, 0xF0, 0x1B, 0xCD,
 
-0x1E, 0xBD, 0x59, 0x9F,
-0x83, 0x1E, 0x57, 0xE9,
+	0x1E, 0xBD, 0x59, 0x9F,
+	0x83, 0x1E, 0x57, 0xE9,
 
-0x38, 0x47, 0x38, 0xAF,
-0x34, 0x20,
-0x2A, 0x30,
+	0x38, 0x47, 0x38, 0xAF,
+	0x34, 0x20,
+	0x2A, 0x30,
 
-0x00, 0xE0,
-0x0D, 0x20,
-0x32, 0x20,
-0x05, 0x20,
+	0x00, 0xE0,
+	0x0D, 0x20,
+	0x32, 0x20,
+	0x05, 0x20,
 
-0x87, 0x80, 0x57, 0xE9,
-0x1F, 0x54, 0x57, 0x9F,
+	0x87, 0x80, 0x57, 0xE9,
+	0x1F, 0x54, 0x57, 0x9F,
 
-0x17, 0x42, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x6A,
+	0x17, 0x42, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x6A,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x37, 0x1E, 0x4F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x37, 0x1E, 0x4F, 0xE9,
 
-0x37, 0x32, 0x2A, 0xAF,
-0x00, 0xE0,
-0x32, 0x00,
+	0x37, 0x32, 0x2A, 0xAF,
+	0x00, 0xE0,
+	0x32, 0x00,
 
-0x00, 0x80, 0x00, 0xE8,
-0x27, 0xC0, 0x44, 0xC0,
+	0x00, 0x80, 0x00, 0xE8,
+	0x27, 0xC0, 0x44, 0xC0,
 
-0x36, 0x1F, 0x4F, 0xE9,
-0x1F, 0x1F, 0x26, 0xDF,
+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2D, 0x21, 0x1A, 0xB0,
-0x25, 0x21, 0x31, 0xB0,
+	0x2D, 0x21, 0x1A, 0xB0,
+	0x25, 0x21, 0x31, 0xB0,
 
-0x0D, 0x21, 0x1A, 0xB2,
-0x05, 0x21, 0x31, 0xB2,
+	0x0D, 0x21, 0x1A, 0xB2,
+	0x05, 0x21, 0x31, 0xB2,
 
-0x03, 0x80, 0x2A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x2A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x2D, 0x20,
-0x25, 0x20,
-0x05, 0x20,
-0x0D, 0x20,
+	0x2D, 0x20,
+	0x25, 0x20,
+	0x05, 0x20,
+	0x0D, 0x20,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x2F, 0xC0, 0x21, 0xC0,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x2F, 0xC0, 0x21, 0xC0,
 
-0x16, 0x42, 0x56, 0x9F,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x16, 0x42, 0x56, 0x9F,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x1E, 0x62, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0x62, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x21, 0x31, 0xB4,
-0x2D, 0x21, 0x1A, 0xB4,
+	0x25, 0x21, 0x31, 0xB4,
+	0x2D, 0x21, 0x1A, 0xB4,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0x05,
-0x00, 0xE0,
-0x28, 0x19, 0x60, 0xEC,
+	0x33, 0x05,
+	0x00, 0xE0,
+	0x28, 0x19, 0x60, 0xEC,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0xE0,
-0x2F, 0x20,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0xE0,
+	0x2F, 0x20,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x1E, 0x26, 0x1E, 0xDF,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x1E, 0x26, 0x1E, 0xDF,
 
-0xA7, 0x1E, 0x4F, 0xE9,
-0x17, 0x26, 0x16, 0xDF,
+	0xA7, 0x1E, 0x4F, 0xE9,
+	0x17, 0x26, 0x16, 0xDF,
 
-0x2D, 0x20,
-0x00, 0xE0,
-0xA8, 0x3F, 0x4F, 0xE9,
+	0x2D, 0x20,
+	0x00, 0xE0,
+	0xA8, 0x3F, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x1E, 0xAF,
-0x25, 0x20,
-0x00, 0xE0,
+	0x2F, 0x2F, 0x1E, 0xAF,
+	0x25, 0x20,
+	0x00, 0xE0,
 
-0xA4, 0x16, 0x4F, 0xE9,
-0x0F, 0xC0, 0x21, 0xC2,
+	0xA4, 0x16, 0x4F, 0xE9,
+	0x0F, 0xC0, 0x21, 0xC2,
 
-0xA6, 0x80, 0x4F, 0xE9,
-0x1F, 0x62, 0x57, 0x9F,
+	0xA6, 0x80, 0x4F, 0xE9,
+	0x1F, 0x62, 0x57, 0x9F,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0xE0,
-0x8F, 0x20,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0xE0,
+	0x8F, 0x20,
 
-0xA5, 0x37, 0x4F, 0xE9,
-0x0F, 0x17, 0x0F, 0xAF,
+	0xA5, 0x37, 0x4F, 0xE9,
+	0x0F, 0x17, 0x0F, 0xAF,
 
-0x06, 0xC0, 0x21, 0xC4,
-0x00, 0x80, 0x00, 0xE8,
+	0x06, 0xC0, 0x21, 0xC4,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0xA3, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0xA3, 0x80, 0x4F, 0xE9,
 
-0x06, 0x20,
-0x00, 0xE0,
-0x1F, 0x26, 0x1F, 0xDF,
+	0x06, 0x20,
+	0x00, 0xE0,
+	0x1F, 0x26, 0x1F, 0xDF,
 
-0xA1, 0x1F, 0x4F, 0xE9,
-0xA2, 0x3F, 0x4F, 0xE9,
+	0xA1, 0x1F, 0x4F, 0xE9,
+	0xA2, 0x3F, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x06, 0x06, 0x1F, 0xAF,
-0x00, 0x80, 0x00, 0xE8,
+	0x06, 0x06, 0x1F, 0xAF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA0, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x6C, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x6C, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6B, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x6B, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x69, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x69, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x66, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgzsa[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x8F, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
+	0x8F, 0x80, 0x07, 0xEA,
+	0x24, 0x1F, 0x20, 0xE9,
 
-0x21, 0x45, 0x80, 0xE8,
-0x1A, 0x4D, 0x80, 0xE8,
+	0x21, 0x45, 0x80, 0xE8,
+	0x1A, 0x4D, 0x80, 0xE8,
 
-0x31, 0x55, 0x80, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x55, 0x80, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0x41, 0x49, 0xBD,
-0x1D, 0x41, 0x51, 0xBD,
+	0x15, 0x41, 0x49, 0xBD,
+	0x1D, 0x41, 0x51, 0xBD,
 
-0x2E, 0x41, 0x2A, 0xB8,
-0x34, 0x53, 0xA0, 0xE8,
+	0x2E, 0x41, 0x2A, 0xB8,
+	0x34, 0x53, 0xA0, 0xE8,
 
-0x15, 0x30,
-0x1D, 0x30,
-0x58, 0xE3,
-0x00, 0xE0,
+	0x15, 0x30,
+	0x1D, 0x30,
+	0x58, 0xE3,
+	0x00, 0xE0,
 
-0xB5, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0xB5, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x24, 0x43, 0xA0, 0xE8,
-0x2C, 0x4B, 0xA0, 0xE8,
+	0x24, 0x43, 0xA0, 0xE8,
+	0x2C, 0x4B, 0xA0, 0xE8,
 
-0x15, 0x72,
-0x09, 0xE3,
-0x00, 0xE0,
-0x1D, 0x72,
+	0x15, 0x72,
+	0x09, 0xE3,
+	0x00, 0xE0,
+	0x1D, 0x72,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0x97, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x97, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x6C, 0x64, 0xC8, 0xEC,
-0x98, 0xE1,
-0xB5, 0x05,
+	0x6C, 0x64, 0xC8, 0xEC,
+	0x98, 0xE1,
+	0xB5, 0x05,
 
-0xBD, 0x05,
-0x2E, 0x30,
-0x32, 0xC0, 0xA0, 0xE8,
+	0xBD, 0x05,
+	0x2E, 0x30,
+	0x32, 0xC0, 0xA0, 0xE8,
 
-0x33, 0xC0, 0xA0, 0xE8,
-0x74, 0x64, 0xC8, 0xEC,
+	0x33, 0xC0, 0xA0, 0xE8,
+	0x74, 0x64, 0xC8, 0xEC,
 
-0x40, 0x3C, 0x40, 0xAD,
-0x32, 0x6A,
-0x2A, 0x30,
+	0x40, 0x3C, 0x40, 0xAD,
+	0x32, 0x6A,
+	0x2A, 0x30,
 
-0x20, 0x73,
-0x33, 0x6A,
-0x00, 0xE0,
-0x28, 0x73,
+	0x20, 0x73,
+	0x33, 0x6A,
+	0x00, 0xE0,
+	0x28, 0x73,
 
-0x1C, 0x72,
-0x83, 0xE2,
-0x7B, 0x80, 0x15, 0xEA,
+	0x1C, 0x72,
+	0x83, 0xE2,
+	0x7B, 0x80, 0x15, 0xEA,
 
-0xB8, 0x3D, 0x28, 0xDF,
-0x30, 0x35, 0x20, 0xDF,
+	0xB8, 0x3D, 0x28, 0xDF,
+	0x30, 0x35, 0x20, 0xDF,
 
-0x40, 0x30,
-0x00, 0xE0,
-0xCC, 0xE2,
-0x64, 0x72,
+	0x40, 0x30,
+	0x00, 0xE0,
+	0xCC, 0xE2,
+	0x64, 0x72,
 
-0x25, 0x42, 0x52, 0xBF,
-0x2D, 0x42, 0x4A, 0xBF,
+	0x25, 0x42, 0x52, 0xBF,
+	0x2D, 0x42, 0x4A, 0xBF,
 
-0x30, 0x2E, 0x30, 0xDF,
-0x38, 0x2E, 0x38, 0xDF,
+	0x30, 0x2E, 0x30, 0xDF,
+	0x38, 0x2E, 0x38, 0xDF,
 
-0x18, 0x1D, 0x45, 0xE9,
-0x1E, 0x15, 0x45, 0xE9,
+	0x18, 0x1D, 0x45, 0xE9,
+	0x1E, 0x15, 0x45, 0xE9,
 
-0x2B, 0x49, 0x51, 0xBD,
-0x00, 0xE0,
-0x1F, 0x73,
+	0x2B, 0x49, 0x51, 0xBD,
+	0x00, 0xE0,
+	0x1F, 0x73,
 
-0x38, 0x38, 0x40, 0xAF,
-0x30, 0x30, 0x40, 0xAF,
+	0x38, 0x38, 0x40, 0xAF,
+	0x30, 0x30, 0x40, 0xAF,
 
-0x24, 0x1F, 0x24, 0xDF,
-0x1D, 0x32, 0x20, 0xE9,
+	0x24, 0x1F, 0x24, 0xDF,
+	0x1D, 0x32, 0x20, 0xE9,
 
-0x2C, 0x1F, 0x2C, 0xDF,
-0x1A, 0x33, 0x20, 0xE9,
+	0x2C, 0x1F, 0x2C, 0xDF,
+	0x1A, 0x33, 0x20, 0xE9,
 
-0xB0, 0x10,
-0x08, 0xE3,
-0x40, 0x10,
-0xB8, 0x10,
+	0xB0, 0x10,
+	0x08, 0xE3,
+	0x40, 0x10,
+	0xB8, 0x10,
 
-0x26, 0xF0, 0x30, 0xCD,
-0x2F, 0xF0, 0x38, 0xCD,
+	0x26, 0xF0, 0x30, 0xCD,
+	0x2F, 0xF0, 0x38, 0xCD,
 
-0x2B, 0x80, 0x20, 0xE9,
-0x2A, 0x80, 0x20, 0xE9,
+	0x2B, 0x80, 0x20, 0xE9,
+	0x2A, 0x80, 0x20, 0xE9,
 
-0xA6, 0x20,
-0x88, 0xE2,
-0x00, 0xE0,
-0xAF, 0x20,
+	0xA6, 0x20,
+	0x88, 0xE2,
+	0x00, 0xE0,
+	0xAF, 0x20,
 
-0x28, 0x2A, 0x26, 0xAF,
-0x20, 0x2A, 0xC0, 0xAF,
+	0x28, 0x2A, 0x26, 0xAF,
+	0x20, 0x2A, 0xC0, 0xAF,
 
-0x34, 0x1F, 0x34, 0xDF,
-0x46, 0x24, 0x46, 0xDF,
+	0x34, 0x1F, 0x34, 0xDF,
+	0x46, 0x24, 0x46, 0xDF,
 
-0x28, 0x30, 0x80, 0xBF,
-0x20, 0x38, 0x80, 0xBF,
+	0x28, 0x30, 0x80, 0xBF,
+	0x20, 0x38, 0x80, 0xBF,
 
-0x47, 0x24, 0x47, 0xDF,
-0x4E, 0x2C, 0x4E, 0xDF,
+	0x47, 0x24, 0x47, 0xDF,
+	0x4E, 0x2C, 0x4E, 0xDF,
 
-0x4F, 0x2C, 0x4F, 0xDF,
-0x56, 0x34, 0x56, 0xDF,
+	0x4F, 0x2C, 0x4F, 0xDF,
+	0x56, 0x34, 0x56, 0xDF,
 
-0x28, 0x15, 0x28, 0xDF,
-0x20, 0x1D, 0x20, 0xDF,
+	0x28, 0x15, 0x28, 0xDF,
+	0x20, 0x1D, 0x20, 0xDF,
 
-0x57, 0x34, 0x57, 0xDF,
-0x00, 0xE0,
-0x1D, 0x05,
+	0x57, 0x34, 0x57, 0xDF,
+	0x00, 0xE0,
+	0x1D, 0x05,
 
-0x04, 0x80, 0x10, 0xEA,
-0x89, 0xE2,
-0x2B, 0x30,
+	0x04, 0x80, 0x10, 0xEA,
+	0x89, 0xE2,
+	0x2B, 0x30,
 
-0x3F, 0xC1, 0x1D, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0xC1, 0x1D, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA0, 0x68,
-0xBF, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x68,
+	0xBF, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x20, 0xC0, 0x20, 0xAF,
-0x28, 0x05,
-0x97, 0x74,
+	0x20, 0xC0, 0x20, 0xAF,
+	0x28, 0x05,
+	0x97, 0x74,
 
-0x00, 0xE0,
-0x2A, 0x10,
-0x16, 0xC0, 0x20, 0xE9,
+	0x00, 0xE0,
+	0x2A, 0x10,
+	0x16, 0xC0, 0x20, 0xE9,
 
-0x04, 0x80, 0x10, 0xEA,
-0x8C, 0xE2,
-0x95, 0x05,
+	0x04, 0x80, 0x10, 0xEA,
+	0x8C, 0xE2,
+	0x95, 0x05,
 
-0x28, 0xC1, 0x28, 0xAD,
-0x1F, 0xC1, 0x15, 0xBD,
+	0x28, 0xC1, 0x28, 0xAD,
+	0x1F, 0xC1, 0x15, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA8, 0x67,
-0x9F, 0x6B,
-0x00, 0x80, 0x00, 0xE8,
+	0xA8, 0x67,
+	0x9F, 0x6B,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x28, 0xC0, 0x28, 0xAD,
-0x1D, 0x25,
-0x20, 0x05,
+	0x28, 0xC0, 0x28, 0xAD,
+	0x1D, 0x25,
+	0x20, 0x05,
 
-0x28, 0x32, 0x80, 0xAD,
-0x40, 0x2A, 0x40, 0xBD,
+	0x28, 0x32, 0x80, 0xAD,
+	0x40, 0x2A, 0x40, 0xBD,
 
-0x1C, 0x80, 0x20, 0xE9,
-0x20, 0x33, 0x20, 0xAD,
+	0x1C, 0x80, 0x20, 0xE9,
+	0x20, 0x33, 0x20, 0xAD,
 
-0x20, 0x73,
-0x00, 0xE0,
-0xB6, 0x49, 0x51, 0xBB,
+	0x20, 0x73,
+	0x00, 0xE0,
+	0xB6, 0x49, 0x51, 0xBB,
 
-0x26, 0x2F, 0xB0, 0xE8,
-0x19, 0x20, 0x20, 0xE9,
+	0x26, 0x2F, 0xB0, 0xE8,
+	0x19, 0x20, 0x20, 0xE9,
 
-0x35, 0x20, 0x35, 0xDF,
-0x3D, 0x20, 0x3D, 0xDF,
+	0x35, 0x20, 0x35, 0xDF,
+	0x3D, 0x20, 0x3D, 0xDF,
 
-0x15, 0x20, 0x15, 0xDF,
-0x1D, 0x20, 0x1D, 0xDF,
+	0x15, 0x20, 0x15, 0xDF,
+	0x1D, 0x20, 0x1D, 0xDF,
 
-0x26, 0xD0, 0x26, 0xCD,
-0x29, 0x49, 0x2A, 0xB8,
+	0x26, 0xD0, 0x26, 0xCD,
+	0x29, 0x49, 0x2A, 0xB8,
 
-0x26, 0x40, 0x80, 0xBD,
-0x3B, 0x48, 0x50, 0xBD,
+	0x26, 0x40, 0x80, 0xBD,
+	0x3B, 0x48, 0x50, 0xBD,
 
-0x3E, 0x54, 0x57, 0x9F,
-0x00, 0xE0,
-0x82, 0xE1,
+	0x3E, 0x54, 0x57, 0x9F,
+	0x00, 0xE0,
+	0x82, 0xE1,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x26, 0x30,
-0x29, 0x30,
-0x48, 0x3C, 0x48, 0xAD,
+	0x26, 0x30,
+	0x29, 0x30,
+	0x48, 0x3C, 0x48, 0xAD,
 
-0x2B, 0x72,
-0xC2, 0xE1,
-0x2C, 0xC0, 0x44, 0xC2,
+	0x2B, 0x72,
+	0xC2, 0xE1,
+	0x2C, 0xC0, 0x44, 0xC2,
 
-0x05, 0x24, 0x34, 0xBF,
-0x0D, 0x24, 0x2C, 0xBF,
+	0x05, 0x24, 0x34, 0xBF,
+	0x0D, 0x24, 0x2C, 0xBF,
 
-0x2D, 0x46, 0x4E, 0xBF,
-0x25, 0x46, 0x56, 0xBF,
+	0x2D, 0x46, 0x4E, 0xBF,
+	0x25, 0x46, 0x56, 0xBF,
 
-0x20, 0x1D, 0x6F, 0x8F,
-0x32, 0x3E, 0x5F, 0xE9,
+	0x20, 0x1D, 0x6F, 0x8F,
+	0x32, 0x3E, 0x5F, 0xE9,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x30,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x30,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x33, 0x1E, 0x5F, 0xE9,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x33, 0x1E, 0x5F, 0xE9,
 
-0x05, 0x44, 0x54, 0xB2,
-0x0D, 0x44, 0x4C, 0xB2,
+	0x05, 0x44, 0x54, 0xB2,
+	0x0D, 0x44, 0x4C, 0xB2,
 
-0x19, 0xC0, 0xB0, 0xE8,
-0x34, 0xC0, 0x44, 0xC4,
+	0x19, 0xC0, 0xB0, 0xE8,
+	0x34, 0xC0, 0x44, 0xC4,
 
-0x33, 0x73,
-0x00, 0xE0,
-0x3E, 0x62, 0x57, 0x9F,
+	0x33, 0x73,
+	0x00, 0xE0,
+	0x3E, 0x62, 0x57, 0x9F,
 
-0x1E, 0xAF, 0x59, 0x9F,
-0x00, 0xE0,
-0x0D, 0x20,
+	0x1E, 0xAF, 0x59, 0x9F,
+	0x00, 0xE0,
+	0x0D, 0x20,
 
-0x84, 0x3E, 0x58, 0xE9,
-0x28, 0x1D, 0x6F, 0x8F,
+	0x84, 0x3E, 0x58, 0xE9,
+	0x28, 0x1D, 0x6F, 0x8F,
 
-0x05, 0x20,
-0x00, 0xE0,
-0x85, 0x1E, 0x58, 0xE9,
+	0x05, 0x20,
+	0x00, 0xE0,
+	0x85, 0x1E, 0x58, 0xE9,
 
-0x9B, 0x3B, 0x33, 0xDF,
-0x20, 0x20, 0x42, 0xAF,
+	0x9B, 0x3B, 0x33, 0xDF,
+	0x20, 0x20, 0x42, 0xAF,
 
-0x30, 0x42, 0x56, 0x9F,
-0x80, 0x3E, 0x57, 0xE9,
+	0x30, 0x42, 0x56, 0x9F,
+	0x80, 0x3E, 0x57, 0xE9,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x30, 0x80, 0x5F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x30, 0x80, 0x5F, 0xE9,
 
-0x28, 0x28, 0x24, 0xAF,
-0x81, 0x1E, 0x57, 0xE9,
+	0x28, 0x28, 0x24, 0xAF,
+	0x81, 0x1E, 0x57, 0xE9,
 
-0x05, 0x47, 0x57, 0xBF,
-0x0D, 0x47, 0x4F, 0xBF,
+	0x05, 0x47, 0x57, 0xBF,
+	0x0D, 0x47, 0x4F, 0xBF,
 
-0x88, 0x80, 0x58, 0xE9,
-0x1B, 0x29, 0x1B, 0xDF,
+	0x88, 0x80, 0x58, 0xE9,
+	0x1B, 0x29, 0x1B, 0xDF,
 
-0x30, 0x1D, 0x6F, 0x8F,
-0x3A, 0x30, 0x4F, 0xE9,
+	0x30, 0x1D, 0x6F, 0x8F,
+	0x3A, 0x30, 0x4F, 0xE9,
 
-0x1C, 0x30, 0x26, 0xDF,
-0x09, 0xE3,
-0x3B, 0x05,
+	0x1C, 0x30, 0x26, 0xDF,
+	0x09, 0xE3,
+	0x3B, 0x05,
 
-0x3E, 0x50, 0x56, 0x9F,
-0x3B, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x50, 0x56, 0x9F,
+	0x3B, 0x3F, 0x4F, 0xE9,
 
-0x1E, 0x8F, 0x51, 0x9F,
-0x00, 0xE0,
-0xAC, 0x20,
+	0x1E, 0x8F, 0x51, 0x9F,
+	0x00, 0xE0,
+	0xAC, 0x20,
 
-0x2D, 0x44, 0x4C, 0xB4,
-0x2C, 0x1C, 0xC0, 0xAF,
+	0x2D, 0x44, 0x4C, 0xB4,
+	0x2C, 0x1C, 0xC0, 0xAF,
 
-0x25, 0x44, 0x54, 0xB4,
-0x00, 0xE0,
-0xC8, 0x30,
+	0x25, 0x44, 0x54, 0xB4,
+	0x00, 0xE0,
+	0xC8, 0x30,
 
-0x30, 0x46, 0x30, 0xAF,
-0x1B, 0x1B, 0x48, 0xAF,
+	0x30, 0x46, 0x30, 0xAF,
+	0x1B, 0x1B, 0x48, 0xAF,
 
-0x00, 0xE0,
-0x25, 0x20,
-0x38, 0x2C, 0x4F, 0xE9,
+	0x00, 0xE0,
+	0x25, 0x20,
+	0x38, 0x2C, 0x4F, 0xE9,
 
-0x86, 0x80, 0x57, 0xE9,
-0x38, 0x1D, 0x6F, 0x8F,
+	0x86, 0x80, 0x57, 0xE9,
+	0x38, 0x1D, 0x6F, 0x8F,
 
-0x28, 0x74,
-0x00, 0xE0,
-0x0D, 0x44, 0x4C, 0xB0,
+	0x28, 0x74,
+	0x00, 0xE0,
+	0x0D, 0x44, 0x4C, 0xB0,
 
-0x05, 0x44, 0x54, 0xB0,
-0x2D, 0x20,
-0x9B, 0x10,
+	0x05, 0x44, 0x54, 0xB0,
+	0x2D, 0x20,
+	0x9B, 0x10,
 
-0x82, 0x3E, 0x57, 0xE9,
-0x32, 0xF0, 0x1B, 0xCD,
+	0x82, 0x3E, 0x57, 0xE9,
+	0x32, 0xF0, 0x1B, 0xCD,
 
-0x1E, 0xBD, 0x59, 0x9F,
-0x83, 0x1E, 0x57, 0xE9,
+	0x1E, 0xBD, 0x59, 0x9F,
+	0x83, 0x1E, 0x57, 0xE9,
 
-0x38, 0x47, 0x38, 0xAF,
-0x34, 0x20,
-0x2A, 0x30,
+	0x38, 0x47, 0x38, 0xAF,
+	0x34, 0x20,
+	0x2A, 0x30,
 
-0x00, 0xE0,
-0x0D, 0x20,
-0x32, 0x20,
-0x05, 0x20,
+	0x00, 0xE0,
+	0x0D, 0x20,
+	0x32, 0x20,
+	0x05, 0x20,
 
-0x87, 0x80, 0x57, 0xE9,
-0x1F, 0x54, 0x57, 0x9F,
+	0x87, 0x80, 0x57, 0xE9,
+	0x1F, 0x54, 0x57, 0x9F,
 
-0x17, 0x42, 0x56, 0x9F,
-0x00, 0xE0,
-0x3B, 0x6A,
+	0x17, 0x42, 0x56, 0x9F,
+	0x00, 0xE0,
+	0x3B, 0x6A,
 
-0x3F, 0x8F, 0x51, 0x9F,
-0x37, 0x1E, 0x4F, 0xE9,
+	0x3F, 0x8F, 0x51, 0x9F,
+	0x37, 0x1E, 0x4F, 0xE9,
 
-0x37, 0x32, 0x2A, 0xAF,
-0x00, 0xE0,
-0x32, 0x00,
+	0x37, 0x32, 0x2A, 0xAF,
+	0x00, 0xE0,
+	0x32, 0x00,
 
-0x00, 0x80, 0x00, 0xE8,
-0x27, 0xC0, 0x44, 0xC0,
+	0x00, 0x80, 0x00, 0xE8,
+	0x27, 0xC0, 0x44, 0xC0,
 
-0x36, 0x1F, 0x4F, 0xE9,
-0x1F, 0x1F, 0x26, 0xDF,
+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2D, 0x21, 0x1A, 0xB0,
-0x25, 0x21, 0x31, 0xB0,
+	0x2D, 0x21, 0x1A, 0xB0,
+	0x25, 0x21, 0x31, 0xB0,
 
-0x0D, 0x21, 0x1A, 0xB2,
-0x05, 0x21, 0x31, 0xB2,
+	0x0D, 0x21, 0x1A, 0xB2,
+	0x05, 0x21, 0x31, 0xB2,
 
-0x03, 0x80, 0x2A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x2A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x2D, 0x20,
-0x25, 0x20,
-0x05, 0x20,
-0x0D, 0x20,
+	0x2D, 0x20,
+	0x25, 0x20,
+	0x05, 0x20,
+	0x0D, 0x20,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x2F, 0xC0, 0x21, 0xC0,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x2F, 0xC0, 0x21, 0xC0,
 
-0x16, 0x42, 0x56, 0x9F,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x16, 0x42, 0x56, 0x9F,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x1E, 0x62, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0x62, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x21, 0x31, 0xB4,
-0x2D, 0x21, 0x1A, 0xB4,
+	0x25, 0x21, 0x31, 0xB4,
+	0x2D, 0x21, 0x1A, 0xB4,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0x05,
-0x00, 0xE0,
-0x28, 0x19, 0x60, 0xEC,
+	0x33, 0x05,
+	0x00, 0xE0,
+	0x28, 0x19, 0x60, 0xEC,
 
-0x0D, 0x44, 0x4C, 0xB6,
-0x05, 0x44, 0x54, 0xB6,
+	0x0D, 0x44, 0x4C, 0xB6,
+	0x05, 0x44, 0x54, 0xB6,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0xE0,
-0x2F, 0x20,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0xE0,
+	0x2F, 0x20,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x1E, 0x26, 0x1E, 0xDF,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x1E, 0x26, 0x1E, 0xDF,
 
-0xA7, 0x1E, 0x4F, 0xE9,
-0x17, 0x26, 0x16, 0xDF,
+	0xA7, 0x1E, 0x4F, 0xE9,
+	0x17, 0x26, 0x16, 0xDF,
 
-0x2D, 0x20,
-0x00, 0xE0,
-0xA8, 0x3F, 0x4F, 0xE9,
+	0x2D, 0x20,
+	0x00, 0xE0,
+	0xA8, 0x3F, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x1E, 0xAF,
-0x25, 0x20,
-0x00, 0xE0,
+	0x2F, 0x2F, 0x1E, 0xAF,
+	0x25, 0x20,
+	0x00, 0xE0,
 
-0xA4, 0x16, 0x4F, 0xE9,
-0x0F, 0xC0, 0x21, 0xC2,
+	0xA4, 0x16, 0x4F, 0xE9,
+	0x0F, 0xC0, 0x21, 0xC2,
 
-0xA6, 0x80, 0x4F, 0xE9,
-0x1F, 0x62, 0x57, 0x9F,
+	0xA6, 0x80, 0x4F, 0xE9,
+	0x1F, 0x62, 0x57, 0x9F,
 
-0x0D, 0x20,
-0x05, 0x20,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x20,
+	0x05, 0x20,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0xE0,
-0x0F, 0x20,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0xE0,
+	0x0F, 0x20,
 
-0x17, 0x50, 0x56, 0x9F,
-0xA5, 0x37, 0x4F, 0xE9,
+	0x17, 0x50, 0x56, 0x9F,
+	0xA5, 0x37, 0x4F, 0xE9,
 
-0x06, 0xC0, 0x21, 0xC4,
-0x0F, 0x17, 0x0F, 0xAF,
+	0x06, 0xC0, 0x21, 0xC4,
+	0x0F, 0x17, 0x0F, 0xAF,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2F, 0xC0, 0x44, 0xC6,
-0xA3, 0x80, 0x4F, 0xE9,
+	0x2F, 0xC0, 0x44, 0xC6,
+	0xA3, 0x80, 0x4F, 0xE9,
 
-0x06, 0x20,
-0x00, 0xE0,
-0x1F, 0x26, 0x1F, 0xDF,
+	0x06, 0x20,
+	0x00, 0xE0,
+	0x1F, 0x26, 0x1F, 0xDF,
 
-0x17, 0x26, 0x17, 0xDF,
-0x9D, 0x17, 0x4F, 0xE9,
+	0x17, 0x26, 0x17, 0xDF,
+	0x9D, 0x17, 0x4F, 0xE9,
 
-0xA1, 0x1F, 0x4F, 0xE9,
-0xA2, 0x3F, 0x4F, 0xE9,
+	0xA1, 0x1F, 0x4F, 0xE9,
+	0xA2, 0x3F, 0x4F, 0xE9,
 
-0x06, 0x06, 0x1F, 0xAF,
-0x00, 0xE0,
-0xAF, 0x20,
+	0x06, 0x06, 0x1F, 0xAF,
+	0x00, 0xE0,
+	0xAF, 0x20,
 
-0x9E, 0x37, 0x4F, 0xE9,
-0x2F, 0x17, 0x2F, 0xAF,
+	0x9E, 0x37, 0x4F, 0xE9,
+	0x2F, 0x17, 0x2F, 0xAF,
 
-0xA0, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x9C, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0x80, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x68, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x68, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x67, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x67, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x65, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x65, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x62, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x62, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgzsaf[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x94, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
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-0x00, 0x80, 0x00, 0xE8,
-0x27, 0xC0, 0x44, 0xC0,
+	0x00, 0x80, 0x00, 0xE8,
+	0x27, 0xC0, 0x44, 0xC0,
 
-0x36, 0x1F, 0x4F, 0xE9,
-0x1F, 0x1F, 0x26, 0xDF,
+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2D, 0x21, 0x1A, 0xB0,
-0x25, 0x21, 0x31, 0xB0,
+	0x2D, 0x21, 0x1A, 0xB0,
+	0x25, 0x21, 0x31, 0xB0,
 
-0x0D, 0x21, 0x1A, 0xB2,
-0x05, 0x21, 0x31, 0xB2,
+	0x0D, 0x21, 0x1A, 0xB2,
+	0x05, 0x21, 0x31, 0xB2,
 
-0x03, 0x80, 0x2A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x2A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x2D, 0x20,
-0x25, 0x20,
-0x05, 0x20,
-0x0D, 0x20,
+	0x2D, 0x20,
+	0x25, 0x20,
+	0x05, 0x20,
+	0x0D, 0x20,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x2F, 0xC0, 0x21, 0xC0,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x2F, 0xC0, 0x21, 0xC0,
 
-0x16, 0x42, 0x56, 0x9F,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x16, 0x42, 0x56, 0x9F,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x1E, 0x62, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0x62, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x21, 0x31, 0xB4,
-0x2D, 0x21, 0x1A, 0xB4,
+	0x25, 0x21, 0x31, 0xB4,
+	0x2D, 0x21, 0x1A, 0xB4,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0x05,
-0x00, 0xE0,
-0x28, 0x19, 0x60, 0xEC,
+	0x33, 0x05,
+	0x00, 0xE0,
+	0x28, 0x19, 0x60, 0xEC,
 
-0x0D, 0x21, 0x1A, 0xB6,
-0x05, 0x21, 0x31, 0xB6,
+	0x0D, 0x21, 0x1A, 0xB6,
+	0x05, 0x21, 0x31, 0xB6,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0xE0,
-0x2F, 0x20,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0xE0,
+	0x2F, 0x20,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x1E, 0x26, 0x1E, 0xDF,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x1E, 0x26, 0x1E, 0xDF,
 
-0xA7, 0x1E, 0x4F, 0xE9,
-0x17, 0x26, 0x16, 0xDF,
+	0xA7, 0x1E, 0x4F, 0xE9,
+	0x17, 0x26, 0x16, 0xDF,
 
-0x2D, 0x20,
-0x00, 0xE0,
-0xA8, 0x3F, 0x4F, 0xE9,
+	0x2D, 0x20,
+	0x00, 0xE0,
+	0xA8, 0x3F, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x1E, 0xAF,
-0x25, 0x20,
-0x00, 0xE0,
+	0x2F, 0x2F, 0x1E, 0xAF,
+	0x25, 0x20,
+	0x00, 0xE0,
 
-0xA4, 0x16, 0x4F, 0xE9,
-0x0F, 0xC0, 0x21, 0xC2,
+	0xA4, 0x16, 0x4F, 0xE9,
+	0x0F, 0xC0, 0x21, 0xC2,
 
-0xA6, 0x80, 0x4F, 0xE9,
-0x1F, 0x62, 0x57, 0x9F,
+	0xA6, 0x80, 0x4F, 0xE9,
+	0x1F, 0x62, 0x57, 0x9F,
 
-0x0D, 0x20,
-0x05, 0x20,
-0x2F, 0xC0, 0x21, 0xC6,
+	0x0D, 0x20,
+	0x05, 0x20,
+	0x2F, 0xC0, 0x21, 0xC6,
 
-0x2D, 0x44, 0x4C, 0xB6,
-0x25, 0x44, 0x54, 0xB6,
+	0x2D, 0x44, 0x4C, 0xB6,
+	0x25, 0x44, 0x54, 0xB6,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0xE0,
-0x0F, 0x20,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0xE0,
+	0x0F, 0x20,
 
-0x2D, 0x20,
-0x25, 0x20,
-0x07, 0xC0, 0x44, 0xC6,
+	0x2D, 0x20,
+	0x25, 0x20,
+	0x07, 0xC0, 0x44, 0xC6,
 
-0x17, 0x50, 0x56, 0x9F,
-0xA5, 0x37, 0x4F, 0xE9,
+	0x17, 0x50, 0x56, 0x9F,
+	0xA5, 0x37, 0x4F, 0xE9,
 
-0x06, 0xC0, 0x21, 0xC4,
-0x0F, 0x17, 0x0F, 0xAF,
+	0x06, 0xC0, 0x21, 0xC4,
+	0x0F, 0x17, 0x0F, 0xAF,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1E, 0x62, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0x62, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x3E, 0x3D, 0x5D, 0x9F,
-0x00, 0xE0,
-0x07, 0x20,
+	0x3E, 0x3D, 0x5D, 0x9F,
+	0x00, 0xE0,
+	0x07, 0x20,
 
-0x2F, 0x20,
-0x00, 0xE0,
-0xA3, 0x0F, 0x4F, 0xE9,
+	0x2F, 0x20,
+	0x00, 0xE0,
+	0xA3, 0x0F, 0x4F, 0xE9,
 
-0x06, 0x20,
-0x00, 0xE0,
-0x1F, 0x26, 0x1F, 0xDF,
+	0x06, 0x20,
+	0x00, 0xE0,
+	0x1F, 0x26, 0x1F, 0xDF,
 
-0x17, 0x26, 0x17, 0xDF,
-0xA1, 0x1F, 0x4F, 0xE9,
+	0x17, 0x26, 0x17, 0xDF,
+	0xA1, 0x1F, 0x4F, 0xE9,
 
-0x1E, 0x26, 0x1E, 0xDF,
-0x9D, 0x1E, 0x4F, 0xE9,
+	0x1E, 0x26, 0x1E, 0xDF,
+	0x9D, 0x1E, 0x4F, 0xE9,
 
-0x35, 0x17, 0x4F, 0xE9,
-0xA2, 0x3F, 0x4F, 0xE9,
+	0x35, 0x17, 0x4F, 0xE9,
+	0xA2, 0x3F, 0x4F, 0xE9,
 
-0x06, 0x06, 0x1F, 0xAF,
-0x39, 0x37, 0x4F, 0xE9,
+	0x06, 0x06, 0x1F, 0xAF,
+	0x39, 0x37, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x17, 0xAF,
-0x07, 0x07, 0x1E, 0xAF,
+	0x2F, 0x2F, 0x17, 0xAF,
+	0x07, 0x07, 0x1E, 0xAF,
 
-0xA0, 0x80, 0x4F, 0xE9,
-0x9E, 0x3E, 0x4F, 0xE9,
+	0xA0, 0x80, 0x4F, 0xE9,
+	0x9E, 0x3E, 0x4F, 0xE9,
 
-0x31, 0x80, 0x4F, 0xE9,
-0x9C, 0x80, 0x4F, 0xE9,
+	0x31, 0x80, 0x4F, 0xE9,
+	0x9C, 0x80, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x63, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x63, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x62, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x62, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x60, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x60, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x5D, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x5D, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g200_tgzsf[] = {
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x98, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x98, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x81, 0x04,
-0x89, 0x04,
-0x01, 0x04,
-0x09, 0x04,
+	0x81, 0x04,
+	0x89, 0x04,
+	0x01, 0x04,
+	0x09, 0x04,
 
-0xC9, 0x41, 0xC0, 0xEC,
-0x11, 0x04,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC0, 0xEC,
+	0x11, 0x04,
+	0x00, 0xE0,
 
-0x41, 0xCC, 0x41, 0xCD,
-0x49, 0xCC, 0x49, 0xCD,
+	0x41, 0xCC, 0x41, 0xCD,
+	0x49, 0xCC, 0x49, 0xCD,
 
-0xD1, 0x41, 0xC0, 0xEC,
-0x51, 0xCC, 0x51, 0xCD,
+	0xD1, 0x41, 0xC0, 0xEC,
+	0x51, 0xCC, 0x51, 0xCD,
 
-0x80, 0x04,
-0x10, 0x04,
-0x08, 0x04,
-0x00, 0xE0,
+	0x80, 0x04,
+	0x10, 0x04,
+	0x08, 0x04,
+	0x00, 0xE0,
 
-0x00, 0xCC, 0xC0, 0xCD,
-0xD1, 0x49, 0xC0, 0xEC,
+	0x00, 0xCC, 0xC0, 0xCD,
+	0xD1, 0x49, 0xC0, 0xEC,
 
-0x8A, 0x1F, 0x20, 0xE9,
-0x8B, 0x3F, 0x20, 0xE9,
+	0x8A, 0x1F, 0x20, 0xE9,
+	0x8B, 0x3F, 0x20, 0xE9,
 
-0x41, 0x3C, 0x41, 0xAD,
-0x49, 0x3C, 0x49, 0xAD,
+	0x41, 0x3C, 0x41, 0xAD,
+	0x49, 0x3C, 0x49, 0xAD,
 
-0x10, 0xCC, 0x10, 0xCD,
-0x08, 0xCC, 0x08, 0xCD,
+	0x10, 0xCC, 0x10, 0xCD,
+	0x08, 0xCC, 0x08, 0xCD,
 
-0xB9, 0x41, 0x49, 0xBB,
-0x1F, 0xF0, 0x41, 0xCD,
+	0xB9, 0x41, 0x49, 0xBB,
+	0x1F, 0xF0, 0x41, 0xCD,
 
-0x51, 0x3C, 0x51, 0xAD,
-0x00, 0x98, 0x80, 0xE9,
+	0x51, 0x3C, 0x51, 0xAD,
+	0x00, 0x98, 0x80, 0xE9,
 
-0x8F, 0x80, 0x07, 0xEA,
-0x24, 0x1F, 0x20, 0xE9,
+	0x8F, 0x80, 0x07, 0xEA,
+	0x24, 0x1F, 0x20, 0xE9,
 
-0x21, 0x45, 0x80, 0xE8,
-0x1A, 0x4D, 0x80, 0xE8,
+	0x21, 0x45, 0x80, 0xE8,
+	0x1A, 0x4D, 0x80, 0xE8,
 
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+	0x36, 0x1F, 0x4F, 0xE9,
+	0x1F, 0x1F, 0x26, 0xDF,
 
-0x37, 0x1B, 0x37, 0xBF,
-0x17, 0x26, 0x17, 0xDF,
+	0x37, 0x1B, 0x37, 0xBF,
+	0x17, 0x26, 0x17, 0xDF,
 
-0x3E, 0x17, 0x4F, 0xE9,
-0x3F, 0x3F, 0x4F, 0xE9,
+	0x3E, 0x17, 0x4F, 0xE9,
+	0x3F, 0x3F, 0x4F, 0xE9,
 
-0x34, 0x1F, 0x34, 0xAF,
-0x2B, 0x05,
-0xA7, 0x20,
+	0x34, 0x1F, 0x34, 0xAF,
+	0x2B, 0x05,
+	0xA7, 0x20,
 
-0x33, 0x2B, 0x37, 0xDF,
-0x27, 0x17, 0xC0, 0xAF,
+	0x33, 0x2B, 0x37, 0xDF,
+	0x27, 0x17, 0xC0, 0xAF,
 
-0x34, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x34, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2D, 0x21, 0x1A, 0xB0,
-0x25, 0x21, 0x31, 0xB0,
+	0x2D, 0x21, 0x1A, 0xB0,
+	0x25, 0x21, 0x31, 0xB0,
 
-0x0D, 0x21, 0x1A, 0xB2,
-0x05, 0x21, 0x31, 0xB2,
+	0x0D, 0x21, 0x1A, 0xB2,
+	0x05, 0x21, 0x31, 0xB2,
 
-0x03, 0x80, 0x2A, 0xEA,
-0x17, 0xC1, 0x2B, 0xBD,
+	0x03, 0x80, 0x2A, 0xEA,
+	0x17, 0xC1, 0x2B, 0xBD,
 
-0x2D, 0x20,
-0x25, 0x20,
-0x05, 0x20,
-0x0D, 0x20,
+	0x2D, 0x20,
+	0x25, 0x20,
+	0x05, 0x20,
+	0x0D, 0x20,
 
-0xB3, 0x68,
-0x97, 0x25,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0x68,
+	0x97, 0x25,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0xC0, 0x33, 0xAF,
-0x2F, 0xC0, 0x21, 0xC0,
+	0x33, 0xC0, 0x33, 0xAF,
+	0x2F, 0xC0, 0x21, 0xC0,
 
-0x16, 0x42, 0x56, 0x9F,
-0x3C, 0x27, 0x4F, 0xE9,
+	0x16, 0x42, 0x56, 0x9F,
+	0x3C, 0x27, 0x4F, 0xE9,
 
-0x1E, 0x62, 0x57, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x1E, 0x62, 0x57, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x21, 0x31, 0xB4,
-0x2D, 0x21, 0x1A, 0xB4,
+	0x25, 0x21, 0x31, 0xB4,
+	0x2D, 0x21, 0x1A, 0xB4,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x33, 0x05,
-0x00, 0xE0,
-0x28, 0x19, 0x60, 0xEC,
+	0x33, 0x05,
+	0x00, 0xE0,
+	0x28, 0x19, 0x60, 0xEC,
 
-0x0D, 0x21, 0x1A, 0xB6,
-0x05, 0x21, 0x31, 0xB6,
+	0x0D, 0x21, 0x1A, 0xB6,
+	0x05, 0x21, 0x31, 0xB6,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0xE0,
-0x2F, 0x20,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0xE0,
+	0x2F, 0x20,
 
-0x23, 0x3B, 0x33, 0xAD,
-0x1E, 0x26, 0x1E, 0xDF,
+	0x23, 0x3B, 0x33, 0xAD,
+	0x1E, 0x26, 0x1E, 0xDF,
 
-0xA7, 0x1E, 0x4F, 0xE9,
-0x17, 0x26, 0x16, 0xDF,
+	0xA7, 0x1E, 0x4F, 0xE9,
+	0x17, 0x26, 0x16, 0xDF,
 
-0x2D, 0x20,
-0x00, 0xE0,
-0xA8, 0x3F, 0x4F, 0xE9,
+	0x2D, 0x20,
+	0x00, 0xE0,
+	0xA8, 0x3F, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x1E, 0xAF,
-0x25, 0x20,
-0x00, 0xE0,
+	0x2F, 0x2F, 0x1E, 0xAF,
+	0x25, 0x20,
+	0x00, 0xE0,
 
-0xA4, 0x16, 0x4F, 0xE9,
-0x0F, 0xC0, 0x21, 0xC2,
+	0xA4, 0x16, 0x4F, 0xE9,
+	0x0F, 0xC0, 0x21, 0xC2,
 
-0xA6, 0x80, 0x4F, 0xE9,
-0x1F, 0x62, 0x57, 0x9F,
+	0xA6, 0x80, 0x4F, 0xE9,
+	0x1F, 0x62, 0x57, 0x9F,
 
-0x0D, 0x20,
-0x05, 0x20,
-0x2F, 0xC0, 0x21, 0xC6,
+	0x0D, 0x20,
+	0x05, 0x20,
+	0x2F, 0xC0, 0x21, 0xC6,
 
-0x3F, 0x2F, 0x5D, 0x9F,
-0x00, 0xE0,
-0x0F, 0x20,
+	0x3F, 0x2F, 0x5D, 0x9F,
+	0x00, 0xE0,
+	0x0F, 0x20,
 
-0x17, 0x50, 0x56, 0x9F,
-0xA5, 0x37, 0x4F, 0xE9,
+	0x17, 0x50, 0x56, 0x9F,
+	0xA5, 0x37, 0x4F, 0xE9,
 
-0x06, 0xC0, 0x21, 0xC4,
-0x0F, 0x17, 0x0F, 0xAF,
+	0x06, 0xC0, 0x21, 0xC4,
+	0x0F, 0x17, 0x0F, 0xAF,
 
-0x37, 0x0F, 0x5C, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x37, 0x0F, 0x5C, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2F, 0x20,
-0x00, 0xE0,
-0xA3, 0x80, 0x4F, 0xE9,
+	0x2F, 0x20,
+	0x00, 0xE0,
+	0xA3, 0x80, 0x4F, 0xE9,
 
-0x06, 0x20,
-0x00, 0xE0,
-0x1F, 0x26, 0x1F, 0xDF,
+	0x06, 0x20,
+	0x00, 0xE0,
+	0x1F, 0x26, 0x1F, 0xDF,
 
-0x17, 0x26, 0x17, 0xDF,
-0x35, 0x17, 0x4F, 0xE9,
+	0x17, 0x26, 0x17, 0xDF,
+	0x35, 0x17, 0x4F, 0xE9,
 
-0xA1, 0x1F, 0x4F, 0xE9,
-0xA2, 0x3F, 0x4F, 0xE9,
+	0xA1, 0x1F, 0x4F, 0xE9,
+	0xA2, 0x3F, 0x4F, 0xE9,
 
-0x06, 0x06, 0x1F, 0xAF,
-0x39, 0x37, 0x4F, 0xE9,
+	0x06, 0x06, 0x1F, 0xAF,
+	0x39, 0x37, 0x4F, 0xE9,
 
-0x2F, 0x2F, 0x17, 0xAF,
-0x00, 0x80, 0x00, 0xE8,
+	0x2F, 0x2F, 0x17, 0xAF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xA0, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xA0, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x31, 0x80, 0x4F, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x80, 0x4F, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x57, 0x39, 0x20, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
+	0x57, 0x39, 0x20, 0xE9,
 
-0x16, 0x28, 0x20, 0xE9,
-0x1D, 0x3B, 0x20, 0xE9,
+	0x16, 0x28, 0x20, 0xE9,
+	0x1D, 0x3B, 0x20, 0xE9,
 
-0x1E, 0x2B, 0x20, 0xE9,
-0x2B, 0x32, 0x20, 0xE9,
+	0x1E, 0x2B, 0x20, 0xE9,
+	0x2B, 0x32, 0x20, 0xE9,
 
-0x1C, 0x23, 0x20, 0xE9,
-0x57, 0x36, 0x20, 0xE9,
+	0x1C, 0x23, 0x20, 0xE9,
+	0x57, 0x36, 0x20, 0xE9,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x40, 0x40, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x40, 0x40, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x90, 0xE2,
-0x00, 0xE0,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x90, 0xE2,
+	0x00, 0xE0,
 
-0x68, 0xFF, 0x20, 0xEA,
-0x19, 0xC8, 0xC1, 0xCD,
+	0x68, 0xFF, 0x20, 0xEA,
+	0x19, 0xC8, 0xC1, 0xCD,
 
-0x1F, 0xD7, 0x18, 0xBD,
-0x3F, 0xD7, 0x22, 0xBD,
+	0x1F, 0xD7, 0x18, 0xBD,
+	0x3F, 0xD7, 0x22, 0xBD,
 
-0x9F, 0x41, 0x49, 0xBD,
-0x00, 0x80, 0x00, 0xE8,
+	0x9F, 0x41, 0x49, 0xBD,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x25, 0x41, 0x49, 0xBD,
-0x2D, 0x41, 0x51, 0xBD,
+	0x25, 0x41, 0x49, 0xBD,
+	0x2D, 0x41, 0x51, 0xBD,
 
-0x0D, 0x80, 0x07, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x0D, 0x80, 0x07, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x35, 0x40, 0x48, 0xBD,
-0x3D, 0x40, 0x50, 0xBD,
+	0x35, 0x40, 0x48, 0xBD,
+	0x3D, 0x40, 0x50, 0xBD,
 
-0x00, 0x80, 0x00, 0xE8,
-0x25, 0x30,
-0x2D, 0x30,
+	0x00, 0x80, 0x00, 0xE8,
+	0x25, 0x30,
+	0x2D, 0x30,
 
-0x35, 0x30,
-0xB5, 0x30,
-0xBD, 0x30,
-0x3D, 0x30,
+	0x35, 0x30,
+	0xB5, 0x30,
+	0xBD, 0x30,
+	0x3D, 0x30,
 
-0x9C, 0xA7, 0x5B, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x9C, 0xA7, 0x5B, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x67, 0xFF, 0x0A, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x67, 0xFF, 0x0A, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC9, 0x41, 0xC8, 0xEC,
-0x42, 0xE1,
-0x00, 0xE0,
+	0xC9, 0x41, 0xC8, 0xEC,
+	0x42, 0xE1,
+	0x00, 0xE0,
 
-0x65, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x65, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xC8, 0x40, 0xC0, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0xC8, 0x40, 0xC0, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x62, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0x62, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
 };
 
 static unsigned char warp_g400_t2gz[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x63, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x63, 0xA0, 0xE8,
 
-0x61, 0x41, 0xE0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x61, 0x41, 0xE0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x78, 0x80, 0x15, 0xEA,
-0x10, 0x04,
-0x20, 0x04,
+	0x78, 0x80, 0x15, 0xEA,
+	0x10, 0x04,
+	0x20, 0x04,
 
-0x61, 0x51, 0xE0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x61, 0x51, 0xE0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x52, 0xBF,
-0x0F, 0x52, 0xA0, 0xE8,
+	0x2A, 0x42, 0x52, 0xBF,
+	0x0F, 0x52, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x62, 0xBF,
-0x1E, 0x51, 0x60, 0xEA,
+	0x1A, 0x42, 0x62, 0xBF,
+	0x1E, 0x51, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x0E, 0x61, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x0E, 0x61, 0x60, 0xEA,
 
-0x32, 0x40, 0x50, 0xBD,
-0x22, 0x40, 0x60, 0xBD,
+	0x32, 0x40, 0x50, 0xBD,
+	0x22, 0x40, 0x60, 0xBD,
 
-0x12, 0x41, 0x51, 0xBD,
-0x3A, 0x41, 0x61, 0xBD,
+	0x12, 0x41, 0x51, 0xBD,
+	0x3A, 0x41, 0x61, 0xBD,
 
-0xBF, 0x2F, 0x0E, 0xBD,
-0x97, 0xE2,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x0E, 0xBD,
+	0x97, 0xE2,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x35, 0x48, 0xB1, 0xE8,
-0x3D, 0x59, 0xB1, 0xE8,
+	0x35, 0x48, 0xB1, 0xE8,
+	0x3D, 0x59, 0xB1, 0xE8,
 
-0x46, 0x31, 0x46, 0xBF,
-0x56, 0x31, 0x56, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0x31, 0x66, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x66, 0x31, 0x66, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x57, 0x39, 0x57, 0xBF,
-0x67, 0x39, 0x67, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
+	0x67, 0x39, 0x67, 0xBF,
 
-0x69, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x69, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x35, 0x00,
-0x3D, 0x00,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x35, 0x00,
+	0x3D, 0x00,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0x8D, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0x8D, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x75, 0xF8, 0xEC,
-0x35, 0x20,
-0x3D, 0x20,
+	0x43, 0x75, 0xF8, 0xEC,
+	0x35, 0x20,
+	0x3D, 0x20,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x53, 0x53, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x53, 0x53, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x0E, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x0E, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x48, 0x35, 0x48, 0xBF,
-0x58, 0x35, 0x58, 0xBF,
+	0x48, 0x35, 0x48, 0xBF,
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+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x7D, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x7D, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gza[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x63, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x63, 0xA0, 0xE8,
 
-0x61, 0x41, 0xE0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x61, 0x41, 0xE0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x7C, 0x80, 0x15, 0xEA,
-0x10, 0x04,
-0x20, 0x04,
+	0x7C, 0x80, 0x15, 0xEA,
+	0x10, 0x04,
+	0x20, 0x04,
 
-0x61, 0x51, 0xE0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x61, 0x51, 0xE0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x52, 0xBF,
-0x0F, 0x52, 0xA0, 0xE8,
+	0x2A, 0x42, 0x52, 0xBF,
+	0x0F, 0x52, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x62, 0xBF,
-0x1E, 0x51, 0x60, 0xEA,
+	0x1A, 0x42, 0x62, 0xBF,
+	0x1E, 0x51, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x0E, 0x61, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x0E, 0x61, 0x60, 0xEA,
 
-0x32, 0x40, 0x50, 0xBD,
-0x22, 0x40, 0x60, 0xBD,
+	0x32, 0x40, 0x50, 0xBD,
+	0x22, 0x40, 0x60, 0xBD,
 
-0x12, 0x41, 0x51, 0xBD,
-0x3A, 0x41, 0x61, 0xBD,
+	0x12, 0x41, 0x51, 0xBD,
+	0x3A, 0x41, 0x61, 0xBD,
 
-0xBF, 0x2F, 0x0E, 0xBD,
-0x97, 0xE2,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x0E, 0xBD,
+	0x97, 0xE2,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x35, 0x48, 0xB1, 0xE8,
-0x3D, 0x59, 0xB1, 0xE8,
+	0x35, 0x48, 0xB1, 0xE8,
+	0x3D, 0x59, 0xB1, 0xE8,
 
-0x46, 0x31, 0x46, 0xBF,
-0x56, 0x31, 0x56, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0x31, 0x66, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x66, 0x31, 0x66, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x57, 0x39, 0x57, 0xBF,
-0x67, 0x39, 0x67, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
+	0x67, 0x39, 0x67, 0xBF,
 
-0x6D, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x6D, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x35, 0x00,
-0x3D, 0x00,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x35, 0x00,
+	0x3D, 0x00,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0x8D, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0x8D, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x75, 0xF8, 0xEC,
-0x35, 0x20,
-0x3D, 0x20,
+	0x43, 0x75, 0xF8, 0xEC,
+	0x35, 0x20,
+	0x3D, 0x20,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x53, 0x53, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x53, 0x53, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x0E, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x0E, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x48, 0x35, 0x48, 0xBF,
-0x58, 0x35, 0x58, 0xBF,
+	0x48, 0x35, 0x48, 0xBF,
+	0x58, 0x35, 0x58, 0xBF,
 
-0x68, 0x35, 0x68, 0xBF,
-0x49, 0x3D, 0x49, 0xBF,
+	0x68, 0x35, 0x68, 0xBF,
+	0x49, 0x3D, 0x49, 0xBF,
 
-0x59, 0x3D, 0x59, 0xBF,
-0x69, 0x3D, 0x69, 0xBF,
+	0x59, 0x3D, 0x59, 0xBF,
+	0x69, 0x3D, 0x69, 0xBF,
 
-0x63, 0x63, 0x2D, 0xDF,
-0x4D, 0x7D, 0xF8, 0xEC,
+	0x63, 0x63, 0x2D, 0xDF,
+	0x4D, 0x7D, 0xF8, 0xEC,
 
-0x59, 0xE3,
-0x00, 0xE0,
-0xB8, 0x38, 0x33, 0xBF,
+	0x59, 0xE3,
+	0x00, 0xE0,
+	0xB8, 0x38, 0x33, 0xBF,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x18, 0x3A, 0x41, 0xE9,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x18, 0x3A, 0x41, 0xE9,
 
-0x3F, 0x53, 0xA0, 0xE8,
-0x05, 0x80, 0x3D, 0xEA,
+	0x3F, 0x53, 0xA0, 0xE8,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x63, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x63, 0xA0, 0xE8,
 
-0x50, 0x70, 0xF8, 0xEC,
-0x2B, 0x50, 0x3C, 0xE9,
+	0x50, 0x70, 0xF8, 0xEC,
+	0x2B, 0x50, 0x3C, 0xE9,
 
-0x1F, 0x0F, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x0F, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x59, 0x78, 0xF8, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0x59, 0x78, 0xF8, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x46, 0x37, 0x46, 0xDF,
-0x56, 0x3F, 0x56, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x56, 0x3F, 0x56, 0xDF,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x66, 0x3D, 0x66, 0xDF,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x66, 0x3D, 0x66, 0xDF,
 
-0x1D, 0x32, 0x41, 0xE9,
-0x67, 0x3D, 0x67, 0xDF,
+	0x1D, 0x32, 0x41, 0xE9,
+	0x67, 0x3D, 0x67, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3F, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3F, 0x57, 0xDF,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x59, 0x3F, 0x59, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x59, 0x3F, 0x59, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x69, 0x3D, 0x69, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x69, 0x3D, 0x69, 0xDF,
 
-0x48, 0x37, 0x48, 0xDF,
-0x58, 0x3F, 0x58, 0xDF,
+	0x48, 0x37, 0x48, 0xDF,
+	0x58, 0x3F, 0x58, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x68, 0x3D, 0x68, 0xDF,
-0x49, 0x37, 0x49, 0xDF,
+	0x68, 0x3D, 0x68, 0xDF,
+	0x49, 0x37, 0x49, 0xDF,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x37, 0xCF, 0x74, 0xC4,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x34, 0x80, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x34, 0x80, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x0A, 0x44, 0x54, 0xB0,
-0x02, 0x44, 0x64, 0xB0,
+	0x0A, 0x44, 0x54, 0xB0,
+	0x02, 0x44, 0x64, 0xB0,
 
-0x2A, 0x44, 0x54, 0xB2,
-0x1A, 0x44, 0x64, 0xB2,
+	0x2A, 0x44, 0x54, 0xB2,
+	0x1A, 0x44, 0x64, 0xB2,
 
-0x29, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x29, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x0F, 0xCF, 0x74, 0xC6,
-0x3D, 0xCF, 0x74, 0xC2,
+	0x0F, 0xCF, 0x74, 0xC6,
+	0x3D, 0xCF, 0x74, 0xC2,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9C, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9C, 0x0F, 0x20, 0xE9,
 
-0x0A, 0x44, 0x54, 0xB4,
-0x02, 0x44, 0x64, 0xB4,
+	0x0A, 0x44, 0x54, 0xB4,
+	0x02, 0x44, 0x64, 0xB4,
 
-0x2A, 0x44, 0x54, 0xB6,
-0x1A, 0x44, 0x64, 0xB6,
+	0x2A, 0x44, 0x54, 0xB6,
+	0x1A, 0x44, 0x64, 0xB6,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x38, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x38, 0x3D, 0x20, 0xE9,
 
-0x0A, 0x20,
-0x02, 0x20,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0A, 0x20,
+	0x02, 0x20,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x0A, 0x47, 0x57, 0xBF,
-0x02, 0x47, 0x67, 0xBF,
+	0x0A, 0x47, 0x57, 0xBF,
+	0x02, 0x47, 0x67, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x46, 0x56, 0xBF,
-0x1A, 0x46, 0x66, 0xBF,
+	0x2A, 0x46, 0x56, 0xBF,
+	0x1A, 0x46, 0x66, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x36, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x36, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x37, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x37, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x53, 0xBF,
-0x1A, 0x43, 0x63, 0xBF,
+	0x2A, 0x43, 0x53, 0xBF,
+	0x1A, 0x43, 0x63, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x9D, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x9D, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x9E, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x9E, 0x39, 0x4F, 0xE9,
 
-0x0A, 0x48, 0x58, 0xBF,
-0x02, 0x48, 0x68, 0xBF,
+	0x0A, 0x48, 0x58, 0xBF,
+	0x02, 0x48, 0x68, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x2A, 0x49, 0x59, 0xBF,
-0x1A, 0x49, 0x69, 0xBF,
+	0x2A, 0x49, 0x59, 0xBF,
+	0x1A, 0x49, 0x69, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x82, 0x30, 0x57, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x82, 0x30, 0x57, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x83, 0x38, 0x57, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x83, 0x38, 0x57, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x84, 0x31, 0x5E, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x84, 0x31, 0x5E, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x85, 0x39, 0x5E, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x85, 0x39, 0x5E, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8A, 0x36, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x87, 0x77, 0x57, 0xE9,
-0x8B, 0x3E, 0xBF, 0xEA,
+	0x87, 0x77, 0x57, 0xE9,
+	0x8B, 0x3E, 0xBF, 0xEA,
 
-0x80, 0x30, 0x57, 0xE9,
-0x81, 0x38, 0x57, 0xE9,
+	0x80, 0x30, 0x57, 0xE9,
+	0x81, 0x38, 0x57, 0xE9,
 
-0x82, 0x31, 0x57, 0xE9,
-0x86, 0x78, 0x57, 0xE9,
+	0x82, 0x31, 0x57, 0xE9,
+	0x86, 0x78, 0x57, 0xE9,
 
-0x83, 0x39, 0x57, 0xE9,
-0x87, 0x79, 0x57, 0xE9,
+	0x83, 0x39, 0x57, 0xE9,
+	0x87, 0x79, 0x57, 0xE9,
 
-0x30, 0x1F, 0x5F, 0xE9,
-0x8A, 0x34, 0x20, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
+	0x8A, 0x34, 0x20, 0xE9,
 
-0x8B, 0x3C, 0x20, 0xE9,
-0x37, 0x50, 0x60, 0xBD,
+	0x8B, 0x3C, 0x20, 0xE9,
+	0x37, 0x50, 0x60, 0xBD,
 
-0x57, 0x0D, 0x20, 0xE9,
-0x35, 0x51, 0x61, 0xBD,
+	0x57, 0x0D, 0x20, 0xE9,
+	0x35, 0x51, 0x61, 0xBD,
 
-0x2B, 0x50, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x50, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x0E, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x0E, 0x77,
 
-0x24, 0x51, 0x20, 0xE9,
-0x9B, 0xFF, 0x20, 0xEA,
+	0x24, 0x51, 0x20, 0xE9,
+	0x9B, 0xFF, 0x20, 0xEA,
 
-0x16, 0x0E, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x0E, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x0B, 0x46, 0xA0, 0xE8,
-0x1B, 0x56, 0xA0, 0xE8,
+	0x0B, 0x46, 0xA0, 0xE8,
+	0x1B, 0x56, 0xA0, 0xE8,
 
-0x2B, 0x66, 0xA0, 0xE8,
-0x0C, 0x47, 0xA0, 0xE8,
+	0x2B, 0x66, 0xA0, 0xE8,
+	0x0C, 0x47, 0xA0, 0xE8,
 
-0x1C, 0x57, 0xA0, 0xE8,
-0x2C, 0x67, 0xA0, 0xE8,
+	0x1C, 0x57, 0xA0, 0xE8,
+	0x2C, 0x67, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x57, 0x80, 0x57, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x57, 0x80, 0x57, 0xCF,
 
-0x66, 0x33, 0x66, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x66, 0x33, 0x66, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x67, 0x3B, 0x67, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x67, 0x3B, 0x67, 0xCF,
 
-0x0B, 0x48, 0xA0, 0xE8,
-0x1B, 0x58, 0xA0, 0xE8,
+	0x0B, 0x48, 0xA0, 0xE8,
+	0x1B, 0x58, 0xA0, 0xE8,
 
-0x2B, 0x68, 0xA0, 0xE8,
-0x0C, 0x49, 0xA0, 0xE8,
+	0x2B, 0x68, 0xA0, 0xE8,
+	0x0C, 0x49, 0xA0, 0xE8,
 
-0x1C, 0x59, 0xA0, 0xE8,
-0x2C, 0x69, 0xA0, 0xE8,
+	0x1C, 0x59, 0xA0, 0xE8,
+	0x2C, 0x69, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x34, 0xD7, 0x34, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x34, 0xD7, 0x34, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3C, 0xD7, 0x3C, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3C, 0xD7, 0x3C, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xBA, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xBA, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x79, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x79, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gzaf[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x63, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x63, 0xA0, 0xE8,
 
-0x61, 0x41, 0xE0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x61, 0x41, 0xE0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x81, 0x80, 0x15, 0xEA,
-0x10, 0x04,
-0x20, 0x04,
+	0x81, 0x80, 0x15, 0xEA,
+	0x10, 0x04,
+	0x20, 0x04,
 
-0x61, 0x51, 0xE0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x61, 0x51, 0xE0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x52, 0xBF,
-0x0F, 0x52, 0xA0, 0xE8,
+	0x2A, 0x42, 0x52, 0xBF,
+	0x0F, 0x52, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x62, 0xBF,
-0x1E, 0x51, 0x60, 0xEA,
+	0x1A, 0x42, 0x62, 0xBF,
+	0x1E, 0x51, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x0E, 0x61, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x0E, 0x61, 0x60, 0xEA,
 
-0x32, 0x40, 0x50, 0xBD,
-0x22, 0x40, 0x60, 0xBD,
+	0x32, 0x40, 0x50, 0xBD,
+	0x22, 0x40, 0x60, 0xBD,
 
-0x12, 0x41, 0x51, 0xBD,
-0x3A, 0x41, 0x61, 0xBD,
+	0x12, 0x41, 0x51, 0xBD,
+	0x3A, 0x41, 0x61, 0xBD,
 
-0xBF, 0x2F, 0x0E, 0xBD,
-0x97, 0xE2,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x0E, 0xBD,
+	0x97, 0xE2,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x35, 0x48, 0xB1, 0xE8,
-0x3D, 0x59, 0xB1, 0xE8,
+	0x35, 0x48, 0xB1, 0xE8,
+	0x3D, 0x59, 0xB1, 0xE8,
 
-0x46, 0x31, 0x46, 0xBF,
-0x56, 0x31, 0x56, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0x31, 0x66, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x66, 0x31, 0x66, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x57, 0x39, 0x57, 0xBF,
-0x67, 0x39, 0x67, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
+	0x67, 0x39, 0x67, 0xBF,
 
-0x72, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x72, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x35, 0x00,
-0x3D, 0x00,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x35, 0x00,
+	0x3D, 0x00,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0x8D, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0x8D, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x75, 0xF8, 0xEC,
-0x35, 0x20,
-0x3D, 0x20,
+	0x43, 0x75, 0xF8, 0xEC,
+	0x35, 0x20,
+	0x3D, 0x20,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x53, 0x53, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x53, 0x53, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x0E, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x0E, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x48, 0x35, 0x48, 0xBF,
-0x58, 0x35, 0x58, 0xBF,
+	0x48, 0x35, 0x48, 0xBF,
+	0x58, 0x35, 0x58, 0xBF,
 
-0x68, 0x35, 0x68, 0xBF,
-0x49, 0x3D, 0x49, 0xBF,
+	0x68, 0x35, 0x68, 0xBF,
+	0x49, 0x3D, 0x49, 0xBF,
 
-0x59, 0x3D, 0x59, 0xBF,
-0x69, 0x3D, 0x69, 0xBF,
+	0x59, 0x3D, 0x59, 0xBF,
+	0x69, 0x3D, 0x69, 0xBF,
 
-0x63, 0x63, 0x2D, 0xDF,
-0x4D, 0x7D, 0xF8, 0xEC,
+	0x63, 0x63, 0x2D, 0xDF,
+	0x4D, 0x7D, 0xF8, 0xEC,
 
-0x59, 0xE3,
-0x00, 0xE0,
-0xB8, 0x38, 0x33, 0xBF,
+	0x59, 0xE3,
+	0x00, 0xE0,
+	0xB8, 0x38, 0x33, 0xBF,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x18, 0x3A, 0x41, 0xE9,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x18, 0x3A, 0x41, 0xE9,
 
-0x3F, 0x53, 0xA0, 0xE8,
-0x05, 0x80, 0x3D, 0xEA,
+	0x3F, 0x53, 0xA0, 0xE8,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x63, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x63, 0xA0, 0xE8,
 
-0x50, 0x70, 0xF8, 0xEC,
-0x2B, 0x50, 0x3C, 0xE9,
+	0x50, 0x70, 0xF8, 0xEC,
+	0x2B, 0x50, 0x3C, 0xE9,
 
-0x1F, 0x0F, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x0F, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x59, 0x78, 0xF8, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0x59, 0x78, 0xF8, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x46, 0x37, 0x46, 0xDF,
-0x56, 0x3F, 0x56, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x56, 0x3F, 0x56, 0xDF,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x66, 0x3D, 0x66, 0xDF,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x66, 0x3D, 0x66, 0xDF,
 
-0x1D, 0x32, 0x41, 0xE9,
-0x67, 0x3D, 0x67, 0xDF,
+	0x1D, 0x32, 0x41, 0xE9,
+	0x67, 0x3D, 0x67, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3F, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3F, 0x57, 0xDF,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x59, 0x3F, 0x59, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x59, 0x3F, 0x59, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x69, 0x3D, 0x69, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x69, 0x3D, 0x69, 0xDF,
 
-0x48, 0x37, 0x48, 0xDF,
-0x58, 0x3F, 0x58, 0xDF,
+	0x48, 0x37, 0x48, 0xDF,
+	0x58, 0x3F, 0x58, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x68, 0x3D, 0x68, 0xDF,
-0x49, 0x37, 0x49, 0xDF,
+	0x68, 0x3D, 0x68, 0xDF,
+	0x49, 0x37, 0x49, 0xDF,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x37, 0xCF, 0x74, 0xC4,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x54, 0xB0,
-0x02, 0x44, 0x64, 0xB0,
+	0x0A, 0x44, 0x54, 0xB0,
+	0x02, 0x44, 0x64, 0xB0,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x34, 0x37, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x54, 0xB2,
-0x1A, 0x44, 0x64, 0xB2,
+	0x2A, 0x44, 0x54, 0xB2,
+	0x1A, 0x44, 0x64, 0xB2,
 
-0x2E, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x2E, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x3D, 0xCF, 0x74, 0xC2,
-0x0F, 0xCF, 0x74, 0xC6,
+	0x3D, 0xCF, 0x74, 0xC2,
+	0x0F, 0xCF, 0x74, 0xC6,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9C, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9C, 0x0F, 0x20, 0xE9,
 
-0x0A, 0x44, 0x54, 0xB4,
-0x02, 0x44, 0x64, 0xB4,
+	0x0A, 0x44, 0x54, 0xB4,
+	0x02, 0x44, 0x64, 0xB4,
 
-0x2A, 0x44, 0x54, 0xB6,
-0x1A, 0x44, 0x64, 0xB6,
+	0x2A, 0x44, 0x54, 0xB6,
+	0x1A, 0x44, 0x64, 0xB6,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x38, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x38, 0x3D, 0x20, 0xE9,
 
-0x0A, 0x20,
-0x02, 0x20,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0A, 0x20,
+	0x02, 0x20,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x3D, 0xCF, 0x75, 0xC6,
-0x00, 0x80, 0x00, 0xE8,
+	0x3D, 0xCF, 0x75, 0xC6,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x45, 0x55, 0xB6,
-0x02, 0x45, 0x65, 0xB6,
+	0x0A, 0x45, 0x55, 0xB6,
+	0x02, 0x45, 0x65, 0xB6,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x31, 0x3D, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0x31, 0x3D, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x2A, 0x46, 0x56, 0xBF,
-0x1A, 0x46, 0x66, 0xBF,
+	0x2A, 0x46, 0x56, 0xBF,
+	0x1A, 0x46, 0x66, 0xBF,
 
-0x0A, 0x47, 0x57, 0xBF,
-0x02, 0x47, 0x67, 0xBF,
+	0x0A, 0x47, 0x57, 0xBF,
+	0x02, 0x47, 0x67, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x36, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x36, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x37, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x37, 0x38, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9D, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9D, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x9E, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x9E, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x53, 0xBF,
-0x1A, 0x43, 0x63, 0xBF,
+	0x2A, 0x43, 0x53, 0xBF,
+	0x1A, 0x43, 0x63, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x35, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x35, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x39, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x39, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x48, 0x58, 0xBF,
-0x02, 0x48, 0x68, 0xBF,
+	0x0A, 0x48, 0x58, 0xBF,
+	0x02, 0x48, 0x68, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x2A, 0x49, 0x59, 0xBF,
-0x1A, 0x49, 0x69, 0xBF,
+	0x2A, 0x49, 0x59, 0xBF,
+	0x1A, 0x49, 0x69, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x82, 0x30, 0x57, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x82, 0x30, 0x57, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x83, 0x38, 0x57, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x83, 0x38, 0x57, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x84, 0x31, 0x5E, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x84, 0x31, 0x5E, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x85, 0x39, 0x5E, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x85, 0x39, 0x5E, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8A, 0x36, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x87, 0x77, 0x57, 0xE9,
-0x8B, 0x3E, 0xBF, 0xEA,
+	0x87, 0x77, 0x57, 0xE9,
+	0x8B, 0x3E, 0xBF, 0xEA,
 
-0x80, 0x30, 0x57, 0xE9,
-0x81, 0x38, 0x57, 0xE9,
+	0x80, 0x30, 0x57, 0xE9,
+	0x81, 0x38, 0x57, 0xE9,
 
-0x82, 0x31, 0x57, 0xE9,
-0x86, 0x78, 0x57, 0xE9,
+	0x82, 0x31, 0x57, 0xE9,
+	0x86, 0x78, 0x57, 0xE9,
 
-0x83, 0x39, 0x57, 0xE9,
-0x87, 0x79, 0x57, 0xE9,
+	0x83, 0x39, 0x57, 0xE9,
+	0x87, 0x79, 0x57, 0xE9,
 
-0x30, 0x1F, 0x5F, 0xE9,
-0x8A, 0x34, 0x20, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
+	0x8A, 0x34, 0x20, 0xE9,
 
-0x8B, 0x3C, 0x20, 0xE9,
-0x37, 0x50, 0x60, 0xBD,
+	0x8B, 0x3C, 0x20, 0xE9,
+	0x37, 0x50, 0x60, 0xBD,
 
-0x57, 0x0D, 0x20, 0xE9,
-0x35, 0x51, 0x61, 0xBD,
+	0x57, 0x0D, 0x20, 0xE9,
+	0x35, 0x51, 0x61, 0xBD,
 
-0x2B, 0x50, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x50, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x0E, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x0E, 0x77,
 
-0x24, 0x51, 0x20, 0xE9,
-0x96, 0xFF, 0x20, 0xEA,
+	0x24, 0x51, 0x20, 0xE9,
+	0x96, 0xFF, 0x20, 0xEA,
 
-0x16, 0x0E, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x0E, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x0B, 0x46, 0xA0, 0xE8,
-0x1B, 0x56, 0xA0, 0xE8,
+	0x0B, 0x46, 0xA0, 0xE8,
+	0x1B, 0x56, 0xA0, 0xE8,
 
-0x2B, 0x66, 0xA0, 0xE8,
-0x0C, 0x47, 0xA0, 0xE8,
+	0x2B, 0x66, 0xA0, 0xE8,
+	0x0C, 0x47, 0xA0, 0xE8,
 
-0x1C, 0x57, 0xA0, 0xE8,
-0x2C, 0x67, 0xA0, 0xE8,
+	0x1C, 0x57, 0xA0, 0xE8,
+	0x2C, 0x67, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x57, 0x80, 0x57, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x57, 0x80, 0x57, 0xCF,
 
-0x66, 0x33, 0x66, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x66, 0x33, 0x66, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x67, 0x3B, 0x67, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x67, 0x3B, 0x67, 0xCF,
 
-0x0B, 0x48, 0xA0, 0xE8,
-0x1B, 0x58, 0xA0, 0xE8,
+	0x0B, 0x48, 0xA0, 0xE8,
+	0x1B, 0x58, 0xA0, 0xE8,
 
-0x2B, 0x68, 0xA0, 0xE8,
-0x0C, 0x49, 0xA0, 0xE8,
+	0x2B, 0x68, 0xA0, 0xE8,
+	0x0C, 0x49, 0xA0, 0xE8,
 
-0x1C, 0x59, 0xA0, 0xE8,
-0x2C, 0x69, 0xA0, 0xE8,
+	0x1C, 0x59, 0xA0, 0xE8,
+	0x2C, 0x69, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x34, 0xD7, 0x34, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x34, 0xD7, 0x34, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3C, 0xD7, 0x3C, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3C, 0xD7, 0x3C, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xB5, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xB5, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x74, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x74, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gzf[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
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+	0x16, 0x0E, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x0B, 0x46, 0xA0, 0xE8,
-0x1B, 0x56, 0xA0, 0xE8,
+	0x0B, 0x46, 0xA0, 0xE8,
+	0x1B, 0x56, 0xA0, 0xE8,
 
-0x2B, 0x66, 0xA0, 0xE8,
-0x0C, 0x47, 0xA0, 0xE8,
+	0x2B, 0x66, 0xA0, 0xE8,
+	0x0C, 0x47, 0xA0, 0xE8,
 
-0x1C, 0x57, 0xA0, 0xE8,
-0x2C, 0x67, 0xA0, 0xE8,
+	0x1C, 0x57, 0xA0, 0xE8,
+	0x2C, 0x67, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x57, 0x80, 0x57, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x57, 0x80, 0x57, 0xCF,
 
-0x66, 0x33, 0x66, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x66, 0x33, 0x66, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x67, 0x3B, 0x67, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x67, 0x3B, 0x67, 0xCF,
 
-0x0B, 0x48, 0xA0, 0xE8,
-0x1B, 0x58, 0xA0, 0xE8,
+	0x0B, 0x48, 0xA0, 0xE8,
+	0x1B, 0x58, 0xA0, 0xE8,
 
-0x2B, 0x68, 0xA0, 0xE8,
-0x0C, 0x49, 0xA0, 0xE8,
+	0x2B, 0x68, 0xA0, 0xE8,
+	0x0C, 0x49, 0xA0, 0xE8,
 
-0x1C, 0x59, 0xA0, 0xE8,
-0x2C, 0x69, 0xA0, 0xE8,
+	0x1C, 0x59, 0xA0, 0xE8,
+	0x2C, 0x69, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x34, 0xD7, 0x34, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x34, 0xD7, 0x34, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3C, 0xD7, 0x3C, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3C, 0xD7, 0x3C, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xBB, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xBB, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x78, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x78, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gzs[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x63, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x63, 0xA0, 0xE8,
 
-0x61, 0x41, 0xE0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x61, 0x41, 0xE0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x85, 0x80, 0x15, 0xEA,
-0x10, 0x04,
-0x20, 0x04,
+	0x85, 0x80, 0x15, 0xEA,
+	0x10, 0x04,
+	0x20, 0x04,
 
-0x61, 0x51, 0xE0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x61, 0x51, 0xE0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x52, 0xBF,
-0x0F, 0x52, 0xA0, 0xE8,
+	0x2A, 0x42, 0x52, 0xBF,
+	0x0F, 0x52, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x62, 0xBF,
-0x1E, 0x51, 0x60, 0xEA,
+	0x1A, 0x42, 0x62, 0xBF,
+	0x1E, 0x51, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x0E, 0x61, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x0E, 0x61, 0x60, 0xEA,
 
-0x32, 0x40, 0x50, 0xBD,
-0x22, 0x40, 0x60, 0xBD,
+	0x32, 0x40, 0x50, 0xBD,
+	0x22, 0x40, 0x60, 0xBD,
 
-0x12, 0x41, 0x51, 0xBD,
-0x3A, 0x41, 0x61, 0xBD,
+	0x12, 0x41, 0x51, 0xBD,
+	0x3A, 0x41, 0x61, 0xBD,
 
-0xBF, 0x2F, 0x0E, 0xBD,
-0x97, 0xE2,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x0E, 0xBD,
+	0x97, 0xE2,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x35, 0x48, 0xB1, 0xE8,
-0x3D, 0x59, 0xB1, 0xE8,
+	0x35, 0x48, 0xB1, 0xE8,
+	0x3D, 0x59, 0xB1, 0xE8,
 
-0x46, 0x31, 0x46, 0xBF,
-0x56, 0x31, 0x56, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0x31, 0x66, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x66, 0x31, 0x66, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x57, 0x39, 0x57, 0xBF,
-0x67, 0x39, 0x67, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
+	0x67, 0x39, 0x67, 0xBF,
 
-0x76, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x76, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x35, 0x00,
-0x3D, 0x00,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x35, 0x00,
+	0x3D, 0x00,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0x8D, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0x8D, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x75, 0xF8, 0xEC,
-0x35, 0x20,
-0x3D, 0x20,
+	0x43, 0x75, 0xF8, 0xEC,
+	0x35, 0x20,
+	0x3D, 0x20,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x53, 0x53, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x53, 0x53, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x0E, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x0E, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x48, 0x35, 0x48, 0xBF,
-0x58, 0x35, 0x58, 0xBF,
+	0x48, 0x35, 0x48, 0xBF,
+	0x58, 0x35, 0x58, 0xBF,
 
-0x68, 0x35, 0x68, 0xBF,
-0x49, 0x3D, 0x49, 0xBF,
+	0x68, 0x35, 0x68, 0xBF,
+	0x49, 0x3D, 0x49, 0xBF,
 
-0x59, 0x3D, 0x59, 0xBF,
-0x69, 0x3D, 0x69, 0xBF,
+	0x59, 0x3D, 0x59, 0xBF,
+	0x69, 0x3D, 0x69, 0xBF,
 
-0x63, 0x63, 0x2D, 0xDF,
-0x4D, 0x7D, 0xF8, 0xEC,
+	0x63, 0x63, 0x2D, 0xDF,
+	0x4D, 0x7D, 0xF8, 0xEC,
 
-0x59, 0xE3,
-0x00, 0xE0,
-0xB8, 0x38, 0x33, 0xBF,
+	0x59, 0xE3,
+	0x00, 0xE0,
+	0xB8, 0x38, 0x33, 0xBF,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x18, 0x3A, 0x41, 0xE9,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x18, 0x3A, 0x41, 0xE9,
 
-0x3F, 0x53, 0xA0, 0xE8,
-0x05, 0x80, 0x3D, 0xEA,
+	0x3F, 0x53, 0xA0, 0xE8,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x63, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x63, 0xA0, 0xE8,
 
-0x50, 0x70, 0xF8, 0xEC,
-0x2B, 0x50, 0x3C, 0xE9,
+	0x50, 0x70, 0xF8, 0xEC,
+	0x2B, 0x50, 0x3C, 0xE9,
 
-0x1F, 0x0F, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x0F, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x59, 0x78, 0xF8, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0x59, 0x78, 0xF8, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x46, 0x37, 0x46, 0xDF,
-0x56, 0x3F, 0x56, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x56, 0x3F, 0x56, 0xDF,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x66, 0x3D, 0x66, 0xDF,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x66, 0x3D, 0x66, 0xDF,
 
-0x1D, 0x32, 0x41, 0xE9,
-0x67, 0x3D, 0x67, 0xDF,
+	0x1D, 0x32, 0x41, 0xE9,
+	0x67, 0x3D, 0x67, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3F, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3F, 0x57, 0xDF,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x59, 0x3F, 0x59, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x59, 0x3F, 0x59, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x69, 0x3D, 0x69, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x69, 0x3D, 0x69, 0xDF,
 
-0x48, 0x37, 0x48, 0xDF,
-0x58, 0x3F, 0x58, 0xDF,
+	0x48, 0x37, 0x48, 0xDF,
+	0x58, 0x3F, 0x58, 0xDF,
 
-0x68, 0x3D, 0x68, 0xDF,
-0x49, 0x37, 0x49, 0xDF,
+	0x68, 0x3D, 0x68, 0xDF,
+	0x49, 0x37, 0x49, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x0F, 0xCF, 0x74, 0xC2,
-0x37, 0xCF, 0x74, 0xC4,
+	0x0F, 0xCF, 0x74, 0xC2,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x54, 0xB0,
-0x02, 0x44, 0x64, 0xB0,
+	0x0A, 0x44, 0x54, 0xB0,
+	0x02, 0x44, 0x64, 0xB0,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x34, 0x37, 0x20, 0xE9,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x38, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x38, 0x0F, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x54, 0xB2,
-0x1A, 0x44, 0x64, 0xB2,
+	0x2A, 0x44, 0x54, 0xB2,
+	0x1A, 0x44, 0x64, 0xB2,
 
-0x31, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x31, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x0F, 0xCF, 0x75, 0xC0,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0F, 0xCF, 0x75, 0xC0,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x3D, 0xCF, 0x75, 0xC2,
-0x37, 0xCF, 0x75, 0xC4,
+	0x3D, 0xCF, 0x75, 0xC2,
+	0x37, 0xCF, 0x75, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA6, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA6, 0x0F, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA3, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA3, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x54, 0xB4,
-0x1A, 0x44, 0x64, 0xB4,
+	0x2A, 0x44, 0x54, 0xB4,
+	0x1A, 0x44, 0x64, 0xB4,
 
-0x0A, 0x45, 0x55, 0xB0,
-0x02, 0x45, 0x65, 0xB0,
+	0x0A, 0x45, 0x55, 0xB0,
+	0x02, 0x45, 0x65, 0xB0,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA0, 0x37, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA0, 0x37, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x2A, 0x45, 0x55, 0xB2,
-0x1A, 0x45, 0x65, 0xB2,
+	0x2A, 0x45, 0x55, 0xB2,
+	0x1A, 0x45, 0x65, 0xB2,
 
-0x0A, 0x45, 0x55, 0xB4,
-0x02, 0x45, 0x65, 0xB4,
+	0x0A, 0x45, 0x55, 0xB4,
+	0x02, 0x45, 0x65, 0xB4,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x20,
-0x1A, 0x20,
-0x0A, 0x20,
-0x02, 0x20,
+	0x2A, 0x20,
+	0x1A, 0x20,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x2A, 0x46, 0x56, 0xBF,
-0x1A, 0x46, 0x66, 0xBF,
+	0x2A, 0x46, 0x56, 0xBF,
+	0x1A, 0x46, 0x66, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x36, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x36, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x37, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x37, 0x39, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0xA7, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0xA7, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0xA8, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0xA8, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x47, 0x57, 0xBF,
-0x02, 0x47, 0x67, 0xBF,
+	0x0A, 0x47, 0x57, 0xBF,
+	0x02, 0x47, 0x67, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA4, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA4, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA5, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA5, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x53, 0xBF,
-0x1A, 0x43, 0x63, 0xBF,
+	0x2A, 0x43, 0x53, 0xBF,
+	0x1A, 0x43, 0x63, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0xA1, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0xA1, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0xA2, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0xA2, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x48, 0x58, 0xBF,
-0x02, 0x48, 0x68, 0xBF,
+	0x0A, 0x48, 0x58, 0xBF,
+	0x02, 0x48, 0x68, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x2A, 0x49, 0x59, 0xBF,
-0x1A, 0x49, 0x69, 0xBF,
+	0x2A, 0x49, 0x59, 0xBF,
+	0x1A, 0x49, 0x69, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x82, 0x30, 0x57, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x82, 0x30, 0x57, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x83, 0x38, 0x57, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x83, 0x38, 0x57, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x84, 0x31, 0x5E, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x84, 0x31, 0x5E, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x85, 0x39, 0x5E, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x85, 0x39, 0x5E, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8A, 0x36, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x87, 0x77, 0x57, 0xE9,
-0x8B, 0x3E, 0xBF, 0xEA,
+	0x87, 0x77, 0x57, 0xE9,
+	0x8B, 0x3E, 0xBF, 0xEA,
 
-0x80, 0x30, 0x57, 0xE9,
-0x81, 0x38, 0x57, 0xE9,
+	0x80, 0x30, 0x57, 0xE9,
+	0x81, 0x38, 0x57, 0xE9,
 
-0x82, 0x31, 0x57, 0xE9,
-0x86, 0x78, 0x57, 0xE9,
+	0x82, 0x31, 0x57, 0xE9,
+	0x86, 0x78, 0x57, 0xE9,
 
-0x83, 0x39, 0x57, 0xE9,
-0x87, 0x79, 0x57, 0xE9,
+	0x83, 0x39, 0x57, 0xE9,
+	0x87, 0x79, 0x57, 0xE9,
 
-0x30, 0x1F, 0x5F, 0xE9,
-0x8A, 0x34, 0x20, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
+	0x8A, 0x34, 0x20, 0xE9,
 
-0x8B, 0x3C, 0x20, 0xE9,
-0x37, 0x50, 0x60, 0xBD,
+	0x8B, 0x3C, 0x20, 0xE9,
+	0x37, 0x50, 0x60, 0xBD,
 
-0x57, 0x0D, 0x20, 0xE9,
-0x35, 0x51, 0x61, 0xBD,
+	0x57, 0x0D, 0x20, 0xE9,
+	0x35, 0x51, 0x61, 0xBD,
 
-0x2B, 0x50, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x50, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x0E, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x0E, 0x77,
 
-0x24, 0x51, 0x20, 0xE9,
-0x92, 0xFF, 0x20, 0xEA,
+	0x24, 0x51, 0x20, 0xE9,
+	0x92, 0xFF, 0x20, 0xEA,
 
-0x16, 0x0E, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x0E, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x0B, 0x46, 0xA0, 0xE8,
-0x1B, 0x56, 0xA0, 0xE8,
+	0x0B, 0x46, 0xA0, 0xE8,
+	0x1B, 0x56, 0xA0, 0xE8,
 
-0x2B, 0x66, 0xA0, 0xE8,
-0x0C, 0x47, 0xA0, 0xE8,
+	0x2B, 0x66, 0xA0, 0xE8,
+	0x0C, 0x47, 0xA0, 0xE8,
 
-0x1C, 0x57, 0xA0, 0xE8,
-0x2C, 0x67, 0xA0, 0xE8,
+	0x1C, 0x57, 0xA0, 0xE8,
+	0x2C, 0x67, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x57, 0x80, 0x57, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x57, 0x80, 0x57, 0xCF,
 
-0x66, 0x33, 0x66, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x66, 0x33, 0x66, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x67, 0x3B, 0x67, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x67, 0x3B, 0x67, 0xCF,
 
-0x0B, 0x48, 0xA0, 0xE8,
-0x1B, 0x58, 0xA0, 0xE8,
+	0x0B, 0x48, 0xA0, 0xE8,
+	0x1B, 0x58, 0xA0, 0xE8,
 
-0x2B, 0x68, 0xA0, 0xE8,
-0x0C, 0x49, 0xA0, 0xE8,
+	0x2B, 0x68, 0xA0, 0xE8,
+	0x0C, 0x49, 0xA0, 0xE8,
 
-0x1C, 0x59, 0xA0, 0xE8,
-0x2C, 0x69, 0xA0, 0xE8,
+	0x1C, 0x59, 0xA0, 0xE8,
+	0x2C, 0x69, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x34, 0xD7, 0x34, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x34, 0xD7, 0x34, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3C, 0xD7, 0x3C, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3C, 0xD7, 0x3C, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xB2, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xB2, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x70, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x70, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gzsa[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
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-0x81, 0x38, 0x57, 0xE9,
+	0x80, 0x30, 0x57, 0xE9,
+	0x81, 0x38, 0x57, 0xE9,
 
-0x82, 0x31, 0x57, 0xE9,
-0x86, 0x78, 0x57, 0xE9,
+	0x82, 0x31, 0x57, 0xE9,
+	0x86, 0x78, 0x57, 0xE9,
 
-0x83, 0x39, 0x57, 0xE9,
-0x87, 0x79, 0x57, 0xE9,
+	0x83, 0x39, 0x57, 0xE9,
+	0x87, 0x79, 0x57, 0xE9,
 
-0x30, 0x1F, 0x5F, 0xE9,
-0x8A, 0x34, 0x20, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
+	0x8A, 0x34, 0x20, 0xE9,
 
-0x8B, 0x3C, 0x20, 0xE9,
-0x37, 0x50, 0x60, 0xBD,
+	0x8B, 0x3C, 0x20, 0xE9,
+	0x37, 0x50, 0x60, 0xBD,
 
-0x57, 0x0D, 0x20, 0xE9,
-0x35, 0x51, 0x61, 0xBD,
+	0x57, 0x0D, 0x20, 0xE9,
+	0x35, 0x51, 0x61, 0xBD,
 
-0x2B, 0x50, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x50, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x0E, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x0E, 0x77,
 
-0x24, 0x51, 0x20, 0xE9,
-0x8D, 0xFF, 0x20, 0xEA,
+	0x24, 0x51, 0x20, 0xE9,
+	0x8D, 0xFF, 0x20, 0xEA,
 
-0x16, 0x0E, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x0E, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x0B, 0x46, 0xA0, 0xE8,
-0x1B, 0x56, 0xA0, 0xE8,
+	0x0B, 0x46, 0xA0, 0xE8,
+	0x1B, 0x56, 0xA0, 0xE8,
 
-0x2B, 0x66, 0xA0, 0xE8,
-0x0C, 0x47, 0xA0, 0xE8,
+	0x2B, 0x66, 0xA0, 0xE8,
+	0x0C, 0x47, 0xA0, 0xE8,
 
-0x1C, 0x57, 0xA0, 0xE8,
-0x2C, 0x67, 0xA0, 0xE8,
+	0x1C, 0x57, 0xA0, 0xE8,
+	0x2C, 0x67, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x57, 0x80, 0x57, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x57, 0x80, 0x57, 0xCF,
 
-0x66, 0x33, 0x66, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x66, 0x33, 0x66, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x67, 0x3B, 0x67, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x67, 0x3B, 0x67, 0xCF,
 
-0x0B, 0x48, 0xA0, 0xE8,
-0x1B, 0x58, 0xA0, 0xE8,
+	0x0B, 0x48, 0xA0, 0xE8,
+	0x1B, 0x58, 0xA0, 0xE8,
 
-0x2B, 0x68, 0xA0, 0xE8,
-0x0C, 0x49, 0xA0, 0xE8,
+	0x2B, 0x68, 0xA0, 0xE8,
+	0x0C, 0x49, 0xA0, 0xE8,
 
-0x1C, 0x59, 0xA0, 0xE8,
-0x2C, 0x69, 0xA0, 0xE8,
+	0x1C, 0x59, 0xA0, 0xE8,
+	0x2C, 0x69, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x34, 0xD7, 0x34, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x34, 0xD7, 0x34, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3C, 0xD7, 0x3C, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3C, 0xD7, 0x3C, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xAD, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xAD, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x6B, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x6B, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gzsaf[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x63, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x63, 0xA0, 0xE8,
 
-0x61, 0x41, 0xE0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x61, 0x41, 0xE0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x8E, 0x80, 0x15, 0xEA,
-0x10, 0x04,
-0x20, 0x04,
+	0x8E, 0x80, 0x15, 0xEA,
+	0x10, 0x04,
+	0x20, 0x04,
 
-0x61, 0x51, 0xE0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x61, 0x51, 0xE0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x52, 0xBF,
-0x0F, 0x52, 0xA0, 0xE8,
+	0x2A, 0x42, 0x52, 0xBF,
+	0x0F, 0x52, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x62, 0xBF,
-0x1E, 0x51, 0x60, 0xEA,
+	0x1A, 0x42, 0x62, 0xBF,
+	0x1E, 0x51, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x0E, 0x61, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x0E, 0x61, 0x60, 0xEA,
 
-0x32, 0x40, 0x50, 0xBD,
-0x22, 0x40, 0x60, 0xBD,
+	0x32, 0x40, 0x50, 0xBD,
+	0x22, 0x40, 0x60, 0xBD,
 
-0x12, 0x41, 0x51, 0xBD,
-0x3A, 0x41, 0x61, 0xBD,
+	0x12, 0x41, 0x51, 0xBD,
+	0x3A, 0x41, 0x61, 0xBD,
 
-0xBF, 0x2F, 0x0E, 0xBD,
-0x97, 0xE2,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x0E, 0xBD,
+	0x97, 0xE2,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x35, 0x48, 0xB1, 0xE8,
-0x3D, 0x59, 0xB1, 0xE8,
+	0x35, 0x48, 0xB1, 0xE8,
+	0x3D, 0x59, 0xB1, 0xE8,
 
-0x46, 0x31, 0x46, 0xBF,
-0x56, 0x31, 0x56, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0x31, 0x66, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x66, 0x31, 0x66, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x57, 0x39, 0x57, 0xBF,
-0x67, 0x39, 0x67, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
+	0x67, 0x39, 0x67, 0xBF,
 
-0x7F, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x7F, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x35, 0x00,
-0x3D, 0x00,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x35, 0x00,
+	0x3D, 0x00,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0x8D, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0x8D, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x75, 0xF8, 0xEC,
-0x35, 0x20,
-0x3D, 0x20,
+	0x43, 0x75, 0xF8, 0xEC,
+	0x35, 0x20,
+	0x3D, 0x20,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x53, 0x53, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x53, 0x53, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x0E, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x0E, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x48, 0x35, 0x48, 0xBF,
-0x58, 0x35, 0x58, 0xBF,
+	0x48, 0x35, 0x48, 0xBF,
+	0x58, 0x35, 0x58, 0xBF,
 
-0x68, 0x35, 0x68, 0xBF,
-0x49, 0x3D, 0x49, 0xBF,
+	0x68, 0x35, 0x68, 0xBF,
+	0x49, 0x3D, 0x49, 0xBF,
 
-0x59, 0x3D, 0x59, 0xBF,
-0x69, 0x3D, 0x69, 0xBF,
+	0x59, 0x3D, 0x59, 0xBF,
+	0x69, 0x3D, 0x69, 0xBF,
 
-0x63, 0x63, 0x2D, 0xDF,
-0x4D, 0x7D, 0xF8, 0xEC,
+	0x63, 0x63, 0x2D, 0xDF,
+	0x4D, 0x7D, 0xF8, 0xEC,
 
-0x59, 0xE3,
-0x00, 0xE0,
-0xB8, 0x38, 0x33, 0xBF,
+	0x59, 0xE3,
+	0x00, 0xE0,
+	0xB8, 0x38, 0x33, 0xBF,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x18, 0x3A, 0x41, 0xE9,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x18, 0x3A, 0x41, 0xE9,
 
-0x3F, 0x53, 0xA0, 0xE8,
-0x05, 0x80, 0x3D, 0xEA,
+	0x3F, 0x53, 0xA0, 0xE8,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x63, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x63, 0xA0, 0xE8,
 
-0x50, 0x70, 0xF8, 0xEC,
-0x2B, 0x50, 0x3C, 0xE9,
+	0x50, 0x70, 0xF8, 0xEC,
+	0x2B, 0x50, 0x3C, 0xE9,
 
-0x1F, 0x0F, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x0F, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x59, 0x78, 0xF8, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0x59, 0x78, 0xF8, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x46, 0x37, 0x46, 0xDF,
-0x56, 0x3F, 0x56, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x56, 0x3F, 0x56, 0xDF,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x66, 0x3D, 0x66, 0xDF,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x66, 0x3D, 0x66, 0xDF,
 
-0x1D, 0x32, 0x41, 0xE9,
-0x67, 0x3D, 0x67, 0xDF,
+	0x1D, 0x32, 0x41, 0xE9,
+	0x67, 0x3D, 0x67, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3F, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3F, 0x57, 0xDF,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x59, 0x3F, 0x59, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x59, 0x3F, 0x59, 0xDF,
 
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-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xA9, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xA9, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x67, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x67, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_t2gzsf[] = {
 
-0x00, 0x8A, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x8A, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x0A, 0x40, 0x50, 0xBF,
-0x2A, 0x40, 0x60, 0xBF,
+	0x0A, 0x40, 0x50, 0xBF,
+	0x2A, 0x40, 0x60, 0xBF,
 
-0x32, 0x41, 0x51, 0xBF,
-0x3A, 0x41, 0x61, 0xBF,
+	0x32, 0x41, 0x51, 0xBF,
+	0x3A, 0x41, 0x61, 0xBF,
 
-0xC3, 0x6B,
-0xD3, 0x6B,
-0x00, 0x8A, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xD3, 0x6B,
+	0x00, 0x8A, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x53, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x23, 0x9F,
-0x00, 0xE0,
-0x51, 0x04,
+	0xAD, 0xEE, 0x23, 0x9F,
+	0x00, 0xE0,
+	0x51, 0x04,
 
-0x90, 0xE2,
-0x61, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x61, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x51, 0x41, 0xE0, 0xEC,
-0x39, 0x67, 0xB1, 0xE8,
+	0x51, 0x41, 0xE0, 0xEC,
+	0x39, 0x67, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x63, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x63, 0xA0, 0xE8,
 
-0x61, 0x41, 0xE0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x61, 0x41, 0xE0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x8A, 0x80, 0x15, 0xEA,
-0x10, 0x04,
-0x20, 0x04,
+	0x8A, 0x80, 0x15, 0xEA,
+	0x10, 0x04,
+	0x20, 0x04,
 
-0x61, 0x51, 0xE0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x61, 0x51, 0xE0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x52, 0xBF,
-0x0F, 0x52, 0xA0, 0xE8,
+	0x2A, 0x42, 0x52, 0xBF,
+	0x0F, 0x52, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x62, 0xBF,
-0x1E, 0x51, 0x60, 0xEA,
+	0x1A, 0x42, 0x62, 0xBF,
+	0x1E, 0x51, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x0E, 0x61, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x0E, 0x61, 0x60, 0xEA,
 
-0x32, 0x40, 0x50, 0xBD,
-0x22, 0x40, 0x60, 0xBD,
+	0x32, 0x40, 0x50, 0xBD,
+	0x22, 0x40, 0x60, 0xBD,
 
-0x12, 0x41, 0x51, 0xBD,
-0x3A, 0x41, 0x61, 0xBD,
+	0x12, 0x41, 0x51, 0xBD,
+	0x3A, 0x41, 0x61, 0xBD,
 
-0xBF, 0x2F, 0x0E, 0xBD,
-0x97, 0xE2,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x0E, 0xBD,
+	0x97, 0xE2,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x35, 0x48, 0xB1, 0xE8,
-0x3D, 0x59, 0xB1, 0xE8,
+	0x35, 0x48, 0xB1, 0xE8,
+	0x3D, 0x59, 0xB1, 0xE8,
 
-0x46, 0x31, 0x46, 0xBF,
-0x56, 0x31, 0x56, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x66, 0x31, 0x66, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x66, 0x31, 0x66, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x57, 0x39, 0x57, 0xBF,
-0x67, 0x39, 0x67, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
+	0x67, 0x39, 0x67, 0xBF,
 
-0x7B, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x7B, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x35, 0x00,
-0x3D, 0x00,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x35, 0x00,
+	0x3D, 0x00,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0x8D, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0x8D, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x75, 0xF8, 0xEC,
-0x35, 0x20,
-0x3D, 0x20,
+	0x43, 0x75, 0xF8, 0xEC,
+	0x35, 0x20,
+	0x3D, 0x20,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x53, 0x53, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x53, 0x53, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x0E, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x0E, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x48, 0x35, 0x48, 0xBF,
-0x58, 0x35, 0x58, 0xBF,
+	0x48, 0x35, 0x48, 0xBF,
+	0x58, 0x35, 0x58, 0xBF,
 
-0x68, 0x35, 0x68, 0xBF,
-0x49, 0x3D, 0x49, 0xBF,
+	0x68, 0x35, 0x68, 0xBF,
+	0x49, 0x3D, 0x49, 0xBF,
 
-0x59, 0x3D, 0x59, 0xBF,
-0x69, 0x3D, 0x69, 0xBF,
+	0x59, 0x3D, 0x59, 0xBF,
+	0x69, 0x3D, 0x69, 0xBF,
 
-0x63, 0x63, 0x2D, 0xDF,
-0x4D, 0x7D, 0xF8, 0xEC,
+	0x63, 0x63, 0x2D, 0xDF,
+	0x4D, 0x7D, 0xF8, 0xEC,
 
-0x59, 0xE3,
-0x00, 0xE0,
-0xB8, 0x38, 0x33, 0xBF,
+	0x59, 0xE3,
+	0x00, 0xE0,
+	0xB8, 0x38, 0x33, 0xBF,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x18, 0x3A, 0x41, 0xE9,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x18, 0x3A, 0x41, 0xE9,
 
-0x3F, 0x53, 0xA0, 0xE8,
-0x05, 0x80, 0x3D, 0xEA,
+	0x3F, 0x53, 0xA0, 0xE8,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x63, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x63, 0xA0, 0xE8,
 
-0x50, 0x70, 0xF8, 0xEC,
-0x2B, 0x50, 0x3C, 0xE9,
+	0x50, 0x70, 0xF8, 0xEC,
+	0x2B, 0x50, 0x3C, 0xE9,
 
-0x1F, 0x0F, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x0F, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x59, 0x78, 0xF8, 0xEC,
-0x00, 0x80, 0x00, 0xE8,
+	0x59, 0x78, 0xF8, 0xEC,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x46, 0x37, 0x46, 0xDF,
-0x56, 0x3F, 0x56, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x56, 0x3F, 0x56, 0xDF,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x66, 0x3D, 0x66, 0xDF,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x66, 0x3D, 0x66, 0xDF,
 
-0x1D, 0x32, 0x41, 0xE9,
-0x67, 0x3D, 0x67, 0xDF,
+	0x1D, 0x32, 0x41, 0xE9,
+	0x67, 0x3D, 0x67, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3F, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3F, 0x57, 0xDF,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x59, 0x3F, 0x59, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x59, 0x3F, 0x59, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x69, 0x3D, 0x69, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x69, 0x3D, 0x69, 0xDF,
 
-0x48, 0x37, 0x48, 0xDF,
-0x58, 0x3F, 0x58, 0xDF,
+	0x48, 0x37, 0x48, 0xDF,
+	0x58, 0x3F, 0x58, 0xDF,
 
-0x68, 0x3D, 0x68, 0xDF,
-0x49, 0x37, 0x49, 0xDF,
+	0x68, 0x3D, 0x68, 0xDF,
+	0x49, 0x37, 0x49, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x0F, 0xCF, 0x74, 0xC2,
-0x37, 0xCF, 0x74, 0xC4,
+	0x0F, 0xCF, 0x74, 0xC2,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x54, 0xB0,
-0x02, 0x44, 0x64, 0xB0,
+	0x0A, 0x44, 0x54, 0xB0,
+	0x02, 0x44, 0x64, 0xB0,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x34, 0x37, 0x20, 0xE9,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x38, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x38, 0x0F, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x54, 0xB2,
-0x1A, 0x44, 0x64, 0xB2,
+	0x2A, 0x44, 0x54, 0xB2,
+	0x1A, 0x44, 0x64, 0xB2,
 
-0x36, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x36, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x0F, 0xCF, 0x75, 0xC0,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0F, 0xCF, 0x75, 0xC0,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x3D, 0xCF, 0x75, 0xC2,
-0x37, 0xCF, 0x75, 0xC4,
+	0x3D, 0xCF, 0x75, 0xC2,
+	0x37, 0xCF, 0x75, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA6, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA6, 0x0F, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA3, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA3, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x54, 0xB4,
-0x1A, 0x44, 0x64, 0xB4,
+	0x2A, 0x44, 0x54, 0xB4,
+	0x1A, 0x44, 0x64, 0xB4,
 
-0x0A, 0x45, 0x55, 0xB0,
-0x02, 0x45, 0x65, 0xB0,
+	0x0A, 0x45, 0x55, 0xB0,
+	0x02, 0x45, 0x65, 0xB0,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA0, 0x37, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA0, 0x37, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x45, 0x55, 0xB2,
-0x1A, 0x45, 0x65, 0xB2,
+	0x2A, 0x45, 0x55, 0xB2,
+	0x1A, 0x45, 0x65, 0xB2,
 
-0x0A, 0x45, 0x55, 0xB4,
-0x02, 0x45, 0x65, 0xB4,
+	0x0A, 0x45, 0x55, 0xB4,
+	0x02, 0x45, 0x65, 0xB4,
 
-0x0F, 0xCF, 0x75, 0xC6,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0F, 0xCF, 0x75, 0xC6,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA7, 0x30, 0x4F, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA7, 0x30, 0x4F, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x31, 0x0F, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x31, 0x0F, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA8, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA8, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x45, 0x55, 0xB6,
-0x1A, 0x45, 0x65, 0xB6,
+	0x2A, 0x45, 0x55, 0xB6,
+	0x1A, 0x45, 0x65, 0xB6,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x36, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x36, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x37, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x37, 0x39, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x00, 0x80, 0x00, 0xE8,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x2A, 0x46, 0x56, 0xBF,
-0x1A, 0x46, 0x66, 0xBF,
+	0x2A, 0x46, 0x56, 0xBF,
+	0x1A, 0x46, 0x66, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA4, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA4, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA5, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA5, 0x39, 0x4F, 0xE9,
 
-0x0A, 0x47, 0x57, 0xBF,
-0x02, 0x47, 0x67, 0xBF,
+	0x0A, 0x47, 0x57, 0xBF,
+	0x02, 0x47, 0x67, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA1, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA1, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA2, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA2, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x53, 0xBF,
-0x1A, 0x43, 0x63, 0xBF,
+	0x2A, 0x43, 0x53, 0xBF,
+	0x1A, 0x43, 0x63, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x35, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x35, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x39, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x39, 0x39, 0x4F, 0xE9,
 
-0x0A, 0x48, 0x58, 0xBF,
-0x02, 0x48, 0x68, 0xBF,
+	0x0A, 0x48, 0x58, 0xBF,
+	0x02, 0x48, 0x68, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x2A, 0x49, 0x59, 0xBF,
-0x1A, 0x49, 0x69, 0xBF,
+	0x2A, 0x49, 0x59, 0xBF,
+	0x1A, 0x49, 0x69, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x82, 0x30, 0x57, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x82, 0x30, 0x57, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x83, 0x38, 0x57, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x83, 0x38, 0x57, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x84, 0x31, 0x5E, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x84, 0x31, 0x5E, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x85, 0x39, 0x5E, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x85, 0x39, 0x5E, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8A, 0x36, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x87, 0x77, 0x57, 0xE9,
-0x8B, 0x3E, 0xBF, 0xEA,
+	0x87, 0x77, 0x57, 0xE9,
+	0x8B, 0x3E, 0xBF, 0xEA,
 
-0x80, 0x30, 0x57, 0xE9,
-0x81, 0x38, 0x57, 0xE9,
+	0x80, 0x30, 0x57, 0xE9,
+	0x81, 0x38, 0x57, 0xE9,
 
-0x82, 0x31, 0x57, 0xE9,
-0x86, 0x78, 0x57, 0xE9,
+	0x82, 0x31, 0x57, 0xE9,
+	0x86, 0x78, 0x57, 0xE9,
 
-0x83, 0x39, 0x57, 0xE9,
-0x87, 0x79, 0x57, 0xE9,
+	0x83, 0x39, 0x57, 0xE9,
+	0x87, 0x79, 0x57, 0xE9,
 
-0x30, 0x1F, 0x5F, 0xE9,
-0x8A, 0x34, 0x20, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
+	0x8A, 0x34, 0x20, 0xE9,
 
-0x8B, 0x3C, 0x20, 0xE9,
-0x37, 0x50, 0x60, 0xBD,
+	0x8B, 0x3C, 0x20, 0xE9,
+	0x37, 0x50, 0x60, 0xBD,
 
-0x57, 0x0D, 0x20, 0xE9,
-0x35, 0x51, 0x61, 0xBD,
+	0x57, 0x0D, 0x20, 0xE9,
+	0x35, 0x51, 0x61, 0xBD,
 
-0x2B, 0x50, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x50, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x0E, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x0E, 0x77,
 
-0x24, 0x51, 0x20, 0xE9,
-0x8D, 0xFF, 0x20, 0xEA,
+	0x24, 0x51, 0x20, 0xE9,
+	0x8D, 0xFF, 0x20, 0xEA,
 
-0x16, 0x0E, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x0E, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x0B, 0x46, 0xA0, 0xE8,
-0x1B, 0x56, 0xA0, 0xE8,
+	0x0B, 0x46, 0xA0, 0xE8,
+	0x1B, 0x56, 0xA0, 0xE8,
 
-0x2B, 0x66, 0xA0, 0xE8,
-0x0C, 0x47, 0xA0, 0xE8,
+	0x2B, 0x66, 0xA0, 0xE8,
+	0x0C, 0x47, 0xA0, 0xE8,
 
-0x1C, 0x57, 0xA0, 0xE8,
-0x2C, 0x67, 0xA0, 0xE8,
+	0x1C, 0x57, 0xA0, 0xE8,
+	0x2C, 0x67, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x57, 0x80, 0x57, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x57, 0x80, 0x57, 0xCF,
 
-0x66, 0x33, 0x66, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x66, 0x33, 0x66, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x67, 0x3B, 0x67, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x67, 0x3B, 0x67, 0xCF,
 
-0x0B, 0x48, 0xA0, 0xE8,
-0x1B, 0x58, 0xA0, 0xE8,
+	0x0B, 0x48, 0xA0, 0xE8,
+	0x1B, 0x58, 0xA0, 0xE8,
 
-0x2B, 0x68, 0xA0, 0xE8,
-0x0C, 0x49, 0xA0, 0xE8,
+	0x2B, 0x68, 0xA0, 0xE8,
+	0x0C, 0x49, 0xA0, 0xE8,
 
-0x1C, 0x59, 0xA0, 0xE8,
-0x2C, 0x69, 0xA0, 0xE8,
+	0x1C, 0x59, 0xA0, 0xE8,
+	0x2C, 0x69, 0xA0, 0xE8,
 
-0x0B, 0x00,
-0x1B, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x0B, 0x00,
+	0x1B, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x0C, 0x00,
-0x1C, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x0C, 0x00,
+	0x1C, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x0B, 0x65,
-0x1B, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x0B, 0x65,
+	0x1B, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x0C, 0x65,
-0x1C, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x0C, 0x65,
+	0x1C, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x0B, 0x1B, 0x60, 0xEC,
-0x34, 0xD7, 0x34, 0xAD,
+	0x0B, 0x1B, 0x60, 0xEC,
+	0x34, 0xD7, 0x34, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x0C, 0x1C, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x0C, 0x1C, 0x60, 0xEC,
 
-0x3C, 0xD7, 0x3C, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3C, 0xD7, 0x3C, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x0B, 0x2B, 0xDE, 0xE8,
-0x1B, 0x80, 0xDE, 0xE8,
+	0x0B, 0x2B, 0xDE, 0xE8,
+	0x1B, 0x80, 0xDE, 0xE8,
 
-0x34, 0x80, 0x34, 0xBD,
-0x3C, 0x80, 0x3C, 0xBD,
+	0x34, 0x80, 0x34, 0xBD,
+	0x3C, 0x80, 0x3C, 0xBD,
 
-0x33, 0xD7, 0x0B, 0xBD,
-0x3B, 0xD7, 0x1B, 0xBD,
+	0x33, 0xD7, 0x0B, 0xBD,
+	0x3B, 0xD7, 0x1B, 0xBD,
 
-0x48, 0x80, 0x48, 0xCF,
-0x59, 0x80, 0x59, 0xCF,
+	0x48, 0x80, 0x48, 0xCF,
+	0x59, 0x80, 0x59, 0xCF,
 
-0x68, 0x33, 0x68, 0xCF,
-0x49, 0x3B, 0x49, 0xCF,
+	0x68, 0x33, 0x68, 0xCF,
+	0x49, 0x3B, 0x49, 0xCF,
 
-0xAD, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xAD, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x58, 0x33, 0x58, 0xCF,
-0x69, 0x3B, 0x69, 0xCF,
+	0x58, 0x33, 0x58, 0xCF,
+	0x69, 0x3B, 0x69, 0xCF,
 
-0x6B, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x6B, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgz[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x58, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x58, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x46, 0x31, 0x46, 0xBF,
-0x4E, 0x31, 0x4E, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x4E, 0x31, 0x4E, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x56, 0x31, 0x56, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x4F, 0x39, 0x4F, 0xBF,
-0x57, 0x39, 0x57, 0xBF,
+	0x4F, 0x39, 0x4F, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
 
-0x4A, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x4A, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x42, 0x73, 0xF8, 0xEC,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x42, 0x73, 0xF8, 0xEC,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0xA5, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0xA5, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x4B, 0x4B, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x4B, 0x4B, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x26, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x26, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x53, 0x53, 0x2D, 0xDF,
-0x00, 0x80, 0x00, 0xE8,
+	0x53, 0x53, 0x2D, 0xDF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB8, 0x38, 0x33, 0xBF,
-0x00, 0xE0,
-0x59, 0xE3,
+	0xB8, 0x38, 0x33, 0xBF,
+	0x00, 0xE0,
+	0x59, 0xE3,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x3F, 0x4B, 0xA0, 0xE8,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x3F, 0x4B, 0xA0, 0xE8,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x05, 0x80, 0x3D, 0xEA,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x53, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x53, 0xA0, 0xE8,
 
-0x48, 0x70, 0xF8, 0xEC,
-0x2B, 0x48, 0x3C, 0xE9,
+	0x48, 0x70, 0xF8, 0xEC,
+	0x2B, 0x48, 0x3C, 0xE9,
 
-0x1F, 0x27, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x27, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x18, 0x3A, 0x41, 0xE9,
-0x1D, 0x32, 0x41, 0xE9,
+	0x18, 0x3A, 0x41, 0xE9,
+	0x1D, 0x32, 0x41, 0xE9,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x56, 0x3D, 0x56, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x56, 0x3D, 0x56, 0xDF,
 
-0x46, 0x37, 0x46, 0xDF,
-0x4E, 0x3F, 0x4E, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x4E, 0x3F, 0x4E, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x4F, 0x3F, 0x4F, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x4F, 0x3F, 0x4F, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3D, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3D, 0x57, 0xDF,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x37, 0xCF, 0x74, 0xC4,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x34, 0x80, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x34, 0x80, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x0A, 0x44, 0x4C, 0xB0,
-0x02, 0x44, 0x54, 0xB0,
+	0x0A, 0x44, 0x4C, 0xB0,
+	0x02, 0x44, 0x54, 0xB0,
 
-0x2A, 0x44, 0x4C, 0xB2,
-0x1A, 0x44, 0x54, 0xB2,
+	0x2A, 0x44, 0x4C, 0xB2,
+	0x1A, 0x44, 0x54, 0xB2,
 
-0x1D, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x1D, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x3D, 0xCF, 0x74, 0xC2,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x3D, 0xCF, 0x74, 0xC2,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x2A, 0x44, 0x4C, 0xB4,
-0x1A, 0x44, 0x54, 0xB4,
+	0x2A, 0x44, 0x4C, 0xB4,
+	0x1A, 0x44, 0x54, 0xB4,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x38, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x38, 0x3D, 0x20, 0xE9,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x2A, 0x46, 0x4E, 0xBF,
-0x1A, 0x46, 0x56, 0xBF,
+	0x2A, 0x46, 0x4E, 0xBF,
+	0x1A, 0x46, 0x56, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x47, 0x4F, 0xBF,
-0x02, 0x47, 0x57, 0xBF,
+	0x0A, 0x47, 0x4F, 0xBF,
+	0x02, 0x47, 0x57, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x4B, 0xBF,
-0x1A, 0x43, 0x53, 0xBF,
+	0x2A, 0x43, 0x4B, 0xBF,
+	0x1A, 0x43, 0x53, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x36, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x36, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x37, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x37, 0x39, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x37, 0x48, 0x50, 0xBD,
-0x8A, 0x36, 0x20, 0xE9,
+	0x37, 0x48, 0x50, 0xBD,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8B, 0x3E, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8B, 0x3E, 0x20, 0xE9,
 
-0x82, 0x30, 0x57, 0xE9,
-0x87, 0x77, 0x57, 0xE9,
+	0x82, 0x30, 0x57, 0xE9,
+	0x87, 0x77, 0x57, 0xE9,
 
-0x83, 0x38, 0x57, 0xE9,
-0x35, 0x49, 0x51, 0xBD,
+	0x83, 0x38, 0x57, 0xE9,
+	0x35, 0x49, 0x51, 0xBD,
 
-0x84, 0x31, 0x5E, 0xE9,
-0x30, 0x1F, 0x5F, 0xE9,
+	0x84, 0x31, 0x5E, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
 
-0x85, 0x39, 0x5E, 0xE9,
-0x57, 0x25, 0x20, 0xE9,
+	0x85, 0x39, 0x5E, 0xE9,
+	0x57, 0x25, 0x20, 0xE9,
 
-0x2B, 0x48, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x48, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x26, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x26, 0x77,
 
-0x24, 0x49, 0x20, 0xE9,
-0xAF, 0xFF, 0x20, 0xEA,
+	0x24, 0x49, 0x20, 0xE9,
+	0xAF, 0xFF, 0x20, 0xEA,
 
-0x16, 0x26, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x26, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x1C, 0x46, 0xA0, 0xE8,
-0x23, 0x4E, 0xA0, 0xE8,
+	0x1C, 0x46, 0xA0, 0xE8,
+	0x23, 0x4E, 0xA0, 0xE8,
 
-0x2B, 0x56, 0xA0, 0xE8,
-0x1D, 0x47, 0xA0, 0xE8,
+	0x2B, 0x56, 0xA0, 0xE8,
+	0x1D, 0x47, 0xA0, 0xE8,
 
-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
+	0x24, 0x4F, 0xA0, 0xE8,
+	0x2C, 0x57, 0xA0, 0xE8,
 
-0x1C, 0x00,
-0x23, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x1C, 0x00,
+	0x23, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x1D, 0x00,
-0x24, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x1D, 0x00,
+	0x24, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x1C, 0x65,
-0x23, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x1C, 0x65,
+	0x23, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x1D, 0x65,
-0x24, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x1D, 0x65,
+	0x24, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x1C, 0x23, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x1C, 0x23, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x1D, 0x24, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x1C, 0x2B, 0xDE, 0xE8,
-0x23, 0x80, 0xDE, 0xE8,
+	0x1C, 0x2B, 0xDE, 0xE8,
+	0x23, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x1C, 0xBD,
-0x3B, 0xD7, 0x23, 0xBD,
+	0x33, 0xD7, 0x1C, 0xBD,
+	0x3B, 0xD7, 0x23, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xD6, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xD6, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x9D, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x9D, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgza[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x5C, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x5C, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x46, 0x31, 0x46, 0xBF,
-0x4E, 0x31, 0x4E, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x4E, 0x31, 0x4E, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x56, 0x31, 0x56, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x4F, 0x39, 0x4F, 0xBF,
-0x57, 0x39, 0x57, 0xBF,
+	0x4F, 0x39, 0x4F, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
 
-0x4E, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x4E, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x42, 0x73, 0xF8, 0xEC,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x42, 0x73, 0xF8, 0xEC,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0xA5, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0xA5, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x4B, 0x4B, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x4B, 0x4B, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x26, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x26, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x53, 0x53, 0x2D, 0xDF,
-0x00, 0x80, 0x00, 0xE8,
+	0x53, 0x53, 0x2D, 0xDF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB8, 0x38, 0x33, 0xBF,
-0x00, 0xE0,
-0x59, 0xE3,
+	0xB8, 0x38, 0x33, 0xBF,
+	0x00, 0xE0,
+	0x59, 0xE3,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x3F, 0x4B, 0xA0, 0xE8,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x3F, 0x4B, 0xA0, 0xE8,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x05, 0x80, 0x3D, 0xEA,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x53, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x53, 0xA0, 0xE8,
 
-0x48, 0x70, 0xF8, 0xEC,
-0x2B, 0x48, 0x3C, 0xE9,
+	0x48, 0x70, 0xF8, 0xEC,
+	0x2B, 0x48, 0x3C, 0xE9,
 
-0x1F, 0x27, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x27, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x18, 0x3A, 0x41, 0xE9,
-0x1D, 0x32, 0x41, 0xE9,
+	0x18, 0x3A, 0x41, 0xE9,
+	0x1D, 0x32, 0x41, 0xE9,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x56, 0x3D, 0x56, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x56, 0x3D, 0x56, 0xDF,
 
-0x46, 0x37, 0x46, 0xDF,
-0x4E, 0x3F, 0x4E, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x4E, 0x3F, 0x4E, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x4F, 0x3F, 0x4F, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x4F, 0x3F, 0x4F, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3D, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3D, 0x57, 0xDF,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x37, 0xCF, 0x74, 0xC4,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x34, 0x80, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x34, 0x80, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x27, 0xCF, 0x74, 0xC6,
-0x3D, 0xCF, 0x74, 0xC2,
+	0x27, 0xCF, 0x74, 0xC6,
+	0x3D, 0xCF, 0x74, 0xC2,
 
-0x0A, 0x44, 0x4C, 0xB0,
-0x02, 0x44, 0x54, 0xB0,
+	0x0A, 0x44, 0x4C, 0xB0,
+	0x02, 0x44, 0x54, 0xB0,
 
-0x2A, 0x44, 0x4C, 0xB2,
-0x1A, 0x44, 0x54, 0xB2,
+	0x2A, 0x44, 0x4C, 0xB2,
+	0x1A, 0x44, 0x54, 0xB2,
 
-0x20, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x20, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9C, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9C, 0x27, 0x20, 0xE9,
 
-0x0A, 0x44, 0x4C, 0xB4,
-0x02, 0x44, 0x54, 0xB4,
+	0x0A, 0x44, 0x4C, 0xB4,
+	0x02, 0x44, 0x54, 0xB4,
 
-0x2A, 0x44, 0x4C, 0xB6,
-0x1A, 0x44, 0x54, 0xB6,
+	0x2A, 0x44, 0x4C, 0xB6,
+	0x1A, 0x44, 0x54, 0xB6,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x38, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x38, 0x3D, 0x20, 0xE9,
 
-0x0A, 0x20,
-0x02, 0x20,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0A, 0x20,
+	0x02, 0x20,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x0A, 0x47, 0x4F, 0xBF,
-0x02, 0x47, 0x57, 0xBF,
+	0x0A, 0x47, 0x4F, 0xBF,
+	0x02, 0x47, 0x57, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x46, 0x4E, 0xBF,
-0x1A, 0x46, 0x56, 0xBF,
+	0x2A, 0x46, 0x4E, 0xBF,
+	0x1A, 0x46, 0x56, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x36, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x36, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x37, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x37, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x4B, 0xBF,
-0x1A, 0x43, 0x53, 0xBF,
+	0x2A, 0x43, 0x4B, 0xBF,
+	0x1A, 0x43, 0x53, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x9D, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x9D, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x9E, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x9E, 0x39, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x37, 0x48, 0x50, 0xBD,
-0x8A, 0x36, 0x20, 0xE9,
+	0x37, 0x48, 0x50, 0xBD,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8B, 0x3E, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8B, 0x3E, 0x20, 0xE9,
 
-0x82, 0x30, 0x57, 0xE9,
-0x87, 0x77, 0x57, 0xE9,
+	0x82, 0x30, 0x57, 0xE9,
+	0x87, 0x77, 0x57, 0xE9,
 
-0x83, 0x38, 0x57, 0xE9,
-0x35, 0x49, 0x51, 0xBD,
+	0x83, 0x38, 0x57, 0xE9,
+	0x35, 0x49, 0x51, 0xBD,
 
-0x84, 0x31, 0x5E, 0xE9,
-0x30, 0x1F, 0x5F, 0xE9,
+	0x84, 0x31, 0x5E, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
 
-0x85, 0x39, 0x5E, 0xE9,
-0x57, 0x25, 0x20, 0xE9,
+	0x85, 0x39, 0x5E, 0xE9,
+	0x57, 0x25, 0x20, 0xE9,
 
-0x2B, 0x48, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x48, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x26, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x26, 0x77,
 
-0x24, 0x49, 0x20, 0xE9,
-0xAB, 0xFF, 0x20, 0xEA,
+	0x24, 0x49, 0x20, 0xE9,
+	0xAB, 0xFF, 0x20, 0xEA,
 
-0x16, 0x26, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x26, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x1C, 0x46, 0xA0, 0xE8,
-0x23, 0x4E, 0xA0, 0xE8,
+	0x1C, 0x46, 0xA0, 0xE8,
+	0x23, 0x4E, 0xA0, 0xE8,
 
-0x2B, 0x56, 0xA0, 0xE8,
-0x1D, 0x47, 0xA0, 0xE8,
+	0x2B, 0x56, 0xA0, 0xE8,
+	0x1D, 0x47, 0xA0, 0xE8,
 
-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
+	0x24, 0x4F, 0xA0, 0xE8,
+	0x2C, 0x57, 0xA0, 0xE8,
 
-0x1C, 0x00,
-0x23, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x1C, 0x00,
+	0x23, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x1D, 0x00,
-0x24, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x1D, 0x00,
+	0x24, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x1C, 0x65,
-0x23, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x1C, 0x65,
+	0x23, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x1D, 0x65,
-0x24, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x1D, 0x65,
+	0x24, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x1C, 0x23, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x1C, 0x23, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x1D, 0x24, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x1C, 0x2B, 0xDE, 0xE8,
-0x23, 0x80, 0xDE, 0xE8,
+	0x1C, 0x2B, 0xDE, 0xE8,
+	0x23, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x1C, 0xBD,
-0x3B, 0xD7, 0x23, 0xBD,
+	0x33, 0xD7, 0x1C, 0xBD,
+	0x3B, 0xD7, 0x23, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xD3, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xD3, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x99, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x99, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgzaf[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x61, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x61, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x46, 0x31, 0x46, 0xBF,
-0x4E, 0x31, 0x4E, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x4E, 0x31, 0x4E, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x56, 0x31, 0x56, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x4F, 0x39, 0x4F, 0xBF,
-0x57, 0x39, 0x57, 0xBF,
+	0x4F, 0x39, 0x4F, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
 
-0x53, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x53, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x42, 0x73, 0xF8, 0xEC,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x42, 0x73, 0xF8, 0xEC,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0xA5, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0xA5, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x4B, 0x4B, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x4B, 0x4B, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x26, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x26, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x53, 0x53, 0x2D, 0xDF,
-0x00, 0x80, 0x00, 0xE8,
+	0x53, 0x53, 0x2D, 0xDF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB8, 0x38, 0x33, 0xBF,
-0x00, 0xE0,
-0x59, 0xE3,
+	0xB8, 0x38, 0x33, 0xBF,
+	0x00, 0xE0,
+	0x59, 0xE3,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x3F, 0x4B, 0xA0, 0xE8,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x3F, 0x4B, 0xA0, 0xE8,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x05, 0x80, 0x3D, 0xEA,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x53, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x53, 0xA0, 0xE8,
 
-0x48, 0x70, 0xF8, 0xEC,
-0x2B, 0x48, 0x3C, 0xE9,
+	0x48, 0x70, 0xF8, 0xEC,
+	0x2B, 0x48, 0x3C, 0xE9,
 
-0x1F, 0x27, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x27, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x18, 0x3A, 0x41, 0xE9,
-0x1D, 0x32, 0x41, 0xE9,
+	0x18, 0x3A, 0x41, 0xE9,
+	0x1D, 0x32, 0x41, 0xE9,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x56, 0x3D, 0x56, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x56, 0x3D, 0x56, 0xDF,
 
-0x46, 0x37, 0x46, 0xDF,
-0x4E, 0x3F, 0x4E, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x4E, 0x3F, 0x4E, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x4F, 0x3F, 0x4F, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x4F, 0x3F, 0x4F, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3D, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3D, 0x57, 0xDF,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x37, 0xCF, 0x74, 0xC4,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x4C, 0xB0,
-0x02, 0x44, 0x54, 0xB0,
+	0x0A, 0x44, 0x4C, 0xB0,
+	0x02, 0x44, 0x54, 0xB0,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x34, 0x37, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB2,
-0x1A, 0x44, 0x54, 0xB2,
+	0x2A, 0x44, 0x4C, 0xB2,
+	0x1A, 0x44, 0x54, 0xB2,
 
-0x26, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x26, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x3D, 0xCF, 0x74, 0xC2,
-0x27, 0xCF, 0x74, 0xC6,
+	0x3D, 0xCF, 0x74, 0xC2,
+	0x27, 0xCF, 0x74, 0xC6,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9C, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9C, 0x27, 0x20, 0xE9,
 
-0x0A, 0x44, 0x4C, 0xB4,
-0x02, 0x44, 0x54, 0xB4,
+	0x0A, 0x44, 0x4C, 0xB4,
+	0x02, 0x44, 0x54, 0xB4,
 
-0x2A, 0x44, 0x4C, 0xB6,
-0x1A, 0x44, 0x54, 0xB6,
+	0x2A, 0x44, 0x4C, 0xB6,
+	0x1A, 0x44, 0x54, 0xB6,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x38, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x38, 0x3D, 0x20, 0xE9,
 
-0x0A, 0x20,
-0x02, 0x20,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0A, 0x20,
+	0x02, 0x20,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x3D, 0xCF, 0x75, 0xC6,
-0x00, 0x80, 0x00, 0xE8,
+	0x3D, 0xCF, 0x75, 0xC6,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x45, 0x4D, 0xB6,
-0x02, 0x45, 0x55, 0xB6,
+	0x0A, 0x45, 0x4D, 0xB6,
+	0x02, 0x45, 0x55, 0xB6,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x31, 0x3D, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0x31, 0x3D, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x2A, 0x46, 0x4E, 0xBF,
-0x1A, 0x46, 0x56, 0xBF,
+	0x2A, 0x46, 0x4E, 0xBF,
+	0x1A, 0x46, 0x56, 0xBF,
 
-0x0A, 0x47, 0x4F, 0xBF,
-0x02, 0x47, 0x57, 0xBF,
+	0x0A, 0x47, 0x4F, 0xBF,
+	0x02, 0x47, 0x57, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x36, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x36, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x37, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x37, 0x38, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9D, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9D, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x9E, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x9E, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x4B, 0xBF,
-0x1A, 0x43, 0x53, 0xBF,
+	0x2A, 0x43, 0x4B, 0xBF,
+	0x1A, 0x43, 0x53, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x35, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x35, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x39, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x39, 0x38, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x37, 0x48, 0x50, 0xBD,
-0x8A, 0x36, 0x20, 0xE9,
+	0x37, 0x48, 0x50, 0xBD,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8B, 0x3E, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8B, 0x3E, 0x20, 0xE9,
 
-0x82, 0x30, 0x57, 0xE9,
-0x87, 0x77, 0x57, 0xE9,
+	0x82, 0x30, 0x57, 0xE9,
+	0x87, 0x77, 0x57, 0xE9,
 
-0x83, 0x38, 0x57, 0xE9,
-0x35, 0x49, 0x51, 0xBD,
+	0x83, 0x38, 0x57, 0xE9,
+	0x35, 0x49, 0x51, 0xBD,
 
-0x84, 0x31, 0x5E, 0xE9,
-0x30, 0x1F, 0x5F, 0xE9,
+	0x84, 0x31, 0x5E, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
 
-0x85, 0x39, 0x5E, 0xE9,
-0x57, 0x25, 0x20, 0xE9,
+	0x85, 0x39, 0x5E, 0xE9,
+	0x57, 0x25, 0x20, 0xE9,
 
-0x2B, 0x48, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x48, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x26, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x26, 0x77,
 
-0x24, 0x49, 0x20, 0xE9,
-0xA6, 0xFF, 0x20, 0xEA,
+	0x24, 0x49, 0x20, 0xE9,
+	0xA6, 0xFF, 0x20, 0xEA,
 
-0x16, 0x26, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x26, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x1C, 0x46, 0xA0, 0xE8,
-0x23, 0x4E, 0xA0, 0xE8,
+	0x1C, 0x46, 0xA0, 0xE8,
+	0x23, 0x4E, 0xA0, 0xE8,
 
-0x2B, 0x56, 0xA0, 0xE8,
-0x1D, 0x47, 0xA0, 0xE8,
+	0x2B, 0x56, 0xA0, 0xE8,
+	0x1D, 0x47, 0xA0, 0xE8,
 
-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
+	0x24, 0x4F, 0xA0, 0xE8,
+	0x2C, 0x57, 0xA0, 0xE8,
 
-0x1C, 0x00,
-0x23, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x1C, 0x00,
+	0x23, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x1D, 0x00,
-0x24, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x1D, 0x00,
+	0x24, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x1C, 0x65,
-0x23, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x1C, 0x65,
+	0x23, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x1D, 0x65,
-0x24, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x1D, 0x65,
+	0x24, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x1C, 0x23, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x1C, 0x23, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x1D, 0x24, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x1C, 0x2B, 0xDE, 0xE8,
-0x23, 0x80, 0xDE, 0xE8,
+	0x1C, 0x2B, 0xDE, 0xE8,
+	0x23, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x1C, 0xBD,
-0x3B, 0xD7, 0x23, 0xBD,
+	0x33, 0xD7, 0x1C, 0xBD,
+	0x3B, 0xD7, 0x23, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xCD, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xCD, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x94, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x94, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgzf[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
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-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xD3, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xD3, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x98, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x98, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgzs[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x65, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x65, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x46, 0x31, 0x46, 0xBF,
-0x4E, 0x31, 0x4E, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x4E, 0x31, 0x4E, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x56, 0x31, 0x56, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x4F, 0x39, 0x4F, 0xBF,
-0x57, 0x39, 0x57, 0xBF,
+	0x4F, 0x39, 0x4F, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
 
-0x57, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x57, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x42, 0x73, 0xF8, 0xEC,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x42, 0x73, 0xF8, 0xEC,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0xA5, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0xA5, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x4B, 0x4B, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x4B, 0x4B, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x26, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x26, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x53, 0x53, 0x2D, 0xDF,
-0x00, 0x80, 0x00, 0xE8,
+	0x53, 0x53, 0x2D, 0xDF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB8, 0x38, 0x33, 0xBF,
-0x00, 0xE0,
-0x59, 0xE3,
+	0xB8, 0x38, 0x33, 0xBF,
+	0x00, 0xE0,
+	0x59, 0xE3,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x3F, 0x4B, 0xA0, 0xE8,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x3F, 0x4B, 0xA0, 0xE8,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x05, 0x80, 0x3D, 0xEA,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x53, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x53, 0xA0, 0xE8,
 
-0x48, 0x70, 0xF8, 0xEC,
-0x2B, 0x48, 0x3C, 0xE9,
+	0x48, 0x70, 0xF8, 0xEC,
+	0x2B, 0x48, 0x3C, 0xE9,
 
-0x1F, 0x27, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x27, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x18, 0x3A, 0x41, 0xE9,
-0x1D, 0x32, 0x41, 0xE9,
+	0x18, 0x3A, 0x41, 0xE9,
+	0x1D, 0x32, 0x41, 0xE9,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x56, 0x3D, 0x56, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x56, 0x3D, 0x56, 0xDF,
 
-0x46, 0x37, 0x46, 0xDF,
-0x4E, 0x3F, 0x4E, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x4E, 0x3F, 0x4E, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x4F, 0x3F, 0x4F, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x4F, 0x3F, 0x4F, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3D, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3D, 0x57, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x27, 0xCF, 0x74, 0xC2,
-0x37, 0xCF, 0x74, 0xC4,
+	0x27, 0xCF, 0x74, 0xC2,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x4C, 0xB0,
-0x02, 0x44, 0x54, 0xB0,
+	0x0A, 0x44, 0x4C, 0xB0,
+	0x02, 0x44, 0x54, 0xB0,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x34, 0x37, 0x20, 0xE9,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x38, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x38, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB2,
-0x1A, 0x44, 0x54, 0xB2,
+	0x2A, 0x44, 0x4C, 0xB2,
+	0x1A, 0x44, 0x54, 0xB2,
 
-0x29, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x29, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x27, 0xCF, 0x75, 0xC0,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x27, 0xCF, 0x75, 0xC0,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x3D, 0xCF, 0x75, 0xC2,
-0x37, 0xCF, 0x75, 0xC4,
+	0x3D, 0xCF, 0x75, 0xC2,
+	0x37, 0xCF, 0x75, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA6, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA6, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA3, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA3, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB4,
-0x1A, 0x44, 0x54, 0xB4,
+	0x2A, 0x44, 0x4C, 0xB4,
+	0x1A, 0x44, 0x54, 0xB4,
 
-0x0A, 0x45, 0x4D, 0xB0,
-0x02, 0x45, 0x55, 0xB0,
+	0x0A, 0x45, 0x4D, 0xB0,
+	0x02, 0x45, 0x55, 0xB0,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA0, 0x37, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA0, 0x37, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x2A, 0x45, 0x4D, 0xB2,
-0x1A, 0x45, 0x55, 0xB2,
+	0x2A, 0x45, 0x4D, 0xB2,
+	0x1A, 0x45, 0x55, 0xB2,
 
-0x0A, 0x45, 0x4D, 0xB4,
-0x02, 0x45, 0x55, 0xB4,
+	0x0A, 0x45, 0x4D, 0xB4,
+	0x02, 0x45, 0x55, 0xB4,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x0A, 0x20,
-0x02, 0x20,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x0A, 0x20,
+	0x02, 0x20,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x2A, 0x46, 0x4E, 0xBF,
-0x1A, 0x46, 0x56, 0xBF,
+	0x2A, 0x46, 0x4E, 0xBF,
+	0x1A, 0x46, 0x56, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x36, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x36, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x37, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x37, 0x39, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0xA7, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0xA7, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0xA8, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0xA8, 0x38, 0x4F, 0xE9,
 
-0x0A, 0x47, 0x4F, 0xBF,
-0x02, 0x47, 0x57, 0xBF,
+	0x0A, 0x47, 0x4F, 0xBF,
+	0x02, 0x47, 0x57, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA4, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA4, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA5, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA5, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x4B, 0xBF,
-0x1A, 0x43, 0x53, 0xBF,
+	0x2A, 0x43, 0x4B, 0xBF,
+	0x1A, 0x43, 0x53, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0xA1, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0xA1, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0xA2, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0xA2, 0x38, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x37, 0x48, 0x50, 0xBD,
-0x8A, 0x36, 0x20, 0xE9,
+	0x37, 0x48, 0x50, 0xBD,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8B, 0x3E, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8B, 0x3E, 0x20, 0xE9,
 
-0x82, 0x30, 0x57, 0xE9,
-0x87, 0x77, 0x57, 0xE9,
+	0x82, 0x30, 0x57, 0xE9,
+	0x87, 0x77, 0x57, 0xE9,
 
-0x83, 0x38, 0x57, 0xE9,
-0x35, 0x49, 0x51, 0xBD,
+	0x83, 0x38, 0x57, 0xE9,
+	0x35, 0x49, 0x51, 0xBD,
 
-0x84, 0x31, 0x5E, 0xE9,
-0x30, 0x1F, 0x5F, 0xE9,
+	0x84, 0x31, 0x5E, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
 
-0x85, 0x39, 0x5E, 0xE9,
-0x57, 0x25, 0x20, 0xE9,
+	0x85, 0x39, 0x5E, 0xE9,
+	0x57, 0x25, 0x20, 0xE9,
 
-0x2B, 0x48, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x48, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x26, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x26, 0x77,
 
-0x24, 0x49, 0x20, 0xE9,
-0xA2, 0xFF, 0x20, 0xEA,
+	0x24, 0x49, 0x20, 0xE9,
+	0xA2, 0xFF, 0x20, 0xEA,
 
-0x16, 0x26, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x26, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x1C, 0x46, 0xA0, 0xE8,
-0x23, 0x4E, 0xA0, 0xE8,
+	0x1C, 0x46, 0xA0, 0xE8,
+	0x23, 0x4E, 0xA0, 0xE8,
 
-0x2B, 0x56, 0xA0, 0xE8,
-0x1D, 0x47, 0xA0, 0xE8,
+	0x2B, 0x56, 0xA0, 0xE8,
+	0x1D, 0x47, 0xA0, 0xE8,
 
-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
+	0x24, 0x4F, 0xA0, 0xE8,
+	0x2C, 0x57, 0xA0, 0xE8,
 
-0x1C, 0x00,
-0x23, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x1C, 0x00,
+	0x23, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x1D, 0x00,
-0x24, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x1D, 0x00,
+	0x24, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x1C, 0x65,
-0x23, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x1C, 0x65,
+	0x23, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x1D, 0x65,
-0x24, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x1D, 0x65,
+	0x24, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x1C, 0x23, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x1C, 0x23, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x1D, 0x24, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x1C, 0x2B, 0xDE, 0xE8,
-0x23, 0x80, 0xDE, 0xE8,
+	0x1C, 0x2B, 0xDE, 0xE8,
+	0x23, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x1C, 0xBD,
-0x3B, 0xD7, 0x23, 0xBD,
+	0x33, 0xD7, 0x1C, 0xBD,
+	0x3B, 0xD7, 0x23, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xCA, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xCA, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x90, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x90, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgzsa[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x6A, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x6A, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x46, 0x31, 0x46, 0xBF,
-0x4E, 0x31, 0x4E, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x4E, 0x31, 0x4E, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x56, 0x31, 0x56, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x4F, 0x39, 0x4F, 0xBF,
-0x57, 0x39, 0x57, 0xBF,
+	0x4F, 0x39, 0x4F, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
 
-0x5C, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x5C, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x42, 0x73, 0xF8, 0xEC,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x42, 0x73, 0xF8, 0xEC,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0xA5, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0xA5, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x4B, 0x4B, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x4B, 0x4B, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x26, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x26, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x53, 0x53, 0x2D, 0xDF,
-0x00, 0x80, 0x00, 0xE8,
+	0x53, 0x53, 0x2D, 0xDF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB8, 0x38, 0x33, 0xBF,
-0x00, 0xE0,
-0x59, 0xE3,
+	0xB8, 0x38, 0x33, 0xBF,
+	0x00, 0xE0,
+	0x59, 0xE3,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x3F, 0x4B, 0xA0, 0xE8,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x3F, 0x4B, 0xA0, 0xE8,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x05, 0x80, 0x3D, 0xEA,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x53, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x53, 0xA0, 0xE8,
 
-0x48, 0x70, 0xF8, 0xEC,
-0x2B, 0x48, 0x3C, 0xE9,
+	0x48, 0x70, 0xF8, 0xEC,
+	0x2B, 0x48, 0x3C, 0xE9,
 
-0x1F, 0x27, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x27, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x18, 0x3A, 0x41, 0xE9,
-0x1D, 0x32, 0x41, 0xE9,
+	0x18, 0x3A, 0x41, 0xE9,
+	0x1D, 0x32, 0x41, 0xE9,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x56, 0x3D, 0x56, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x56, 0x3D, 0x56, 0xDF,
 
-0x46, 0x37, 0x46, 0xDF,
-0x4E, 0x3F, 0x4E, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x4E, 0x3F, 0x4E, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x4F, 0x3F, 0x4F, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x4F, 0x3F, 0x4F, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3D, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3D, 0x57, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x27, 0xCF, 0x74, 0xC2,
-0x37, 0xCF, 0x74, 0xC4,
+	0x27, 0xCF, 0x74, 0xC2,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x4C, 0xB0,
-0x02, 0x44, 0x54, 0xB0,
+	0x0A, 0x44, 0x4C, 0xB0,
+	0x02, 0x44, 0x54, 0xB0,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x34, 0x37, 0x20, 0xE9,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x38, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x38, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB2,
-0x1A, 0x44, 0x54, 0xB2,
+	0x2A, 0x44, 0x4C, 0xB2,
+	0x1A, 0x44, 0x54, 0xB2,
 
-0x2E, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x2E, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x27, 0xCF, 0x75, 0xC0,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x27, 0xCF, 0x75, 0xC0,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x3D, 0xCF, 0x75, 0xC2,
-0x37, 0xCF, 0x75, 0xC4,
+	0x3D, 0xCF, 0x75, 0xC2,
+	0x37, 0xCF, 0x75, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA6, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA6, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA3, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA3, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB4,
-0x1A, 0x44, 0x54, 0xB4,
+	0x2A, 0x44, 0x4C, 0xB4,
+	0x1A, 0x44, 0x54, 0xB4,
 
-0x0A, 0x45, 0x4D, 0xB0,
-0x02, 0x45, 0x55, 0xB0,
+	0x0A, 0x45, 0x4D, 0xB0,
+	0x02, 0x45, 0x55, 0xB0,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA0, 0x37, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA0, 0x37, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x45, 0x4D, 0xB2,
-0x1A, 0x45, 0x55, 0xB2,
+	0x2A, 0x45, 0x4D, 0xB2,
+	0x1A, 0x45, 0x55, 0xB2,
 
-0x0A, 0x45, 0x4D, 0xB4,
-0x02, 0x45, 0x55, 0xB4,
+	0x0A, 0x45, 0x4D, 0xB4,
+	0x02, 0x45, 0x55, 0xB4,
 
-0x27, 0xCF, 0x74, 0xC6,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x27, 0xCF, 0x74, 0xC6,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA7, 0x30, 0x4F, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA7, 0x30, 0x4F, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9C, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9C, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA8, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA8, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB6,
-0x1A, 0x44, 0x54, 0xB6,
+	0x2A, 0x44, 0x4C, 0xB6,
+	0x1A, 0x44, 0x54, 0xB6,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x36, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x36, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x37, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x37, 0x39, 0x4F, 0xE9,
 
-0x00, 0x80, 0x00, 0xE8,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x00, 0x80, 0x00, 0xE8,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x2A, 0x46, 0x4E, 0xBF,
-0x1A, 0x46, 0x56, 0xBF,
+	0x2A, 0x46, 0x4E, 0xBF,
+	0x1A, 0x46, 0x56, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA4, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA4, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA5, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA5, 0x39, 0x4F, 0xE9,
 
-0x0A, 0x47, 0x4F, 0xBF,
-0x02, 0x47, 0x57, 0xBF,
+	0x0A, 0x47, 0x4F, 0xBF,
+	0x02, 0x47, 0x57, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA1, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA1, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA2, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA2, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x4B, 0xBF,
-0x1A, 0x43, 0x53, 0xBF,
+	0x2A, 0x43, 0x4B, 0xBF,
+	0x1A, 0x43, 0x53, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x9D, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x9D, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x9E, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x9E, 0x39, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x37, 0x48, 0x50, 0xBD,
-0x8A, 0x36, 0x20, 0xE9,
+	0x37, 0x48, 0x50, 0xBD,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8B, 0x3E, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8B, 0x3E, 0x20, 0xE9,
 
-0x82, 0x30, 0x57, 0xE9,
-0x87, 0x77, 0x57, 0xE9,
+	0x82, 0x30, 0x57, 0xE9,
+	0x87, 0x77, 0x57, 0xE9,
 
-0x83, 0x38, 0x57, 0xE9,
-0x35, 0x49, 0x51, 0xBD,
+	0x83, 0x38, 0x57, 0xE9,
+	0x35, 0x49, 0x51, 0xBD,
 
-0x84, 0x31, 0x5E, 0xE9,
-0x30, 0x1F, 0x5F, 0xE9,
+	0x84, 0x31, 0x5E, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
 
-0x85, 0x39, 0x5E, 0xE9,
-0x57, 0x25, 0x20, 0xE9,
+	0x85, 0x39, 0x5E, 0xE9,
+	0x57, 0x25, 0x20, 0xE9,
 
-0x2B, 0x48, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x48, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x26, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x26, 0x77,
 
-0x24, 0x49, 0x20, 0xE9,
-0x9D, 0xFF, 0x20, 0xEA,
+	0x24, 0x49, 0x20, 0xE9,
+	0x9D, 0xFF, 0x20, 0xEA,
 
-0x16, 0x26, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x26, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x1C, 0x46, 0xA0, 0xE8,
-0x23, 0x4E, 0xA0, 0xE8,
+	0x1C, 0x46, 0xA0, 0xE8,
+	0x23, 0x4E, 0xA0, 0xE8,
 
-0x2B, 0x56, 0xA0, 0xE8,
-0x1D, 0x47, 0xA0, 0xE8,
+	0x2B, 0x56, 0xA0, 0xE8,
+	0x1D, 0x47, 0xA0, 0xE8,
 
-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
+	0x24, 0x4F, 0xA0, 0xE8,
+	0x2C, 0x57, 0xA0, 0xE8,
 
-0x1C, 0x00,
-0x23, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x1C, 0x00,
+	0x23, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x1D, 0x00,
-0x24, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x1D, 0x00,
+	0x24, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x1C, 0x65,
-0x23, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x1C, 0x65,
+	0x23, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x1D, 0x65,
-0x24, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x1D, 0x65,
+	0x24, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x1C, 0x23, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x1C, 0x23, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x1D, 0x24, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x1C, 0x2B, 0xDE, 0xE8,
-0x23, 0x80, 0xDE, 0xE8,
+	0x1C, 0x2B, 0xDE, 0xE8,
+	0x23, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x1C, 0xBD,
-0x3B, 0xD7, 0x23, 0xBD,
+	0x33, 0xD7, 0x1C, 0xBD,
+	0x3B, 0xD7, 0x23, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xC5, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xC5, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x8B, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x8B, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgzsaf[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x6E, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x6E, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
+	0x22, 0x20,
+	0x12, 0x20,
+	0x3A, 0x20,
 
-0x46, 0x31, 0x46, 0xBF,
-0x4E, 0x31, 0x4E, 0xBF,
+	0x46, 0x31, 0x46, 0xBF,
+	0x4E, 0x31, 0x4E, 0xBF,
 
-0xB3, 0xE2, 0x2D, 0x9F,
-0x00, 0x80, 0x00, 0xE8,
+	0xB3, 0xE2, 0x2D, 0x9F,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x56, 0x31, 0x56, 0xBF,
-0x47, 0x39, 0x47, 0xBF,
+	0x56, 0x31, 0x56, 0xBF,
+	0x47, 0x39, 0x47, 0xBF,
 
-0x4F, 0x39, 0x4F, 0xBF,
-0x57, 0x39, 0x57, 0xBF,
+	0x4F, 0x39, 0x4F, 0xBF,
+	0x57, 0x39, 0x57, 0xBF,
 
-0x60, 0x80, 0x07, 0xEA,
-0x24, 0x41, 0x20, 0xE9,
+	0x60, 0x80, 0x07, 0xEA,
+	0x24, 0x41, 0x20, 0xE9,
 
-0x42, 0x73, 0xF8, 0xEC,
-0x00, 0xE0,
-0x2D, 0x73,
+	0x42, 0x73, 0xF8, 0xEC,
+	0x00, 0xE0,
+	0x2D, 0x73,
 
-0x33, 0x72,
-0x0C, 0xE3,
-0xA5, 0x2F, 0x1E, 0xBD,
+	0x33, 0x72,
+	0x0C, 0xE3,
+	0xA5, 0x2F, 0x1E, 0xBD,
 
-0x43, 0x43, 0x2D, 0xDF,
-0x4B, 0x4B, 0x2D, 0xDF,
+	0x43, 0x43, 0x2D, 0xDF,
+	0x4B, 0x4B, 0x2D, 0xDF,
 
-0xAE, 0x1E, 0x26, 0xBD,
-0x58, 0xE3,
-0x33, 0x66,
+	0xAE, 0x1E, 0x26, 0xBD,
+	0x58, 0xE3,
+	0x33, 0x66,
 
-0x53, 0x53, 0x2D, 0xDF,
-0x00, 0x80, 0x00, 0xE8,
+	0x53, 0x53, 0x2D, 0xDF,
+	0x00, 0x80, 0x00, 0xE8,
 
-0xB8, 0x38, 0x33, 0xBF,
-0x00, 0xE0,
-0x59, 0xE3,
+	0xB8, 0x38, 0x33, 0xBF,
+	0x00, 0xE0,
+	0x59, 0xE3,
 
-0x1E, 0x12, 0x41, 0xE9,
-0x1A, 0x22, 0x41, 0xE9,
+	0x1E, 0x12, 0x41, 0xE9,
+	0x1A, 0x22, 0x41, 0xE9,
 
-0x2B, 0x40, 0x3D, 0xE9,
-0x3F, 0x4B, 0xA0, 0xE8,
+	0x2B, 0x40, 0x3D, 0xE9,
+	0x3F, 0x4B, 0xA0, 0xE8,
 
-0x2D, 0x73,
-0x30, 0x76,
-0x05, 0x80, 0x3D, 0xEA,
+	0x2D, 0x73,
+	0x30, 0x76,
+	0x05, 0x80, 0x3D, 0xEA,
 
-0x37, 0x43, 0xA0, 0xE8,
-0x3D, 0x53, 0xA0, 0xE8,
+	0x37, 0x43, 0xA0, 0xE8,
+	0x3D, 0x53, 0xA0, 0xE8,
 
-0x48, 0x70, 0xF8, 0xEC,
-0x2B, 0x48, 0x3C, 0xE9,
+	0x48, 0x70, 0xF8, 0xEC,
+	0x2B, 0x48, 0x3C, 0xE9,
 
-0x1F, 0x27, 0xBC, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x1F, 0x27, 0xBC, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0x00, 0xE8,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x15, 0xC0, 0x20, 0xE9,
-0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
+	0x15, 0xC0, 0x20, 0xE9,
 
-0x18, 0x3A, 0x41, 0xE9,
-0x1D, 0x32, 0x41, 0xE9,
+	0x18, 0x3A, 0x41, 0xE9,
+	0x1D, 0x32, 0x41, 0xE9,
 
-0x2A, 0x40, 0x20, 0xE9,
-0x56, 0x3D, 0x56, 0xDF,
+	0x2A, 0x40, 0x20, 0xE9,
+	0x56, 0x3D, 0x56, 0xDF,
 
-0x46, 0x37, 0x46, 0xDF,
-0x4E, 0x3F, 0x4E, 0xDF,
+	0x46, 0x37, 0x46, 0xDF,
+	0x4E, 0x3F, 0x4E, 0xDF,
 
-0x16, 0x30, 0x20, 0xE9,
-0x4F, 0x3F, 0x4F, 0xDF,
+	0x16, 0x30, 0x20, 0xE9,
+	0x4F, 0x3F, 0x4F, 0xDF,
 
-0x47, 0x37, 0x47, 0xDF,
-0x57, 0x3D, 0x57, 0xDF,
+	0x47, 0x37, 0x47, 0xDF,
+	0x57, 0x3D, 0x57, 0xDF,
 
-0x32, 0x32, 0x2D, 0xDF,
-0x22, 0x22, 0x2D, 0xDF,
+	0x32, 0x32, 0x2D, 0xDF,
+	0x22, 0x22, 0x2D, 0xDF,
 
-0x12, 0x12, 0x2D, 0xDF,
-0x3A, 0x3A, 0x2D, 0xDF,
+	0x12, 0x12, 0x2D, 0xDF,
+	0x3A, 0x3A, 0x2D, 0xDF,
 
-0x27, 0xCF, 0x74, 0xC2,
-0x37, 0xCF, 0x74, 0xC4,
+	0x27, 0xCF, 0x74, 0xC2,
+	0x37, 0xCF, 0x74, 0xC4,
 
-0x0A, 0x44, 0x4C, 0xB0,
-0x02, 0x44, 0x54, 0xB0,
+	0x0A, 0x44, 0x4C, 0xB0,
+	0x02, 0x44, 0x54, 0xB0,
 
-0x3D, 0xCF, 0x74, 0xC0,
-0x34, 0x37, 0x20, 0xE9,
+	0x3D, 0xCF, 0x74, 0xC0,
+	0x34, 0x37, 0x20, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x38, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x38, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3C, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3C, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB2,
-0x1A, 0x44, 0x54, 0xB2,
+	0x2A, 0x44, 0x4C, 0xB2,
+	0x1A, 0x44, 0x54, 0xB2,
 
-0x32, 0x80, 0x3A, 0xEA,
-0x0A, 0x20,
-0x02, 0x20,
+	0x32, 0x80, 0x3A, 0xEA,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x27, 0xCF, 0x75, 0xC0,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x27, 0xCF, 0x75, 0xC0,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x32, 0x31, 0x5F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x32, 0x31, 0x5F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x33, 0x39, 0x5F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x33, 0x39, 0x5F, 0xE9,
 
-0x3D, 0xCF, 0x75, 0xC2,
-0x37, 0xCF, 0x75, 0xC4,
+	0x3D, 0xCF, 0x75, 0xC2,
+	0x37, 0xCF, 0x75, 0xC4,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA6, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA6, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA3, 0x3D, 0x20, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA3, 0x3D, 0x20, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB4,
-0x1A, 0x44, 0x54, 0xB4,
+	0x2A, 0x44, 0x4C, 0xB4,
+	0x1A, 0x44, 0x54, 0xB4,
 
-0x0A, 0x45, 0x4D, 0xB0,
-0x02, 0x45, 0x55, 0xB0,
+	0x0A, 0x45, 0x4D, 0xB0,
+	0x02, 0x45, 0x55, 0xB0,
 
-0x88, 0x73, 0x5E, 0xE9,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x88, 0x73, 0x5E, 0xE9,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA0, 0x37, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA0, 0x37, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x3E, 0x30, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x3E, 0x30, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x3F, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x3F, 0x38, 0x4F, 0xE9,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x3A, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x3A, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x3B, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x3B, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x45, 0x4D, 0xB2,
-0x1A, 0x45, 0x55, 0xB2,
+	0x2A, 0x45, 0x4D, 0xB2,
+	0x1A, 0x45, 0x55, 0xB2,
 
-0x0A, 0x45, 0x4D, 0xB4,
-0x02, 0x45, 0x55, 0xB4,
+	0x0A, 0x45, 0x4D, 0xB4,
+	0x02, 0x45, 0x55, 0xB4,
 
-0x27, 0xCF, 0x74, 0xC6,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x27, 0xCF, 0x74, 0xC6,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0xA7, 0x30, 0x4F, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0xA7, 0x30, 0x4F, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9C, 0x27, 0x20, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9C, 0x27, 0x20, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA8, 0x38, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA8, 0x38, 0x4F, 0xE9,
 
-0x2A, 0x44, 0x4C, 0xB6,
-0x1A, 0x44, 0x54, 0xB6,
+	0x2A, 0x44, 0x4C, 0xB6,
+	0x1A, 0x44, 0x54, 0xB6,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x36, 0x31, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x36, 0x31, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x37, 0x39, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x37, 0x39, 0x4F, 0xE9,
 
-0x0A, 0x45, 0x4D, 0xB6,
-0x02, 0x45, 0x55, 0xB6,
+	0x0A, 0x45, 0x4D, 0xB6,
+	0x02, 0x45, 0x55, 0xB6,
 
-0x3D, 0xCF, 0x75, 0xC6,
-0x2A, 0x20,
-0x1A, 0x20,
+	0x3D, 0xCF, 0x75, 0xC6,
+	0x2A, 0x20,
+	0x1A, 0x20,
 
-0x2A, 0x46, 0x4E, 0xBF,
-0x1A, 0x46, 0x56, 0xBF,
+	0x2A, 0x46, 0x4E, 0xBF,
+	0x1A, 0x46, 0x56, 0xBF,
 
-0x31, 0x53, 0x2F, 0x9F,
-0xA4, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0xA4, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0xA5, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0xA5, 0x39, 0x4F, 0xE9,
 
-0x31, 0x3D, 0x20, 0xE9,
-0x0A, 0x20,
-0x02, 0x20,
+	0x31, 0x3D, 0x20, 0xE9,
+	0x0A, 0x20,
+	0x02, 0x20,
 
-0x0A, 0x47, 0x4F, 0xBF,
-0x02, 0x47, 0x57, 0xBF,
+	0x0A, 0x47, 0x4F, 0xBF,
+	0x02, 0x47, 0x57, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0xA1, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0xA1, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0xA2, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0xA2, 0x38, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x9D, 0x31, 0x4F, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x9D, 0x31, 0x4F, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x9E, 0x39, 0x4F, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x9E, 0x39, 0x4F, 0xE9,
 
-0x2A, 0x43, 0x4B, 0xBF,
-0x1A, 0x43, 0x53, 0xBF,
+	0x2A, 0x43, 0x4B, 0xBF,
+	0x1A, 0x43, 0x53, 0xBF,
 
-0x30, 0x50, 0x2E, 0x9F,
-0x35, 0x30, 0x4F, 0xE9,
+	0x30, 0x50, 0x2E, 0x9F,
+	0x35, 0x30, 0x4F, 0xE9,
 
-0x38, 0x21, 0x2C, 0x9F,
-0x39, 0x38, 0x4F, 0xE9,
+	0x38, 0x21, 0x2C, 0x9F,
+	0x39, 0x38, 0x4F, 0xE9,
 
-0x31, 0x53, 0x2F, 0x9F,
-0x80, 0x31, 0x57, 0xE9,
+	0x31, 0x53, 0x2F, 0x9F,
+	0x80, 0x31, 0x57, 0xE9,
 
-0x39, 0xE5, 0x2C, 0x9F,
-0x81, 0x39, 0x57, 0xE9,
+	0x39, 0xE5, 0x2C, 0x9F,
+	0x81, 0x39, 0x57, 0xE9,
 
-0x37, 0x48, 0x50, 0xBD,
-0x8A, 0x36, 0x20, 0xE9,
+	0x37, 0x48, 0x50, 0xBD,
+	0x8A, 0x36, 0x20, 0xE9,
 
-0x86, 0x76, 0x57, 0xE9,
-0x8B, 0x3E, 0x20, 0xE9,
+	0x86, 0x76, 0x57, 0xE9,
+	0x8B, 0x3E, 0x20, 0xE9,
 
-0x82, 0x30, 0x57, 0xE9,
-0x87, 0x77, 0x57, 0xE9,
+	0x82, 0x30, 0x57, 0xE9,
+	0x87, 0x77, 0x57, 0xE9,
 
-0x83, 0x38, 0x57, 0xE9,
-0x35, 0x49, 0x51, 0xBD,
+	0x83, 0x38, 0x57, 0xE9,
+	0x35, 0x49, 0x51, 0xBD,
 
-0x84, 0x31, 0x5E, 0xE9,
-0x30, 0x1F, 0x5F, 0xE9,
+	0x84, 0x31, 0x5E, 0xE9,
+	0x30, 0x1F, 0x5F, 0xE9,
 
-0x85, 0x39, 0x5E, 0xE9,
-0x57, 0x25, 0x20, 0xE9,
+	0x85, 0x39, 0x5E, 0xE9,
+	0x57, 0x25, 0x20, 0xE9,
 
-0x2B, 0x48, 0x20, 0xE9,
-0x1D, 0x37, 0xE1, 0xEA,
+	0x2B, 0x48, 0x20, 0xE9,
+	0x1D, 0x37, 0xE1, 0xEA,
 
-0x1E, 0x35, 0xE1, 0xEA,
-0x00, 0xE0,
-0x26, 0x77,
+	0x1E, 0x35, 0xE1, 0xEA,
+	0x00, 0xE0,
+	0x26, 0x77,
 
-0x24, 0x49, 0x20, 0xE9,
-0x99, 0xFF, 0x20, 0xEA,
+	0x24, 0x49, 0x20, 0xE9,
+	0x99, 0xFF, 0x20, 0xEA,
 
-0x16, 0x26, 0x20, 0xE9,
-0x57, 0x2E, 0xBF, 0xEA,
+	0x16, 0x26, 0x20, 0xE9,
+	0x57, 0x2E, 0xBF, 0xEA,
 
-0x1C, 0x46, 0xA0, 0xE8,
-0x23, 0x4E, 0xA0, 0xE8,
+	0x1C, 0x46, 0xA0, 0xE8,
+	0x23, 0x4E, 0xA0, 0xE8,
 
-0x2B, 0x56, 0xA0, 0xE8,
-0x1D, 0x47, 0xA0, 0xE8,
+	0x2B, 0x56, 0xA0, 0xE8,
+	0x1D, 0x47, 0xA0, 0xE8,
 
-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
+	0x24, 0x4F, 0xA0, 0xE8,
+	0x2C, 0x57, 0xA0, 0xE8,
 
-0x1C, 0x00,
-0x23, 0x00,
-0x2B, 0x00,
-0x00, 0xE0,
+	0x1C, 0x00,
+	0x23, 0x00,
+	0x2B, 0x00,
+	0x00, 0xE0,
 
-0x1D, 0x00,
-0x24, 0x00,
-0x2C, 0x00,
-0x00, 0xE0,
+	0x1D, 0x00,
+	0x24, 0x00,
+	0x2C, 0x00,
+	0x00, 0xE0,
 
-0x1C, 0x65,
-0x23, 0x65,
-0x2B, 0x65,
-0x00, 0xE0,
+	0x1C, 0x65,
+	0x23, 0x65,
+	0x2B, 0x65,
+	0x00, 0xE0,
 
-0x1D, 0x65,
-0x24, 0x65,
-0x2C, 0x65,
-0x00, 0xE0,
+	0x1D, 0x65,
+	0x24, 0x65,
+	0x2C, 0x65,
+	0x00, 0xE0,
 
-0x1C, 0x23, 0x60, 0xEC,
-0x36, 0xD7, 0x36, 0xAD,
+	0x1C, 0x23, 0x60, 0xEC,
+	0x36, 0xD7, 0x36, 0xAD,
 
-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
+	0x2B, 0x80, 0x60, 0xEC,
+	0x1D, 0x24, 0x60, 0xEC,
 
-0x3E, 0xD7, 0x3E, 0xAD,
-0x2C, 0x80, 0x60, 0xEC,
+	0x3E, 0xD7, 0x3E, 0xAD,
+	0x2C, 0x80, 0x60, 0xEC,
 
-0x1C, 0x2B, 0xDE, 0xE8,
-0x23, 0x80, 0xDE, 0xE8,
+	0x1C, 0x2B, 0xDE, 0xE8,
+	0x23, 0x80, 0xDE, 0xE8,
 
-0x36, 0x80, 0x36, 0xBD,
-0x3E, 0x80, 0x3E, 0xBD,
+	0x36, 0x80, 0x36, 0xBD,
+	0x3E, 0x80, 0x3E, 0xBD,
 
-0x33, 0xD7, 0x1C, 0xBD,
-0x3B, 0xD7, 0x23, 0xBD,
+	0x33, 0xD7, 0x1C, 0xBD,
+	0x3B, 0xD7, 0x23, 0xBD,
 
-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
+	0x46, 0x80, 0x46, 0xCF,
+	0x4F, 0x80, 0x4F, 0xCF,
 
-0x56, 0x33, 0x56, 0xCF,
-0x47, 0x3B, 0x47, 0xCF,
+	0x56, 0x33, 0x56, 0xCF,
+	0x47, 0x3B, 0x47, 0xCF,
 
-0xC1, 0xFF, 0x20, 0xEA,
-0x00, 0x80, 0x00, 0xE8,
+	0xC1, 0xFF, 0x20, 0xEA,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x4E, 0x33, 0x4E, 0xCF,
-0x57, 0x3B, 0x57, 0xCF,
+	0x4E, 0x33, 0x4E, 0xCF,
+	0x57, 0x3B, 0x57, 0xCF,
 
-0x87, 0xFF, 0x20, 0xEA,
-0x57, 0xC0, 0xBF, 0xEA,
+	0x87, 0xFF, 0x20, 0xEA,
+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
 
 static unsigned char warp_g400_tgzsf[] = {
 
-0x00, 0x88, 0x98, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0x00, 0x88, 0x98, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
-0xFF, 0x80, 0xC0, 0xE9,
-0x00, 0x80, 0x00, 0xE8,
+	0xFF, 0x80, 0xC0, 0xE9,
+	0x00, 0x80, 0x00, 0xE8,
 
-0x22, 0x40, 0x48, 0xBF,
-0x2A, 0x40, 0x50, 0xBF,
+	0x22, 0x40, 0x48, 0xBF,
+	0x2A, 0x40, 0x50, 0xBF,
 
-0x32, 0x41, 0x49, 0xBF,
-0x3A, 0x41, 0x51, 0xBF,
+	0x32, 0x41, 0x49, 0xBF,
+	0x3A, 0x41, 0x51, 0xBF,
 
-0xC3, 0x6B,
-0xCB, 0x6B,
-0x00, 0x88, 0x98, 0xE9,
+	0xC3, 0x6B,
+	0xCB, 0x6B,
+	0x00, 0x88, 0x98, 0xE9,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x96, 0xE2,
-0x41, 0x04,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x96, 0xE2,
+	0x41, 0x04,
 
-0x7B, 0x43, 0xA0, 0xE8,
-0x73, 0x4B, 0xA0, 0xE8,
+	0x7B, 0x43, 0xA0, 0xE8,
+	0x73, 0x4B, 0xA0, 0xE8,
 
-0xAD, 0xEE, 0x29, 0x9F,
-0x00, 0xE0,
-0x49, 0x04,
+	0xAD, 0xEE, 0x29, 0x9F,
+	0x00, 0xE0,
+	0x49, 0x04,
 
-0x90, 0xE2,
-0x51, 0x04,
-0x31, 0x46, 0xB1, 0xE8,
+	0x90, 0xE2,
+	0x51, 0x04,
+	0x31, 0x46, 0xB1, 0xE8,
 
-0x49, 0x41, 0xC0, 0xEC,
-0x39, 0x57, 0xB1, 0xE8,
+	0x49, 0x41, 0xC0, 0xEC,
+	0x39, 0x57, 0xB1, 0xE8,
 
-0x00, 0x04,
-0x46, 0xE2,
-0x73, 0x53, 0xA0, 0xE8,
+	0x00, 0x04,
+	0x46, 0xE2,
+	0x73, 0x53, 0xA0, 0xE8,
 
-0x51, 0x41, 0xC0, 0xEC,
-0x31, 0x00,
-0x39, 0x00,
+	0x51, 0x41, 0xC0, 0xEC,
+	0x31, 0x00,
+	0x39, 0x00,
 
-0x6A, 0x80, 0x15, 0xEA,
-0x08, 0x04,
-0x10, 0x04,
+	0x6A, 0x80, 0x15, 0xEA,
+	0x08, 0x04,
+	0x10, 0x04,
 
-0x51, 0x49, 0xC0, 0xEC,
-0x2F, 0x41, 0x60, 0xEA,
+	0x51, 0x49, 0xC0, 0xEC,
+	0x2F, 0x41, 0x60, 0xEA,
 
-0x31, 0x20,
-0x39, 0x20,
-0x1F, 0x42, 0xA0, 0xE8,
+	0x31, 0x20,
+	0x39, 0x20,
+	0x1F, 0x42, 0xA0, 0xE8,
 
-0x2A, 0x42, 0x4A, 0xBF,
-0x27, 0x4A, 0xA0, 0xE8,
+	0x2A, 0x42, 0x4A, 0xBF,
+	0x27, 0x4A, 0xA0, 0xE8,
 
-0x1A, 0x42, 0x52, 0xBF,
-0x1E, 0x49, 0x60, 0xEA,
+	0x1A, 0x42, 0x52, 0xBF,
+	0x1E, 0x49, 0x60, 0xEA,
 
-0x73, 0x7B, 0xC8, 0xEC,
-0x26, 0x51, 0x60, 0xEA,
+	0x73, 0x7B, 0xC8, 0xEC,
+	0x26, 0x51, 0x60, 0xEA,
 
-0x32, 0x40, 0x48, 0xBD,
-0x22, 0x40, 0x50, 0xBD,
+	0x32, 0x40, 0x48, 0xBD,
+	0x22, 0x40, 0x50, 0xBD,
 
-0x12, 0x41, 0x49, 0xBD,
-0x3A, 0x41, 0x51, 0xBD,
+	0x12, 0x41, 0x49, 0xBD,
+	0x3A, 0x41, 0x51, 0xBD,
 
-0xBF, 0x2F, 0x26, 0xBD,
-0x00, 0xE0,
-0x7B, 0x72,
+	0xBF, 0x2F, 0x26, 0xBD,
+	0x00, 0xE0,
+	0x7B, 0x72,
 
-0x32, 0x20,
-0x22, 0x20,
-0x12, 0x20,
-0x3A, 0x20,
+	0x32, 0x20,
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+	0x1D, 0x37, 0xE1, 0xEA,
 
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-0x24, 0x4F, 0xA0, 0xE8,
-0x2C, 0x57, 0xA0, 0xE8,
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-0x00, 0xE0,
+	0x1C, 0x00,
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-0x2C, 0x00,
-0x00, 0xE0,
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-0x1D, 0x65,
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-0x00, 0xE0,
+	0x1D, 0x65,
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-0x2B, 0x80, 0x60, 0xEC,
-0x1D, 0x24, 0x60, 0xEC,
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-0x2C, 0x80, 0x60, 0xEC,
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-0x23, 0x80, 0xDE, 0xE8,
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-0x36, 0x80, 0x36, 0xBD,
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-0x3B, 0xD7, 0x23, 0xBD,
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-0x46, 0x80, 0x46, 0xCF,
-0x4F, 0x80, 0x4F, 0xCF,
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-0x47, 0x3B, 0x47, 0xCF,
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-0x00, 0x80, 0x00, 0xE8,
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+	0x57, 0xC0, 0xBF, 0xEA,
 
-0x00, 0x80, 0xA0, 0xE9,
-0x00, 0x00, 0xD8, 0xEC,
+	0x00, 0x80, 0xA0, 0xE9,
+	0x00, 0x00, 0xD8, 0xEC,
 
 };
diff --git a/sys/dev/drm/mga_warp.c b/sys/dev/drm/mga_warp.c
index db292dd..b2d5de7 100644
--- a/sys/dev/drm/mga_warp.c
+++ b/sys/dev/drm/mga_warp.c
@@ -29,15 +29,13 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/mga.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/mga_drm.h"
 #include "dev/drm/mga_drv.h"
 #include "dev/drm/mga_ucode.h"
 
-
-#define MGA_WARP_CODE_ALIGN		256		/* in bytes */
+#define MGA_WARP_CODE_ALIGN		256	/* in bytes */
 
 #define WARP_UCODE_SIZE( which )					\
 	((sizeof(which) / MGA_WARP_CODE_ALIGN + 1) * MGA_WARP_CODE_ALIGN)
@@ -51,125 +49,122 @@ do {									\
 	vcbase += WARP_UCODE_SIZE( which );				\
 } while (0)
 
-
-static unsigned int mga_warp_g400_microcode_size( drm_mga_private_t *dev_priv )
+static unsigned int mga_warp_g400_microcode_size(drm_mga_private_t * dev_priv)
 {
 	unsigned int size;
 
-	size = ( WARP_UCODE_SIZE( warp_g400_tgz ) +
-		 WARP_UCODE_SIZE( warp_g400_tgza ) +
-		 WARP_UCODE_SIZE( warp_g400_tgzaf ) +
-		 WARP_UCODE_SIZE( warp_g400_tgzf ) +
-		 WARP_UCODE_SIZE( warp_g400_tgzs ) +
-		 WARP_UCODE_SIZE( warp_g400_tgzsa ) +
-		 WARP_UCODE_SIZE( warp_g400_tgzsaf ) +
-		 WARP_UCODE_SIZE( warp_g400_tgzsf ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gz ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gza ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gzaf ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gzf ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gzs ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gzsa ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gzsaf ) +
-		 WARP_UCODE_SIZE( warp_g400_t2gzsf ) );
-
-	size = PAGE_ALIGN( size );
-
-	DRM_DEBUG( "G400 ucode size = %d bytes\n", size );
+	size = (WARP_UCODE_SIZE(warp_g400_tgz) +
+		WARP_UCODE_SIZE(warp_g400_tgza) +
+		WARP_UCODE_SIZE(warp_g400_tgzaf) +
+		WARP_UCODE_SIZE(warp_g400_tgzf) +
+		WARP_UCODE_SIZE(warp_g400_tgzs) +
+		WARP_UCODE_SIZE(warp_g400_tgzsa) +
+		WARP_UCODE_SIZE(warp_g400_tgzsaf) +
+		WARP_UCODE_SIZE(warp_g400_tgzsf) +
+		WARP_UCODE_SIZE(warp_g400_t2gz) +
+		WARP_UCODE_SIZE(warp_g400_t2gza) +
+		WARP_UCODE_SIZE(warp_g400_t2gzaf) +
+		WARP_UCODE_SIZE(warp_g400_t2gzf) +
+		WARP_UCODE_SIZE(warp_g400_t2gzs) +
+		WARP_UCODE_SIZE(warp_g400_t2gzsa) +
+		WARP_UCODE_SIZE(warp_g400_t2gzsaf) +
+		WARP_UCODE_SIZE(warp_g400_t2gzsf));
+
+	size = PAGE_ALIGN(size);
+
+	DRM_DEBUG("G400 ucode size = %d bytes\n", size);
 	return size;
 }
 
-static unsigned int mga_warp_g200_microcode_size( drm_mga_private_t *dev_priv )
+static unsigned int mga_warp_g200_microcode_size(drm_mga_private_t * dev_priv)
 {
 	unsigned int size;
 
-	size = ( WARP_UCODE_SIZE( warp_g200_tgz ) +
-		 WARP_UCODE_SIZE( warp_g200_tgza ) +
-		 WARP_UCODE_SIZE( warp_g200_tgzaf ) +
-		 WARP_UCODE_SIZE( warp_g200_tgzf ) +
-		 WARP_UCODE_SIZE( warp_g200_tgzs ) +
-		 WARP_UCODE_SIZE( warp_g200_tgzsa ) +
-		 WARP_UCODE_SIZE( warp_g200_tgzsaf ) +
-		 WARP_UCODE_SIZE( warp_g200_tgzsf ) );
+	size = (WARP_UCODE_SIZE(warp_g200_tgz) +
+		WARP_UCODE_SIZE(warp_g200_tgza) +
+		WARP_UCODE_SIZE(warp_g200_tgzaf) +
+		WARP_UCODE_SIZE(warp_g200_tgzf) +
+		WARP_UCODE_SIZE(warp_g200_tgzs) +
+		WARP_UCODE_SIZE(warp_g200_tgzsa) +
+		WARP_UCODE_SIZE(warp_g200_tgzsaf) +
+		WARP_UCODE_SIZE(warp_g200_tgzsf));
 
-	size = PAGE_ALIGN( size );
+	size = PAGE_ALIGN(size);
 
-	DRM_DEBUG( "G200 ucode size = %d bytes\n", size );
+	DRM_DEBUG("G200 ucode size = %d bytes\n", size);
 	return size;
 }
 
-static int mga_warp_install_g400_microcode( drm_mga_private_t *dev_priv )
+static int mga_warp_install_g400_microcode(drm_mga_private_t * dev_priv)
 {
 	unsigned char *vcbase = dev_priv->warp->handle;
 	unsigned long pcbase = dev_priv->warp->offset;
 	unsigned int size;
 
-	size = mga_warp_g400_microcode_size( dev_priv );
-	if ( size > dev_priv->warp->size ) {
-		DRM_ERROR( "microcode too large! (%u > %lu)\n",
-			   size, dev_priv->warp->size );
+	size = mga_warp_g400_microcode_size(dev_priv);
+	if (size > dev_priv->warp->size) {
+		DRM_ERROR("microcode too large! (%u > %lu)\n",
+			  size, dev_priv->warp->size);
 		return DRM_ERR(ENOMEM);
 	}
 
-	memset( dev_priv->warp_pipe_phys, 0,
-		sizeof(dev_priv->warp_pipe_phys) );
-
-	WARP_UCODE_INSTALL( warp_g400_tgz,	MGA_WARP_TGZ );
-	WARP_UCODE_INSTALL( warp_g400_tgzf,	MGA_WARP_TGZF );
-	WARP_UCODE_INSTALL( warp_g400_tgza,	MGA_WARP_TGZA );
-	WARP_UCODE_INSTALL( warp_g400_tgzaf,	MGA_WARP_TGZAF );
-	WARP_UCODE_INSTALL( warp_g400_tgzs,	MGA_WARP_TGZS );
-	WARP_UCODE_INSTALL( warp_g400_tgzsf,	MGA_WARP_TGZSF );
-	WARP_UCODE_INSTALL( warp_g400_tgzsa,	MGA_WARP_TGZSA );
-	WARP_UCODE_INSTALL( warp_g400_tgzsaf,	MGA_WARP_TGZSAF );
-
-	WARP_UCODE_INSTALL( warp_g400_t2gz,	MGA_WARP_T2GZ );
-	WARP_UCODE_INSTALL( warp_g400_t2gzf,	MGA_WARP_T2GZF );
-	WARP_UCODE_INSTALL( warp_g400_t2gza,	MGA_WARP_T2GZA );
-	WARP_UCODE_INSTALL( warp_g400_t2gzaf,	MGA_WARP_T2GZAF );
-	WARP_UCODE_INSTALL( warp_g400_t2gzs,	MGA_WARP_T2GZS );
-	WARP_UCODE_INSTALL( warp_g400_t2gzsf,	MGA_WARP_T2GZSF );
-	WARP_UCODE_INSTALL( warp_g400_t2gzsa,	MGA_WARP_T2GZSA );
-	WARP_UCODE_INSTALL( warp_g400_t2gzsaf,	MGA_WARP_T2GZSAF );
+	memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
+
+	WARP_UCODE_INSTALL(warp_g400_tgz, MGA_WARP_TGZ);
+	WARP_UCODE_INSTALL(warp_g400_tgzf, MGA_WARP_TGZF);
+	WARP_UCODE_INSTALL(warp_g400_tgza, MGA_WARP_TGZA);
+	WARP_UCODE_INSTALL(warp_g400_tgzaf, MGA_WARP_TGZAF);
+	WARP_UCODE_INSTALL(warp_g400_tgzs, MGA_WARP_TGZS);
+	WARP_UCODE_INSTALL(warp_g400_tgzsf, MGA_WARP_TGZSF);
+	WARP_UCODE_INSTALL(warp_g400_tgzsa, MGA_WARP_TGZSA);
+	WARP_UCODE_INSTALL(warp_g400_tgzsaf, MGA_WARP_TGZSAF);
+
+	WARP_UCODE_INSTALL(warp_g400_t2gz, MGA_WARP_T2GZ);
+	WARP_UCODE_INSTALL(warp_g400_t2gzf, MGA_WARP_T2GZF);
+	WARP_UCODE_INSTALL(warp_g400_t2gza, MGA_WARP_T2GZA);
+	WARP_UCODE_INSTALL(warp_g400_t2gzaf, MGA_WARP_T2GZAF);
+	WARP_UCODE_INSTALL(warp_g400_t2gzs, MGA_WARP_T2GZS);
+	WARP_UCODE_INSTALL(warp_g400_t2gzsf, MGA_WARP_T2GZSF);
+	WARP_UCODE_INSTALL(warp_g400_t2gzsa, MGA_WARP_T2GZSA);
+	WARP_UCODE_INSTALL(warp_g400_t2gzsaf, MGA_WARP_T2GZSAF);
 
 	return 0;
 }
 
-static int mga_warp_install_g200_microcode( drm_mga_private_t *dev_priv )
+static int mga_warp_install_g200_microcode(drm_mga_private_t * dev_priv)
 {
 	unsigned char *vcbase = dev_priv->warp->handle;
 	unsigned long pcbase = dev_priv->warp->offset;
 	unsigned int size;
 
-	size = mga_warp_g200_microcode_size( dev_priv );
-	if ( size > dev_priv->warp->size ) {
-		DRM_ERROR( "microcode too large! (%u > %lu)\n",
-			   size, dev_priv->warp->size );
+	size = mga_warp_g200_microcode_size(dev_priv);
+	if (size > dev_priv->warp->size) {
+		DRM_ERROR("microcode too large! (%u > %lu)\n",
+			  size, dev_priv->warp->size);
 		return DRM_ERR(ENOMEM);
 	}
 
-	memset( dev_priv->warp_pipe_phys, 0,
-		sizeof(dev_priv->warp_pipe_phys) );
+	memset(dev_priv->warp_pipe_phys, 0, sizeof(dev_priv->warp_pipe_phys));
 
-	WARP_UCODE_INSTALL( warp_g200_tgz,	MGA_WARP_TGZ );
-	WARP_UCODE_INSTALL( warp_g200_tgzf,	MGA_WARP_TGZF );
-	WARP_UCODE_INSTALL( warp_g200_tgza,	MGA_WARP_TGZA );
-	WARP_UCODE_INSTALL( warp_g200_tgzaf,	MGA_WARP_TGZAF );
-	WARP_UCODE_INSTALL( warp_g200_tgzs,	MGA_WARP_TGZS );
-	WARP_UCODE_INSTALL( warp_g200_tgzsf,	MGA_WARP_TGZSF );
-	WARP_UCODE_INSTALL( warp_g200_tgzsa,	MGA_WARP_TGZSA );
-	WARP_UCODE_INSTALL( warp_g200_tgzsaf,	MGA_WARP_TGZSAF );
+	WARP_UCODE_INSTALL(warp_g200_tgz, MGA_WARP_TGZ);
+	WARP_UCODE_INSTALL(warp_g200_tgzf, MGA_WARP_TGZF);
+	WARP_UCODE_INSTALL(warp_g200_tgza, MGA_WARP_TGZA);
+	WARP_UCODE_INSTALL(warp_g200_tgzaf, MGA_WARP_TGZAF);
+	WARP_UCODE_INSTALL(warp_g200_tgzs, MGA_WARP_TGZS);
+	WARP_UCODE_INSTALL(warp_g200_tgzsf, MGA_WARP_TGZSF);
+	WARP_UCODE_INSTALL(warp_g200_tgzsa, MGA_WARP_TGZSA);
+	WARP_UCODE_INSTALL(warp_g200_tgzsaf, MGA_WARP_TGZSAF);
 
 	return 0;
 }
 
-int mga_warp_install_microcode(	drm_mga_private_t *dev_priv )
+int mga_warp_install_microcode(drm_mga_private_t * dev_priv)
 {
-	switch ( dev_priv->chipset ) {
+	switch (dev_priv->chipset) {
 	case MGA_CARD_TYPE_G400:
-		return mga_warp_install_g400_microcode( dev_priv );
+		return mga_warp_install_g400_microcode(dev_priv);
 	case MGA_CARD_TYPE_G200:
-		return mga_warp_install_g200_microcode( dev_priv );
+		return mga_warp_install_g200_microcode(dev_priv);
 	default:
 		return DRM_ERR(EINVAL);
 	}
@@ -177,35 +172,34 @@ int mga_warp_install_microcode(	drm_mga_private_t *dev_priv )
 
 #define WMISC_EXPECTED		(MGA_WUCODECACHE_ENABLE | MGA_WMASTER_ENABLE)
 
-int mga_warp_init( drm_mga_private_t *dev_priv )
+int mga_warp_init(drm_mga_private_t * dev_priv)
 {
 	u32 wmisc;
 
 	/* FIXME: Get rid of these damned magic numbers...
 	 */
-	switch ( dev_priv->chipset ) {
+	switch (dev_priv->chipset) {
 	case MGA_CARD_TYPE_G400:
-		MGA_WRITE( MGA_WIADDR2, MGA_WMODE_SUSPEND );
-		MGA_WRITE( MGA_WGETMSB, 0x00000E00 );
-		MGA_WRITE( MGA_WVRTXSZ, 0x00001807 );
-		MGA_WRITE( MGA_WACCEPTSEQ, 0x18000000 );
+		MGA_WRITE(MGA_WIADDR2, MGA_WMODE_SUSPEND);
+		MGA_WRITE(MGA_WGETMSB, 0x00000E00);
+		MGA_WRITE(MGA_WVRTXSZ, 0x00001807);
+		MGA_WRITE(MGA_WACCEPTSEQ, 0x18000000);
 		break;
 	case MGA_CARD_TYPE_G200:
-		MGA_WRITE( MGA_WIADDR, MGA_WMODE_SUSPEND );
-		MGA_WRITE( MGA_WGETMSB, 0x1606 );
-		MGA_WRITE( MGA_WVRTXSZ, 7 );
+		MGA_WRITE(MGA_WIADDR, MGA_WMODE_SUSPEND);
+		MGA_WRITE(MGA_WGETMSB, 0x1606);
+		MGA_WRITE(MGA_WVRTXSZ, 7);
 		break;
 	default:
 		return DRM_ERR(EINVAL);
 	}
 
-	MGA_WRITE( MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
-			       MGA_WMASTER_ENABLE |
-			       MGA_WCACHEFLUSH_ENABLE) );
-	wmisc = MGA_READ( MGA_WMISC );
-	if ( wmisc != WMISC_EXPECTED ) {
-		DRM_ERROR( "WARP engine config failed! 0x%x != 0x%x\n",
-			   wmisc, WMISC_EXPECTED );
+	MGA_WRITE(MGA_WMISC, (MGA_WUCODECACHE_ENABLE |
+			      MGA_WMASTER_ENABLE | MGA_WCACHEFLUSH_ENABLE));
+	wmisc = MGA_READ(MGA_WMISC);
+	if (wmisc != WMISC_EXPECTED) {
+		DRM_ERROR("WARP engine config failed! 0x%x != 0x%x\n",
+			  wmisc, WMISC_EXPECTED);
 		return DRM_ERR(EINVAL);
 	}
 
diff --git a/sys/dev/drm/r128.h b/sys/dev/drm/r128.h
deleted file mode 100644
index 0b0fc92..0000000
--- a/sys/dev/drm/r128.h
+++ /dev/null
@@ -1,122 +0,0 @@
-/* r128.h -- ATI Rage 128 DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 16:07:10 2001 by gareth@valinux.com */
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Gareth Hughes <gareth@valinux.com>
- *
- * $FreeBSD$
- */
-
-#ifndef __R128_H__
-#define __R128_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) r128_##x
-
-/* General customization:
- */
-#define __HAVE_AGP		1
-#define __MUST_HAVE_AGP		0
-#define __HAVE_MTRR		1
-#define __HAVE_CTX_BITMAP	1
-#define __HAVE_SG		1
-#define __HAVE_PCI_DMA		1
-
-#define DRIVER_AUTHOR		"Gareth Hughes, VA Linux Systems Inc."
-
-#define DRIVER_NAME		"r128"
-#define DRIVER_DESC		"ATI Rage 128"
-#define DRIVER_DATE		"20030725"
-
-#define DRIVER_MAJOR		2
-#define DRIVER_MINOR		5
-#define DRIVER_PATCHLEVEL	0
-
-/* Interface history:
- *
- * ??  - ??
- * 2.4 - Add support for ycbcr textures (no new ioctls)
- * 2.5 - Add FLIP ioctl, disable FULLSCREEN.
- */
-#define DRIVER_IOCTLS							    \
-   [DRM_IOCTL_NR(DRM_IOCTL_DMA)]             = { r128_cce_buffers,  1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_INIT)]       = { r128_cce_init,     1, 1 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_START)]  = { r128_cce_start,    1, 1 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_STOP)]   = { r128_cce_stop,     1, 1 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_RESET)]  = { r128_cce_reset,    1, 1 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_CCE_IDLE)]   = { r128_cce_idle,     1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_RESET)]      = { r128_engine_reset, 1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_FULLSCREEN)] = { r128_fullscreen,   1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_SWAP)]       = { r128_cce_swap,     1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_FLIP)]       = { r128_cce_flip,     1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_CLEAR)]      = { r128_cce_clear,    1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_VERTEX)]     = { r128_cce_vertex,   1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_INDICES)]    = { r128_cce_indices,  1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_BLIT)]       = { r128_cce_blit,     1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_DEPTH)]      = { r128_cce_depth,    1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_STIPPLE)]    = { r128_cce_stipple,  1, 0 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_INDIRECT)]   = { r128_cce_indirect, 1, 1 }, \
-   [DRM_IOCTL_NR(DRM_IOCTL_R128_GETPARAM)]   = { r128_getparam, 1, 0 },
-
-/* Driver customization:
- */
-#define DRIVER_PRERELEASE() do {					\
-	if ( dev->dev_private ) {					\
-		drm_r128_private_t *dev_priv = dev->dev_private;	\
-		if ( dev_priv->page_flipping ) {			\
-			r128_do_cleanup_pageflip( dev );		\
-		}							\
-	}								\
-} while (0)
-
-#define DRIVER_PRETAKEDOWN(dev) do {					\
-	r128_do_cleanup_cce( dev );					\
-} while (0)
-
-/* DMA customization:
- */
-#define __HAVE_DMA		1
-#define __HAVE_IRQ		1
-#define __HAVE_VBL_IRQ		1
-#define __HAVE_SHARED_IRQ       1
-
-#if 0
-/* GH: Remove this for now... */
-#define __HAVE_DMA_QUIESCENT	1
-#define DRIVER_DMA_QUIESCENT() do {					\
-	drm_r128_private_t *dev_priv = dev->dev_private;		\
-	return r128_do_cce_idle( dev_priv );				\
-} while (0)
-#endif
-
-/* Buffer customization:
- */
-#define DRIVER_BUF_PRIV_T	drm_r128_buf_priv_t
-
-#define DRIVER_AGP_BUFFERS_MAP( dev )					\
-	((drm_r128_private_t *)((dev)->dev_private))->buffers
-
-#endif
diff --git a/sys/dev/drm/r128_cce.c b/sys/dev/drm/r128_cce.c
index 75a3c30..2794798 100644
--- a/sys/dev/drm/r128_cce.c
+++ b/sys/dev/drm/r128_cce.c
@@ -30,7 +30,6 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/r128.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/r128_drm.h"
@@ -83,7 +82,7 @@ static u32 r128_cce_microcode[] = {
 	0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0, 0
 };
 
-int R128_READ_PLL(drm_device_t *dev, int addr)
+static int R128_READ_PLL(drm_device_t * dev, int addr)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 
@@ -92,106 +91,105 @@ int R128_READ_PLL(drm_device_t *dev, int addr)
 }
 
 #if R128_FIFO_DEBUG
-static void r128_status( drm_r128_private_t *dev_priv )
+static void r128_status(drm_r128_private_t * dev_priv)
 {
-	printk( "GUI_STAT           = 0x%08x\n",
-		(unsigned int)R128_READ( R128_GUI_STAT ) );
-	printk( "PM4_STAT           = 0x%08x\n",
-		(unsigned int)R128_READ( R128_PM4_STAT ) );
-	printk( "PM4_BUFFER_DL_WPTR = 0x%08x\n",
-		(unsigned int)R128_READ( R128_PM4_BUFFER_DL_WPTR ) );
-	printk( "PM4_BUFFER_DL_RPTR = 0x%08x\n",
-		(unsigned int)R128_READ( R128_PM4_BUFFER_DL_RPTR ) );
-	printk( "PM4_MICRO_CNTL     = 0x%08x\n",
-		(unsigned int)R128_READ( R128_PM4_MICRO_CNTL ) );
-	printk( "PM4_BUFFER_CNTL    = 0x%08x\n",
-		(unsigned int)R128_READ( R128_PM4_BUFFER_CNTL ) );
+	printk("GUI_STAT           = 0x%08x\n",
+	       (unsigned int)R128_READ(R128_GUI_STAT));
+	printk("PM4_STAT           = 0x%08x\n",
+	       (unsigned int)R128_READ(R128_PM4_STAT));
+	printk("PM4_BUFFER_DL_WPTR = 0x%08x\n",
+	       (unsigned int)R128_READ(R128_PM4_BUFFER_DL_WPTR));
+	printk("PM4_BUFFER_DL_RPTR = 0x%08x\n",
+	       (unsigned int)R128_READ(R128_PM4_BUFFER_DL_RPTR));
+	printk("PM4_MICRO_CNTL     = 0x%08x\n",
+	       (unsigned int)R128_READ(R128_PM4_MICRO_CNTL));
+	printk("PM4_BUFFER_CNTL    = 0x%08x\n",
+	       (unsigned int)R128_READ(R128_PM4_BUFFER_CNTL));
 }
 #endif
 
-
 /* ================================================================
  * Engine, FIFO control
  */
 
-static int r128_do_pixcache_flush( drm_r128_private_t *dev_priv )
+static int r128_do_pixcache_flush(drm_r128_private_t * dev_priv)
 {
 	u32 tmp;
 	int i;
 
-	tmp = R128_READ( R128_PC_NGUI_CTLSTAT ) | R128_PC_FLUSH_ALL;
-	R128_WRITE( R128_PC_NGUI_CTLSTAT, tmp );
+	tmp = R128_READ(R128_PC_NGUI_CTLSTAT) | R128_PC_FLUSH_ALL;
+	R128_WRITE(R128_PC_NGUI_CTLSTAT, tmp);
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		if ( !(R128_READ( R128_PC_NGUI_CTLSTAT ) & R128_PC_BUSY) ) {
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (!(R128_READ(R128_PC_NGUI_CTLSTAT) & R128_PC_BUSY)) {
 			return 0;
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 #if R128_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
+	DRM_ERROR("failed!\n");
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-static int r128_do_wait_for_fifo( drm_r128_private_t *dev_priv, int entries )
+static int r128_do_wait_for_fifo(drm_r128_private_t * dev_priv, int entries)
 {
 	int i;
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		int slots = R128_READ( R128_GUI_STAT ) & R128_GUI_FIFOCNT_MASK;
-		if ( slots >= entries ) return 0;
-		DRM_UDELAY( 1 );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		int slots = R128_READ(R128_GUI_STAT) & R128_GUI_FIFOCNT_MASK;
+		if (slots >= entries)
+			return 0;
+		DRM_UDELAY(1);
 	}
 
 #if R128_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
+	DRM_ERROR("failed!\n");
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-static int r128_do_wait_for_idle( drm_r128_private_t *dev_priv )
+static int r128_do_wait_for_idle(drm_r128_private_t * dev_priv)
 {
 	int i, ret;
 
-	ret = r128_do_wait_for_fifo( dev_priv, 64 );
-	if ( ret ) return ret;
+	ret = r128_do_wait_for_fifo(dev_priv, 64);
+	if (ret)
+		return ret;
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		if ( !(R128_READ( R128_GUI_STAT ) & R128_GUI_ACTIVE) ) {
-			r128_do_pixcache_flush( dev_priv );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (!(R128_READ(R128_GUI_STAT) & R128_GUI_ACTIVE)) {
+			r128_do_pixcache_flush(dev_priv);
 			return 0;
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 #if R128_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
+	DRM_ERROR("failed!\n");
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-
 /* ================================================================
  * CCE control, initialization
  */
 
 /* Load the microcode for the CCE */
-static void r128_cce_load_microcode( drm_r128_private_t *dev_priv )
+static void r128_cce_load_microcode(drm_r128_private_t * dev_priv)
 {
 	int i;
 
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	r128_do_wait_for_idle( dev_priv );
+	r128_do_wait_for_idle(dev_priv);
 
-	R128_WRITE( R128_PM4_MICROCODE_ADDR, 0 );
-	for ( i = 0 ; i < 256 ; i++ ) {
-		R128_WRITE( R128_PM4_MICROCODE_DATAH,
-			    r128_cce_microcode[i * 2] );
-		R128_WRITE( R128_PM4_MICROCODE_DATAL,
-			    r128_cce_microcode[i * 2 + 1] );
+	R128_WRITE(R128_PM4_MICROCODE_ADDR, 0);
+	for (i = 0; i < 256; i++) {
+		R128_WRITE(R128_PM4_MICROCODE_DATAH, r128_cce_microcode[i * 2]);
+		R128_WRITE(R128_PM4_MICROCODE_DATAL,
+			   r128_cce_microcode[i * 2 + 1]);
 	}
 }
 
@@ -199,51 +197,51 @@ static void r128_cce_load_microcode( drm_r128_private_t *dev_priv )
  * prior to a wait for idle, as it informs the engine that the command
  * stream is ending.
  */
-static void r128_do_cce_flush( drm_r128_private_t *dev_priv )
+static void r128_do_cce_flush(drm_r128_private_t * dev_priv)
 {
 	u32 tmp;
 
-	tmp = R128_READ( R128_PM4_BUFFER_DL_WPTR ) | R128_PM4_BUFFER_DL_DONE;
-	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, tmp );
+	tmp = R128_READ(R128_PM4_BUFFER_DL_WPTR) | R128_PM4_BUFFER_DL_DONE;
+	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, tmp);
 }
 
 /* Wait for the CCE to go idle.
  */
-int r128_do_cce_idle( drm_r128_private_t *dev_priv )
+int r128_do_cce_idle(drm_r128_private_t * dev_priv)
 {
 	int i;
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		if ( GET_RING_HEAD( dev_priv ) == dev_priv->ring.tail ) {
-			int pm4stat = R128_READ( R128_PM4_STAT );
-			if ( ( (pm4stat & R128_PM4_FIFOCNT_MASK) >=
-			       dev_priv->cce_fifo_size ) &&
-			     !(pm4stat & (R128_PM4_BUSY |
-					  R128_PM4_GUI_ACTIVE)) ) {
-				return r128_do_pixcache_flush( dev_priv );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (GET_RING_HEAD(dev_priv) == dev_priv->ring.tail) {
+			int pm4stat = R128_READ(R128_PM4_STAT);
+			if (((pm4stat & R128_PM4_FIFOCNT_MASK) >=
+			     dev_priv->cce_fifo_size) &&
+			    !(pm4stat & (R128_PM4_BUSY |
+					 R128_PM4_GUI_ACTIVE))) {
+				return r128_do_pixcache_flush(dev_priv);
 			}
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 #if R128_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
-	r128_status( dev_priv );
+	DRM_ERROR("failed!\n");
+	r128_status(dev_priv);
 #endif
 	return DRM_ERR(EBUSY);
 }
 
 /* Start the Concurrent Command Engine.
  */
-static void r128_do_cce_start( drm_r128_private_t *dev_priv )
+static void r128_do_cce_start(drm_r128_private_t * dev_priv)
 {
-	r128_do_wait_for_idle( dev_priv );
+	r128_do_wait_for_idle(dev_priv);
 
-	R128_WRITE( R128_PM4_BUFFER_CNTL,
-		    dev_priv->cce_mode | dev_priv->ring.size_l2qw
-		    | R128_PM4_BUFFER_CNTL_NOUPDATE );
-	R128_READ( R128_PM4_BUFFER_ADDR ); /* as per the sample code */
-	R128_WRITE( R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN );
+	R128_WRITE(R128_PM4_BUFFER_CNTL,
+		   dev_priv->cce_mode | dev_priv->ring.size_l2qw
+		   | R128_PM4_BUFFER_CNTL_NOUPDATE);
+	R128_READ(R128_PM4_BUFFER_ADDR);	/* as per the sample code */
+	R128_WRITE(R128_PM4_MICRO_CNTL, R128_PM4_MICRO_FREERUN);
 
 	dev_priv->cce_running = 1;
 }
@@ -252,10 +250,10 @@ static void r128_do_cce_start( drm_r128_private_t *dev_priv )
  * commands, so you must wait for the CCE command stream to complete
  * before calling this routine.
  */
-static void r128_do_cce_reset( drm_r128_private_t *dev_priv )
+static void r128_do_cce_reset(drm_r128_private_t * dev_priv)
 {
-	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 );
-	R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
+	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
+	R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
 	dev_priv->ring.tail = 0;
 }
 
@@ -263,121 +261,119 @@ static void r128_do_cce_reset( drm_r128_private_t *dev_priv )
  * commands, so you must flush the command stream and wait for the CCE
  * to go idle before calling this routine.
  */
-static void r128_do_cce_stop( drm_r128_private_t *dev_priv )
+static void r128_do_cce_stop(drm_r128_private_t * dev_priv)
 {
-	R128_WRITE( R128_PM4_MICRO_CNTL, 0 );
-	R128_WRITE( R128_PM4_BUFFER_CNTL,
-		    R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE );
+	R128_WRITE(R128_PM4_MICRO_CNTL, 0);
+	R128_WRITE(R128_PM4_BUFFER_CNTL,
+		   R128_PM4_NONPM4 | R128_PM4_BUFFER_CNTL_NOUPDATE);
 
 	dev_priv->cce_running = 0;
 }
 
 /* Reset the engine.  This will stop the CCE if it is running.
  */
-static int r128_do_engine_reset( drm_device_t *dev )
+static int r128_do_engine_reset(drm_device_t * dev)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	u32 clock_cntl_index, mclk_cntl, gen_reset_cntl;
 
-	r128_do_pixcache_flush( dev_priv );
+	r128_do_pixcache_flush(dev_priv);
 
-	clock_cntl_index = R128_READ( R128_CLOCK_CNTL_INDEX );
-	mclk_cntl = R128_READ_PLL( dev, R128_MCLK_CNTL );
+	clock_cntl_index = R128_READ(R128_CLOCK_CNTL_INDEX);
+	mclk_cntl = R128_READ_PLL(dev, R128_MCLK_CNTL);
 
-	R128_WRITE_PLL( R128_MCLK_CNTL,
-			mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP );
+	R128_WRITE_PLL(R128_MCLK_CNTL,
+		       mclk_cntl | R128_FORCE_GCP | R128_FORCE_PIPE3D_CP);
 
-	gen_reset_cntl = R128_READ( R128_GEN_RESET_CNTL );
+	gen_reset_cntl = R128_READ(R128_GEN_RESET_CNTL);
 
 	/* Taken from the sample code - do not change */
-	R128_WRITE( R128_GEN_RESET_CNTL,
-		    gen_reset_cntl | R128_SOFT_RESET_GUI );
-	R128_READ( R128_GEN_RESET_CNTL );
-	R128_WRITE( R128_GEN_RESET_CNTL,
-		    gen_reset_cntl & ~R128_SOFT_RESET_GUI );
-	R128_READ( R128_GEN_RESET_CNTL );
+	R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl | R128_SOFT_RESET_GUI);
+	R128_READ(R128_GEN_RESET_CNTL);
+	R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl & ~R128_SOFT_RESET_GUI);
+	R128_READ(R128_GEN_RESET_CNTL);
 
-	R128_WRITE_PLL( R128_MCLK_CNTL, mclk_cntl );
-	R128_WRITE( R128_CLOCK_CNTL_INDEX, clock_cntl_index );
-	R128_WRITE( R128_GEN_RESET_CNTL, gen_reset_cntl );
+	R128_WRITE_PLL(R128_MCLK_CNTL, mclk_cntl);
+	R128_WRITE(R128_CLOCK_CNTL_INDEX, clock_cntl_index);
+	R128_WRITE(R128_GEN_RESET_CNTL, gen_reset_cntl);
 
 	/* Reset the CCE ring */
-	r128_do_cce_reset( dev_priv );
+	r128_do_cce_reset(dev_priv);
 
 	/* The CCE is no longer running after an engine reset */
 	dev_priv->cce_running = 0;
 
 	/* Reset any pending vertex, indirect buffers */
-	r128_freelist_reset( dev );
+	r128_freelist_reset(dev);
 
 	return 0;
 }
 
-static void r128_cce_init_ring_buffer( drm_device_t *dev,
-				       drm_r128_private_t *dev_priv )
+static void r128_cce_init_ring_buffer(drm_device_t * dev,
+				      drm_r128_private_t * dev_priv)
 {
 	u32 ring_start;
 	u32 tmp;
 
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	/* The manual (p. 2) says this address is in "VM space".  This
 	 * means it's an offset from the start of AGP space.
 	 */
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci )
+#if __OS_HAS_AGP
+	if (!dev_priv->is_pci)
 		ring_start = dev_priv->cce_ring->offset - dev->agp->base;
 	else
 #endif
 		ring_start = dev_priv->cce_ring->offset - dev->sg->handle;
 
-	R128_WRITE( R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET );
+	R128_WRITE(R128_PM4_BUFFER_OFFSET, ring_start | R128_AGP_OFFSET);
 
-	R128_WRITE( R128_PM4_BUFFER_DL_WPTR, 0 );
-	R128_WRITE( R128_PM4_BUFFER_DL_RPTR, 0 );
+	R128_WRITE(R128_PM4_BUFFER_DL_WPTR, 0);
+	R128_WRITE(R128_PM4_BUFFER_DL_RPTR, 0);
 
 	/* Set watermark control */
-	R128_WRITE( R128_PM4_BUFFER_WM_CNTL,
-		    ((R128_WATERMARK_L/4) << R128_WMA_SHIFT)
-		    | ((R128_WATERMARK_M/4) << R128_WMB_SHIFT)
-		    | ((R128_WATERMARK_N/4) << R128_WMC_SHIFT)
-		    | ((R128_WATERMARK_K/64) << R128_WB_WM_SHIFT) );
+	R128_WRITE(R128_PM4_BUFFER_WM_CNTL,
+		   ((R128_WATERMARK_L / 4) << R128_WMA_SHIFT)
+		   | ((R128_WATERMARK_M / 4) << R128_WMB_SHIFT)
+		   | ((R128_WATERMARK_N / 4) << R128_WMC_SHIFT)
+		   | ((R128_WATERMARK_K / 64) << R128_WB_WM_SHIFT));
 
 	/* Force read.  Why?  Because it's in the examples... */
-	R128_READ( R128_PM4_BUFFER_ADDR );
+	R128_READ(R128_PM4_BUFFER_ADDR);
 
 	/* Turn on bus mastering */
-	tmp = R128_READ( R128_BUS_CNTL ) & ~R128_BUS_MASTER_DIS;
-	R128_WRITE( R128_BUS_CNTL, tmp );
+	tmp = R128_READ(R128_BUS_CNTL) & ~R128_BUS_MASTER_DIS;
+	R128_WRITE(R128_BUS_CNTL, tmp);
 }
 
-static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
+static int r128_do_init_cce(drm_device_t * dev, drm_r128_init_t * init)
 {
 	drm_r128_private_t *dev_priv;
 
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	dev_priv = DRM(alloc)( sizeof(drm_r128_private_t), DRM_MEM_DRIVER );
-	if ( dev_priv == NULL )
+	dev_priv = drm_alloc(sizeof(drm_r128_private_t), DRM_MEM_DRIVER);
+	if (dev_priv == NULL)
 		return DRM_ERR(ENOMEM);
 
-	memset( dev_priv, 0, sizeof(drm_r128_private_t) );
+	memset(dev_priv, 0, sizeof(drm_r128_private_t));
 
 	dev_priv->is_pci = init->is_pci;
 
-	if ( dev_priv->is_pci && !dev->sg ) {
-		DRM_ERROR( "PCI GART memory not allocated!\n" );
+	if (dev_priv->is_pci && !dev->sg) {
+		DRM_ERROR("PCI GART memory not allocated!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
 
 	dev_priv->usec_timeout = init->usec_timeout;
-	if ( dev_priv->usec_timeout < 1 ||
-	     dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT ) {
-		DRM_DEBUG( "TIMEOUT problem!\n" );
+	if (dev_priv->usec_timeout < 1 ||
+	    dev_priv->usec_timeout > R128_MAX_USEC_TIMEOUT) {
+		DRM_DEBUG("TIMEOUT problem!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
 
@@ -385,23 +381,23 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
 
 	/* GH: Simple idle check.
 	 */
-	atomic_set( &dev_priv->idle_count, 0 );
+	atomic_set(&dev_priv->idle_count, 0);
 
 	/* We don't support anything other than bus-mastering ring mode,
 	 * but the ring can be in either AGP or PCI space for the ring
 	 * read pointer.
 	 */
-	if ( ( init->cce_mode != R128_PM4_192BM ) &&
-	     ( init->cce_mode != R128_PM4_128BM_64INDBM ) &&
-	     ( init->cce_mode != R128_PM4_64BM_128INDBM ) &&
-	     ( init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM ) ) {
-		DRM_DEBUG( "Bad cce_mode!\n" );
+	if ((init->cce_mode != R128_PM4_192BM) &&
+	    (init->cce_mode != R128_PM4_128BM_64INDBM) &&
+	    (init->cce_mode != R128_PM4_64BM_128INDBM) &&
+	    (init->cce_mode != R128_PM4_64BM_64VCBM_64INDBM)) {
+		DRM_DEBUG("Bad cce_mode!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	switch ( init->cce_mode ) {
+	switch (init->cce_mode) {
 	case R128_PM4_NONPM4:
 		dev_priv->cce_fifo_size = 0;
 		break;
@@ -422,7 +418,7 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
 		break;
 	}
 
-	switch ( init->fb_bpp ) {
+	switch (init->fb_bpp) {
 	case 16:
 		dev_priv->color_fmt = R128_DATATYPE_RGB565;
 		break;
@@ -431,12 +427,12 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
 		dev_priv->color_fmt = R128_DATATYPE_ARGB8888;
 		break;
 	}
-	dev_priv->front_offset	= init->front_offset;
-	dev_priv->front_pitch	= init->front_pitch;
-	dev_priv->back_offset	= init->back_offset;
-	dev_priv->back_pitch	= init->back_pitch;
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->front_pitch = init->front_pitch;
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->back_pitch = init->back_pitch;
 
-	switch ( init->depth_bpp ) {
+	switch (init->depth_bpp) {
 	case 16:
 		dev_priv->depth_fmt = R128_DATATYPE_RGB565;
 		break;
@@ -446,220 +442,220 @@ static int r128_do_init_cce( drm_device_t *dev, drm_r128_init_t *init )
 		dev_priv->depth_fmt = R128_DATATYPE_ARGB8888;
 		break;
 	}
-	dev_priv->depth_offset	= init->depth_offset;
-	dev_priv->depth_pitch	= init->depth_pitch;
-	dev_priv->span_offset	= init->span_offset;
+	dev_priv->depth_offset = init->depth_offset;
+	dev_priv->depth_pitch = init->depth_pitch;
+	dev_priv->span_offset = init->span_offset;
 
-	dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch/8) << 21) |
+	dev_priv->front_pitch_offset_c = (((dev_priv->front_pitch / 8) << 21) |
 					  (dev_priv->front_offset >> 5));
-	dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch/8) << 21) |
+	dev_priv->back_pitch_offset_c = (((dev_priv->back_pitch / 8) << 21) |
 					 (dev_priv->back_offset >> 5));
-	dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
+	dev_priv->depth_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) |
 					  (dev_priv->depth_offset >> 5) |
 					  R128_DST_TILE);
-	dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch/8) << 21) |
+	dev_priv->span_pitch_offset_c = (((dev_priv->depth_pitch / 8) << 21) |
 					 (dev_priv->span_offset >> 5));
 
 	DRM_GETSAREA();
-	
-	if(!dev_priv->sarea) {
+
+	if (!dev_priv->sarea) {
 		DRM_ERROR("could not find sarea!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
-	if(!dev_priv->mmio) {
+	dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
+	if (!dev_priv->mmio) {
 		DRM_ERROR("could not find mmio region!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->cce_ring, init->ring_offset );
-	if(!dev_priv->cce_ring) {
+	dev_priv->cce_ring = drm_core_findmap(dev, init->ring_offset);
+	if (!dev_priv->cce_ring) {
 		DRM_ERROR("could not find cce ring region!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
-	if(!dev_priv->ring_rptr) {
+	dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
+	if (!dev_priv->ring_rptr) {
 		DRM_ERROR("could not find ring read pointer!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
-	if(!dev_priv->buffers) {
+	dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
+	if (!dev->agp_buffer_map) {
 		DRM_ERROR("could not find dma buffer region!\n");
 		dev->dev_private = (void *)dev_priv;
-		r128_do_cleanup_cce( dev );
+		r128_do_cleanup_cce(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( !dev_priv->is_pci ) {
-		DRM_FIND_MAP( dev_priv->agp_textures,
-			      init->agp_textures_offset );
-		if(!dev_priv->agp_textures) {
+	if (!dev_priv->is_pci) {
+		dev_priv->agp_textures =
+		    drm_core_findmap(dev, init->agp_textures_offset);
+		if (!dev_priv->agp_textures) {
 			DRM_ERROR("could not find agp texture region!\n");
 			dev->dev_private = (void *)dev_priv;
-			r128_do_cleanup_cce( dev );
+			r128_do_cleanup_cce(dev);
 			return DRM_ERR(EINVAL);
 		}
 	}
 
 	dev_priv->sarea_priv =
-		(drm_r128_sarea_t *)((u8 *)dev_priv->sarea->handle +
-				     init->sarea_priv_offset);
-
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci ) {
-		DRM_IOREMAP( dev_priv->cce_ring, dev );
-		DRM_IOREMAP( dev_priv->ring_rptr, dev );
-		DRM_IOREMAP( dev_priv->buffers, dev );
-		if(!dev_priv->cce_ring->handle ||
-		   !dev_priv->ring_rptr->handle ||
-		   !dev_priv->buffers->handle) {
+	    (drm_r128_sarea_t *) ((u8 *) dev_priv->sarea->handle +
+				  init->sarea_priv_offset);
+
+#if __OS_HAS_AGP
+	if (!dev_priv->is_pci) {
+		drm_core_ioremap(dev_priv->cce_ring, dev);
+		drm_core_ioremap(dev_priv->ring_rptr, dev);
+		drm_core_ioremap(dev->agp_buffer_map, dev);
+		if (!dev_priv->cce_ring->handle ||
+		    !dev_priv->ring_rptr->handle ||
+		    !dev->agp_buffer_map->handle) {
 			DRM_ERROR("Could not ioremap agp regions!\n");
 			dev->dev_private = (void *)dev_priv;
-			r128_do_cleanup_cce( dev );
+			r128_do_cleanup_cce(dev);
 			return DRM_ERR(ENOMEM);
 		}
 	} else
 #endif
 	{
-		dev_priv->cce_ring->handle =
-			(void *)dev_priv->cce_ring->offset;
+		dev_priv->cce_ring->handle = (void *)dev_priv->cce_ring->offset;
 		dev_priv->ring_rptr->handle =
-			(void *)dev_priv->ring_rptr->offset;
-		dev_priv->buffers->handle = (void *)dev_priv->buffers->offset;
+		    (void *)dev_priv->ring_rptr->offset;
+		dev->agp_buffer_map->handle =
+		    (void *)dev->agp_buffer_map->offset;
 	}
 
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci )
+#if __OS_HAS_AGP
+	if (!dev_priv->is_pci)
 		dev_priv->cce_buffers_offset = dev->agp->base;
 	else
 #endif
 		dev_priv->cce_buffers_offset = dev->sg->handle;
 
-	dev_priv->ring.start = (u32 *)dev_priv->cce_ring->handle;
-	dev_priv->ring.end = ((u32 *)dev_priv->cce_ring->handle
+	dev_priv->ring.start = (u32 *) dev_priv->cce_ring->handle;
+	dev_priv->ring.end = ((u32 *) dev_priv->cce_ring->handle
 			      + init->ring_size / sizeof(u32));
 	dev_priv->ring.size = init->ring_size;
-	dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 );
+	dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
 
-	dev_priv->ring.tail_mask =
-		(dev_priv->ring.size / sizeof(u32)) - 1;
+	dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
 
 	dev_priv->ring.high_mark = 128;
 
 	dev_priv->sarea_priv->last_frame = 0;
-	R128_WRITE( R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame );
+	R128_WRITE(R128_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
 
 	dev_priv->sarea_priv->last_dispatch = 0;
-	R128_WRITE( R128_LAST_DISPATCH_REG,
-		    dev_priv->sarea_priv->last_dispatch );
+	R128_WRITE(R128_LAST_DISPATCH_REG, dev_priv->sarea_priv->last_dispatch);
 
-#if __REALLY_HAVE_AGP
-	if ( dev_priv->is_pci ) {
+#if __OS_HAS_AGP
+	if (dev_priv->is_pci) {
 #endif
-		if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart,
-     					    &dev_priv->bus_pci_gart) ) {
-			DRM_ERROR( "failed to init PCI GART!\n" );
+		if (!drm_ati_pcigart_init(dev, &dev_priv->phys_pci_gart,
+					  &dev_priv->bus_pci_gart)) {
+			DRM_ERROR("failed to init PCI GART!\n");
 			dev->dev_private = (void *)dev_priv;
-			r128_do_cleanup_cce( dev );
+			r128_do_cleanup_cce(dev);
 			return DRM_ERR(ENOMEM);
 		}
-		R128_WRITE( R128_PCI_GART_PAGE, dev_priv->bus_pci_gart );
-#if __REALLY_HAVE_AGP
+		R128_WRITE(R128_PCI_GART_PAGE, dev_priv->bus_pci_gart);
+#if __OS_HAS_AGP
 	}
 #endif
 
-	r128_cce_init_ring_buffer( dev, dev_priv );
-	r128_cce_load_microcode( dev_priv );
+	r128_cce_init_ring_buffer(dev, dev_priv);
+	r128_cce_load_microcode(dev_priv);
 
 	dev->dev_private = (void *)dev_priv;
 
-	r128_do_engine_reset( dev );
+	r128_do_engine_reset(dev);
 
 	return 0;
 }
 
-int r128_do_cleanup_cce( drm_device_t *dev )
+int r128_do_cleanup_cce(drm_device_t * dev)
 {
 
-#if __HAVE_IRQ
 	/* Make sure interrupts are disabled here because the uninstall ioctl
 	 * may not have been called from userspace and after dev_private
 	 * is freed, it's too late.
 	 */
-	if ( dev->irq_enabled ) DRM(irq_uninstall)(dev);
-#endif
+	if (dev->irq_enabled)
+		drm_irq_uninstall(dev);
 
-	if ( dev->dev_private ) {
+	if (dev->dev_private) {
 		drm_r128_private_t *dev_priv = dev->dev_private;
 
-#if __REALLY_HAVE_AGP
-		if ( !dev_priv->is_pci ) {
-			if ( dev_priv->cce_ring != NULL )
-				DRM_IOREMAPFREE( dev_priv->cce_ring, dev );
-			if ( dev_priv->ring_rptr != NULL )
-				DRM_IOREMAPFREE( dev_priv->ring_rptr, dev );
-			if ( dev_priv->buffers != NULL )
-				DRM_IOREMAPFREE( dev_priv->buffers, dev );
+#if __OS_HAS_AGP
+		if (!dev_priv->is_pci) {
+			if (dev_priv->cce_ring != NULL)
+				drm_core_ioremapfree(dev_priv->cce_ring, dev);
+			if (dev_priv->ring_rptr != NULL)
+				drm_core_ioremapfree(dev_priv->ring_rptr, dev);
+			if (dev->agp_buffer_map != NULL) {
+				drm_core_ioremapfree(dev->agp_buffer_map, dev);
+				dev->agp_buffer_map = NULL;
+			}
 		} else
 #endif
 		{
-			if (!DRM(ati_pcigart_cleanup)( dev,
-						dev_priv->phys_pci_gart,
-						dev_priv->bus_pci_gart ))
-				DRM_ERROR( "failed to cleanup PCI GART!\n" );
+			if (!drm_ati_pcigart_cleanup(dev,
+						     dev_priv->phys_pci_gart,
+						     dev_priv->bus_pci_gart))
+				DRM_ERROR("failed to cleanup PCI GART!\n");
 		}
 
-		DRM(free)( dev->dev_private, sizeof(drm_r128_private_t),
-			   DRM_MEM_DRIVER );
+		drm_free(dev->dev_private, sizeof(drm_r128_private_t),
+			 DRM_MEM_DRIVER);
 		dev->dev_private = NULL;
 	}
 
 	return 0;
 }
 
-int r128_cce_init( DRM_IOCTL_ARGS )
+int r128_cce_init(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_init_t init;
 
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( init, (drm_r128_init_t *)data, sizeof(init) );
+	DRM_COPY_FROM_USER_IOCTL(init, (drm_r128_init_t __user *) data,
+				 sizeof(init));
 
-	switch ( init.func ) {
+	switch (init.func) {
 	case R128_INIT_CCE:
-		return r128_do_init_cce( dev, &init );
+		return r128_do_init_cce(dev, &init);
 	case R128_CLEANUP_CCE:
-		return r128_do_cleanup_cce( dev );
+		return r128_do_cleanup_cce(dev);
 	}
 
 	return DRM_ERR(EINVAL);
 }
 
-int r128_cce_start( DRM_IOCTL_ARGS )
+int r128_cce_start(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4 ) {
-		DRM_DEBUG( "%s while CCE running\n", __FUNCTION__ );
+	if (dev_priv->cce_running || dev_priv->cce_mode == R128_PM4_NONPM4) {
+		DRM_DEBUG("%s while CCE running\n", __FUNCTION__);
 		return 0;
 	}
 
-	r128_do_cce_start( dev_priv );
+	r128_do_cce_start(dev_priv);
 
 	return 0;
 }
@@ -667,61 +663,63 @@ int r128_cce_start( DRM_IOCTL_ARGS )
 /* Stop the CCE.  The engine must have been idled before calling this
  * routine.
  */
-int r128_cce_stop( DRM_IOCTL_ARGS )
+int r128_cce_stop(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_cce_stop_t stop;
 	int ret;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL(stop, (drm_r128_cce_stop_t *)data, sizeof(stop) );
+	DRM_COPY_FROM_USER_IOCTL(stop, (drm_r128_cce_stop_t __user *) data,
+				 sizeof(stop));
 
 	/* Flush any pending CCE commands.  This ensures any outstanding
 	 * commands are exectuted by the engine before we turn it off.
 	 */
-	if ( stop.flush ) {
-		r128_do_cce_flush( dev_priv );
+	if (stop.flush) {
+		r128_do_cce_flush(dev_priv);
 	}
 
 	/* If we fail to make the engine go idle, we return an error
 	 * code so that the DRM ioctl wrapper can try again.
 	 */
-	if ( stop.idle ) {
-		ret = r128_do_cce_idle( dev_priv );
-		if ( ret ) return ret;
+	if (stop.idle) {
+		ret = r128_do_cce_idle(dev_priv);
+		if (ret)
+			return ret;
 	}
 
 	/* Finally, we can turn off the CCE.  If the engine isn't idle,
 	 * we will get some dropped triangles as they won't be fully
 	 * rendered before the CCE is shut down.
 	 */
-	r128_do_cce_stop( dev_priv );
+	r128_do_cce_stop(dev_priv);
 
 	/* Reset the engine */
-	r128_do_engine_reset( dev );
+	r128_do_engine_reset(dev);
 
 	return 0;
 }
 
 /* Just reset the CCE ring.  Called as part of an X Server engine reset.
  */
-int r128_cce_reset( DRM_IOCTL_ARGS )
+int r128_cce_reset(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_DEBUG("%s called before init done\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	r128_do_cce_reset( dev_priv );
+	r128_do_cce_reset(dev_priv);
 
 	/* The CCE is no longer running after an engine reset */
 	dev_priv->cce_running = 0;
@@ -729,37 +727,36 @@ int r128_cce_reset( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int r128_cce_idle( DRM_IOCTL_ARGS )
+int r128_cce_idle(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( dev_priv->cce_running ) {
-		r128_do_cce_flush( dev_priv );
+	if (dev_priv->cce_running) {
+		r128_do_cce_flush(dev_priv);
 	}
 
-	return r128_do_cce_idle( dev_priv );
+	return r128_do_cce_idle(dev_priv);
 }
 
-int r128_engine_reset( DRM_IOCTL_ARGS )
+int r128_engine_reset(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	return r128_do_engine_reset( dev );
+	return r128_do_engine_reset(dev);
 }
 
-int r128_fullscreen( DRM_IOCTL_ARGS )
+int r128_fullscreen(DRM_IOCTL_ARGS)
 {
 	return DRM_ERR(EINVAL);
 }
 
-
 /* ================================================================
  * Freelist management
  */
@@ -767,7 +764,7 @@ int r128_fullscreen( DRM_IOCTL_ARGS )
 #define R128_BUFFER_FREE	0
 
 #if 0
-static int r128_freelist_init( drm_device_t *dev )
+static int r128_freelist_init(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_r128_private_t *dev_priv = dev->dev_private;
@@ -776,27 +773,26 @@ static int r128_freelist_init( drm_device_t *dev )
 	drm_r128_freelist_t *entry;
 	int i;
 
-	dev_priv->head = DRM(alloc)( sizeof(drm_r128_freelist_t),
-				     DRM_MEM_DRIVER );
-	if ( dev_priv->head == NULL )
+	dev_priv->head = drm_alloc(sizeof(drm_r128_freelist_t), DRM_MEM_DRIVER);
+	if (dev_priv->head == NULL)
 		return DRM_ERR(ENOMEM);
 
-	memset( dev_priv->head, 0, sizeof(drm_r128_freelist_t) );
+	memset(dev_priv->head, 0, sizeof(drm_r128_freelist_t));
 	dev_priv->head->age = R128_BUFFER_USED;
 
-	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+	for (i = 0; i < dma->buf_count; i++) {
 		buf = dma->buflist[i];
 		buf_priv = buf->dev_private;
 
-		entry = DRM(alloc)( sizeof(drm_r128_freelist_t),
-				    DRM_MEM_DRIVER );
-		if ( !entry ) return DRM_ERR(ENOMEM);
+		entry = drm_alloc(sizeof(drm_r128_freelist_t), DRM_MEM_DRIVER);
+		if (!entry)
+			return DRM_ERR(ENOMEM);
 
 		entry->age = R128_BUFFER_FREE;
 		entry->buf = buf;
 		entry->prev = dev_priv->head;
 		entry->next = dev_priv->head->next;
-		if ( !entry->next )
+		if (!entry->next)
 			dev_priv->tail = entry;
 
 		buf_priv->discard = 0;
@@ -805,7 +801,7 @@ static int r128_freelist_init( drm_device_t *dev )
 
 		dev_priv->head->next = entry;
 
-		if ( dev_priv->head->next )
+		if (dev_priv->head->next)
 			dev_priv->head->next->prev = entry;
 	}
 
@@ -814,7 +810,7 @@ static int r128_freelist_init( drm_device_t *dev )
 }
 #endif
 
-drm_buf_t *r128_freelist_get( drm_device_t *dev )
+static drm_buf_t *r128_freelist_get(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_r128_private_t *dev_priv = dev->dev_private;
@@ -824,20 +820,20 @@ drm_buf_t *r128_freelist_get( drm_device_t *dev )
 
 	/* FIXME: Optimize -- use freelist code */
 
-	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+	for (i = 0; i < dma->buf_count; i++) {
 		buf = dma->buflist[i];
 		buf_priv = buf->dev_private;
-		if ( buf->filp == 0 )
+		if (buf->filp == 0)
 			return buf;
 	}
 
-	for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) {
-		u32 done_age = R128_READ( R128_LAST_DISPATCH_REG );
+	for (t = 0; t < dev_priv->usec_timeout; t++) {
+		u32 done_age = R128_READ(R128_LAST_DISPATCH_REG);
 
-		for ( i = 0 ; i < dma->buf_count ; i++ ) {
+		for (i = 0; i < dma->buf_count; i++) {
 			buf = dma->buflist[i];
 			buf_priv = buf->dev_private;
-			if ( buf->pending && buf_priv->age <= done_age ) {
+			if (buf->pending && buf_priv->age <= done_age) {
 				/* The buffer has been processed, so it
 				 * can now be used.
 				 */
@@ -845,63 +841,63 @@ drm_buf_t *r128_freelist_get( drm_device_t *dev )
 				return buf;
 			}
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
-	DRM_DEBUG( "returning NULL!\n" );
+	DRM_DEBUG("returning NULL!\n");
 	return NULL;
 }
 
-void r128_freelist_reset( drm_device_t *dev )
+void r128_freelist_reset(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	int i;
 
-	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+	for (i = 0; i < dma->buf_count; i++) {
 		drm_buf_t *buf = dma->buflist[i];
 		drm_r128_buf_priv_t *buf_priv = buf->dev_private;
 		buf_priv->age = 0;
 	}
 }
 
-
 /* ================================================================
  * CCE command submission
  */
 
-int r128_wait_ring( drm_r128_private_t *dev_priv, int n )
+int r128_wait_ring(drm_r128_private_t * dev_priv, int n)
 {
 	drm_r128_ring_buffer_t *ring = &dev_priv->ring;
 	int i;
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		r128_update_ring_snapshot( dev_priv );
-		if ( ring->space >= n )
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		r128_update_ring_snapshot(dev_priv);
+		if (ring->space >= n)
 			return 0;
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 	/* FIXME: This is being ignored... */
-	DRM_ERROR( "failed!\n" );
+	DRM_ERROR("failed!\n");
 	return DRM_ERR(EBUSY);
 }
 
-static int r128_cce_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d )
+static int r128_cce_get_buffers(DRMFILE filp, drm_device_t * dev, drm_dma_t * d)
 {
 	int i;
 	drm_buf_t *buf;
 
-	for ( i = d->granted_count ; i < d->request_count ; i++ ) {
-		buf = r128_freelist_get( dev );
-		if ( !buf ) return DRM_ERR(EAGAIN);
+	for (i = d->granted_count; i < d->request_count; i++) {
+		buf = r128_freelist_get(dev);
+		if (!buf)
+			return DRM_ERR(EAGAIN);
 
 		buf->filp = filp;
 
-		if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx,
-				   sizeof(buf->idx) ) )
+		if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx,
+				     sizeof(buf->idx)))
 			return DRM_ERR(EFAULT);
-		if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total,
-				   sizeof(buf->total) ) )
+		if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total,
+				     sizeof(buf->total)))
 			return DRM_ERR(EFAULT);
 
 		d->granted_count++;
@@ -909,40 +905,41 @@ static int r128_cce_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d )
 	return 0;
 }
 
-int r128_cce_buffers( DRM_IOCTL_ARGS )
+int r128_cce_buffers(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	int ret = 0;
+	drm_dma_t __user *argp = (void __user *)data;
 	drm_dma_t d;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *) data, sizeof(d) );
+	DRM_COPY_FROM_USER_IOCTL(d, argp, sizeof(d));
 
 	/* Please don't send us buffers.
 	 */
-	if ( d.send_count != 0 ) {
-		DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
-			   DRM_CURRENTPID, d.send_count );
+	if (d.send_count != 0) {
+		DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
+			  DRM_CURRENTPID, d.send_count);
 		return DRM_ERR(EINVAL);
 	}
 
 	/* We'll send you buffers.
 	 */
-	if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
-		DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
-			   DRM_CURRENTPID, d.request_count, dma->buf_count );
+	if (d.request_count < 0 || d.request_count > dma->buf_count) {
+		DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
+			  DRM_CURRENTPID, d.request_count, dma->buf_count);
 		return DRM_ERR(EINVAL);
 	}
 
 	d.granted_count = 0;
 
-	if ( d.request_count ) {
-		ret = r128_cce_get_buffers( filp, dev, &d );
+	if (d.request_count) {
+		ret = r128_cce_get_buffers(filp, dev, &d);
 	}
 
-	DRM_COPY_TO_USER_IOCTL((drm_dma_t *) data, d, sizeof(d) );
+	DRM_COPY_TO_USER_IOCTL(argp, d, sizeof(d));
 
 	return ret;
 }
diff --git a/sys/dev/drm/r128_drm.h b/sys/dev/drm/r128_drm.h
index 32a58da..d5778ae 100644
--- a/sys/dev/drm/r128_drm.h
+++ b/sys/dev/drm/r128_drm.h
@@ -95,7 +95,7 @@
 #define R128_MAX_TEXTURE_LEVELS		11
 #define R128_MAX_TEXTURE_UNITS		2
 
-#endif /* __R128_SAREA_DEFINES__ */
+#endif				/* __R128_SAREA_DEFINES__ */
 
 typedef struct {
 	/* Context state - can be written in one large chunk */
@@ -142,7 +142,6 @@ typedef struct {
 	unsigned int tex_border_color;
 } drm_r128_texture_regs_t;
 
-
 typedef struct drm_r128_sarea {
 	/* The channel for communication of state information to the kernel
 	 * on firing a vertex buffer.
@@ -163,14 +162,13 @@ typedef struct drm_r128_sarea {
 	unsigned int last_frame;
 	unsigned int last_dispatch;
 
-	drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS+1];
+	drm_tex_region_t tex_list[R128_NR_TEX_HEAPS][R128_NR_TEX_REGIONS + 1];
 	unsigned int tex_age[R128_NR_TEX_HEAPS];
 	int ctx_owner;
-	int pfAllowPageFlip;        /* number of 3d windows (0,1,2 or more) */
-	int pfCurrentPage;	    /* which buffer is being displayed? */
+	int pfAllowPageFlip;	/* number of 3d windows (0,1,2 or more) */
+	int pfCurrentPage;	/* which buffer is being displayed? */
 } drm_r128_sarea_t;
 
-
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmR128.h)
  */
@@ -222,7 +220,7 @@ typedef struct drm_r128_sarea {
 
 typedef struct drm_r128_init {
 	enum {
-		R128_INIT_CCE    = 0x01,
+		R128_INIT_CCE = 0x01,
 		R128_CLEANUP_CCE = 0x02
 	} func;
 #if CONFIG_XFREE86_VERSION < XFREE86_VERSION(4,1,0,0)
@@ -280,9 +278,9 @@ typedef struct drm_r128_clear {
 
 typedef struct drm_r128_vertex {
 	int prim;
-	int idx;			/* Index of vertex buffer */
-	int count;			/* Number of vertices in buffer */
-	int discard;			/* Client finished with buffer? */
+	int idx;		/* Index of vertex buffer */
+	int count;		/* Number of vertices in buffer */
+	int discard;		/* Client finished with buffer? */
 } drm_r128_vertex_t;
 
 typedef struct drm_r128_indices {
@@ -290,7 +288,7 @@ typedef struct drm_r128_indices {
 	int idx;
 	int start;
 	int end;
-	int discard;			/* Client finished with buffer? */
+	int discard;		/* Client finished with buffer? */
 } drm_r128_indices_t;
 
 typedef struct drm_r128_blit {
@@ -304,20 +302,20 @@ typedef struct drm_r128_blit {
 
 typedef struct drm_r128_depth {
 	enum {
-		R128_WRITE_SPAN		= 0x01,
-		R128_WRITE_PIXELS	= 0x02,
-		R128_READ_SPAN		= 0x03,
-		R128_READ_PIXELS	= 0x04
+		R128_WRITE_SPAN = 0x01,
+		R128_WRITE_PIXELS = 0x02,
+		R128_READ_SPAN = 0x03,
+		R128_READ_PIXELS = 0x04
 	} func;
 	int n;
-	int *x;
-	int *y;
-	unsigned int *buffer;
-	unsigned char *mask;
+	int __user *x;
+	int __user *y;
+	unsigned int __user *buffer;
+	unsigned char __user *mask;
 } drm_r128_depth_t;
 
 typedef struct drm_r128_stipple {
-	unsigned int *mask;
+	unsigned int __user *mask;
 } drm_r128_stipple_t;
 
 typedef struct drm_r128_indirect {
@@ -329,19 +327,19 @@ typedef struct drm_r128_indirect {
 
 typedef struct drm_r128_fullscreen {
 	enum {
-		R128_INIT_FULLSCREEN    = 0x01,
+		R128_INIT_FULLSCREEN = 0x01,
 		R128_CLEANUP_FULLSCREEN = 0x02
 	} func;
 } drm_r128_fullscreen_t;
 
 /* 2.3: An ioctl to get parameters that aren't available to the 3d
- * client any other way.  
+ * client any other way.
  */
 #define R128_PARAM_IRQ_NR            1
 
 typedef struct drm_r128_getparam {
 	int param;
-	void *value;
+	void __user *value;
 } drm_r128_getparam_t;
 
 #endif
diff --git a/sys/dev/drm/r128_drv.c b/sys/dev/drm/r128_drv.c
index 16035fc..0a645ec 100644
--- a/sys/dev/drm/r128_drv.c
+++ b/sys/dev/drm/r128_drv.c
@@ -1,5 +1,6 @@
 /* r128_drv.c -- ATI Rage 128 driver -*- linux-c -*-
- * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com */
+ * Created: Mon Dec 13 09:47:27 1999 by faith@precisioninsight.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -31,36 +32,87 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/r128.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/r128_drm.h"
 #include "dev/drm/r128_drv.h"
-#if __REALLY_HAVE_SG
-#include "dev/drm/ati_pcigart.h"
-#endif
+#include "dev/drm/drm_pciids.h"
 
-#include "dev/drm/drm_agpsupport.h"
-#include "dev/drm/drm_auth.h"
-#include "dev/drm/drm_bufs.h"
-#include "dev/drm/drm_context.h"
-#include "dev/drm/drm_dma.h"
-#include "dev/drm/drm_drawable.h"
-#include "dev/drm/drm_drv.h"
-#include "dev/drm/drm_fops.h"
-#include "dev/drm/drm_ioctl.h"
-#include "dev/drm/drm_irq.h"
-#include "dev/drm/drm_lock.h"
-#include "dev/drm/drm_memory.h"
-#include "dev/drm/drm_pci.h"
-#include "dev/drm/drm_sysctl.h"
-#include "dev/drm/drm_vm.h"
-#if __HAVE_SG
-#include "dev/drm/drm_scatter.h"
-#endif
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t r128_pciidlist[] = {
+	r128_PCI_IDS
+};
+
+extern drm_ioctl_desc_t r128_ioctls[];
+extern int r128_max_ioctl;
+
+static void r128_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = sizeof(drm_r128_buf_priv_t);
+	dev->prerelease = r128_driver_prerelease;
+	dev->pretakedown = r128_driver_pretakedown;
+	dev->vblank_wait = r128_driver_vblank_wait;
+	dev->irq_preinstall = r128_driver_irq_preinstall;
+	dev->irq_postinstall = r128_driver_irq_postinstall;
+	dev->irq_uninstall = r128_driver_irq_uninstall;
+	dev->irq_handler = r128_driver_irq_handler;
+	dev->dma_ioctl = r128_cce_buffers;
+
+	dev->driver_ioctls = r128_ioctls;
+	dev->max_driver_ioctl = r128_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->use_mtrr = 1;
+	dev->use_pci_dma = 1;
+	dev->use_sg = 1;
+	dev->use_dma = 1;
+	dev->use_irq = 1;
+	dev->use_vbl_irq = 1;
+}
 
 #ifdef __FreeBSD__
-DRIVER_MODULE(r128, pci, r128_driver, r128_devclass, 0, 0);
-#elif defined(__NetBSD__)
+static int
+r128_probe(device_t dev)
+{
+	return drm_probe(dev, r128_pciidlist);
+}
+
+static int
+r128_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	r128_configure(dev);
+	return drm_attach(nbdev, r128_pciidlist);
+}
+
+static device_method_t r128_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		r128_probe),
+	DEVMETHOD(device_attach,	r128_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t r128_driver = {
+	"drm",
+	r128_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(r128, pci, r128_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(r128, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 CFDRIVER_DECL(r128, DV_TTY, NULL);
-#endif /* __FreeBSD__ */
+#endif
diff --git a/sys/dev/drm/r128_drv.h b/sys/dev/drm/r128_drv.h
index 8d8f877..f3caa05 100644
--- a/sys/dev/drm/r128_drv.h
+++ b/sys/dev/drm/r128_drv.h
@@ -28,7 +28,7 @@
  *    Rickard E. (Rik) Faith <faith@valinux.com>
  *    Kevin E. Martin <martin@valinux.com>
  *    Gareth Hughes <gareth@valinux.com>
- *    Michel Dänzer <daenzerm@student.ethz.ch>
+ *    Michel D�zer <daenzerm@student.ethz.ch>
  *
  * $FreeBSD$
  */
@@ -36,13 +36,31 @@
 #ifndef __R128_DRV_H__
 #define __R128_DRV_H__
 
+/* General customization:
+ */
+#define DRIVER_AUTHOR		"Gareth Hughes, VA Linux Systems Inc."
+
+#define DRIVER_NAME		"r128"
+#define DRIVER_DESC		"ATI Rage 128"
+#define DRIVER_DATE		"20030725"
+
+/* Interface history:
+ *
+ * ??  - ??
+ * 2.4 - Add support for ycbcr textures (no new ioctls)
+ * 2.5 - Add FLIP ioctl, disable FULLSCREEN.
+ */
+#define DRIVER_MAJOR		2
+#define DRIVER_MINOR		5
+#define DRIVER_PATCHLEVEL	0
+
 #define GET_RING_HEAD(dev_priv)		R128_READ( R128_PM4_BUFFER_DL_RPTR )
 
 typedef struct drm_r128_freelist {
-   	unsigned int age;
-   	drm_buf_t *buf;
-   	struct drm_r128_freelist *next;
-   	struct drm_r128_freelist *prev;
+	unsigned int age;
+	drm_buf_t *buf;
+	struct drm_r128_freelist *next;
+	struct drm_r128_freelist *prev;
 } drm_r128_freelist_t;
 
 typedef struct drm_r128_ring_buffer {
@@ -66,8 +84,8 @@ typedef struct drm_r128_private {
 	int cce_fifo_size;
 	int cce_running;
 
-   	drm_r128_freelist_t *head;
-   	drm_r128_freelist_t *tail;
+	drm_r128_freelist_t *head;
+	drm_r128_freelist_t *tail;
 
 	int usec_timeout;
 	int is_pci;
@@ -102,7 +120,6 @@ typedef struct drm_r128_private {
 	drm_local_map_t *mmio;
 	drm_local_map_t *cce_ring;
 	drm_local_map_t *ring_rptr;
-	drm_local_map_t *buffers;
 	drm_local_map_t *agp_textures;
 } drm_r128_private_t;
 
@@ -111,40 +128,34 @@ typedef struct drm_r128_buf_priv {
 	int prim;
 	int discard;
 	int dispatched;
-   	drm_r128_freelist_t *list_entry;
+	drm_r128_freelist_t *list_entry;
 } drm_r128_buf_priv_t;
 
 				/* r128_cce.c */
-extern int r128_cce_init( DRM_IOCTL_ARGS );
-extern int r128_cce_start( DRM_IOCTL_ARGS );
-extern int r128_cce_stop( DRM_IOCTL_ARGS );
-extern int r128_cce_reset( DRM_IOCTL_ARGS );
-extern int r128_cce_idle( DRM_IOCTL_ARGS );
-extern int r128_engine_reset( DRM_IOCTL_ARGS );
-extern int r128_fullscreen( DRM_IOCTL_ARGS );
-extern int r128_cce_buffers( DRM_IOCTL_ARGS );
-extern int r128_getparam( DRM_IOCTL_ARGS );
-
-extern void r128_freelist_reset( drm_device_t *dev );
-extern drm_buf_t *r128_freelist_get( drm_device_t *dev );
-
-extern int r128_wait_ring( drm_r128_private_t *dev_priv, int n );
-
-extern int r128_do_cce_idle( drm_r128_private_t *dev_priv );
-extern int r128_do_cleanup_cce( drm_device_t *dev );
-extern int r128_do_cleanup_pageflip( drm_device_t *dev );
-
-				/* r128_state.c */
-extern int r128_cce_clear( DRM_IOCTL_ARGS );
-extern int r128_cce_swap( DRM_IOCTL_ARGS );
-extern int r128_cce_flip( DRM_IOCTL_ARGS );
-extern int r128_cce_vertex( DRM_IOCTL_ARGS );
-extern int r128_cce_indices( DRM_IOCTL_ARGS );
-extern int r128_cce_blit( DRM_IOCTL_ARGS );
-extern int r128_cce_depth( DRM_IOCTL_ARGS );
-extern int r128_cce_stipple( DRM_IOCTL_ARGS );
-extern int r128_cce_indirect( DRM_IOCTL_ARGS );
+extern int r128_cce_init(DRM_IOCTL_ARGS);
+extern int r128_cce_start(DRM_IOCTL_ARGS);
+extern int r128_cce_stop(DRM_IOCTL_ARGS);
+extern int r128_cce_reset(DRM_IOCTL_ARGS);
+extern int r128_cce_idle(DRM_IOCTL_ARGS);
+extern int r128_engine_reset(DRM_IOCTL_ARGS);
+extern int r128_fullscreen(DRM_IOCTL_ARGS);
+extern int r128_cce_buffers(DRM_IOCTL_ARGS);
+
+extern void r128_freelist_reset(drm_device_t * dev);
+
+extern int r128_wait_ring(drm_r128_private_t * dev_priv, int n);
 
+extern int r128_do_cce_idle(drm_r128_private_t * dev_priv);
+extern int r128_do_cleanup_cce(drm_device_t * dev);
+
+extern int r128_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence);
+
+extern irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS);
+extern void r128_driver_irq_preinstall(drm_device_t * dev);
+extern void r128_driver_irq_postinstall(drm_device_t * dev);
+extern void r128_driver_irq_uninstall(drm_device_t * dev);
+extern void r128_driver_pretakedown(drm_device_t * dev);
+extern void r128_driver_prerelease(drm_device_t * dev, DRMFILE filp);
 
 /* Register definitions, register access macros and drmAddMap constants
  * for Rage 128 kernel driver.
@@ -253,7 +264,6 @@ extern int r128_cce_indirect( DRM_IOCTL_ARGS );
 #	define R128_EVENT_CRTC_OFFSET		(1 << 0)
 #define R128_WINDOW_XY_OFFSET		0x1bcc
 
-
 /* CCE registers
  */
 #define R128_PM4_BUFFER_OFFSET		0x0700
@@ -304,7 +314,6 @@ extern int r128_cce_indirect( DRM_IOCTL_ARGS );
 #define R128_PM4_FIFO_DATA_EVEN		0x1000
 #define R128_PM4_FIFO_DATA_ODD		0x1004
 
-
 /* CCE command packets
  */
 #define R128_CCE_PACKET0		0x00000000
@@ -382,9 +391,6 @@ do {									\
 	R128_WRITE(R128_CLOCK_CNTL_DATA, (val));			\
 } while (0)
 
-extern int R128_READ_PLL(drm_device_t *dev, int addr);
-
-
 #define CCE_PACKET0( reg, n )		(R128_CCE_PACKET0 |		\
 					 ((n) << 16) | ((reg) >> 2))
 #define CCE_PACKET1( reg0, reg1 )	(R128_CCE_PACKET1 |		\
@@ -393,13 +399,11 @@ extern int R128_READ_PLL(drm_device_t *dev, int addr);
 #define CCE_PACKET3( pkt, n )		(R128_CCE_PACKET3 |		\
 					 (pkt) | ((n) << 16))
 
-
-static __inline__ void
-r128_update_ring_snapshot( drm_r128_private_t *dev_priv )
+static __inline__ void r128_update_ring_snapshot(drm_r128_private_t * dev_priv)
 {
 	drm_r128_ring_buffer_t *ring = &dev_priv->ring;
-	ring->space = (GET_RING_HEAD( dev_priv ) - ring->tail) * sizeof(u32);
-	if ( ring->space <= 0 )
+	ring->space = (GET_RING_HEAD(dev_priv) - ring->tail) * sizeof(u32);
+	if (ring->space <= 0)
 		ring->space += ring->size;
 }
 
@@ -440,7 +444,6 @@ do {									\
 	OUT_RING( R128_EVENT_CRTC_OFFSET );				\
 } while (0)
 
-
 /* ================================================================
  * Ring control
  */
@@ -510,4 +513,4 @@ do {									\
 	write &= tail_mask;						\
 } while (0)
 
-#endif /* __R128_DRV_H__ */
+#endif				/* __R128_DRV_H__ */
diff --git a/sys/dev/drm/r128_irq.c b/sys/dev/drm/r128_irq.c
index fa3fb43..d403305 100644
--- a/sys/dev/drm/r128_irq.c
+++ b/sys/dev/drm/r128_irq.c
@@ -1,7 +1,7 @@
 /* r128_irq.c -- IRQ handling for radeon -*- linux-c -*- */
 /*-
  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
- * 
+ *
  * The Weather Channel (TM) funded Tungsten Graphics to develop the
  * initial release of the Radeon 8500 driver under the XFree86 license.
  * This notice must be preserved.
@@ -32,74 +32,72 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/r128.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/r128_drm.h"
 #include "dev/drm/r128_drv.h"
 
-irqreturn_t r128_irq_handler( DRM_IRQ_ARGS )
+irqreturn_t r128_driver_irq_handler(DRM_IRQ_ARGS)
 {
 	drm_device_t *dev = (drm_device_t *) arg;
-	drm_r128_private_t *dev_priv = 
-	   (drm_r128_private_t *)dev->dev_private;
+	drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
 	int status;
 
-	status = R128_READ( R128_GEN_INT_STATUS );
-	
+	status = R128_READ(R128_GEN_INT_STATUS);
+
 	/* VBLANK interrupt */
-	if ( status & R128_CRTC_VBLANK_INT ) {
-		R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK );
+	if (status & R128_CRTC_VBLANK_INT) {
+		R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK);
 		atomic_inc(&dev->vbl_received);
 		DRM_WAKEUP(&dev->vbl_queue);
-		DRM(vbl_send_signals)( dev );
+		drm_vbl_send_signals(dev);
 		return IRQ_HANDLED;
 	}
 	return IRQ_NONE;
 }
 
-int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
+int r128_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
 {
 	unsigned int cur_vblank;
 	int ret = 0;
 
 	/* Assume that the user has missed the current sequence number
 	 * by about a day rather than she wants to wait for years
-	 * using vertical blanks... 
+	 * using vertical blanks...
 	 */
-	DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, 
-		     ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
-			 - *sequence ) <= (1<<23) ) );
+	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
+		    (((cur_vblank = atomic_read(&dev->vbl_received))
+		      - *sequence) <= (1 << 23)));
 
 	*sequence = cur_vblank;
 
 	return ret;
 }
 
-void r128_driver_irq_preinstall( drm_device_t *dev ) {
-  	drm_r128_private_t *dev_priv = 
-	   (drm_r128_private_t *)dev->dev_private;
+void r128_driver_irq_preinstall(drm_device_t * dev)
+{
+	drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
 
 	/* Disable *all* interrupts */
-      	R128_WRITE( R128_GEN_INT_CNTL, 0 );
+	R128_WRITE(R128_GEN_INT_CNTL, 0);
 	/* Clear vblank bit if it's already high */
-   	R128_WRITE( R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK );
+	R128_WRITE(R128_GEN_INT_STATUS, R128_CRTC_VBLANK_INT_AK);
 }
 
-void r128_driver_irq_postinstall( drm_device_t *dev ) {
-  	drm_r128_private_t *dev_priv = 
-	   (drm_r128_private_t *)dev->dev_private;
+void r128_driver_irq_postinstall(drm_device_t * dev)
+{
+	drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
 
 	/* Turn on VBL interrupt */
-   	R128_WRITE( R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN );
+	R128_WRITE(R128_GEN_INT_CNTL, R128_CRTC_VBLANK_INT_EN);
 }
 
-void r128_driver_irq_uninstall( drm_device_t *dev ) {
-  	drm_r128_private_t *dev_priv = 
-	   (drm_r128_private_t *)dev->dev_private;
+void r128_driver_irq_uninstall(drm_device_t * dev)
+{
+	drm_r128_private_t *dev_priv = (drm_r128_private_t *) dev->dev_private;
 	if (!dev_priv)
 		return;
 
 	/* Disable *all* interrupts */
-	R128_WRITE( R128_GEN_INT_CNTL, 0 );
+	R128_WRITE(R128_GEN_INT_CNTL, 0);
 }
diff --git a/sys/dev/drm/r128_state.c b/sys/dev/drm/r128_state.c
index 5286e29..90b5074 100644
--- a/sys/dev/drm/r128_state.c
+++ b/sys/dev/drm/r128_state.c
@@ -29,241 +29,238 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/r128.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/r128_drm.h"
 #include "dev/drm/r128_drv.h"
 
-
 /* ================================================================
  * CCE hardware state programming functions
  */
 
-static void r128_emit_clip_rects( drm_r128_private_t *dev_priv,
-				  drm_clip_rect_t *boxes, int count )
+static void r128_emit_clip_rects(drm_r128_private_t * dev_priv,
+				 drm_clip_rect_t * boxes, int count)
 {
 	u32 aux_sc_cntl = 0x00000000;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( (count < 3? count: 3) * 5 + 2 );
+	BEGIN_RING((count < 3 ? count : 3) * 5 + 2);
 
-	if ( count >= 1 ) {
-		OUT_RING( CCE_PACKET0( R128_AUX1_SC_LEFT, 3 ) );
-		OUT_RING( boxes[0].x1 );
-		OUT_RING( boxes[0].x2 - 1 );
-		OUT_RING( boxes[0].y1 );
-		OUT_RING( boxes[0].y2 - 1 );
+	if (count >= 1) {
+		OUT_RING(CCE_PACKET0(R128_AUX1_SC_LEFT, 3));
+		OUT_RING(boxes[0].x1);
+		OUT_RING(boxes[0].x2 - 1);
+		OUT_RING(boxes[0].y1);
+		OUT_RING(boxes[0].y2 - 1);
 
 		aux_sc_cntl |= (R128_AUX1_SC_EN | R128_AUX1_SC_MODE_OR);
 	}
-	if ( count >= 2 ) {
-		OUT_RING( CCE_PACKET0( R128_AUX2_SC_LEFT, 3 ) );
-		OUT_RING( boxes[1].x1 );
-		OUT_RING( boxes[1].x2 - 1 );
-		OUT_RING( boxes[1].y1 );
-		OUT_RING( boxes[1].y2 - 1 );
+	if (count >= 2) {
+		OUT_RING(CCE_PACKET0(R128_AUX2_SC_LEFT, 3));
+		OUT_RING(boxes[1].x1);
+		OUT_RING(boxes[1].x2 - 1);
+		OUT_RING(boxes[1].y1);
+		OUT_RING(boxes[1].y2 - 1);
 
 		aux_sc_cntl |= (R128_AUX2_SC_EN | R128_AUX2_SC_MODE_OR);
 	}
-	if ( count >= 3 ) {
-		OUT_RING( CCE_PACKET0( R128_AUX3_SC_LEFT, 3 ) );
-		OUT_RING( boxes[2].x1 );
-		OUT_RING( boxes[2].x2 - 1 );
-		OUT_RING( boxes[2].y1 );
-		OUT_RING( boxes[2].y2 - 1 );
+	if (count >= 3) {
+		OUT_RING(CCE_PACKET0(R128_AUX3_SC_LEFT, 3));
+		OUT_RING(boxes[2].x1);
+		OUT_RING(boxes[2].x2 - 1);
+		OUT_RING(boxes[2].y1);
+		OUT_RING(boxes[2].y2 - 1);
 
 		aux_sc_cntl |= (R128_AUX3_SC_EN | R128_AUX3_SC_MODE_OR);
 	}
 
-	OUT_RING( CCE_PACKET0( R128_AUX_SC_CNTL, 0 ) );
-	OUT_RING( aux_sc_cntl );
+	OUT_RING(CCE_PACKET0(R128_AUX_SC_CNTL, 0));
+	OUT_RING(aux_sc_cntl);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_core( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_core(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	OUT_RING( CCE_PACKET0( R128_SCALE_3D_CNTL, 0 ) );
-	OUT_RING( ctx->scale_3d_cntl );
+	OUT_RING(CCE_PACKET0(R128_SCALE_3D_CNTL, 0));
+	OUT_RING(ctx->scale_3d_cntl);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_context( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_context(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
-
-	BEGIN_RING( 13 );
-
-	OUT_RING( CCE_PACKET0( R128_DST_PITCH_OFFSET_C, 11 ) );
-	OUT_RING( ctx->dst_pitch_offset_c );
-	OUT_RING( ctx->dp_gui_master_cntl_c );
-	OUT_RING( ctx->sc_top_left_c );
-	OUT_RING( ctx->sc_bottom_right_c );
-	OUT_RING( ctx->z_offset_c );
-	OUT_RING( ctx->z_pitch_c );
-	OUT_RING( ctx->z_sten_cntl_c );
-	OUT_RING( ctx->tex_cntl_c );
-	OUT_RING( ctx->misc_3d_state_cntl_reg );
-	OUT_RING( ctx->texture_clr_cmp_clr_c );
-	OUT_RING( ctx->texture_clr_cmp_msk_c );
-	OUT_RING( ctx->fog_color_c );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
+
+	BEGIN_RING(13);
+
+	OUT_RING(CCE_PACKET0(R128_DST_PITCH_OFFSET_C, 11));
+	OUT_RING(ctx->dst_pitch_offset_c);
+	OUT_RING(ctx->dp_gui_master_cntl_c);
+	OUT_RING(ctx->sc_top_left_c);
+	OUT_RING(ctx->sc_bottom_right_c);
+	OUT_RING(ctx->z_offset_c);
+	OUT_RING(ctx->z_pitch_c);
+	OUT_RING(ctx->z_sten_cntl_c);
+	OUT_RING(ctx->tex_cntl_c);
+	OUT_RING(ctx->misc_3d_state_cntl_reg);
+	OUT_RING(ctx->texture_clr_cmp_clr_c);
+	OUT_RING(ctx->texture_clr_cmp_msk_c);
+	OUT_RING(ctx->fog_color_c);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_setup( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_setup(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( 3 );
+	BEGIN_RING(3);
 
-	OUT_RING( CCE_PACKET1( R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP ) );
-	OUT_RING( ctx->setup_cntl );
-	OUT_RING( ctx->pm4_vc_fpu_setup );
+	OUT_RING(CCE_PACKET1(R128_SETUP_CNTL, R128_PM4_VC_FPU_SETUP));
+	OUT_RING(ctx->setup_cntl);
+	OUT_RING(ctx->pm4_vc_fpu_setup);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_masks( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_masks(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( 5 );
+	BEGIN_RING(5);
 
-	OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) );
-	OUT_RING( ctx->dp_write_mask );
+	OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
+	OUT_RING(ctx->dp_write_mask);
 
-	OUT_RING( CCE_PACKET0( R128_STEN_REF_MASK_C, 1 ) );
-	OUT_RING( ctx->sten_ref_mask_c );
-	OUT_RING( ctx->plane_3d_mask_c );
+	OUT_RING(CCE_PACKET0(R128_STEN_REF_MASK_C, 1));
+	OUT_RING(ctx->sten_ref_mask_c);
+	OUT_RING(ctx->plane_3d_mask_c);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_window( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_window(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	OUT_RING( CCE_PACKET0( R128_WINDOW_XY_OFFSET, 0 ) );
-	OUT_RING( ctx->window_xy_offset );
+	OUT_RING(CCE_PACKET0(R128_WINDOW_XY_OFFSET, 0));
+	OUT_RING(ctx->window_xy_offset);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_tex0( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_tex0(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_context_regs_t *ctx = &sarea_priv->context_state;
 	drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[0];
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( 7 + R128_MAX_TEXTURE_LEVELS );
+	BEGIN_RING(7 + R128_MAX_TEXTURE_LEVELS);
 
-	OUT_RING( CCE_PACKET0( R128_PRIM_TEX_CNTL_C,
-			       2 + R128_MAX_TEXTURE_LEVELS ) );
-	OUT_RING( tex->tex_cntl );
-	OUT_RING( tex->tex_combine_cntl );
-	OUT_RING( ctx->tex_size_pitch_c );
-	for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) {
-		OUT_RING( tex->tex_offset[i] );
+	OUT_RING(CCE_PACKET0(R128_PRIM_TEX_CNTL_C,
+			     2 + R128_MAX_TEXTURE_LEVELS));
+	OUT_RING(tex->tex_cntl);
+	OUT_RING(tex->tex_combine_cntl);
+	OUT_RING(ctx->tex_size_pitch_c);
+	for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) {
+		OUT_RING(tex->tex_offset[i]);
 	}
 
-	OUT_RING( CCE_PACKET0( R128_CONSTANT_COLOR_C, 1 ) );
-	OUT_RING( ctx->constant_color_c );
-	OUT_RING( tex->tex_border_color );
+	OUT_RING(CCE_PACKET0(R128_CONSTANT_COLOR_C, 1));
+	OUT_RING(ctx->constant_color_c);
+	OUT_RING(tex->tex_border_color);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_tex1( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_tex1(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_texture_regs_t *tex = &sarea_priv->tex_state[1];
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "    %s\n", __FUNCTION__ );
+	DRM_DEBUG("    %s\n", __FUNCTION__);
 
-	BEGIN_RING( 5 + R128_MAX_TEXTURE_LEVELS );
+	BEGIN_RING(5 + R128_MAX_TEXTURE_LEVELS);
 
-	OUT_RING( CCE_PACKET0( R128_SEC_TEX_CNTL_C,
-			       1 + R128_MAX_TEXTURE_LEVELS ) );
-	OUT_RING( tex->tex_cntl );
-	OUT_RING( tex->tex_combine_cntl );
-	for ( i = 0 ; i < R128_MAX_TEXTURE_LEVELS ; i++ ) {
-		OUT_RING( tex->tex_offset[i] );
+	OUT_RING(CCE_PACKET0(R128_SEC_TEX_CNTL_C, 1 + R128_MAX_TEXTURE_LEVELS));
+	OUT_RING(tex->tex_cntl);
+	OUT_RING(tex->tex_combine_cntl);
+	for (i = 0; i < R128_MAX_TEXTURE_LEVELS; i++) {
+		OUT_RING(tex->tex_offset[i]);
 	}
 
-	OUT_RING( CCE_PACKET0( R128_SEC_TEXTURE_BORDER_COLOR_C, 0 ) );
-	OUT_RING( tex->tex_border_color );
+	OUT_RING(CCE_PACKET0(R128_SEC_TEXTURE_BORDER_COLOR_C, 0));
+	OUT_RING(tex->tex_border_color);
 
 	ADVANCE_RING();
 }
 
-static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv )
+static __inline__ void r128_emit_state(drm_r128_private_t * dev_priv)
 {
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	unsigned int dirty = sarea_priv->dirty;
 
-	DRM_DEBUG( "%s: dirty=0x%08x\n", __FUNCTION__, dirty );
+	DRM_DEBUG("%s: dirty=0x%08x\n", __FUNCTION__, dirty);
 
-	if ( dirty & R128_UPLOAD_CORE ) {
-		r128_emit_core( dev_priv );
+	if (dirty & R128_UPLOAD_CORE) {
+		r128_emit_core(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_CORE;
 	}
 
-	if ( dirty & R128_UPLOAD_CONTEXT ) {
-		r128_emit_context( dev_priv );
+	if (dirty & R128_UPLOAD_CONTEXT) {
+		r128_emit_context(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_CONTEXT;
 	}
 
-	if ( dirty & R128_UPLOAD_SETUP ) {
-		r128_emit_setup( dev_priv );
+	if (dirty & R128_UPLOAD_SETUP) {
+		r128_emit_setup(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_SETUP;
 	}
 
-	if ( dirty & R128_UPLOAD_MASKS ) {
-		r128_emit_masks( dev_priv );
+	if (dirty & R128_UPLOAD_MASKS) {
+		r128_emit_masks(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_MASKS;
 	}
 
-	if ( dirty & R128_UPLOAD_WINDOW ) {
-		r128_emit_window( dev_priv );
+	if (dirty & R128_UPLOAD_WINDOW) {
+		r128_emit_window(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_WINDOW;
 	}
 
-	if ( dirty & R128_UPLOAD_TEX0 ) {
-		r128_emit_tex0( dev_priv );
+	if (dirty & R128_UPLOAD_TEX0) {
+		r128_emit_tex0(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_TEX0;
 	}
 
-	if ( dirty & R128_UPLOAD_TEX1 ) {
-		r128_emit_tex1( dev_priv );
+	if (dirty & R128_UPLOAD_TEX1) {
+		r128_emit_tex1(dev_priv);
 		sarea_priv->dirty &= ~R128_UPLOAD_TEX1;
 	}
 
@@ -273,26 +270,23 @@ static __inline__ void r128_emit_state( drm_r128_private_t *dev_priv )
 	sarea_priv->dirty &= ~R128_REQUIRE_QUIESCENCE;
 }
 
-
 #if R128_PERFORMANCE_BOXES
 /* ================================================================
  * Performance monitoring functions
  */
 
-static void r128_clear_box( drm_r128_private_t *dev_priv,
-			    int x, int y, int w, int h,
-			    int r, int g, int b )
+static void r128_clear_box(drm_r128_private_t * dev_priv,
+			   int x, int y, int w, int h, int r, int g, int b)
 {
 	u32 pitch, offset;
 	u32 fb_bpp, color;
 	RING_LOCALS;
 
-	switch ( dev_priv->fb_bpp ) {
+	switch (dev_priv->fb_bpp) {
 	case 16:
 		fb_bpp = R128_GMC_DST_16BPP;
 		color = (((r & 0xf8) << 8) |
-			 ((g & 0xfc) << 3) |
-			 ((b & 0xf8) >> 3));
+			 ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
 		break;
 	case 24:
 		fb_bpp = R128_GMC_DST_24BPP;
@@ -300,7 +294,7 @@ static void r128_clear_box( drm_r128_private_t *dev_priv,
 		break;
 	case 32:
 		fb_bpp = R128_GMC_DST_32BPP;
-		color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
+		color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
 		break;
 	default:
 		return;
@@ -309,60 +303,58 @@ static void r128_clear_box( drm_r128_private_t *dev_priv,
 	offset = dev_priv->back_offset;
 	pitch = dev_priv->back_pitch >> 3;
 
-	BEGIN_RING( 6 );
+	BEGIN_RING(6);
 
-	OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-	OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-		  R128_GMC_BRUSH_SOLID_COLOR |
-		  fb_bpp |
-		  R128_GMC_SRC_DATATYPE_COLOR |
-		  R128_ROP3_P |
-		  R128_GMC_CLR_CMP_CNTL_DIS |
-		  R128_GMC_AUX_CLIP_DIS );
+	OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+	OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+		 R128_GMC_BRUSH_SOLID_COLOR |
+		 fb_bpp |
+		 R128_GMC_SRC_DATATYPE_COLOR |
+		 R128_ROP3_P |
+		 R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_AUX_CLIP_DIS);
 
-	OUT_RING( (pitch << 21) | (offset >> 5) );
-	OUT_RING( color );
+	OUT_RING((pitch << 21) | (offset >> 5));
+	OUT_RING(color);
 
-	OUT_RING( (x << 16) | y );
-	OUT_RING( (w << 16) | h );
+	OUT_RING((x << 16) | y);
+	OUT_RING((w << 16) | h);
 
 	ADVANCE_RING();
 }
 
-static void r128_cce_performance_boxes( drm_r128_private_t *dev_priv )
+static void r128_cce_performance_boxes(drm_r128_private_t * dev_priv)
 {
-	if ( atomic_read( &dev_priv->idle_count ) == 0 ) {
-		r128_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 );
+	if (atomic_read(&dev_priv->idle_count) == 0) {
+		r128_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
 	} else {
-		atomic_set( &dev_priv->idle_count, 0 );
+		atomic_set(&dev_priv->idle_count, 0);
 	}
 }
 
 #endif
 
-
 /* ================================================================
  * CCE command dispatch functions
  */
 
-static void r128_print_dirty( const char *msg, unsigned int flags )
+static void r128_print_dirty(const char *msg, unsigned int flags)
 {
-	DRM_INFO( "%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
-		  msg,
-		  flags,
-		  (flags & R128_UPLOAD_CORE)        ? "core, " : "",
-		  (flags & R128_UPLOAD_CONTEXT)     ? "context, " : "",
-		  (flags & R128_UPLOAD_SETUP)       ? "setup, " : "",
-		  (flags & R128_UPLOAD_TEX0)        ? "tex0, " : "",
-		  (flags & R128_UPLOAD_TEX1)        ? "tex1, " : "",
-		  (flags & R128_UPLOAD_MASKS)       ? "masks, " : "",
-		  (flags & R128_UPLOAD_WINDOW)      ? "window, " : "",
-		  (flags & R128_UPLOAD_CLIPRECTS)   ? "cliprects, " : "",
-		  (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "" );
+	DRM_INFO("%s: (0x%x) %s%s%s%s%s%s%s%s%s\n",
+		 msg,
+		 flags,
+		 (flags & R128_UPLOAD_CORE) ? "core, " : "",
+		 (flags & R128_UPLOAD_CONTEXT) ? "context, " : "",
+		 (flags & R128_UPLOAD_SETUP) ? "setup, " : "",
+		 (flags & R128_UPLOAD_TEX0) ? "tex0, " : "",
+		 (flags & R128_UPLOAD_TEX1) ? "tex1, " : "",
+		 (flags & R128_UPLOAD_MASKS) ? "masks, " : "",
+		 (flags & R128_UPLOAD_WINDOW) ? "window, " : "",
+		 (flags & R128_UPLOAD_CLIPRECTS) ? "cliprects, " : "",
+		 (flags & R128_REQUIRE_QUIESCENCE) ? "quiescence, " : "");
 }
 
-static void r128_cce_dispatch_clear( drm_device_t *dev,
-				     drm_r128_clear_t *clear )
+static void r128_cce_dispatch_clear(drm_device_t * dev,
+				    drm_r128_clear_t * clear)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -371,102 +363,103 @@ static void r128_cce_dispatch_clear( drm_device_t *dev,
 	unsigned int flags = clear->flags;
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
+	if (dev_priv->page_flipping && dev_priv->current_page == 1) {
 		unsigned int tmp = flags;
 
 		flags &= ~(R128_FRONT | R128_BACK);
-		if ( tmp & R128_FRONT ) flags |= R128_BACK;
-		if ( tmp & R128_BACK )  flags |= R128_FRONT;
+		if (tmp & R128_FRONT)
+			flags |= R128_BACK;
+		if (tmp & R128_BACK)
+			flags |= R128_FRONT;
 	}
 
-	for ( i = 0 ; i < nbox ; i++ ) {
+	for (i = 0; i < nbox; i++) {
 		int x = pbox[i].x1;
 		int y = pbox[i].y1;
 		int w = pbox[i].x2 - x;
 		int h = pbox[i].y2 - y;
 
-		DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n",
-			   pbox[i].x1, pbox[i].y1, pbox[i].x2,
-			   pbox[i].y2, flags );
+		DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n",
+			  pbox[i].x1, pbox[i].y1, pbox[i].x2,
+			  pbox[i].y2, flags);
 
-		if ( flags & (R128_FRONT | R128_BACK) ) {
-			BEGIN_RING( 2 );
+		if (flags & (R128_FRONT | R128_BACK)) {
+			BEGIN_RING(2);
 
-			OUT_RING( CCE_PACKET0( R128_DP_WRITE_MASK, 0 ) );
-			OUT_RING( clear->color_mask );
+			OUT_RING(CCE_PACKET0(R128_DP_WRITE_MASK, 0));
+			OUT_RING(clear->color_mask);
 
 			ADVANCE_RING();
 		}
 
-		if ( flags & R128_FRONT ) {
-			BEGIN_RING( 6 );
+		if (flags & R128_FRONT) {
+			BEGIN_RING(6);
 
-			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-				  R128_GMC_BRUSH_SOLID_COLOR |
-				  (dev_priv->color_fmt << 8) |
-				  R128_GMC_SRC_DATATYPE_COLOR |
-				  R128_ROP3_P |
-				  R128_GMC_CLR_CMP_CNTL_DIS |
-				  R128_GMC_AUX_CLIP_DIS );
+			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+				 R128_GMC_BRUSH_SOLID_COLOR |
+				 (dev_priv->color_fmt << 8) |
+				 R128_GMC_SRC_DATATYPE_COLOR |
+				 R128_ROP3_P |
+				 R128_GMC_CLR_CMP_CNTL_DIS |
+				 R128_GMC_AUX_CLIP_DIS);
 
-			OUT_RING( dev_priv->front_pitch_offset_c );
-			OUT_RING( clear->clear_color );
+			OUT_RING(dev_priv->front_pitch_offset_c);
+			OUT_RING(clear->clear_color);
 
-			OUT_RING( (x << 16) | y );
-			OUT_RING( (w << 16) | h );
+			OUT_RING((x << 16) | y);
+			OUT_RING((w << 16) | h);
 
 			ADVANCE_RING();
 		}
 
-		if ( flags & R128_BACK ) {
-			BEGIN_RING( 6 );
+		if (flags & R128_BACK) {
+			BEGIN_RING(6);
 
-			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-				  R128_GMC_BRUSH_SOLID_COLOR |
-				  (dev_priv->color_fmt << 8) |
-				  R128_GMC_SRC_DATATYPE_COLOR |
-				  R128_ROP3_P |
-				  R128_GMC_CLR_CMP_CNTL_DIS |
-				  R128_GMC_AUX_CLIP_DIS );
+			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+				 R128_GMC_BRUSH_SOLID_COLOR |
+				 (dev_priv->color_fmt << 8) |
+				 R128_GMC_SRC_DATATYPE_COLOR |
+				 R128_ROP3_P |
+				 R128_GMC_CLR_CMP_CNTL_DIS |
+				 R128_GMC_AUX_CLIP_DIS);
 
-			OUT_RING( dev_priv->back_pitch_offset_c );
-			OUT_RING( clear->clear_color );
+			OUT_RING(dev_priv->back_pitch_offset_c);
+			OUT_RING(clear->clear_color);
 
-			OUT_RING( (x << 16) | y );
-			OUT_RING( (w << 16) | h );
+			OUT_RING((x << 16) | y);
+			OUT_RING((w << 16) | h);
 
 			ADVANCE_RING();
 		}
 
-		if ( flags & R128_DEPTH ) {
-			BEGIN_RING( 6 );
+		if (flags & R128_DEPTH) {
+			BEGIN_RING(6);
 
-			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-				  R128_GMC_BRUSH_SOLID_COLOR |
-				  (dev_priv->depth_fmt << 8) |
-				  R128_GMC_SRC_DATATYPE_COLOR |
-				  R128_ROP3_P |
-				  R128_GMC_CLR_CMP_CNTL_DIS |
-				  R128_GMC_AUX_CLIP_DIS |
-				  R128_GMC_WR_MSK_DIS );
+			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+				 R128_GMC_BRUSH_SOLID_COLOR |
+				 (dev_priv->depth_fmt << 8) |
+				 R128_GMC_SRC_DATATYPE_COLOR |
+				 R128_ROP3_P |
+				 R128_GMC_CLR_CMP_CNTL_DIS |
+				 R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS);
 
-			OUT_RING( dev_priv->depth_pitch_offset_c );
-			OUT_RING( clear->clear_depth );
+			OUT_RING(dev_priv->depth_pitch_offset_c);
+			OUT_RING(clear->clear_depth);
 
-			OUT_RING( (x << 16) | y );
-			OUT_RING( (w << 16) | h );
+			OUT_RING((x << 16) | y);
+			OUT_RING((w << 16) | h);
 
 			ADVANCE_RING();
 		}
 	}
 }
 
-static void r128_cce_dispatch_swap( drm_device_t *dev )
+static void r128_cce_dispatch_swap(drm_device_t * dev)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -474,48 +467,46 @@ static void r128_cce_dispatch_swap( drm_device_t *dev )
 	drm_clip_rect_t *pbox = sarea_priv->boxes;
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 #if R128_PERFORMANCE_BOXES
 	/* Do some trivial performance monitoring...
 	 */
-	r128_cce_performance_boxes( dev_priv );
+	r128_cce_performance_boxes(dev_priv);
 #endif
 
-	for ( i = 0 ; i < nbox ; i++ ) {
+	for (i = 0; i < nbox; i++) {
 		int x = pbox[i].x1;
 		int y = pbox[i].y1;
 		int w = pbox[i].x2 - x;
 		int h = pbox[i].y2 - y;
 
-		BEGIN_RING( 7 );
+		BEGIN_RING(7);
 
-		OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) );
-		OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
-			  R128_GMC_DST_PITCH_OFFSET_CNTL |
-			  R128_GMC_BRUSH_NONE |
-			  (dev_priv->color_fmt << 8) |
-			  R128_GMC_SRC_DATATYPE_COLOR |
-			  R128_ROP3_S |
-			  R128_DP_SRC_SOURCE_MEMORY |
-			  R128_GMC_CLR_CMP_CNTL_DIS |
-			  R128_GMC_AUX_CLIP_DIS |
-			  R128_GMC_WR_MSK_DIS );
+		OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
+		OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
+			 R128_GMC_DST_PITCH_OFFSET_CNTL |
+			 R128_GMC_BRUSH_NONE |
+			 (dev_priv->color_fmt << 8) |
+			 R128_GMC_SRC_DATATYPE_COLOR |
+			 R128_ROP3_S |
+			 R128_DP_SRC_SOURCE_MEMORY |
+			 R128_GMC_CLR_CMP_CNTL_DIS |
+			 R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS);
 
 		/* Make this work even if front & back are flipped:
 		 */
 		if (dev_priv->current_page == 0) {
-			OUT_RING( dev_priv->back_pitch_offset_c );
-			OUT_RING( dev_priv->front_pitch_offset_c );
-		} 
-		else {
-			OUT_RING( dev_priv->front_pitch_offset_c );
-			OUT_RING( dev_priv->back_pitch_offset_c );
+			OUT_RING(dev_priv->back_pitch_offset_c);
+			OUT_RING(dev_priv->front_pitch_offset_c);
+		} else {
+			OUT_RING(dev_priv->front_pitch_offset_c);
+			OUT_RING(dev_priv->back_pitch_offset_c);
 		}
 
-		OUT_RING( (x << 16) | y );
-		OUT_RING( (x << 16) | y );
-		OUT_RING( (w << 16) | h );
+		OUT_RING((x << 16) | y);
+		OUT_RING((x << 16) | y);
+		OUT_RING((w << 16) | h);
 
 		ADVANCE_RING();
 	}
@@ -526,38 +517,37 @@ static void r128_cce_dispatch_swap( drm_device_t *dev )
 	 */
 	dev_priv->sarea_priv->last_frame++;
 
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) );
-	OUT_RING( dev_priv->sarea_priv->last_frame );
+	OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0));
+	OUT_RING(dev_priv->sarea_priv->last_frame);
 
 	ADVANCE_RING();
 }
 
-static void r128_cce_dispatch_flip( drm_device_t *dev )
+static void r128_cce_dispatch_flip(drm_device_t * dev)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	RING_LOCALS;
-	DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n", 
-		__FUNCTION__,
-		dev_priv->current_page,
-		dev_priv->sarea_priv->pfCurrentPage);
+	DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
+		  __FUNCTION__,
+		  dev_priv->current_page, dev_priv->sarea_priv->pfCurrentPage);
 
 #if R128_PERFORMANCE_BOXES
 	/* Do some trivial performance monitoring...
 	 */
-	r128_cce_performance_boxes( dev_priv );
+	r128_cce_performance_boxes(dev_priv);
 #endif
 
-	BEGIN_RING( 4 );
+	BEGIN_RING(4);
 
 	R128_WAIT_UNTIL_PAGE_FLIPPED();
-	OUT_RING( CCE_PACKET0( R128_CRTC_OFFSET, 0 ) );
+	OUT_RING(CCE_PACKET0(R128_CRTC_OFFSET, 0));
 
-	if ( dev_priv->current_page == 0 ) {
-		OUT_RING( dev_priv->back_offset );
+	if (dev_priv->current_page == 0) {
+		OUT_RING(dev_priv->back_offset);
 	} else {
-		OUT_RING( dev_priv->front_offset );
+		OUT_RING(dev_priv->front_offset);
 	}
 
 	ADVANCE_RING();
@@ -568,18 +558,17 @@ static void r128_cce_dispatch_flip( drm_device_t *dev )
 	 */
 	dev_priv->sarea_priv->last_frame++;
 	dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page =
-					      1 - dev_priv->current_page;
+	    1 - dev_priv->current_page;
 
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	OUT_RING( CCE_PACKET0( R128_LAST_FRAME_REG, 0 ) );
-	OUT_RING( dev_priv->sarea_priv->last_frame );
+	OUT_RING(CCE_PACKET0(R128_LAST_FRAME_REG, 0));
+	OUT_RING(dev_priv->sarea_priv->last_frame);
 
 	ADVANCE_RING();
 }
 
-static void r128_cce_dispatch_vertex( drm_device_t *dev,
-				      drm_buf_t *buf )
+static void r128_cce_dispatch_vertex(drm_device_t * dev, drm_buf_t * buf)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_buf_priv_t *buf_priv = buf->dev_private;
@@ -590,50 +579,50 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
 	int prim = buf_priv->prim;
 	int i = 0;
 	RING_LOCALS;
-	DRM_DEBUG( "buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox );
+	DRM_DEBUG("buf=%d nbox=%d\n", buf->idx, sarea_priv->nbox);
 
-	if ( 0 )
-		r128_print_dirty( "dispatch_vertex", sarea_priv->dirty );
+	if (0)
+		r128_print_dirty("dispatch_vertex", sarea_priv->dirty);
 
-	if ( buf->used ) {
+	if (buf->used) {
 		buf_priv->dispatched = 1;
 
-		if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) {
-			r128_emit_state( dev_priv );
+		if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) {
+			r128_emit_state(dev_priv);
 		}
 
 		do {
 			/* Emit the next set of up to three cliprects */
-			if ( i < sarea_priv->nbox ) {
-				r128_emit_clip_rects( dev_priv,
-						      &sarea_priv->boxes[i],
-						      sarea_priv->nbox - i );
+			if (i < sarea_priv->nbox) {
+				r128_emit_clip_rects(dev_priv,
+						     &sarea_priv->boxes[i],
+						     sarea_priv->nbox - i);
 			}
 
 			/* Emit the vertex buffer rendering commands */
-			BEGIN_RING( 5 );
+			BEGIN_RING(5);
 
-			OUT_RING( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM, 3 ) );
-			OUT_RING( offset );
-			OUT_RING( size );
-			OUT_RING( format );
-			OUT_RING( prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST |
-				  (size << R128_CCE_VC_CNTL_NUM_SHIFT) );
+			OUT_RING(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM, 3));
+			OUT_RING(offset);
+			OUT_RING(size);
+			OUT_RING(format);
+			OUT_RING(prim | R128_CCE_VC_CNTL_PRIM_WALK_LIST |
+				 (size << R128_CCE_VC_CNTL_NUM_SHIFT));
 
 			ADVANCE_RING();
 
 			i += 3;
-		} while ( i < sarea_priv->nbox );
+		} while (i < sarea_priv->nbox);
 	}
 
-	if ( buf_priv->discard ) {
+	if (buf_priv->discard) {
 		buf_priv->age = dev_priv->sarea_priv->last_dispatch;
 
 		/* Emit the vertex buffer age */
-		BEGIN_RING( 2 );
+		BEGIN_RING(2);
 
-		OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) );
-		OUT_RING( buf_priv->age );
+		OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
+		OUT_RING(buf_priv->age);
 
 		ADVANCE_RING();
 
@@ -649,17 +638,15 @@ static void r128_cce_dispatch_vertex( drm_device_t *dev,
 	sarea_priv->nbox = 0;
 }
 
-static void r128_cce_dispatch_indirect( drm_device_t *dev,
-					drm_buf_t *buf,
-					int start, int end )
+static void r128_cce_dispatch_indirect(drm_device_t * dev,
+				       drm_buf_t * buf, int start, int end)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_buf_priv_t *buf_priv = buf->dev_private;
 	RING_LOCALS;
-	DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n",
-		   buf->idx, start, end );
+	DRM_DEBUG("indirect: buf=%d s=0x%x e=0x%x\n", buf->idx, start, end);
 
-	if ( start != end ) {
+	if (start != end) {
 		int offset = buf->bus_address + start;
 		int dwords = (end - start + 3) / sizeof(u32);
 
@@ -667,33 +654,33 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
 		 * dwords, so if we've been given an odd number we must
 		 * pad the data with a Type-2 CCE packet.
 		 */
-		if ( dwords & 1 ) {
+		if (dwords & 1) {
 			u32 *data = (u32 *)
-				((char *)dev_priv->buffers->handle
-				 + buf->offset + start);
-			data[dwords++] = cpu_to_le32( R128_CCE_PACKET2 );
+			    ((char *)dev->agp_buffer_map->handle
+			     + buf->offset + start);
+			data[dwords++] = cpu_to_le32(R128_CCE_PACKET2);
 		}
 
 		buf_priv->dispatched = 1;
 
 		/* Fire off the indirect buffer */
-		BEGIN_RING( 3 );
+		BEGIN_RING(3);
 
-		OUT_RING( CCE_PACKET0( R128_PM4_IW_INDOFF, 1 ) );
-		OUT_RING( offset );
-		OUT_RING( dwords );
+		OUT_RING(CCE_PACKET0(R128_PM4_IW_INDOFF, 1));
+		OUT_RING(offset);
+		OUT_RING(dwords);
 
 		ADVANCE_RING();
 	}
 
-	if ( buf_priv->discard ) {
+	if (buf_priv->discard) {
 		buf_priv->age = dev_priv->sarea_priv->last_dispatch;
 
 		/* Emit the indirect buffer age */
-		BEGIN_RING( 2 );
+		BEGIN_RING(2);
 
-		OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) );
-		OUT_RING( buf_priv->age );
+		OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
+		OUT_RING(buf_priv->age);
 
 		ADVANCE_RING();
 
@@ -706,77 +693,76 @@ static void r128_cce_dispatch_indirect( drm_device_t *dev,
 	dev_priv->sarea_priv->last_dispatch++;
 }
 
-static void r128_cce_dispatch_indices( drm_device_t *dev,
-				       drm_buf_t *buf,
-				       int start, int end,
-				       int count )
+static void r128_cce_dispatch_indices(drm_device_t * dev,
+				      drm_buf_t * buf,
+				      int start, int end, int count)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_buf_priv_t *buf_priv = buf->dev_private;
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	int format = sarea_priv->vc_format;
-	int offset = dev_priv->buffers->offset - dev_priv->cce_buffers_offset;
+	int offset = dev->agp_buffer_map->offset - dev_priv->cce_buffers_offset;
 	int prim = buf_priv->prim;
 	u32 *data;
 	int dwords;
 	int i = 0;
 	RING_LOCALS;
-	DRM_DEBUG( "indices: s=%d e=%d c=%d\n", start, end, count );
+	DRM_DEBUG("indices: s=%d e=%d c=%d\n", start, end, count);
 
-	if ( 0 )
-		r128_print_dirty( "dispatch_indices", sarea_priv->dirty );
+	if (0)
+		r128_print_dirty("dispatch_indices", sarea_priv->dirty);
 
-	if ( start != end ) {
+	if (start != end) {
 		buf_priv->dispatched = 1;
 
-		if ( sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS ) {
-			r128_emit_state( dev_priv );
+		if (sarea_priv->dirty & ~R128_UPLOAD_CLIPRECTS) {
+			r128_emit_state(dev_priv);
 		}
 
 		dwords = (end - start + 3) / sizeof(u32);
 
-		data = (u32 *)((char *)dev_priv->buffers->handle
-			       + buf->offset + start);
+		data = (u32 *) ((char *)dev->agp_buffer_map->handle
+				+ buf->offset + start);
 
-		data[0] = cpu_to_le32( CCE_PACKET3( R128_3D_RNDR_GEN_INDX_PRIM,
-						    dwords-2 ) );
+		data[0] = cpu_to_le32(CCE_PACKET3(R128_3D_RNDR_GEN_INDX_PRIM,
+						  dwords - 2));
 
-		data[1] = cpu_to_le32( offset );
-		data[2] = cpu_to_le32( R128_MAX_VB_VERTS );
-		data[3] = cpu_to_le32( format );
-		data[4] = cpu_to_le32( (prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
-					(count << 16)) );
+		data[1] = cpu_to_le32(offset);
+		data[2] = cpu_to_le32(R128_MAX_VB_VERTS);
+		data[3] = cpu_to_le32(format);
+		data[4] = cpu_to_le32((prim | R128_CCE_VC_CNTL_PRIM_WALK_IND |
+				       (count << 16)));
 
-		if ( count & 0x1 ) {
+		if (count & 0x1) {
 #ifdef __LITTLE_ENDIAN
-			data[dwords-1] &= 0x0000ffff;
+			data[dwords - 1] &= 0x0000ffff;
 #else
-			data[dwords-1] &= 0xffff0000;
+			data[dwords - 1] &= 0xffff0000;
 #endif
 		}
 
 		do {
 			/* Emit the next set of up to three cliprects */
-			if ( i < sarea_priv->nbox ) {
-				r128_emit_clip_rects( dev_priv,
-						      &sarea_priv->boxes[i],
-						      sarea_priv->nbox - i );
+			if (i < sarea_priv->nbox) {
+				r128_emit_clip_rects(dev_priv,
+						     &sarea_priv->boxes[i],
+						     sarea_priv->nbox - i);
 			}
 
-			r128_cce_dispatch_indirect( dev, buf, start, end );
+			r128_cce_dispatch_indirect(dev, buf, start, end);
 
 			i += 3;
-		} while ( i < sarea_priv->nbox );
+		} while (i < sarea_priv->nbox);
 	}
 
-	if ( buf_priv->discard ) {
+	if (buf_priv->discard) {
 		buf_priv->age = dev_priv->sarea_priv->last_dispatch;
 
 		/* Emit the vertex buffer age */
-		BEGIN_RING( 2 );
+		BEGIN_RING(2);
 
-		OUT_RING( CCE_PACKET0( R128_LAST_DISPATCH_REG, 0 ) );
-		OUT_RING( buf_priv->age );
+		OUT_RING(CCE_PACKET0(R128_LAST_DISPATCH_REG, 0));
+		OUT_RING(buf_priv->age);
 
 		ADVANCE_RING();
 
@@ -791,9 +777,8 @@ static void r128_cce_dispatch_indices( drm_device_t *dev,
 	sarea_priv->nbox = 0;
 }
 
-static int r128_cce_dispatch_blit( DRMFILE filp,
-				   drm_device_t *dev,
-				   drm_r128_blit_t *blit )
+static int r128_cce_dispatch_blit(DRMFILE filp,
+				  drm_device_t * dev, drm_r128_blit_t * blit)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_device_dma_t *dma = dev->dma;
@@ -802,13 +787,13 @@ static int r128_cce_dispatch_blit( DRMFILE filp,
 	u32 *data;
 	int dword_shift, dwords;
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	/* The compiler won't optimize away a division by a variable,
 	 * even if the only legal values are powers of two.  Thus, we'll
 	 * use a shift instead.
 	 */
-	switch ( blit->format ) {
+	switch (blit->format) {
 	case R128_DATATYPE_ARGB8888:
 		dword_shift = 0;
 		break;
@@ -824,7 +809,7 @@ static int r128_cce_dispatch_blit( DRMFILE filp,
 		dword_shift = 2;
 		break;
 	default:
-		DRM_ERROR( "invalid blit format %d\n", blit->format );
+		DRM_ERROR("invalid blit format %d\n", blit->format);
 		return DRM_ERR(EINVAL);
 	}
 
@@ -833,10 +818,10 @@ static int r128_cce_dispatch_blit( DRMFILE filp,
 	 * data from the host data blit, otherwise part of the texture
 	 * image may be corrupted.
 	 */
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) );
-	OUT_RING( R128_PC_RI_GUI | R128_PC_FLUSH_GUI );
+	OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0));
+	OUT_RING(R128_PC_RI_GUI | R128_PC_FLUSH_GUI);
 
 	ADVANCE_RING();
 
@@ -845,13 +830,13 @@ static int r128_cce_dispatch_blit( DRMFILE filp,
 	buf = dma->buflist[blit->idx];
 	buf_priv = buf->dev_private;
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", blit->idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", blit->idx);
 		return DRM_ERR(EINVAL);
 	}
 
@@ -859,45 +844,43 @@ static int r128_cce_dispatch_blit( DRMFILE filp,
 
 	dwords = (blit->width * blit->height) >> dword_shift;
 
-	data = (u32 *)((char *)dev_priv->buffers->handle + buf->offset);
-
-	data[0] = cpu_to_le32( CCE_PACKET3( R128_CNTL_HOSTDATA_BLT, dwords + 6 ) );
-	data[1] = cpu_to_le32( (R128_GMC_DST_PITCH_OFFSET_CNTL |
-				R128_GMC_BRUSH_NONE |
-				(blit->format << 8) |
-				R128_GMC_SRC_DATATYPE_COLOR |
-				R128_ROP3_S |
-				R128_DP_SRC_SOURCE_HOST_DATA |
-				R128_GMC_CLR_CMP_CNTL_DIS |
-				R128_GMC_AUX_CLIP_DIS |
-				R128_GMC_WR_MSK_DIS) );
-
-	data[2] = cpu_to_le32( (blit->pitch << 21) | (blit->offset >> 5) );
-	data[3] = cpu_to_le32( 0xffffffff );
-	data[4] = cpu_to_le32( 0xffffffff );
-	data[5] = cpu_to_le32( (blit->y << 16) | blit->x );
-	data[6] = cpu_to_le32( (blit->height << 16) | blit->width );
-	data[7] = cpu_to_le32( dwords );
+	data = (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset);
+
+	data[0] = cpu_to_le32(CCE_PACKET3(R128_CNTL_HOSTDATA_BLT, dwords + 6));
+	data[1] = cpu_to_le32((R128_GMC_DST_PITCH_OFFSET_CNTL |
+			       R128_GMC_BRUSH_NONE |
+			       (blit->format << 8) |
+			       R128_GMC_SRC_DATATYPE_COLOR |
+			       R128_ROP3_S |
+			       R128_DP_SRC_SOURCE_HOST_DATA |
+			       R128_GMC_CLR_CMP_CNTL_DIS |
+			       R128_GMC_AUX_CLIP_DIS | R128_GMC_WR_MSK_DIS));
+
+	data[2] = cpu_to_le32((blit->pitch << 21) | (blit->offset >> 5));
+	data[3] = cpu_to_le32(0xffffffff);
+	data[4] = cpu_to_le32(0xffffffff);
+	data[5] = cpu_to_le32((blit->y << 16) | blit->x);
+	data[6] = cpu_to_le32((blit->height << 16) | blit->width);
+	data[7] = cpu_to_le32(dwords);
 
 	buf->used = (dwords + 8) * sizeof(u32);
 
-	r128_cce_dispatch_indirect( dev, buf, 0, buf->used );
+	r128_cce_dispatch_indirect(dev, buf, 0, buf->used);
 
 	/* Flush the pixel cache after the blit completes.  This ensures
 	 * the texture data is written out to memory before rendering
 	 * continues.
 	 */
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	OUT_RING( CCE_PACKET0( R128_PC_GUI_CTLSTAT, 0 ) );
-	OUT_RING( R128_PC_FLUSH_GUI );
+	OUT_RING(CCE_PACKET0(R128_PC_GUI_CTLSTAT, 0));
+	OUT_RING(R128_PC_FLUSH_GUI);
 
 	ADVANCE_RING();
 
 	return 0;
 }
 
-
 /* ================================================================
  * Tiled depth buffer management
  *
@@ -905,8 +888,8 @@ static int r128_cce_dispatch_blit( DRMFILE filp,
  * have hardware stencil support.
  */
 
-static int r128_cce_dispatch_write_span( drm_device_t *dev,
-					 drm_r128_depth_t *depth )
+static int r128_cce_dispatch_write_span(drm_device_t * dev,
+					drm_r128_depth_t * depth)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	int count, x, y;
@@ -914,95 +897,95 @@ static int r128_cce_dispatch_write_span( drm_device_t *dev,
 	u8 *mask;
 	int i, buffer_size, mask_size;
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	count = depth->n;
 	if (count > 4096 || count <= 0)
 		return DRM_ERR(EMSGSIZE);
 
-	if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) {
+	if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) {
 		return DRM_ERR(EFAULT);
 	}
-	if ( DRM_COPY_FROM_USER( &y, depth->y, sizeof(y) ) ) {
+	if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
 		return DRM_ERR(EFAULT);
 	}
 
 	buffer_size = depth->n * sizeof(u32);
-	buffer = DRM_MALLOC( buffer_size );
-	if ( buffer == NULL )
+	buffer = drm_alloc(buffer_size, DRM_MEM_BUFS);
+	if (buffer == NULL)
 		return DRM_ERR(ENOMEM);
-	if ( DRM_COPY_FROM_USER( buffer, depth->buffer, buffer_size ) ) {
-		DRM_FREE( buffer, buffer_size);
+	if (DRM_COPY_FROM_USER(buffer, depth->buffer, buffer_size)) {
+		drm_free(buffer, buffer_size, DRM_MEM_BUFS);
 		return DRM_ERR(EFAULT);
 	}
 
 	mask_size = depth->n * sizeof(u8);
-	if ( depth->mask ) {
-		mask = DRM_MALLOC( mask_size );
-		if ( mask == NULL ) {
-			DRM_FREE( buffer, buffer_size );
+	if (depth->mask) {
+		mask = drm_alloc(mask_size, DRM_MEM_BUFS);
+		if (mask == NULL) {
+			drm_free(buffer, buffer_size, DRM_MEM_BUFS);
 			return DRM_ERR(ENOMEM);
 		}
-		if ( DRM_COPY_FROM_USER( mask, depth->mask, mask_size ) ) {
-			DRM_FREE( buffer, buffer_size );
-			DRM_FREE( mask, mask_size );
+		if (DRM_COPY_FROM_USER(mask, depth->mask, mask_size)) {
+			drm_free(buffer, buffer_size, DRM_MEM_BUFS);
+			drm_free(mask, mask_size, DRM_MEM_BUFS);
 			return DRM_ERR(EFAULT);
 		}
 
-		for ( i = 0 ; i < count ; i++, x++ ) {
-			if ( mask[i] ) {
-				BEGIN_RING( 6 );
+		for (i = 0; i < count; i++, x++) {
+			if (mask[i]) {
+				BEGIN_RING(6);
 
-				OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-				OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-					  R128_GMC_BRUSH_SOLID_COLOR |
-					  (dev_priv->depth_fmt << 8) |
-					  R128_GMC_SRC_DATATYPE_COLOR |
-					  R128_ROP3_P |
-					  R128_GMC_CLR_CMP_CNTL_DIS |
-					  R128_GMC_WR_MSK_DIS );
+				OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+				OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+					 R128_GMC_BRUSH_SOLID_COLOR |
+					 (dev_priv->depth_fmt << 8) |
+					 R128_GMC_SRC_DATATYPE_COLOR |
+					 R128_ROP3_P |
+					 R128_GMC_CLR_CMP_CNTL_DIS |
+					 R128_GMC_WR_MSK_DIS);
 
-				OUT_RING( dev_priv->depth_pitch_offset_c );
-				OUT_RING( buffer[i] );
+				OUT_RING(dev_priv->depth_pitch_offset_c);
+				OUT_RING(buffer[i]);
 
-				OUT_RING( (x << 16) | y );
-				OUT_RING( (1 << 16) | 1 );
+				OUT_RING((x << 16) | y);
+				OUT_RING((1 << 16) | 1);
 
 				ADVANCE_RING();
 			}
 		}
 
-		DRM_FREE( mask, mask_size );
+		drm_free(mask, mask_size, DRM_MEM_BUFS);
 	} else {
-		for ( i = 0 ; i < count ; i++, x++ ) {
-			BEGIN_RING( 6 );
+		for (i = 0; i < count; i++, x++) {
+			BEGIN_RING(6);
 
-			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-				  R128_GMC_BRUSH_SOLID_COLOR |
-				  (dev_priv->depth_fmt << 8) |
-				  R128_GMC_SRC_DATATYPE_COLOR |
-				  R128_ROP3_P |
-				  R128_GMC_CLR_CMP_CNTL_DIS |
-				  R128_GMC_WR_MSK_DIS );
+			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+				 R128_GMC_BRUSH_SOLID_COLOR |
+				 (dev_priv->depth_fmt << 8) |
+				 R128_GMC_SRC_DATATYPE_COLOR |
+				 R128_ROP3_P |
+				 R128_GMC_CLR_CMP_CNTL_DIS |
+				 R128_GMC_WR_MSK_DIS);
 
-			OUT_RING( dev_priv->depth_pitch_offset_c );
-			OUT_RING( buffer[i] );
+			OUT_RING(dev_priv->depth_pitch_offset_c);
+			OUT_RING(buffer[i]);
 
-			OUT_RING( (x << 16) | y );
-			OUT_RING( (1 << 16) | 1 );
+			OUT_RING((x << 16) | y);
+			OUT_RING((1 << 16) | 1);
 
 			ADVANCE_RING();
 		}
 	}
 
-	DRM_FREE( buffer, buffer_size );
+	drm_free(buffer, buffer_size, DRM_MEM_BUFS);
 
 	return 0;
 }
 
-static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
-					   drm_r128_depth_t *depth )
+static int r128_cce_dispatch_write_pixels(drm_device_t * dev,
+					  drm_r128_depth_t * depth)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	int count, *x, *y;
@@ -1010,7 +993,7 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
 	u8 *mask;
 	int i, xbuf_size, ybuf_size, buffer_size, mask_size;
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	count = depth->n;
 	if (count > 4096 || count <= 0)
@@ -1018,271 +1001,266 @@ static int r128_cce_dispatch_write_pixels( drm_device_t *dev,
 
 	xbuf_size = count * sizeof(*x);
 	ybuf_size = count * sizeof(*y);
-
-	x = DRM_MALLOC( xbuf_size );
-	if ( x == NULL ) {
+	x = drm_alloc(xbuf_size, DRM_MEM_BUFS);
+	if (x == NULL) {
 		return DRM_ERR(ENOMEM);
 	}
-	y = DRM_MALLOC( ybuf_size );
-	if ( y == NULL ) {
-		DRM_FREE( x, xbuf_size );
+	y = drm_alloc(ybuf_size, DRM_MEM_BUFS);
+	if (y == NULL) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(ENOMEM);
 	}
-	if ( DRM_COPY_FROM_USER( x, depth->x, xbuf_size ) ) {
-		DRM_FREE( x, xbuf_size );
-		DRM_FREE( y, ybuf_size );
+	if (DRM_COPY_FROM_USER(x, depth->x, xbuf_size)) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
+		drm_free(y, ybuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(EFAULT);
 	}
-	if ( DRM_COPY_FROM_USER( y, depth->y, xbuf_size ) ) {
-		DRM_FREE( x, xbuf_size );
-		DRM_FREE( y, ybuf_size );
+	if (DRM_COPY_FROM_USER(y, depth->y, xbuf_size)) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
+		drm_free(y, ybuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(EFAULT);
 	}
 
 	buffer_size = depth->n * sizeof(u32);
-	buffer = DRM_MALLOC( buffer_size );
-	if ( buffer == NULL ) {
-		DRM_FREE( x, xbuf_size );
-		DRM_FREE( y, ybuf_size );
+	buffer = drm_alloc(buffer_size, DRM_MEM_BUFS);
+	if (buffer == NULL) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
+		drm_free(y, ybuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(ENOMEM);
 	}
-	if ( DRM_COPY_FROM_USER( buffer, depth->buffer, buffer_size ) ) {
-		DRM_FREE( x, xbuf_size );
-		DRM_FREE( y, ybuf_size );
-		DRM_FREE( buffer, buffer_size );
+	if (DRM_COPY_FROM_USER(buffer, depth->buffer, buffer_size)) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
+		drm_free(y, ybuf_size, DRM_MEM_BUFS);
+		drm_free(buffer, buffer_size, DRM_MEM_BUFS);
 		return DRM_ERR(EFAULT);
 	}
 
-	if ( depth->mask ) {
+	if (depth->mask) {
 		mask_size = depth->n * sizeof(u8);
-		mask = DRM_MALLOC( mask_size );
-		if ( mask == NULL ) {
-			DRM_FREE( x, xbuf_size );
-			DRM_FREE( y, ybuf_size );
-			DRM_FREE( buffer, buffer_size );
+		mask = drm_alloc(mask_size, DRM_MEM_BUFS);
+		if (mask == NULL) {
+			drm_free(x, xbuf_size, DRM_MEM_BUFS);
+			drm_free(y, ybuf_size, DRM_MEM_BUFS);
+			drm_free(buffer, buffer_size, DRM_MEM_BUFS);
 			return DRM_ERR(ENOMEM);
 		}
-		if ( DRM_COPY_FROM_USER( mask, depth->mask, mask_size ) ) {
-			DRM_FREE( x, xbuf_size );
-			DRM_FREE( y, ybuf_size );
-			DRM_FREE( buffer, buffer_size );
-			DRM_FREE( mask, mask_size );
+		if (DRM_COPY_FROM_USER(mask, depth->mask, mask_size)) {
+			drm_free(x, xbuf_size, DRM_MEM_BUFS);
+			drm_free(y, ybuf_size, DRM_MEM_BUFS);
+			drm_free(buffer, buffer_size, DRM_MEM_BUFS);
+			drm_free(mask, mask_size, DRM_MEM_BUFS);
 			return DRM_ERR(EFAULT);
 		}
 
-		for ( i = 0 ; i < count ; i++ ) {
-			if ( mask[i] ) {
-				BEGIN_RING( 6 );
+		for (i = 0; i < count; i++) {
+			if (mask[i]) {
+				BEGIN_RING(6);
 
-				OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-				OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-					  R128_GMC_BRUSH_SOLID_COLOR |
-					  (dev_priv->depth_fmt << 8) |
-					  R128_GMC_SRC_DATATYPE_COLOR |
-					  R128_ROP3_P |
-					  R128_GMC_CLR_CMP_CNTL_DIS |
-					  R128_GMC_WR_MSK_DIS );
+				OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+				OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+					 R128_GMC_BRUSH_SOLID_COLOR |
+					 (dev_priv->depth_fmt << 8) |
+					 R128_GMC_SRC_DATATYPE_COLOR |
+					 R128_ROP3_P |
+					 R128_GMC_CLR_CMP_CNTL_DIS |
+					 R128_GMC_WR_MSK_DIS);
 
-				OUT_RING( dev_priv->depth_pitch_offset_c );
-				OUT_RING( buffer[i] );
+				OUT_RING(dev_priv->depth_pitch_offset_c);
+				OUT_RING(buffer[i]);
 
-				OUT_RING( (x[i] << 16) | y[i] );
-				OUT_RING( (1 << 16) | 1 );
+				OUT_RING((x[i] << 16) | y[i]);
+				OUT_RING((1 << 16) | 1);
 
 				ADVANCE_RING();
 			}
 		}
 
-		DRM_FREE( mask, mask_size );
+		drm_free(mask, mask_size, DRM_MEM_BUFS);
 	} else {
-		for ( i = 0 ; i < count ; i++ ) {
-			BEGIN_RING( 6 );
+		for (i = 0; i < count; i++) {
+			BEGIN_RING(6);
 
-			OUT_RING( CCE_PACKET3( R128_CNTL_PAINT_MULTI, 4 ) );
-			OUT_RING( R128_GMC_DST_PITCH_OFFSET_CNTL |
-				  R128_GMC_BRUSH_SOLID_COLOR |
-				  (dev_priv->depth_fmt << 8) |
-				  R128_GMC_SRC_DATATYPE_COLOR |
-				  R128_ROP3_P |
-				  R128_GMC_CLR_CMP_CNTL_DIS |
-				  R128_GMC_WR_MSK_DIS );
+			OUT_RING(CCE_PACKET3(R128_CNTL_PAINT_MULTI, 4));
+			OUT_RING(R128_GMC_DST_PITCH_OFFSET_CNTL |
+				 R128_GMC_BRUSH_SOLID_COLOR |
+				 (dev_priv->depth_fmt << 8) |
+				 R128_GMC_SRC_DATATYPE_COLOR |
+				 R128_ROP3_P |
+				 R128_GMC_CLR_CMP_CNTL_DIS |
+				 R128_GMC_WR_MSK_DIS);
 
-			OUT_RING( dev_priv->depth_pitch_offset_c );
-			OUT_RING( buffer[i] );
+			OUT_RING(dev_priv->depth_pitch_offset_c);
+			OUT_RING(buffer[i]);
 
-			OUT_RING( (x[i] << 16) | y[i] );
-			OUT_RING( (1 << 16) | 1 );
+			OUT_RING((x[i] << 16) | y[i]);
+			OUT_RING((1 << 16) | 1);
 
 			ADVANCE_RING();
 		}
 	}
 
-	DRM_FREE( x, xbuf_size );
-	DRM_FREE( y, ybuf_size );
-	DRM_FREE( buffer, buffer_size );
+	drm_free(x, xbuf_size, DRM_MEM_BUFS);
+	drm_free(y, ybuf_size, DRM_MEM_BUFS);
+	drm_free(buffer, buffer_size, DRM_MEM_BUFS);
 
 	return 0;
 }
 
-static int r128_cce_dispatch_read_span( drm_device_t *dev,
-					drm_r128_depth_t *depth )
+static int r128_cce_dispatch_read_span(drm_device_t * dev,
+				       drm_r128_depth_t * depth)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	int count, x, y;
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	count = depth->n;
 	if (count > 4096 || count <= 0)
 		return DRM_ERR(EMSGSIZE);
 
-	if ( DRM_COPY_FROM_USER( &x, depth->x, sizeof(x) ) ) {
+	if (DRM_COPY_FROM_USER(&x, depth->x, sizeof(x))) {
 		return DRM_ERR(EFAULT);
 	}
-	if ( DRM_COPY_FROM_USER( &y, depth->y, sizeof(y) ) ) {
+	if (DRM_COPY_FROM_USER(&y, depth->y, sizeof(y))) {
 		return DRM_ERR(EFAULT);
 	}
 
-	BEGIN_RING( 7 );
+	BEGIN_RING(7);
 
-	OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) );
-	OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
-		  R128_GMC_DST_PITCH_OFFSET_CNTL |
-		  R128_GMC_BRUSH_NONE |
-		  (dev_priv->depth_fmt << 8) |
-		  R128_GMC_SRC_DATATYPE_COLOR |
-		  R128_ROP3_S |
-		  R128_DP_SRC_SOURCE_MEMORY |
-		  R128_GMC_CLR_CMP_CNTL_DIS |
-		  R128_GMC_WR_MSK_DIS );
+	OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
+	OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
+		 R128_GMC_DST_PITCH_OFFSET_CNTL |
+		 R128_GMC_BRUSH_NONE |
+		 (dev_priv->depth_fmt << 8) |
+		 R128_GMC_SRC_DATATYPE_COLOR |
+		 R128_ROP3_S |
+		 R128_DP_SRC_SOURCE_MEMORY |
+		 R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_WR_MSK_DIS);
 
-	OUT_RING( dev_priv->depth_pitch_offset_c );
-	OUT_RING( dev_priv->span_pitch_offset_c );
+	OUT_RING(dev_priv->depth_pitch_offset_c);
+	OUT_RING(dev_priv->span_pitch_offset_c);
 
-	OUT_RING( (x << 16) | y );
-	OUT_RING( (0 << 16) | 0 );
-	OUT_RING( (count << 16) | 1 );
+	OUT_RING((x << 16) | y);
+	OUT_RING((0 << 16) | 0);
+	OUT_RING((count << 16) | 1);
 
 	ADVANCE_RING();
 
 	return 0;
 }
 
-static int r128_cce_dispatch_read_pixels( drm_device_t *dev,
-					  drm_r128_depth_t *depth )
+static int r128_cce_dispatch_read_pixels(drm_device_t * dev,
+					 drm_r128_depth_t * depth)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	int count, *x, *y;
 	int i, xbuf_size, ybuf_size;
 	RING_LOCALS;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
 	count = depth->n;
 	if (count > 4096 || count <= 0)
 		return DRM_ERR(EMSGSIZE);
 
-	if ( count > dev_priv->depth_pitch ) {
+	if (count > dev_priv->depth_pitch) {
 		count = dev_priv->depth_pitch;
 	}
 
 	xbuf_size = count * sizeof(*x);
 	ybuf_size = count * sizeof(*y);
-	x = DRM_MALLOC( xbuf_size );
-	if ( x == NULL ) {
+	x = drm_alloc(xbuf_size, DRM_MEM_BUFS);
+	if (x == NULL) {
 		return DRM_ERR(ENOMEM);
 	}
-	y = DRM_MALLOC( ybuf_size );
-	if ( y == NULL ) {
-		DRM_FREE( x, xbuf_size );
+	y = drm_alloc(ybuf_size, DRM_MEM_BUFS);
+	if (y == NULL) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(ENOMEM);
 	}
-	if ( DRM_COPY_FROM_USER( x, depth->x, xbuf_size ) ) {
-		DRM_FREE( x, xbuf_size );
-		DRM_FREE( y, ybuf_size );
+	if (DRM_COPY_FROM_USER(x, depth->x, xbuf_size)) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
+		drm_free(y, ybuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(EFAULT);
 	}
-	if ( DRM_COPY_FROM_USER( y, depth->y, ybuf_size ) ) {
-		DRM_FREE( x, xbuf_size );
-		DRM_FREE( y, ybuf_size );
+	if (DRM_COPY_FROM_USER(y, depth->y, ybuf_size)) {
+		drm_free(x, xbuf_size, DRM_MEM_BUFS);
+		drm_free(y, ybuf_size, DRM_MEM_BUFS);
 		return DRM_ERR(EFAULT);
 	}
 
-	for ( i = 0 ; i < count ; i++ ) {
-		BEGIN_RING( 7 );
+	for (i = 0; i < count; i++) {
+		BEGIN_RING(7);
 
-		OUT_RING( CCE_PACKET3( R128_CNTL_BITBLT_MULTI, 5 ) );
-		OUT_RING( R128_GMC_SRC_PITCH_OFFSET_CNTL |
-			  R128_GMC_DST_PITCH_OFFSET_CNTL |
-			  R128_GMC_BRUSH_NONE |
-			  (dev_priv->depth_fmt << 8) |
-			  R128_GMC_SRC_DATATYPE_COLOR |
-			  R128_ROP3_S |
-			  R128_DP_SRC_SOURCE_MEMORY |
-			  R128_GMC_CLR_CMP_CNTL_DIS |
-			  R128_GMC_WR_MSK_DIS );
+		OUT_RING(CCE_PACKET3(R128_CNTL_BITBLT_MULTI, 5));
+		OUT_RING(R128_GMC_SRC_PITCH_OFFSET_CNTL |
+			 R128_GMC_DST_PITCH_OFFSET_CNTL |
+			 R128_GMC_BRUSH_NONE |
+			 (dev_priv->depth_fmt << 8) |
+			 R128_GMC_SRC_DATATYPE_COLOR |
+			 R128_ROP3_S |
+			 R128_DP_SRC_SOURCE_MEMORY |
+			 R128_GMC_CLR_CMP_CNTL_DIS | R128_GMC_WR_MSK_DIS);
 
-		OUT_RING( dev_priv->depth_pitch_offset_c );
-		OUT_RING( dev_priv->span_pitch_offset_c );
+		OUT_RING(dev_priv->depth_pitch_offset_c);
+		OUT_RING(dev_priv->span_pitch_offset_c);
 
-		OUT_RING( (x[i] << 16) | y[i] );
-		OUT_RING( (i << 16) | 0 );
-		OUT_RING( (1 << 16) | 1 );
+		OUT_RING((x[i] << 16) | y[i]);
+		OUT_RING((i << 16) | 0);
+		OUT_RING((1 << 16) | 1);
 
 		ADVANCE_RING();
 	}
 
-	DRM_FREE( x, xbuf_size );
-	DRM_FREE( y, ybuf_size );
+	drm_free(x, xbuf_size, DRM_MEM_BUFS);
+	drm_free(y, ybuf_size, DRM_MEM_BUFS);
 
 	return 0;
 }
 
-
 /* ================================================================
  * Polygon stipple
  */
 
-static void r128_cce_dispatch_stipple( drm_device_t *dev, u32 *stipple )
+static void r128_cce_dispatch_stipple(drm_device_t * dev, u32 * stipple)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	BEGIN_RING( 33 );
+	BEGIN_RING(33);
 
-	OUT_RING( CCE_PACKET0( R128_BRUSH_DATA0, 31 ) );
-	for ( i = 0 ; i < 32 ; i++ ) {
-		OUT_RING( stipple[i] );
+	OUT_RING(CCE_PACKET0(R128_BRUSH_DATA0, 31));
+	for (i = 0; i < 32; i++) {
+		OUT_RING(stipple[i]);
 	}
 
 	ADVANCE_RING();
 }
 
-
 /* ================================================================
  * IOCTL functions
  */
 
-int r128_cce_clear( DRM_IOCTL_ARGS )
+static int r128_cce_clear(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_r128_clear_t clear;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( clear, (drm_r128_clear_t *) data,
-			     sizeof(clear) );
+	DRM_COPY_FROM_USER_IOCTL(clear, (drm_r128_clear_t __user *) data,
+				 sizeof(clear));
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
 
-	r128_cce_dispatch_clear( dev, &clear );
+	r128_cce_dispatch_clear(dev, &clear);
 	COMMIT_RING();
 
 	/* Make sure we restore the 3D state next time.
@@ -1292,17 +1270,17 @@ int r128_cce_clear( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-static int r128_do_init_pageflip( drm_device_t *dev )
+static int r128_do_init_pageflip(drm_device_t * dev)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	dev_priv->crtc_offset =      R128_READ( R128_CRTC_OFFSET );
-	dev_priv->crtc_offset_cntl = R128_READ( R128_CRTC_OFFSET_CNTL );
+	dev_priv->crtc_offset = R128_READ(R128_CRTC_OFFSET);
+	dev_priv->crtc_offset_cntl = R128_READ(R128_CRTC_OFFSET_CNTL);
 
-	R128_WRITE( R128_CRTC_OFFSET, dev_priv->front_offset );
-	R128_WRITE( R128_CRTC_OFFSET_CNTL,
-		    dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL );
+	R128_WRITE(R128_CRTC_OFFSET, dev_priv->front_offset);
+	R128_WRITE(R128_CRTC_OFFSET_CNTL,
+		   dev_priv->crtc_offset_cntl | R128_CRTC_OFFSET_FLIP_CNTL);
 
 	dev_priv->page_flipping = 1;
 	dev_priv->current_page = 0;
@@ -1311,16 +1289,16 @@ static int r128_do_init_pageflip( drm_device_t *dev )
 	return 0;
 }
 
-int r128_do_cleanup_pageflip( drm_device_t *dev )
+static int r128_do_cleanup_pageflip(drm_device_t * dev)
 {
 	drm_r128_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	R128_WRITE( R128_CRTC_OFFSET,      dev_priv->crtc_offset );
-	R128_WRITE( R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl );
+	R128_WRITE(R128_CRTC_OFFSET, dev_priv->crtc_offset);
+	R128_WRITE(R128_CRTC_OFFSET_CNTL, dev_priv->crtc_offset_cntl);
 
 	if (dev_priv->current_page != 0) {
-		r128_cce_dispatch_flip( dev );
+		r128_cce_dispatch_flip(dev);
 		COMMIT_RING();
 	}
 
@@ -1329,43 +1307,43 @@ int r128_do_cleanup_pageflip( drm_device_t *dev )
 }
 
 /* Swapping and flipping are different operations, need different ioctls.
- * They can & should be intermixed to support multiple 3d windows.  
+ * They can & should be intermixed to support multiple 3d windows.
  */
 
-int r128_cce_flip( DRM_IOCTL_ARGS )
+static int r128_cce_flip(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	if (!dev_priv->page_flipping) 
-		r128_do_init_pageflip( dev );
+	if (!dev_priv->page_flipping)
+		r128_do_init_pageflip(dev);
 
-	r128_cce_dispatch_flip( dev );
+	r128_cce_dispatch_flip(dev);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int r128_cce_swap( DRM_IOCTL_ARGS )
+static int r128_cce_swap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	DRM_DEBUG( "%s\n", __FUNCTION__ );
+	DRM_DEBUG("%s\n", __FUNCTION__);
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	if ( sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > R128_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = R128_NR_SAREA_CLIPRECTS;
 
-	r128_cce_dispatch_swap( dev );
+	r128_cce_dispatch_swap(dev);
 	dev_priv->sarea_priv->dirty |= (R128_UPLOAD_CONTEXT |
 					R128_UPLOAD_MASKS);
 
@@ -1373,7 +1351,7 @@ int r128_cce_swap( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int r128_cce_vertex( DRM_IOCTL_ARGS )
+static int r128_cce_vertex(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
@@ -1382,44 +1360,43 @@ int r128_cce_vertex( DRM_IOCTL_ARGS )
 	drm_r128_buf_priv_t *buf_priv;
 	drm_r128_vertex_t vertex;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_r128_vertex_t *) data,
-			     sizeof(vertex) );
+	DRM_COPY_FROM_USER_IOCTL(vertex, (drm_r128_vertex_t __user *) data,
+				 sizeof(vertex));
 
-	DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n",
-		   DRM_CURRENTPID,
-		   vertex.idx, vertex.count, vertex.discard );
+	DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n",
+		  DRM_CURRENTPID, vertex.idx, vertex.count, vertex.discard);
 
-	if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   vertex.idx, dma->buf_count - 1 );
+	if (vertex.idx < 0 || vertex.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  vertex.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
-	if ( vertex.prim < 0 ||
-	     vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
-		DRM_ERROR( "buffer prim %d\n", vertex.prim );
+	if (vertex.prim < 0 ||
+	    vertex.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) {
+		DRM_ERROR("buffer prim %d\n", vertex.prim);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf = dma->buflist[vertex.idx];
 	buf_priv = buf->dev_private;
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", vertex.idx);
 		return DRM_ERR(EINVAL);
 	}
 
@@ -1427,13 +1404,13 @@ int r128_cce_vertex( DRM_IOCTL_ARGS )
 	buf_priv->prim = vertex.prim;
 	buf_priv->discard = vertex.discard;
 
-	r128_cce_dispatch_vertex( dev, buf );
+	r128_cce_dispatch_vertex(dev, buf);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int r128_cce_indices( DRM_IOCTL_ARGS )
+static int r128_cce_indices(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
@@ -1443,55 +1420,54 @@ int r128_cce_indices( DRM_IOCTL_ARGS )
 	drm_r128_indices_t elts;
 	int count;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( elts, (drm_r128_indices_t *) data,
-			     sizeof(elts) );
+	DRM_COPY_FROM_USER_IOCTL(elts, (drm_r128_indices_t __user *) data,
+				 sizeof(elts));
 
-	DRM_DEBUG( "pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID,
-		   elts.idx, elts.start, elts.end, elts.discard );
+	DRM_DEBUG("pid=%d buf=%d s=%d e=%d d=%d\n", DRM_CURRENTPID,
+		  elts.idx, elts.start, elts.end, elts.discard);
 
-	if ( elts.idx < 0 || elts.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   elts.idx, dma->buf_count - 1 );
+	if (elts.idx < 0 || elts.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  elts.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
-	if ( elts.prim < 0 ||
-	     elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2 ) {
-		DRM_ERROR( "buffer prim %d\n", elts.prim );
+	if (elts.prim < 0 || elts.prim > R128_CCE_VC_CNTL_PRIM_TYPE_TRI_TYPE2) {
+		DRM_ERROR("buffer prim %d\n", elts.prim);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf = dma->buflist[elts.idx];
 	buf_priv = buf->dev_private;
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", elts.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", elts.idx);
 		return DRM_ERR(EINVAL);
 	}
 
 	count = (elts.end - elts.start) / sizeof(u16);
 	elts.start -= R128_INDEX_PRIM_OFFSET;
 
-	if ( elts.start & 0x7 ) {
-		DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
+	if (elts.start & 0x7) {
+		DRM_ERROR("misaligned buffer 0x%x\n", elts.start);
 		return DRM_ERR(EINVAL);
 	}
-	if ( elts.start < buf->used ) {
-		DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
+	if (elts.start < buf->used) {
+		DRM_ERROR("no header 0x%x - 0x%x\n", elts.start, buf->used);
 		return DRM_ERR(EINVAL);
 	}
 
@@ -1499,13 +1475,13 @@ int r128_cce_indices( DRM_IOCTL_ARGS )
 	buf_priv->prim = elts.prim;
 	buf_priv->discard = elts.discard;
 
-	r128_cce_dispatch_indices( dev, buf, elts.start, elts.end, count );
+	r128_cce_dispatch_indices(dev, buf, elts.start, elts.end, count);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int r128_cce_blit( DRM_IOCTL_ARGS )
+static int r128_cce_blit(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
@@ -1513,83 +1489,82 @@ int r128_cce_blit( DRM_IOCTL_ARGS )
 	drm_r128_blit_t blit;
 	int ret;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( blit, (drm_r128_blit_t *) data,
-			     sizeof(blit) );
+	DRM_COPY_FROM_USER_IOCTL(blit, (drm_r128_blit_t __user *) data,
+				 sizeof(blit));
 
-	DRM_DEBUG( "pid=%d index=%d\n", DRM_CURRENTPID, blit.idx );
+	DRM_DEBUG("pid=%d index=%d\n", DRM_CURRENTPID, blit.idx);
 
-	if ( blit.idx < 0 || blit.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   blit.idx, dma->buf_count - 1 );
+	if (blit.idx < 0 || blit.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  blit.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
-	ret = r128_cce_dispatch_blit( filp, dev, &blit );
+	ret = r128_cce_dispatch_blit(filp, dev, &blit);
 
 	COMMIT_RING();
 	return ret;
 }
 
-int r128_cce_depth( DRM_IOCTL_ARGS )
+static int r128_cce_depth(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_depth_t depth;
 	int ret;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( depth, (drm_r128_depth_t *) data,
-			     sizeof(depth) );
+	DRM_COPY_FROM_USER_IOCTL(depth, (drm_r128_depth_t __user *) data,
+				 sizeof(depth));
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
 	ret = DRM_ERR(EINVAL);
-	switch ( depth.func ) {
+	switch (depth.func) {
 	case R128_WRITE_SPAN:
-		ret = r128_cce_dispatch_write_span( dev, &depth );
+		ret = r128_cce_dispatch_write_span(dev, &depth);
 	case R128_WRITE_PIXELS:
-		ret = r128_cce_dispatch_write_pixels( dev, &depth );
+		ret = r128_cce_dispatch_write_pixels(dev, &depth);
 	case R128_READ_SPAN:
-		ret = r128_cce_dispatch_read_span( dev, &depth );
+		ret = r128_cce_dispatch_read_span(dev, &depth);
 	case R128_READ_PIXELS:
-		ret = r128_cce_dispatch_read_pixels( dev, &depth );
+		ret = r128_cce_dispatch_read_pixels(dev, &depth);
 	}
 
 	COMMIT_RING();
 	return ret;
 }
 
-int r128_cce_stipple( DRM_IOCTL_ARGS )
+static int r128_cce_stipple(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_stipple_t stipple;
 	u32 mask[32];
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( stipple, (drm_r128_stipple_t *) data,
-			     sizeof(stipple) );
+	DRM_COPY_FROM_USER_IOCTL(stipple, (drm_r128_stipple_t __user *) data,
+				 sizeof(stipple));
 
-	if ( DRM_COPY_FROM_USER( &mask, stipple.mask,
-			     32 * sizeof(u32) ) )
-		return DRM_ERR( EFAULT );
+	if (DRM_COPY_FROM_USER(&mask, stipple.mask, 32 * sizeof(u32)))
+		return DRM_ERR(EFAULT);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	r128_cce_dispatch_stipple( dev, mask );
+	r128_cce_dispatch_stipple(dev, mask);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int r128_cce_indirect( DRM_IOCTL_ARGS )
+static int r128_cce_indirect(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
@@ -1601,47 +1576,46 @@ int r128_cce_indirect( DRM_IOCTL_ARGS )
 	RING_LOCALS;
 #endif
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( indirect, (drm_r128_indirect_t *) data,
-			     sizeof(indirect) );
+	DRM_COPY_FROM_USER_IOCTL(indirect, (drm_r128_indirect_t __user *) data,
+				 sizeof(indirect));
 
-	DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n",
-		   indirect.idx, indirect.start,
-		   indirect.end, indirect.discard );
+	DRM_DEBUG("indirect: idx=%d s=%d e=%d d=%d\n",
+		  indirect.idx, indirect.start, indirect.end, indirect.discard);
 
-	if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   indirect.idx, dma->buf_count - 1 );
+	if (indirect.idx < 0 || indirect.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  indirect.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
 
 	buf = dma->buflist[indirect.idx];
 	buf_priv = buf->dev_private;
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", indirect.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", indirect.idx);
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( indirect.start < buf->used ) {
-		DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n",
-			   indirect.start, buf->used );
+	if (indirect.start < buf->used) {
+		DRM_ERROR("reusing indirect: start=0x%x actual=0x%x\n",
+			  indirect.start, buf->used);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf->used = indirect.end;
 	buf_priv->discard = indirect.discard;
@@ -1650,7 +1624,7 @@ int r128_cce_indirect( DRM_IOCTL_ARGS )
 	/* Wait for the 3D stream to idle before the indirect buffer
 	 * containing 2D acceleration commands is processed.
 	 */
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 	RADEON_WAIT_UNTIL_3D_IDLE();
 	ADVANCE_RING();
 #endif
@@ -1659,30 +1633,30 @@ int r128_cce_indirect( DRM_IOCTL_ARGS )
 	 * X server.  This is insecure and is thus only available to
 	 * privileged clients.
 	 */
-	r128_cce_dispatch_indirect( dev, buf, indirect.start, indirect.end );
+	r128_cce_dispatch_indirect(dev, buf, indirect.start, indirect.end);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int r128_getparam( DRM_IOCTL_ARGS )
+static int r128_getparam(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_r128_private_t *dev_priv = dev->dev_private;
 	drm_r128_getparam_t param;
 	int value;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( param, (drm_r128_getparam_t *)data,
-			     sizeof(param) );
+	DRM_COPY_FROM_USER_IOCTL(param, (drm_r128_getparam_t __user *) data,
+				 sizeof(param));
 
-	DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
+	DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
 
-	switch( param.param ) {
+	switch (param.param) {
 	case R128_PARAM_IRQ_NR:
 		value = dev->irq;
 		break;
@@ -1690,10 +1664,47 @@ int r128_getparam( DRM_IOCTL_ARGS )
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(int) ) ) {
-		DRM_ERROR( "copy_to_user\n" );
+	if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
 		return DRM_ERR(EFAULT);
 	}
-	
+
 	return 0;
 }
+
+void r128_driver_prerelease(drm_device_t * dev, DRMFILE filp)
+{
+	if (dev->dev_private) {
+		drm_r128_private_t *dev_priv = dev->dev_private;
+		if (dev_priv->page_flipping) {
+			r128_do_cleanup_pageflip(dev);
+		}
+	}
+}
+
+void r128_driver_pretakedown(drm_device_t * dev)
+{
+	r128_do_cleanup_cce(dev);
+}
+
+drm_ioctl_desc_t r128_ioctls[] = {
+	[DRM_IOCTL_NR(DRM_R128_INIT)] = {r128_cce_init, 1, 1},
+	[DRM_IOCTL_NR(DRM_R128_CCE_START)] = {r128_cce_start, 1, 1},
+	[DRM_IOCTL_NR(DRM_R128_CCE_STOP)] = {r128_cce_stop, 1, 1},
+	[DRM_IOCTL_NR(DRM_R128_CCE_RESET)] = {r128_cce_reset, 1, 1},
+	[DRM_IOCTL_NR(DRM_R128_CCE_IDLE)] = {r128_cce_idle, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_RESET)] = {r128_engine_reset, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_FULLSCREEN)] = {r128_fullscreen, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_SWAP)] = {r128_cce_swap, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_FLIP)] = {r128_cce_flip, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_CLEAR)] = {r128_cce_clear, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_VERTEX)] = {r128_cce_vertex, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_INDICES)] = {r128_cce_indices, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_BLIT)] = {r128_cce_blit, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_DEPTH)] = {r128_cce_depth, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_STIPPLE)] = {r128_cce_stipple, 1, 0},
+	[DRM_IOCTL_NR(DRM_R128_INDIRECT)] = {r128_cce_indirect, 1, 1},
+	[DRM_IOCTL_NR(DRM_R128_GETPARAM)] = {r128_getparam, 1, 0},
+};
+
+int r128_max_ioctl = DRM_ARRAY_SIZE(r128_ioctls);
diff --git a/sys/dev/drm/radeon.h b/sys/dev/drm/radeon.h
deleted file mode 100644
index f7f9708..0000000
--- a/sys/dev/drm/radeon.h
+++ /dev/null
@@ -1,175 +0,0 @@
-/* radeon.h -- ATI Radeon DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 17:07:34 2001 by gareth@valinux.com */
-/*-
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All Rights Reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- *
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- *
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * VA LINUX SYSTEMS AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR
- * OTHER DEALINGS IN THE SOFTWARE.
- *
- * Authors:
- *    Gareth Hughes <gareth@valinux.com>
- *    Keith Whitwell <keith@tungstengraphics.com>
- *
- * $FreeBSD$
- */
-
-#ifndef __RADEON_H__
-#define __RADEON_H__
-
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) radeon_##x
-
-/* General customization:
- */
-#define __HAVE_AGP		1
-#define __MUST_HAVE_AGP		0
-#define __HAVE_MTRR		1
-#define __HAVE_CTX_BITMAP	1
-#define __HAVE_SG		1
-#define __HAVE_PCI_DMA		1
-
-#define DRIVER_AUTHOR		"Gareth Hughes, Keith Whitwell, others."
-
-#define DRIVER_NAME		"radeon"
-#define DRIVER_DESC		"ATI Radeon"
-#define DRIVER_DATE		"20020828"
-
-#define DRIVER_MAJOR		1
-#define DRIVER_MINOR		11
-#define DRIVER_PATCHLEVEL	0
-
-/* Interface history:
- *
- * 1.1 - ??
- * 1.2 - Add vertex2 ioctl (keith)
- *     - Add stencil capability to clear ioctl (gareth, keith)
- *     - Increase MAX_TEXTURE_LEVELS (brian)
- * 1.3 - Add cmdbuf ioctl (keith)
- *     - Add support for new radeon packets (keith)
- *     - Add getparam ioctl (keith)
- *     - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
- * 1.4 - Add scratch registers to get_param ioctl.
- * 1.5 - Add r200 packets to cmdbuf ioctl
- *     - Add r200 function to init ioctl
- *     - Add 'scalar2' instruction to cmdbuf
- * 1.6 - Add static GART memory manager
- *       Add irq handler (won't be turned on unless X server knows to)
- *       Add irq ioctls and irq_active getparam.
- *       Add wait command for cmdbuf ioctl
- *       Add GART offset query for getparam
- * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
- *       and R200_PP_CUBIC_OFFSET_F1_[0..5].
- *       Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
- *       R200_EMIT_PP_CUBIC_OFFSETS_[0..5].  (brian)
- * 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
- *       Add 'GET' queries for starting additional clients on different VT's.
- * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl.
- *       Add texture rectangle support for r100.
- * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which
- *       clients use to tell the DRM where they think the framebuffer is 
- *       located in the card's address space
- * 1.11  Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color
- *       and GL_EXT_blend_[func|equation]_separate on r200
- */
-#define DRIVER_IOCTLS							     \
- [DRM_IOCTL_NR(DRM_IOCTL_DMA)]               = { radeon_cp_buffers,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_INIT)]    = { radeon_cp_init,     1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_START)]   = { radeon_cp_start,    1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_STOP)]    = { radeon_cp_stop,     1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESET)]   = { radeon_cp_reset,    1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_IDLE)]    = { radeon_cp_idle,     1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CP_RESUME)]  = { radeon_cp_resume,   1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_RESET)]    = { radeon_engine_reset,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FULLSCREEN)] = { radeon_fullscreen,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SWAP)]       = { radeon_cp_swap,     1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CLEAR)]      = { radeon_cp_clear,    1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX)]     = { radeon_cp_vertex,   1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDICES)]    = { radeon_cp_indices,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_TEXTURE)]    = { radeon_cp_texture,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_STIPPLE)]    = { radeon_cp_stipple,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INDIRECT)]   = { radeon_cp_indirect, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_VERTEX2)]    = { radeon_cp_vertex2,  1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_CMDBUF)]     = { radeon_cp_cmdbuf,   1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_GETPARAM)]   = { radeon_cp_getparam, 1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FLIP)]       = { radeon_cp_flip,     1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_ALLOC)]      = { radeon_mem_alloc,   1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_FREE)]       = { radeon_mem_free,    1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_INIT_HEAP)]  = { radeon_mem_init_heap, 1, 1 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_EMIT)]   = { radeon_irq_emit,    1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_IRQ_WAIT)]   = { radeon_irq_wait,    1, 0 }, \
- [DRM_IOCTL_NR(DRM_IOCTL_RADEON_SETPARAM)]   = { radeon_cp_setparam, 1, 0 }, \
-
-#define DRIVER_FILE_FIELDS						\
-	int64_t radeon_fb_delta;					\
-
-#define DRIVER_OPEN_HELPER( filp_priv, dev )				\
-do {									\
-	drm_radeon_private_t *dev_priv = dev->dev_private;		\
-	if ( dev_priv )							\
-		filp_priv->radeon_fb_delta = dev_priv->fb_location;	\
-	else								\
-		filp_priv->radeon_fb_delta = 0;				\
-} while( 0 )
-
-/* When a client dies:
- *    - Check for and clean up flipped page state
- *    - Free any alloced GART memory.
- *
- * DRM infrastructure takes care of reclaiming dma buffers.
- */
-#define DRIVER_PRERELEASE() 						\
-do {									\
-	if ( dev->dev_private ) {					\
-		drm_radeon_private_t *dev_priv = dev->dev_private;	\
-		if ( dev_priv->page_flipping ) {			\
-			radeon_do_cleanup_pageflip( dev );		\
-		}							\
-		radeon_mem_release( filp, dev_priv->gart_heap );	\
-		radeon_mem_release( filp, dev_priv->fb_heap );		\
-	}								\
-} while (0)
-
-/* When the last client dies, shut down the CP and free dev->dev_priv.
- */
-/* #define __HAVE_RELEASE 1 */
-#define DRIVER_PRETAKEDOWN( dev )		\
-do {						\
-    radeon_do_release( dev );			\
-} while (0)
-
-
-
-/* DMA customization:
- */
-#define __HAVE_DMA		1
-#define __HAVE_IRQ		1
-#define __HAVE_VBL_IRQ		1
-#define __HAVE_SHARED_IRQ       1
-
-
-/* Buffer customization:
- */
-#define DRIVER_BUF_PRIV_T	drm_radeon_buf_priv_t
-
-#define DRIVER_AGP_BUFFERS_MAP( dev )				\
-	((drm_radeon_private_t *)((dev)->dev_private))->buffers
-
-#endif
diff --git a/sys/dev/drm/radeon_cp.c b/sys/dev/drm/radeon_cp.c
index 2418f80..48626bf 100644
--- a/sys/dev/drm/radeon_cp.c
+++ b/sys/dev/drm/radeon_cp.c
@@ -30,7 +30,6 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/radeon.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/radeon_drm.h"
@@ -38,501 +37,760 @@
 
 #define RADEON_FIFO_DEBUG	0
 
+static int radeon_do_cleanup_cp(drm_device_t * dev);
 
 /* CP microcode (from ATI) */
 static u32 R200_cp_microcode[][2] = {
-	{ 0x21007000, 0000000000 },        
-	{ 0x20007000, 0000000000 }, 
-	{ 0x000000ab, 0x00000004 },
-	{ 0x000000af, 0x00000004 },
-	{ 0x66544a49, 0000000000 },
-	{ 0x49494174, 0000000000 },
-	{ 0x54517d83, 0000000000 },
-	{ 0x498d8b64, 0000000000 },
-	{ 0x49494949, 0000000000 },
-	{ 0x49da493c, 0000000000 },
-	{ 0x49989898, 0000000000 },
-	{ 0xd34949d5, 0000000000 },
-	{ 0x9dc90e11, 0000000000 },
-	{ 0xce9b9b9b, 0000000000 },
-	{ 0x000f0000, 0x00000016 },
-	{ 0x352e232c, 0000000000 },
-	{ 0x00000013, 0x00000004 },
-	{ 0x000f0000, 0x00000016 },
-	{ 0x352e272c, 0000000000 },
-	{ 0x000f0001, 0x00000016 },
-	{ 0x3239362f, 0000000000 },
-	{ 0x000077ef, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000020, 0x0000001a },
-	{ 0x00004000, 0x0000001e },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000020, 0x0000001a },
-	{ 0x00004000, 0x0000001e },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000020, 0x0000001a },
-	{ 0x00004000, 0x0000001e },
-	{ 0x00000016, 0x00000004 },
-	{ 0x0003802a, 0x00000002 },
-	{ 0x040067e0, 0x00000002 },
-	{ 0x00000016, 0x00000004 },
-	{ 0x000077e0, 0x00000002 },
-	{ 0x00065000, 0x00000002 },
-	{ 0x000037e1, 0x00000002 },
-	{ 0x040067e1, 0x00000006 },
-	{ 0x000077e0, 0x00000002 },
-	{ 0x000077e1, 0x00000002 },
-	{ 0x000077e1, 0x00000006 },
-	{ 0xffffffff, 0000000000 },
-	{ 0x10000000, 0000000000 },
-	{ 0x0003802a, 0x00000002 },
-	{ 0x040067e0, 0x00000006 },
-	{ 0x00007675, 0x00000002 },
-	{ 0x00007676, 0x00000002 },
-	{ 0x00007677, 0x00000002 },
-	{ 0x00007678, 0x00000006 },
-	{ 0x0003802b, 0x00000002 },
-	{ 0x04002676, 0x00000002 },
-	{ 0x00007677, 0x00000002 },
-	{ 0x00007678, 0x00000006 },
-	{ 0x0000002e, 0x00000018 },
-	{ 0x0000002e, 0x00000018 },
-	{ 0000000000, 0x00000006 },
-	{ 0x0000002f, 0x00000018 },
-	{ 0x0000002f, 0x00000018 },
-	{ 0000000000, 0x00000006 },
-	{ 0x01605000, 0x00000002 },
-	{ 0x00065000, 0x00000002 },
-	{ 0x00098000, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x64c0603d, 0x00000004 },
-	{ 0x00080000, 0x00000016 },
-	{ 0000000000, 0000000000 },
-	{ 0x0400251d, 0x00000002 },
-	{ 0x00007580, 0x00000002 },
-	{ 0x00067581, 0x00000002 },
-	{ 0x04002580, 0x00000002 },
-	{ 0x00067581, 0x00000002 },
-	{ 0x00000046, 0x00000004 },
-	{ 0x00005000, 0000000000 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x0000750e, 0x00000002 },
-	{ 0x00019000, 0x00000002 },
-	{ 0x00011055, 0x00000014 },
-	{ 0x00000055, 0x00000012 },
-	{ 0x0400250f, 0x00000002 },
-	{ 0x0000504a, 0x00000004 },
-	{ 0x00007565, 0x00000002 },
-	{ 0x00007566, 0x00000002 },
-	{ 0x00000051, 0x00000004 },
-	{ 0x01e655b4, 0x00000002 },
-	{ 0x4401b0dc, 0x00000002 },
-	{ 0x01c110dc, 0x00000002 },
-	{ 0x2666705d, 0x00000018 },
-	{ 0x040c2565, 0x00000002 },
-	{ 0x0000005d, 0x00000018 },
-	{ 0x04002564, 0x00000002 },
-	{ 0x00007566, 0x00000002 },
-	{ 0x00000054, 0x00000004 },
-	{ 0x00401060, 0x00000008 },
-	{ 0x00101000, 0x00000002 },
-	{ 0x000d80ff, 0x00000002 },
-	{ 0x00800063, 0x00000008 },
-	{ 0x000f9000, 0x00000002 },
-	{ 0x000e00ff, 0x00000002 },
-	{ 0000000000, 0x00000006 },
-	{ 0x00000080, 0x00000018 },
-	{ 0x00000054, 0x00000004 },
-	{ 0x00007576, 0x00000002 },
-	{ 0x00065000, 0x00000002 },
-	{ 0x00009000, 0x00000002 },
-	{ 0x00041000, 0x00000002 },
-	{ 0x0c00350e, 0x00000002 },
-	{ 0x00049000, 0x00000002 },
-	{ 0x00051000, 0x00000002 },
-	{ 0x01e785f8, 0x00000002 },
-	{ 0x00200000, 0x00000002 },
-	{ 0x00600073, 0x0000000c },
-	{ 0x00007563, 0x00000002 },
-	{ 0x006075f0, 0x00000021 },
-	{ 0x20007068, 0x00000004 },
-	{ 0x00005068, 0x00000004 },
-	{ 0x00007576, 0x00000002 },
-	{ 0x00007577, 0x00000002 },
-	{ 0x0000750e, 0x00000002 },
-	{ 0x0000750f, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00600076, 0x0000000c },
-	{ 0x006075f0, 0x00000021 },
-	{ 0x000075f8, 0x00000002 },
-	{ 0x00000076, 0x00000004 },
-	{ 0x000a750e, 0x00000002 },
-	{ 0x0020750f, 0x00000002 },
-	{ 0x00600079, 0x00000004 },
-	{ 0x00007570, 0x00000002 },
-	{ 0x00007571, 0x00000002 },
-	{ 0x00007572, 0x00000006 },
-	{ 0x00005000, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00007568, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000084, 0x0000000c },
-	{ 0x00058000, 0x00000002 },
-	{ 0x0c607562, 0x00000002 },
-	{ 0x00000086, 0x00000004 },
-	{ 0x00600085, 0x00000004 },
-	{ 0x400070dd, 0000000000 },
-	{ 0x000380dd, 0x00000002 },
-	{ 0x00000093, 0x0000001c },
-	{ 0x00065095, 0x00000018 },
-	{ 0x040025bb, 0x00000002 },
-	{ 0x00061096, 0x00000018 },
-	{ 0x040075bc, 0000000000 },
-	{ 0x000075bb, 0x00000002 },
-	{ 0x000075bc, 0000000000 },
-	{ 0x00090000, 0x00000006 },
-	{ 0x00090000, 0x00000002 },
-	{ 0x000d8002, 0x00000006 },
-	{ 0x00005000, 0x00000002 },
-	{ 0x00007821, 0x00000002 },
-	{ 0x00007800, 0000000000 },
-	{ 0x00007821, 0x00000002 },
-	{ 0x00007800, 0000000000 },
-	{ 0x01665000, 0x00000002 },
-	{ 0x000a0000, 0x00000002 },
-	{ 0x000671cc, 0x00000002 },
-	{ 0x0286f1cd, 0x00000002 },
-	{ 0x000000a3, 0x00000010 },
-	{ 0x21007000, 0000000000 },
-	{ 0x000000aa, 0x0000001c },
-	{ 0x00065000, 0x00000002 },
-	{ 0x000a0000, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x000b0000, 0x00000002 },
-	{ 0x38067000, 0x00000002 },
-	{ 0x000a00a6, 0x00000004 },
-	{ 0x20007000, 0000000000 },
-	{ 0x01200000, 0x00000002 },
-	{ 0x20077000, 0x00000002 },
-	{ 0x01200000, 0x00000002 },
-	{ 0x20007000, 0000000000 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x0120751b, 0x00000002 },
-	{ 0x8040750a, 0x00000002 },
-	{ 0x8040750b, 0x00000002 },
-	{ 0x00110000, 0x00000002 },
-	{ 0x000380dd, 0x00000002 },
-	{ 0x000000bd, 0x0000001c },
-	{ 0x00061096, 0x00000018 },
-	{ 0x844075bd, 0x00000002 },
-	{ 0x00061095, 0x00000018 },
-	{ 0x840075bb, 0x00000002 },
-	{ 0x00061096, 0x00000018 },
-	{ 0x844075bc, 0x00000002 },
-	{ 0x000000c0, 0x00000004 },
-	{ 0x804075bd, 0x00000002 },
-	{ 0x800075bb, 0x00000002 },
-	{ 0x804075bc, 0x00000002 },
-	{ 0x00108000, 0x00000002 },
-	{ 0x01400000, 0x00000002 },
-	{ 0x006000c4, 0x0000000c },
-	{ 0x20c07000, 0x00000020 },
-	{ 0x000000c6, 0x00000012 },
-	{ 0x00800000, 0x00000006 },
-	{ 0x0080751d, 0x00000006 },
-	{ 0x000025bb, 0x00000002 },
-	{ 0x000040c0, 0x00000004 },
-	{ 0x0000775c, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00661000, 0x00000002 },
-	{ 0x0460275d, 0x00000020 },
-	{ 0x00004000, 0000000000 },
-	{ 0x00007999, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00661000, 0x00000002 },
-	{ 0x0460299b, 0x00000020 },
-	{ 0x00004000, 0000000000 },
-	{ 0x01e00830, 0x00000002 },
-	{ 0x21007000, 0000000000 },
-	{ 0x00005000, 0x00000002 },
-	{ 0x00038042, 0x00000002 },
-	{ 0x040025e0, 0x00000002 },
-	{ 0x000075e1, 0000000000 },
-	{ 0x00000001, 0000000000 },
-	{ 0x000380d9, 0x00000002 },
-	{ 0x04007394, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
-	{ 0000000000, 0000000000 },
+	{0x21007000, 0000000000},
+	{0x20007000, 0000000000},
+	{0x000000ab, 0x00000004},
+	{0x000000af, 0x00000004},
+	{0x66544a49, 0000000000},
+	{0x49494174, 0000000000},
+	{0x54517d83, 0000000000},
+	{0x498d8b64, 0000000000},
+	{0x49494949, 0000000000},
+	{0x49da493c, 0000000000},
+	{0x49989898, 0000000000},
+	{0xd34949d5, 0000000000},
+	{0x9dc90e11, 0000000000},
+	{0xce9b9b9b, 0000000000},
+	{0x000f0000, 0x00000016},
+	{0x352e232c, 0000000000},
+	{0x00000013, 0x00000004},
+	{0x000f0000, 0x00000016},
+	{0x352e272c, 0000000000},
+	{0x000f0001, 0x00000016},
+	{0x3239362f, 0000000000},
+	{0x000077ef, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x00000020, 0x0000001a},
+	{0x00004000, 0x0000001e},
+	{0x00061000, 0x00000002},
+	{0x00000020, 0x0000001a},
+	{0x00004000, 0x0000001e},
+	{0x00061000, 0x00000002},
+	{0x00000020, 0x0000001a},
+	{0x00004000, 0x0000001e},
+	{0x00000016, 0x00000004},
+	{0x0003802a, 0x00000002},
+	{0x040067e0, 0x00000002},
+	{0x00000016, 0x00000004},
+	{0x000077e0, 0x00000002},
+	{0x00065000, 0x00000002},
+	{0x000037e1, 0x00000002},
+	{0x040067e1, 0x00000006},
+	{0x000077e0, 0x00000002},
+	{0x000077e1, 0x00000002},
+	{0x000077e1, 0x00000006},
+	{0xffffffff, 0000000000},
+	{0x10000000, 0000000000},
+	{0x0003802a, 0x00000002},
+	{0x040067e0, 0x00000006},
+	{0x00007675, 0x00000002},
+	{0x00007676, 0x00000002},
+	{0x00007677, 0x00000002},
+	{0x00007678, 0x00000006},
+	{0x0003802b, 0x00000002},
+	{0x04002676, 0x00000002},
+	{0x00007677, 0x00000002},
+	{0x00007678, 0x00000006},
+	{0x0000002e, 0x00000018},
+	{0x0000002e, 0x00000018},
+	{0000000000, 0x00000006},
+	{0x0000002f, 0x00000018},
+	{0x0000002f, 0x00000018},
+	{0000000000, 0x00000006},
+	{0x01605000, 0x00000002},
+	{0x00065000, 0x00000002},
+	{0x00098000, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x64c0603d, 0x00000004},
+	{0x00080000, 0x00000016},
+	{0000000000, 0000000000},
+	{0x0400251d, 0x00000002},
+	{0x00007580, 0x00000002},
+	{0x00067581, 0x00000002},
+	{0x04002580, 0x00000002},
+	{0x00067581, 0x00000002},
+	{0x00000046, 0x00000004},
+	{0x00005000, 0000000000},
+	{0x00061000, 0x00000002},
+	{0x0000750e, 0x00000002},
+	{0x00019000, 0x00000002},
+	{0x00011055, 0x00000014},
+	{0x00000055, 0x00000012},
+	{0x0400250f, 0x00000002},
+	{0x0000504a, 0x00000004},
+	{0x00007565, 0x00000002},
+	{0x00007566, 0x00000002},
+	{0x00000051, 0x00000004},
+	{0x01e655b4, 0x00000002},
+	{0x4401b0dc, 0x00000002},
+	{0x01c110dc, 0x00000002},
+	{0x2666705d, 0x00000018},
+	{0x040c2565, 0x00000002},
+	{0x0000005d, 0x00000018},
+	{0x04002564, 0x00000002},
+	{0x00007566, 0x00000002},
+	{0x00000054, 0x00000004},
+	{0x00401060, 0x00000008},
+	{0x00101000, 0x00000002},
+	{0x000d80ff, 0x00000002},
+	{0x00800063, 0x00000008},
+	{0x000f9000, 0x00000002},
+	{0x000e00ff, 0x00000002},
+	{0000000000, 0x00000006},
+	{0x00000080, 0x00000018},
+	{0x00000054, 0x00000004},
+	{0x00007576, 0x00000002},
+	{0x00065000, 0x00000002},
+	{0x00009000, 0x00000002},
+	{0x00041000, 0x00000002},
+	{0x0c00350e, 0x00000002},
+	{0x00049000, 0x00000002},
+	{0x00051000, 0x00000002},
+	{0x01e785f8, 0x00000002},
+	{0x00200000, 0x00000002},
+	{0x00600073, 0x0000000c},
+	{0x00007563, 0x00000002},
+	{0x006075f0, 0x00000021},
+	{0x20007068, 0x00000004},
+	{0x00005068, 0x00000004},
+	{0x00007576, 0x00000002},
+	{0x00007577, 0x00000002},
+	{0x0000750e, 0x00000002},
+	{0x0000750f, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00600076, 0x0000000c},
+	{0x006075f0, 0x00000021},
+	{0x000075f8, 0x00000002},
+	{0x00000076, 0x00000004},
+	{0x000a750e, 0x00000002},
+	{0x0020750f, 0x00000002},
+	{0x00600079, 0x00000004},
+	{0x00007570, 0x00000002},
+	{0x00007571, 0x00000002},
+	{0x00007572, 0x00000006},
+	{0x00005000, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00007568, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x00000084, 0x0000000c},
+	{0x00058000, 0x00000002},
+	{0x0c607562, 0x00000002},
+	{0x00000086, 0x00000004},
+	{0x00600085, 0x00000004},
+	{0x400070dd, 0000000000},
+	{0x000380dd, 0x00000002},
+	{0x00000093, 0x0000001c},
+	{0x00065095, 0x00000018},
+	{0x040025bb, 0x00000002},
+	{0x00061096, 0x00000018},
+	{0x040075bc, 0000000000},
+	{0x000075bb, 0x00000002},
+	{0x000075bc, 0000000000},
+	{0x00090000, 0x00000006},
+	{0x00090000, 0x00000002},
+	{0x000d8002, 0x00000006},
+	{0x00005000, 0x00000002},
+	{0x00007821, 0x00000002},
+	{0x00007800, 0000000000},
+	{0x00007821, 0x00000002},
+	{0x00007800, 0000000000},
+	{0x01665000, 0x00000002},
+	{0x000a0000, 0x00000002},
+	{0x000671cc, 0x00000002},
+	{0x0286f1cd, 0x00000002},
+	{0x000000a3, 0x00000010},
+	{0x21007000, 0000000000},
+	{0x000000aa, 0x0000001c},
+	{0x00065000, 0x00000002},
+	{0x000a0000, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x000b0000, 0x00000002},
+	{0x38067000, 0x00000002},
+	{0x000a00a6, 0x00000004},
+	{0x20007000, 0000000000},
+	{0x01200000, 0x00000002},
+	{0x20077000, 0x00000002},
+	{0x01200000, 0x00000002},
+	{0x20007000, 0000000000},
+	{0x00061000, 0x00000002},
+	{0x0120751b, 0x00000002},
+	{0x8040750a, 0x00000002},
+	{0x8040750b, 0x00000002},
+	{0x00110000, 0x00000002},
+	{0x000380dd, 0x00000002},
+	{0x000000bd, 0x0000001c},
+	{0x00061096, 0x00000018},
+	{0x844075bd, 0x00000002},
+	{0x00061095, 0x00000018},
+	{0x840075bb, 0x00000002},
+	{0x00061096, 0x00000018},
+	{0x844075bc, 0x00000002},
+	{0x000000c0, 0x00000004},
+	{0x804075bd, 0x00000002},
+	{0x800075bb, 0x00000002},
+	{0x804075bc, 0x00000002},
+	{0x00108000, 0x00000002},
+	{0x01400000, 0x00000002},
+	{0x006000c4, 0x0000000c},
+	{0x20c07000, 0x00000020},
+	{0x000000c6, 0x00000012},
+	{0x00800000, 0x00000006},
+	{0x0080751d, 0x00000006},
+	{0x000025bb, 0x00000002},
+	{0x000040c0, 0x00000004},
+	{0x0000775c, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00661000, 0x00000002},
+	{0x0460275d, 0x00000020},
+	{0x00004000, 0000000000},
+	{0x00007999, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00661000, 0x00000002},
+	{0x0460299b, 0x00000020},
+	{0x00004000, 0000000000},
+	{0x01e00830, 0x00000002},
+	{0x21007000, 0000000000},
+	{0x00005000, 0x00000002},
+	{0x00038042, 0x00000002},
+	{0x040025e0, 0x00000002},
+	{0x000075e1, 0000000000},
+	{0x00000001, 0000000000},
+	{0x000380d9, 0x00000002},
+	{0x04007394, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
 };
 
-
 static u32 radeon_cp_microcode[][2] = {
-	{ 0x21007000, 0000000000 },
-	{ 0x20007000, 0000000000 },
-	{ 0x000000b4, 0x00000004 },
-	{ 0x000000b8, 0x00000004 },
-	{ 0x6f5b4d4c, 0000000000 },
-	{ 0x4c4c427f, 0000000000 },
-	{ 0x5b568a92, 0000000000 },
-	{ 0x4ca09c6d, 0000000000 },
-	{ 0xad4c4c4c, 0000000000 },
-	{ 0x4ce1af3d, 0000000000 },
-	{ 0xd8afafaf, 0000000000 },
-	{ 0xd64c4cdc, 0000000000 },
-	{ 0x4cd10d10, 0000000000 },
-	{ 0x000f0000, 0x00000016 },
-	{ 0x362f242d, 0000000000 },
-	{ 0x00000012, 0x00000004 },
-	{ 0x000f0000, 0x00000016 },
-	{ 0x362f282d, 0000000000 },
-	{ 0x000380e7, 0x00000002 },
-	{ 0x04002c97, 0x00000002 },
-	{ 0x000f0001, 0x00000016 },
-	{ 0x333a3730, 0000000000 },
-	{ 0x000077ef, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000021, 0x0000001a },
-	{ 0x00004000, 0x0000001e },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000021, 0x0000001a },
-	{ 0x00004000, 0x0000001e },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000021, 0x0000001a },
-	{ 0x00004000, 0x0000001e },
-	{ 0x00000017, 0x00000004 },
-	{ 0x0003802b, 0x00000002 },
-	{ 0x040067e0, 0x00000002 },
-	{ 0x00000017, 0x00000004 },
-	{ 0x000077e0, 0x00000002 },
-	{ 0x00065000, 0x00000002 },
-	{ 0x000037e1, 0x00000002 },
-	{ 0x040067e1, 0x00000006 },
-	{ 0x000077e0, 0x00000002 },
-	{ 0x000077e1, 0x00000002 },
-	{ 0x000077e1, 0x00000006 },
-	{ 0xffffffff, 0000000000 },
-	{ 0x10000000, 0000000000 },
-	{ 0x0003802b, 0x00000002 },
-	{ 0x040067e0, 0x00000006 },
-	{ 0x00007675, 0x00000002 },
-	{ 0x00007676, 0x00000002 },
-	{ 0x00007677, 0x00000002 },
-	{ 0x00007678, 0x00000006 },
-	{ 0x0003802c, 0x00000002 },
-	{ 0x04002676, 0x00000002 },
-	{ 0x00007677, 0x00000002 },
-	{ 0x00007678, 0x00000006 },
-	{ 0x0000002f, 0x00000018 },
-	{ 0x0000002f, 0x00000018 },
-	{ 0000000000, 0x00000006 },
-	{ 0x00000030, 0x00000018 },
-	{ 0x00000030, 0x00000018 },
-	{ 0000000000, 0x00000006 },
-	{ 0x01605000, 0x00000002 },
-	{ 0x00065000, 0x00000002 },
-	{ 0x00098000, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x64c0603e, 0x00000004 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00080000, 0x00000016 },
-	{ 0000000000, 0000000000 },
-	{ 0x0400251d, 0x00000002 },
-	{ 0x00007580, 0x00000002 },
-	{ 0x00067581, 0x00000002 },
-	{ 0x04002580, 0x00000002 },
-	{ 0x00067581, 0x00000002 },
-	{ 0x00000049, 0x00000004 },
-	{ 0x00005000, 0000000000 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x0000750e, 0x00000002 },
-	{ 0x00019000, 0x00000002 },
-	{ 0x00011055, 0x00000014 },
-	{ 0x00000055, 0x00000012 },
-	{ 0x0400250f, 0x00000002 },
-	{ 0x0000504f, 0x00000004 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00007565, 0x00000002 },
-	{ 0x00007566, 0x00000002 },
-	{ 0x00000058, 0x00000004 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x01e655b4, 0x00000002 },
-	{ 0x4401b0e4, 0x00000002 },
-	{ 0x01c110e4, 0x00000002 },
-	{ 0x26667066, 0x00000018 },
-	{ 0x040c2565, 0x00000002 },
-	{ 0x00000066, 0x00000018 },
-	{ 0x04002564, 0x00000002 },
-	{ 0x00007566, 0x00000002 },
-	{ 0x0000005d, 0x00000004 },
-	{ 0x00401069, 0x00000008 },
-	{ 0x00101000, 0x00000002 },
-	{ 0x000d80ff, 0x00000002 },
-	{ 0x0080006c, 0x00000008 },
-	{ 0x000f9000, 0x00000002 },
-	{ 0x000e00ff, 0x00000002 },
-	{ 0000000000, 0x00000006 },
-	{ 0x0000008f, 0x00000018 },
-	{ 0x0000005b, 0x00000004 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00007576, 0x00000002 },
-	{ 0x00065000, 0x00000002 },
-	{ 0x00009000, 0x00000002 },
-	{ 0x00041000, 0x00000002 },
-	{ 0x0c00350e, 0x00000002 },
-	{ 0x00049000, 0x00000002 },
-	{ 0x00051000, 0x00000002 },
-	{ 0x01e785f8, 0x00000002 },
-	{ 0x00200000, 0x00000002 },
-	{ 0x0060007e, 0x0000000c },
-	{ 0x00007563, 0x00000002 },
-	{ 0x006075f0, 0x00000021 },
-	{ 0x20007073, 0x00000004 },
-	{ 0x00005073, 0x00000004 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00007576, 0x00000002 },
-	{ 0x00007577, 0x00000002 },
-	{ 0x0000750e, 0x00000002 },
-	{ 0x0000750f, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00600083, 0x0000000c },
-	{ 0x006075f0, 0x00000021 },
-	{ 0x000075f8, 0x00000002 },
-	{ 0x00000083, 0x00000004 },
-	{ 0x000a750e, 0x00000002 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x0020750f, 0x00000002 },
-	{ 0x00600086, 0x00000004 },
-	{ 0x00007570, 0x00000002 },
-	{ 0x00007571, 0x00000002 },
-	{ 0x00007572, 0x00000006 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00005000, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00007568, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x00000095, 0x0000000c },
-	{ 0x00058000, 0x00000002 },
-	{ 0x0c607562, 0x00000002 },
-	{ 0x00000097, 0x00000004 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x00600096, 0x00000004 },
-	{ 0x400070e5, 0000000000 },
-	{ 0x000380e6, 0x00000002 },
-	{ 0x040025c5, 0x00000002 },
-	{ 0x000380e5, 0x00000002 },
-	{ 0x000000a8, 0x0000001c },
-	{ 0x000650aa, 0x00000018 },
-	{ 0x040025bb, 0x00000002 },
-	{ 0x000610ab, 0x00000018 },
-	{ 0x040075bc, 0000000000 },
-	{ 0x000075bb, 0x00000002 },
-	{ 0x000075bc, 0000000000 },
-	{ 0x00090000, 0x00000006 },
-	{ 0x00090000, 0x00000002 },
-	{ 0x000d8002, 0x00000006 },
-	{ 0x00007832, 0x00000002 },
-	{ 0x00005000, 0x00000002 },
-	{ 0x000380e7, 0x00000002 },
-	{ 0x04002c97, 0x00000002 },
-	{ 0x00007820, 0x00000002 },
-	{ 0x00007821, 0x00000002 },
-	{ 0x00007800, 0000000000 },
-	{ 0x01200000, 0x00000002 },
-	{ 0x20077000, 0x00000002 },
-	{ 0x01200000, 0x00000002 },
-	{ 0x20007000, 0x00000002 },
-	{ 0x00061000, 0x00000002 },
-	{ 0x0120751b, 0x00000002 },
-	{ 0x8040750a, 0x00000002 },
-	{ 0x8040750b, 0x00000002 },
-	{ 0x00110000, 0x00000002 },
-	{ 0x000380e5, 0x00000002 },
-	{ 0x000000c6, 0x0000001c },
-	{ 0x000610ab, 0x00000018 },
-	{ 0x844075bd, 0x00000002 },
-	{ 0x000610aa, 0x00000018 },
-	{ 0x840075bb, 0x00000002 },
-	{ 0x000610ab, 0x00000018 },
-	{ 0x844075bc, 0x00000002 },
-	{ 0x000000c9, 0x00000004 },
-	{ 0x804075bd, 0x00000002 },
-	{ 0x800075bb, 0x00000002 },
-	{ 0x804075bc, 0x00000002 },
-	{ 0x00108000, 0x00000002 },
-	{ 0x01400000, 0x00000002 },
-	{ 0x006000cd, 0x0000000c },
-	{ 0x20c07000, 0x00000020 },
-	{ 0x000000cf, 0x00000012 },
-	{ 0x00800000, 0x00000006 },
-	{ 0x0080751d, 0x00000006 },
+	{0x21007000, 0000000000},
+	{0x20007000, 0000000000},
+	{0x000000b4, 0x00000004},
+	{0x000000b8, 0x00000004},
+	{0x6f5b4d4c, 0000000000},
+	{0x4c4c427f, 0000000000},
+	{0x5b568a92, 0000000000},
+	{0x4ca09c6d, 0000000000},
+	{0xad4c4c4c, 0000000000},
+	{0x4ce1af3d, 0000000000},
+	{0xd8afafaf, 0000000000},
+	{0xd64c4cdc, 0000000000},
+	{0x4cd10d10, 0000000000},
+	{0x000f0000, 0x00000016},
+	{0x362f242d, 0000000000},
+	{0x00000012, 0x00000004},
+	{0x000f0000, 0x00000016},
+	{0x362f282d, 0000000000},
+	{0x000380e7, 0x00000002},
+	{0x04002c97, 0x00000002},
+	{0x000f0001, 0x00000016},
+	{0x333a3730, 0000000000},
+	{0x000077ef, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x00000021, 0x0000001a},
+	{0x00004000, 0x0000001e},
+	{0x00061000, 0x00000002},
+	{0x00000021, 0x0000001a},
+	{0x00004000, 0x0000001e},
+	{0x00061000, 0x00000002},
+	{0x00000021, 0x0000001a},
+	{0x00004000, 0x0000001e},
+	{0x00000017, 0x00000004},
+	{0x0003802b, 0x00000002},
+	{0x040067e0, 0x00000002},
+	{0x00000017, 0x00000004},
+	{0x000077e0, 0x00000002},
+	{0x00065000, 0x00000002},
+	{0x000037e1, 0x00000002},
+	{0x040067e1, 0x00000006},
+	{0x000077e0, 0x00000002},
+	{0x000077e1, 0x00000002},
+	{0x000077e1, 0x00000006},
+	{0xffffffff, 0000000000},
+	{0x10000000, 0000000000},
+	{0x0003802b, 0x00000002},
+	{0x040067e0, 0x00000006},
+	{0x00007675, 0x00000002},
+	{0x00007676, 0x00000002},
+	{0x00007677, 0x00000002},
+	{0x00007678, 0x00000006},
+	{0x0003802c, 0x00000002},
+	{0x04002676, 0x00000002},
+	{0x00007677, 0x00000002},
+	{0x00007678, 0x00000006},
+	{0x0000002f, 0x00000018},
+	{0x0000002f, 0x00000018},
+	{0000000000, 0x00000006},
+	{0x00000030, 0x00000018},
+	{0x00000030, 0x00000018},
+	{0000000000, 0x00000006},
+	{0x01605000, 0x00000002},
+	{0x00065000, 0x00000002},
+	{0x00098000, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x64c0603e, 0x00000004},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00080000, 0x00000016},
+	{0000000000, 0000000000},
+	{0x0400251d, 0x00000002},
+	{0x00007580, 0x00000002},
+	{0x00067581, 0x00000002},
+	{0x04002580, 0x00000002},
+	{0x00067581, 0x00000002},
+	{0x00000049, 0x00000004},
+	{0x00005000, 0000000000},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x0000750e, 0x00000002},
+	{0x00019000, 0x00000002},
+	{0x00011055, 0x00000014},
+	{0x00000055, 0x00000012},
+	{0x0400250f, 0x00000002},
+	{0x0000504f, 0x00000004},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00007565, 0x00000002},
+	{0x00007566, 0x00000002},
+	{0x00000058, 0x00000004},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x01e655b4, 0x00000002},
+	{0x4401b0e4, 0x00000002},
+	{0x01c110e4, 0x00000002},
+	{0x26667066, 0x00000018},
+	{0x040c2565, 0x00000002},
+	{0x00000066, 0x00000018},
+	{0x04002564, 0x00000002},
+	{0x00007566, 0x00000002},
+	{0x0000005d, 0x00000004},
+	{0x00401069, 0x00000008},
+	{0x00101000, 0x00000002},
+	{0x000d80ff, 0x00000002},
+	{0x0080006c, 0x00000008},
+	{0x000f9000, 0x00000002},
+	{0x000e00ff, 0x00000002},
+	{0000000000, 0x00000006},
+	{0x0000008f, 0x00000018},
+	{0x0000005b, 0x00000004},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00007576, 0x00000002},
+	{0x00065000, 0x00000002},
+	{0x00009000, 0x00000002},
+	{0x00041000, 0x00000002},
+	{0x0c00350e, 0x00000002},
+	{0x00049000, 0x00000002},
+	{0x00051000, 0x00000002},
+	{0x01e785f8, 0x00000002},
+	{0x00200000, 0x00000002},
+	{0x0060007e, 0x0000000c},
+	{0x00007563, 0x00000002},
+	{0x006075f0, 0x00000021},
+	{0x20007073, 0x00000004},
+	{0x00005073, 0x00000004},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00007576, 0x00000002},
+	{0x00007577, 0x00000002},
+	{0x0000750e, 0x00000002},
+	{0x0000750f, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00600083, 0x0000000c},
+	{0x006075f0, 0x00000021},
+	{0x000075f8, 0x00000002},
+	{0x00000083, 0x00000004},
+	{0x000a750e, 0x00000002},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x0020750f, 0x00000002},
+	{0x00600086, 0x00000004},
+	{0x00007570, 0x00000002},
+	{0x00007571, 0x00000002},
+	{0x00007572, 0x00000006},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00005000, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00007568, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x00000095, 0x0000000c},
+	{0x00058000, 0x00000002},
+	{0x0c607562, 0x00000002},
+	{0x00000097, 0x00000004},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x00600096, 0x00000004},
+	{0x400070e5, 0000000000},
+	{0x000380e6, 0x00000002},
+	{0x040025c5, 0x00000002},
+	{0x000380e5, 0x00000002},
+	{0x000000a8, 0x0000001c},
+	{0x000650aa, 0x00000018},
+	{0x040025bb, 0x00000002},
+	{0x000610ab, 0x00000018},
+	{0x040075bc, 0000000000},
+	{0x000075bb, 0x00000002},
+	{0x000075bc, 0000000000},
+	{0x00090000, 0x00000006},
+	{0x00090000, 0x00000002},
+	{0x000d8002, 0x00000006},
+	{0x00007832, 0x00000002},
+	{0x00005000, 0x00000002},
+	{0x000380e7, 0x00000002},
+	{0x04002c97, 0x00000002},
+	{0x00007820, 0x00000002},
+	{0x00007821, 0x00000002},
+	{0x00007800, 0000000000},
+	{0x01200000, 0x00000002},
+	{0x20077000, 0x00000002},
+	{0x01200000, 0x00000002},
+	{0x20007000, 0x00000002},
+	{0x00061000, 0x00000002},
+	{0x0120751b, 0x00000002},
+	{0x8040750a, 0x00000002},
+	{0x8040750b, 0x00000002},
+	{0x00110000, 0x00000002},
+	{0x000380e5, 0x00000002},
+	{0x000000c6, 0x0000001c},
+	{0x000610ab, 0x00000018},
+	{0x844075bd, 0x00000002},
+	{0x000610aa, 0x00000018},
+	{0x840075bb, 0x00000002},
+	{0x000610ab, 0x00000018},
+	{0x844075bc, 0x00000002},
+	{0x000000c9, 0x00000004},
+	{0x804075bd, 0x00000002},
+	{0x800075bb, 0x00000002},
+	{0x804075bc, 0x00000002},
+	{0x00108000, 0x00000002},
+	{0x01400000, 0x00000002},
+	{0x006000cd, 0x0000000c},
+	{0x20c07000, 0x00000020},
+	{0x000000cf, 0x00000012},
+	{0x00800000, 0x00000006},
+	{0x0080751d, 0x00000006},
+	{0000000000, 0000000000},
+	{0x0000775c, 0x00000002},
+	{0x00a05000, 0x00000002},
+	{0x00661000, 0x00000002},
+	{0x0460275d, 0x00000020},
+	{0x00004000, 0000000000},
+	{0x01e00830, 0x00000002},
+	{0x21007000, 0000000000},
+	{0x6464614d, 0000000000},
+	{0x69687420, 0000000000},
+	{0x00000073, 0000000000},
+	{0000000000, 0000000000},
+	{0x00005000, 0x00000002},
+	{0x000380d0, 0x00000002},
+	{0x040025e0, 0x00000002},
+	{0x000075e1, 0000000000},
+	{0x00000001, 0000000000},
+	{0x000380e0, 0x00000002},
+	{0x04002394, 0x00000002},
+	{0x00005000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0x00000008, 0000000000},
+	{0x00000004, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+	{0000000000, 0000000000},
+};
+
+static u32 R300_cp_microcode[][2] = {
+	{ 0x4200e000, 0000000000 },
+	{ 0x4000e000, 0000000000 },
+	{ 0x000000af, 0x00000008 },
+	{ 0x000000b3, 0x00000008 },
+	{ 0x6c5a504f, 0000000000 },
+	{ 0x4f4f497a, 0000000000 },
+	{ 0x5a578288, 0000000000 },
+	{ 0x4f91906a, 0000000000 },
+	{ 0x4f4f4f4f, 0000000000 },
+	{ 0x4fe24f44, 0000000000 },
+	{ 0x4f9c9c9c, 0000000000 },
+	{ 0xdc4f4fde, 0000000000 },
+	{ 0xa1cd4f4f, 0000000000 },
+	{ 0xd29d9d9d, 0000000000 },
+	{ 0x4f0f9fd7, 0000000000 },
+	{ 0x000ca000, 0x00000004 },
+	{ 0x000d0012, 0x00000038 },
+	{ 0x0000e8b4, 0x00000004 },
+	{ 0x000d0014, 0x00000038 },
+	{ 0x0000e8b6, 0x00000004 },
+	{ 0x000d0016, 0x00000038 },
+	{ 0x0000e854, 0x00000004 },
+	{ 0x000d0018, 0x00000038 },
+	{ 0x0000e855, 0x00000004 },
+	{ 0x000d001a, 0x00000038 },
+	{ 0x0000e856, 0x00000004 },
+	{ 0x000d001c, 0x00000038 },
+	{ 0x0000e857, 0x00000004 },
+	{ 0x000d001e, 0x00000038 },
+	{ 0x0000e824, 0x00000004 },
+	{ 0x000d0020, 0x00000038 },
+	{ 0x0000e825, 0x00000004 },
+	{ 0x000d0022, 0x00000038 },
+	{ 0x0000e830, 0x00000004 },
+	{ 0x000d0024, 0x00000038 },
+	{ 0x0000f0c0, 0x00000004 },
+	{ 0x000d0026, 0x00000038 },
+	{ 0x0000f0c1, 0x00000004 },
+	{ 0x000d0028, 0x00000038 },
+	{ 0x0000f041, 0x00000004 },
+	{ 0x000d002a, 0x00000038 },
+	{ 0x0000f184, 0x00000004 },
+	{ 0x000d002c, 0x00000038 },
+	{ 0x0000f185, 0x00000004 },
+	{ 0x000d002e, 0x00000038 },
+	{ 0x0000f186, 0x00000004 },
+	{ 0x000d0030, 0x00000038 },
+	{ 0x0000f187, 0x00000004 },
+	{ 0x000d0032, 0x00000038 },
+	{ 0x0000f180, 0x00000004 },
+	{ 0x000d0034, 0x00000038 },
+	{ 0x0000f393, 0x00000004 },
+	{ 0x000d0036, 0x00000038 },
+	{ 0x0000f38a, 0x00000004 },
+	{ 0x000d0038, 0x00000038 },
+	{ 0x0000f38e, 0x00000004 },
+	{ 0x0000e821, 0x00000004 },
+	{ 0x0140a000, 0x00000004 },
+	{ 0x00000043, 0x00000018 },
+	{ 0x00cce800, 0x00000004 },
+	{ 0x001b0001, 0x00000004 },
+	{ 0x08004800, 0x00000004 },
+	{ 0x001b0001, 0x00000004 },
+	{ 0x08004800, 0x00000004 },
+	{ 0x001b0001, 0x00000004 },
+	{ 0x08004800, 0x00000004 },
+	{ 0x0000003a, 0x00000008 },
+	{ 0x0000a000, 0000000000 },
+	{ 0x02c0a000, 0x00000004 },
+	{ 0x000ca000, 0x00000004 },
+	{ 0x00130000, 0x00000004 },
+	{ 0x000c2000, 0x00000004 },
+	{ 0xc980c045, 0x00000008 },
+	{ 0x2000451d, 0x00000004 },
+	{ 0x0000e580, 0x00000004 },
+	{ 0x000ce581, 0x00000004 },
+	{ 0x08004580, 0x00000004 },
+	{ 0x000ce581, 0x00000004 },
+	{ 0x0000004c, 0x00000008 },
+	{ 0x0000a000, 0000000000 },
+	{ 0x000c2000, 0x00000004 },
+	{ 0x0000e50e, 0x00000004 },
+	{ 0x00032000, 0x00000004 },
+	{ 0x00022056, 0x00000028 },
+	{ 0x00000056, 0x00000024 },
+	{ 0x0800450f, 0x00000004 },
+	{ 0x0000a050, 0x00000008 },
+	{ 0x0000e565, 0x00000004 },
+	{ 0x0000e566, 0x00000004 },
+	{ 0x00000057, 0x00000008 },
+	{ 0x03cca5b4, 0x00000004 },
+	{ 0x05432000, 0x00000004 },
+	{ 0x00022000, 0x00000004 },
+	{ 0x4ccce063, 0x00000030 },
+	{ 0x08274565, 0x00000004 },
+	{ 0x00000063, 0x00000030 },
+	{ 0x08004564, 0x00000004 },
+	{ 0x0000e566, 0x00000004 },
+	{ 0x0000005a, 0x00000008 },
+	{ 0x00802066, 0x00000010 },
+	{ 0x00202000, 0x00000004 },
+	{ 0x001b00ff, 0x00000004 },
+	{ 0x01000069, 0x00000010 },
+	{ 0x001f2000, 0x00000004 },
+	{ 0x001c00ff, 0x00000004 },
+	{ 0000000000, 0x0000000c },
+	{ 0x00000085, 0x00000030 },
+	{ 0x0000005a, 0x00000008 },
+	{ 0x0000e576, 0x00000004 },
+	{ 0x000ca000, 0x00000004 },
+	{ 0x00012000, 0x00000004 },
+	{ 0x00082000, 0x00000004 },
+	{ 0x1800650e, 0x00000004 },
+	{ 0x00092000, 0x00000004 },
+	{ 0x000a2000, 0x00000004 },
+	{ 0x000f0000, 0x00000004 },
+	{ 0x00400000, 0x00000004 },
+	{ 0x00000079, 0x00000018 },
+	{ 0x0000e563, 0x00000004 },
+	{ 0x00c0e5f9, 0x000000c2 },
+	{ 0x0000006e, 0x00000008 },
+	{ 0x0000a06e, 0x00000008 },
+	{ 0x0000e576, 0x00000004 },
+	{ 0x0000e577, 0x00000004 },
+	{ 0x0000e50e, 0x00000004 },
+	{ 0x0000e50f, 0x00000004 },
+	{ 0x0140a000, 0x00000004 },
+	{ 0x0000007c, 0x00000018 },
+	{ 0x00c0e5f9, 0x000000c2 },
+	{ 0x0000007c, 0x00000008 },
+	{ 0x0014e50e, 0x00000004 },
+	{ 0x0040e50f, 0x00000004 },
+	{ 0x00c0007f, 0x00000008 },
+	{ 0x0000e570, 0x00000004 },
+	{ 0x0000e571, 0x00000004 },
+	{ 0x0000e572, 0x0000000c },
+	{ 0x0000a000, 0x00000004 },
+	{ 0x0140a000, 0x00000004 }, 
+	{ 0x0000e568, 0x00000004 },
+	{ 0x000c2000, 0x00000004 },
+	{ 0x00000089, 0x00000018 },
+	{ 0x000b0000, 0x00000004 },
+	{ 0x18c0e562, 0x00000004 },
+	{ 0x0000008b, 0x00000008 },
+	{ 0x00c0008a, 0x00000008 },
+	{ 0x000700e4, 0x00000004 },
+	{ 0x00000097, 0x00000038 },
+	{ 0x000ca099, 0x00000030 },
+	{ 0x080045bb, 0x00000004 },
+	{ 0x000c209a, 0x00000030 },
+	{ 0x0800e5bc, 0000000000 },
+	{ 0x0000e5bb, 0x00000004 },
+	{ 0x0000e5bc, 0000000000 },
+	{ 0x00120000, 0x0000000c },
+	{ 0x00120000, 0x00000004 },
+	{ 0x001b0002, 0x0000000c },
+	{ 0x0000a000, 0x00000004 },
+	{ 0x0000e821, 0x00000004 },
+	{ 0x0000e800, 0000000000 },
+	{ 0x0000e821, 0x00000004 },
+	{ 0x0000e82e, 0000000000 },
+	{ 0x02cca000, 0x00000004 },
+	{ 0x00140000, 0x00000004 },
+	{ 0x000ce1cc, 0x00000004 },
+	{ 0x050de1cd, 0x00000004 },
+	{ 0x000000a7, 0x00000020 },
+	{ 0x4200e000, 0000000000 },
+	{ 0x000000ae, 0x00000038 },
+	{ 0x000ca000, 0x00000004 },
+	{ 0x00140000, 0x00000004 },
+	{ 0x000c2000, 0x00000004 },
+	{ 0x00160000, 0x00000004 },
+	{ 0x700ce000, 0x00000004 },
+	{ 0x001400aa, 0x00000008 },
+	{ 0x4000e000, 0000000000 },
+	{ 0x02400000, 0x00000004 },
+	{ 0x400ee000, 0x00000004 },
+	{ 0x02400000, 0x00000004 },
+	{ 0x4000e000, 0000000000 },
+	{ 0x000c2000, 0x00000004 },
+	{ 0x0240e51b, 0x00000004 },
+	{ 0x0080e50a, 0x00000005 },
+	{ 0x0080e50b, 0x00000005 },
+	{ 0x00220000, 0x00000004 },
+	{ 0x000700e4, 0x00000004 },
+	{ 0x000000c1, 0x00000038 },
+	{ 0x000c209a, 0x00000030 },
+	{ 0x0880e5bd, 0x00000005 },
+	{ 0x000c2099, 0x00000030 },
+	{ 0x0800e5bb, 0x00000005 },
+	{ 0x000c209a, 0x00000030 },
+	{ 0x0880e5bc, 0x00000005 },
+	{ 0x000000c4, 0x00000008 },
+	{ 0x0080e5bd, 0x00000005 },
+	{ 0x0000e5bb, 0x00000005 },
+	{ 0x0080e5bc, 0x00000005 },
+	{ 0x00210000, 0x00000004 },
+	{ 0x02800000, 0x00000004 },
+	{ 0x00c000c8, 0x00000018 },
+	{ 0x4180e000, 0x00000040 },
+	{ 0x000000ca, 0x00000024 },
+	{ 0x01000000, 0x0000000c },
+	{ 0x0100e51d, 0x0000000c },
+	{ 0x000045bb, 0x00000004 },
+	{ 0x000080c4, 0x00000008 },
+	{ 0x0000f3ce, 0x00000004 },
+	{ 0x0140a000, 0x00000004 },
+	{ 0x00cc2000, 0x00000004 },
+	{ 0x08c053cf, 0x00000040 },
+	{ 0x00008000, 0000000000 },
+	{ 0x0000f3d2, 0x00000004 },
+	{ 0x0140a000, 0x00000004 },
+	{ 0x00cc2000, 0x00000004 },
+	{ 0x08c053d3, 0x00000040 },
+	{ 0x00008000, 0000000000 },
+	{ 0x0000f39d, 0x00000004 },
+	{ 0x0140a000, 0x00000004 },
+	{ 0x00cc2000, 0x00000004 },
+	{ 0x08c0539e, 0x00000040 },
+	{ 0x00008000, 0000000000 },
+	{ 0x03c00830, 0x00000004 },
+	{ 0x4200e000, 0000000000 },
+	{ 0x0000a000, 0x00000004 },
+	{ 0x200045e0, 0x00000004 },
+	{ 0x0000e5e1, 0000000000 },
+	{ 0x00000001, 0000000000 },
+	{ 0x000700e1, 0x00000004 },
+	{ 0x0800e394, 0000000000 },
 	{ 0000000000, 0000000000 },
-	{ 0x0000775c, 0x00000002 },
-	{ 0x00a05000, 0x00000002 },
-	{ 0x00661000, 0x00000002 },
-	{ 0x0460275d, 0x00000020 },
-	{ 0x00004000, 0000000000 },
-	{ 0x01e00830, 0x00000002 },
-	{ 0x21007000, 0000000000 },
-	{ 0x6464614d, 0000000000 },
-	{ 0x69687420, 0000000000 },
-	{ 0x00000073, 0000000000 },
 	{ 0000000000, 0000000000 },
-	{ 0x00005000, 0x00000002 },
-	{ 0x000380d0, 0x00000002 },
-	{ 0x040025e0, 0x00000002 },
-	{ 0x000075e1, 0000000000 },
-	{ 0x00000001, 0000000000 },
-	{ 0x000380e0, 0x00000002 },
-	{ 0x04002394, 0x00000002 },
-	{ 0x00005000, 0000000000 },
 	{ 0000000000, 0000000000 },
 	{ 0000000000, 0000000000 },
-	{ 0x00000008, 0000000000 },
-	{ 0x00000004, 0000000000 },
 	{ 0000000000, 0000000000 },
 	{ 0000000000, 0000000000 },
 	{ 0000000000, 0000000000 },
@@ -559,8 +817,7 @@ static u32 radeon_cp_microcode[][2] = {
 	{ 0000000000, 0000000000 },
 };
 
-
-int RADEON_READ_PLL(drm_device_t *dev, int addr)
+static int RADEON_READ_PLL(drm_device_t * dev, int addr)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 
@@ -569,138 +826,141 @@ int RADEON_READ_PLL(drm_device_t *dev, int addr)
 }
 
 #if RADEON_FIFO_DEBUG
-static void radeon_status( drm_radeon_private_t *dev_priv )
+static void radeon_status(drm_radeon_private_t * dev_priv)
 {
-	printk( "%s:\n", __FUNCTION__ );
-	printk( "RBBM_STATUS = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_RBBM_STATUS ) );
-	printk( "CP_RB_RTPR = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_CP_RB_RPTR ) );
-	printk( "CP_RB_WTPR = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_CP_RB_WPTR ) );
-	printk( "AIC_CNTL = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_AIC_CNTL ) );
-	printk( "AIC_STAT = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_AIC_STAT ) );
-	printk( "AIC_PT_BASE = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_AIC_PT_BASE ) );
-	printk( "TLB_ADDR = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_AIC_TLB_ADDR ) );
-	printk( "TLB_DATA = 0x%08x\n",
-		(unsigned int)RADEON_READ( RADEON_AIC_TLB_DATA ) );
+	printk("%s:\n", __FUNCTION__);
+	printk("RBBM_STATUS = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_RBBM_STATUS));
+	printk("CP_RB_RTPR = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_CP_RB_RPTR));
+	printk("CP_RB_WTPR = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_CP_RB_WPTR));
+	printk("AIC_CNTL = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_AIC_CNTL));
+	printk("AIC_STAT = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_AIC_STAT));
+	printk("AIC_PT_BASE = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_AIC_PT_BASE));
+	printk("TLB_ADDR = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_AIC_TLB_ADDR));
+	printk("TLB_DATA = 0x%08x\n",
+	       (unsigned int)RADEON_READ(RADEON_AIC_TLB_DATA));
 }
 #endif
 
-
 /* ================================================================
  * Engine, FIFO control
  */
 
-static int radeon_do_pixcache_flush( drm_radeon_private_t *dev_priv )
+static int radeon_do_pixcache_flush(drm_radeon_private_t * dev_priv)
 {
 	u32 tmp;
 	int i;
 
 	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
-	tmp  = RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT );
+	tmp = RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT);
 	tmp |= RADEON_RB2D_DC_FLUSH_ALL;
-	RADEON_WRITE( RADEON_RB2D_DSTCACHE_CTLSTAT, tmp );
+	RADEON_WRITE(RADEON_RB2D_DSTCACHE_CTLSTAT, tmp);
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		if ( !(RADEON_READ( RADEON_RB2D_DSTCACHE_CTLSTAT )
-		       & RADEON_RB2D_DC_BUSY) ) {
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (!(RADEON_READ(RADEON_RB2D_DSTCACHE_CTLSTAT)
+		      & RADEON_RB2D_DC_BUSY)) {
 			return 0;
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 #if RADEON_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
-	radeon_status( dev_priv );
+	DRM_ERROR("failed!\n");
+	radeon_status(dev_priv);
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-static int radeon_do_wait_for_fifo( drm_radeon_private_t *dev_priv,
-				    int entries )
+static int radeon_do_wait_for_fifo(drm_radeon_private_t * dev_priv, int entries)
 {
 	int i;
 
 	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		int slots = ( RADEON_READ( RADEON_RBBM_STATUS )
-			      & RADEON_RBBM_FIFOCNT_MASK );
-		if ( slots >= entries ) return 0;
-		DRM_UDELAY( 1 );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		int slots = (RADEON_READ(RADEON_RBBM_STATUS)
+			     & RADEON_RBBM_FIFOCNT_MASK);
+		if (slots >= entries)
+			return 0;
+		DRM_UDELAY(1);
 	}
 
 #if RADEON_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
-	radeon_status( dev_priv );
+	DRM_ERROR("failed!\n");
+	radeon_status(dev_priv);
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-static int radeon_do_wait_for_idle( drm_radeon_private_t *dev_priv )
+static int radeon_do_wait_for_idle(drm_radeon_private_t * dev_priv)
 {
 	int i, ret;
 
 	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
-	ret = radeon_do_wait_for_fifo( dev_priv, 64 );
-	if ( ret ) return ret;
+	ret = radeon_do_wait_for_fifo(dev_priv, 64);
+	if (ret)
+		return ret;
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		if ( !(RADEON_READ( RADEON_RBBM_STATUS )
-		       & RADEON_RBBM_ACTIVE) ) {
-			radeon_do_pixcache_flush( dev_priv );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		if (!(RADEON_READ(RADEON_RBBM_STATUS)
+		      & RADEON_RBBM_ACTIVE)) {
+			radeon_do_pixcache_flush(dev_priv);
 			return 0;
 		}
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 #if RADEON_FIFO_DEBUG
-	DRM_ERROR( "failed!\n" );
-	radeon_status( dev_priv );
+	DRM_ERROR("failed!\n");
+	radeon_status(dev_priv);
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-
 /* ================================================================
  * CP control, initialization
  */
 
 /* Load the microcode for the CP */
-static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv )
+static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv)
 {
 	int i;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	radeon_do_wait_for_idle( dev_priv );
+	radeon_do_wait_for_idle(dev_priv);
 
-	RADEON_WRITE( RADEON_CP_ME_RAM_ADDR, 0 );
+	RADEON_WRITE(RADEON_CP_ME_RAM_ADDR, 0);
 
-	if (dev_priv->is_r200)
-	{
+	if (dev_priv->microcode_version==UCODE_R200) {
 		DRM_INFO("Loading R200 Microcode\n");
-		for ( i = 0 ; i < 256 ; i++ ) 
-		{
-			RADEON_WRITE( RADEON_CP_ME_RAM_DATAH,
-				      R200_cp_microcode[i][1] );
-			RADEON_WRITE( RADEON_CP_ME_RAM_DATAL,
-				      R200_cp_microcode[i][0] );
+		for (i = 0; i < 256; i++) {
+			RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+				     R200_cp_microcode[i][1]);
+			RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+				     R200_cp_microcode[i][0]);
 		}
-	}
-	else
-	{
+	} else if (dev_priv->microcode_version==UCODE_R300) {
+		DRM_INFO("Loading R300 Microcode\n");
 		for ( i = 0 ; i < 256 ; i++ ) {
 			RADEON_WRITE( RADEON_CP_ME_RAM_DATAH,
-				      radeon_cp_microcode[i][1] );
+				      R300_cp_microcode[i][1] );
 			RADEON_WRITE( RADEON_CP_ME_RAM_DATAL,
-				      radeon_cp_microcode[i][0] );
+				      R300_cp_microcode[i][0] );
+		}
+	} else {
+		for (i = 0; i < 256; i++) {
+			RADEON_WRITE(RADEON_CP_ME_RAM_DATAH,
+				     radeon_cp_microcode[i][1]);
+			RADEON_WRITE(RADEON_CP_ME_RAM_DATAL,
+				     radeon_cp_microcode[i][0]);
 		}
 	}
 }
@@ -709,25 +969,25 @@ static void radeon_cp_load_microcode( drm_radeon_private_t *dev_priv )
  * prior to a wait for idle, as it informs the engine that the command
  * stream is ending.
  */
-static void radeon_do_cp_flush( drm_radeon_private_t *dev_priv )
+static void radeon_do_cp_flush(drm_radeon_private_t * dev_priv)
 {
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 #if 0
 	u32 tmp;
 
-	tmp = RADEON_READ( RADEON_CP_RB_WPTR ) | (1 << 31);
-	RADEON_WRITE( RADEON_CP_RB_WPTR, tmp );
+	tmp = RADEON_READ(RADEON_CP_RB_WPTR) | (1 << 31);
+	RADEON_WRITE(RADEON_CP_RB_WPTR, tmp);
 #endif
 }
 
 /* Wait for the CP to go idle.
  */
-int radeon_do_cp_idle( drm_radeon_private_t *dev_priv )
+int radeon_do_cp_idle(drm_radeon_private_t * dev_priv)
 {
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	BEGIN_RING( 6 );
+	BEGIN_RING(6);
 
 	RADEON_PURGE_CACHE();
 	RADEON_PURGE_ZCACHE();
@@ -736,23 +996,23 @@ int radeon_do_cp_idle( drm_radeon_private_t *dev_priv )
 	ADVANCE_RING();
 	COMMIT_RING();
 
-	return radeon_do_wait_for_idle( dev_priv );
+	return radeon_do_wait_for_idle(dev_priv);
 }
 
 /* Start the Command Processor.
  */
-static void radeon_do_cp_start( drm_radeon_private_t *dev_priv )
+static void radeon_do_cp_start(drm_radeon_private_t * dev_priv)
 {
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	radeon_do_wait_for_idle( dev_priv );
+	radeon_do_wait_for_idle(dev_priv);
 
-	RADEON_WRITE( RADEON_CP_CSQ_CNTL, dev_priv->cp_mode );
+	RADEON_WRITE(RADEON_CP_CSQ_CNTL, dev_priv->cp_mode);
 
 	dev_priv->cp_running = 1;
 
-	BEGIN_RING( 6 );
+	BEGIN_RING(6);
 
 	RADEON_PURGE_CACHE();
 	RADEON_PURGE_ZCACHE();
@@ -766,14 +1026,14 @@ static void radeon_do_cp_start( drm_radeon_private_t *dev_priv )
  * commands, so you must wait for the CP command stream to complete
  * before calling this routine.
  */
-static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv )
+static void radeon_do_cp_reset(drm_radeon_private_t * dev_priv)
 {
 	u32 cur_read_ptr;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR );
-	RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr );
-	SET_RING_HEAD( dev_priv, cur_read_ptr );
+	cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR);
+	RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr);
+	SET_RING_HEAD(dev_priv, cur_read_ptr);
 	dev_priv->ring.tail = cur_read_ptr;
 }
 
@@ -781,118 +1041,116 @@ static void radeon_do_cp_reset( drm_radeon_private_t *dev_priv )
  * commands, so you must flush the command stream and wait for the CP
  * to go idle before calling this routine.
  */
-static void radeon_do_cp_stop( drm_radeon_private_t *dev_priv )
+static void radeon_do_cp_stop(drm_radeon_private_t * dev_priv)
 {
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	RADEON_WRITE( RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS );
+	RADEON_WRITE(RADEON_CP_CSQ_CNTL, RADEON_CSQ_PRIDIS_INDDIS);
 
 	dev_priv->cp_running = 0;
 }
 
 /* Reset the engine.  This will stop the CP if it is running.
  */
-static int radeon_do_engine_reset( drm_device_t *dev )
+static int radeon_do_engine_reset(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	u32 clock_cntl_index, mclk_cntl, rbbm_soft_reset;
-	DRM_DEBUG( "\n" );
-
-	radeon_do_pixcache_flush( dev_priv );
-
-	clock_cntl_index = RADEON_READ( RADEON_CLOCK_CNTL_INDEX );
-	mclk_cntl = RADEON_READ_PLL( dev, RADEON_MCLK_CNTL );
-
-	RADEON_WRITE_PLL( RADEON_MCLK_CNTL, ( mclk_cntl |
-					      RADEON_FORCEON_MCLKA |
-					      RADEON_FORCEON_MCLKB |
- 					      RADEON_FORCEON_YCLKA |
-					      RADEON_FORCEON_YCLKB |
-					      RADEON_FORCEON_MC |
-					      RADEON_FORCEON_AIC ) );
-
-	rbbm_soft_reset = RADEON_READ( RADEON_RBBM_SOFT_RESET );
-
-	RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset |
-						RADEON_SOFT_RESET_CP |
+	DRM_DEBUG("\n");
+
+	radeon_do_pixcache_flush(dev_priv);
+
+	clock_cntl_index = RADEON_READ(RADEON_CLOCK_CNTL_INDEX);
+	mclk_cntl = RADEON_READ_PLL(dev, RADEON_MCLK_CNTL);
+
+	RADEON_WRITE_PLL(RADEON_MCLK_CNTL, (mclk_cntl |
+					    RADEON_FORCEON_MCLKA |
+					    RADEON_FORCEON_MCLKB |
+					    RADEON_FORCEON_YCLKA |
+					    RADEON_FORCEON_YCLKB |
+					    RADEON_FORCEON_MC |
+					    RADEON_FORCEON_AIC));
+
+	rbbm_soft_reset = RADEON_READ(RADEON_RBBM_SOFT_RESET);
+
+	RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset |
+					      RADEON_SOFT_RESET_CP |
+					      RADEON_SOFT_RESET_HI |
+					      RADEON_SOFT_RESET_SE |
+					      RADEON_SOFT_RESET_RE |
+					      RADEON_SOFT_RESET_PP |
+					      RADEON_SOFT_RESET_E2 |
+					      RADEON_SOFT_RESET_RB));
+	RADEON_READ(RADEON_RBBM_SOFT_RESET);
+	RADEON_WRITE(RADEON_RBBM_SOFT_RESET, (rbbm_soft_reset &
+					      ~(RADEON_SOFT_RESET_CP |
 						RADEON_SOFT_RESET_HI |
 						RADEON_SOFT_RESET_SE |
 						RADEON_SOFT_RESET_RE |
 						RADEON_SOFT_RESET_PP |
 						RADEON_SOFT_RESET_E2 |
-						RADEON_SOFT_RESET_RB ) );
-	RADEON_READ( RADEON_RBBM_SOFT_RESET );
-	RADEON_WRITE( RADEON_RBBM_SOFT_RESET, ( rbbm_soft_reset &
-						~( RADEON_SOFT_RESET_CP |
-						   RADEON_SOFT_RESET_HI |
-						   RADEON_SOFT_RESET_SE |
-						   RADEON_SOFT_RESET_RE |
-						   RADEON_SOFT_RESET_PP |
-						   RADEON_SOFT_RESET_E2 |
-						   RADEON_SOFT_RESET_RB ) ) );
-	RADEON_READ( RADEON_RBBM_SOFT_RESET );
-
-
-	RADEON_WRITE_PLL( RADEON_MCLK_CNTL, mclk_cntl );
-	RADEON_WRITE( RADEON_CLOCK_CNTL_INDEX, clock_cntl_index );
-	RADEON_WRITE( RADEON_RBBM_SOFT_RESET,  rbbm_soft_reset );
+						RADEON_SOFT_RESET_RB)));
+	RADEON_READ(RADEON_RBBM_SOFT_RESET);
+
+	RADEON_WRITE_PLL(RADEON_MCLK_CNTL, mclk_cntl);
+	RADEON_WRITE(RADEON_CLOCK_CNTL_INDEX, clock_cntl_index);
+	RADEON_WRITE(RADEON_RBBM_SOFT_RESET, rbbm_soft_reset);
 
 	/* Reset the CP ring */
-	radeon_do_cp_reset( dev_priv );
+	radeon_do_cp_reset(dev_priv);
 
 	/* The CP is no longer running after an engine reset */
 	dev_priv->cp_running = 0;
 
 	/* Reset any pending vertex, indirect buffers */
-	radeon_freelist_reset( dev );
+	radeon_freelist_reset(dev);
 
 	return 0;
 }
 
-static void radeon_cp_init_ring_buffer( drm_device_t *dev,
-				        drm_radeon_private_t *dev_priv )
+static void radeon_cp_init_ring_buffer(drm_device_t * dev,
+				       drm_radeon_private_t * dev_priv)
 {
 	u32 ring_start, cur_read_ptr;
 	u32 tmp;
 
 	/* Initialize the memory controller */
-	RADEON_WRITE( RADEON_MC_FB_LOCATION,
-		      ( ( dev_priv->gart_vm_start - 1 ) & 0xffff0000 )
-		    | ( dev_priv->fb_location >> 16 ) );
+	RADEON_WRITE(RADEON_MC_FB_LOCATION,
+		     ((dev_priv->gart_vm_start - 1) & 0xffff0000)
+		     | (dev_priv->fb_location >> 16));
 
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci ) {
-		RADEON_WRITE( RADEON_MC_AGP_LOCATION,
-			      (((dev_priv->gart_vm_start - 1 +
-				 dev_priv->gart_size) & 0xffff0000) |
-			       (dev_priv->gart_vm_start >> 16)) );
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP) {
+		RADEON_WRITE(RADEON_MC_AGP_LOCATION,
+			     (((dev_priv->gart_vm_start - 1 +
+				dev_priv->gart_size) & 0xffff0000) |
+			      (dev_priv->gart_vm_start >> 16)));
 
 		ring_start = (dev_priv->cp_ring->offset
-			      - dev->agp->base
-			      + dev_priv->gart_vm_start);
-       } else
+			      - dev->agp->base + dev_priv->gart_vm_start);
+	} else
 #endif
 		ring_start = (dev_priv->cp_ring->offset
-			      - dev->sg->handle
-			      + dev_priv->gart_vm_start);
+			      - dev->sg->handle + dev_priv->gart_vm_start);
 
-	RADEON_WRITE( RADEON_CP_RB_BASE, ring_start );
+	RADEON_WRITE(RADEON_CP_RB_BASE, ring_start);
 
 	/* Set the write pointer delay */
-	RADEON_WRITE( RADEON_CP_RB_WPTR_DELAY, 0 );
+	RADEON_WRITE(RADEON_CP_RB_WPTR_DELAY, 0);
 
 	/* Initialize the ring buffer's read and write pointers */
-	cur_read_ptr = RADEON_READ( RADEON_CP_RB_RPTR );
-	RADEON_WRITE( RADEON_CP_RB_WPTR, cur_read_ptr );
-	SET_RING_HEAD( dev_priv, cur_read_ptr );
+	cur_read_ptr = RADEON_READ(RADEON_CP_RB_RPTR);
+	RADEON_WRITE(RADEON_CP_RB_WPTR, cur_read_ptr);
+	SET_RING_HEAD(dev_priv, cur_read_ptr);
 	dev_priv->ring.tail = cur_read_ptr;
 
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci ) {
-		RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
-			      dev_priv->ring_rptr->offset
-			      - dev->agp->base
-			      + dev_priv->gart_vm_start);
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP) {
+		/* set RADEON_AGP_BASE here instead of relying on X from user space */
+		RADEON_WRITE(RADEON_AGP_BASE, (unsigned int)dev->agp->base);
+		RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR,
+			     dev_priv->ring_rptr->offset
+			     - dev->agp->base + dev_priv->gart_vm_start);
 	} else
 #endif
 	{
@@ -902,11 +1160,10 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev,
 		tmp_ofs = dev_priv->ring_rptr->offset - dev->sg->handle;
 		page_ofs = tmp_ofs >> PAGE_SHIFT;
 
-		RADEON_WRITE( RADEON_CP_RB_RPTR_ADDR,
-			     entry->busaddr[page_ofs]);
-		DRM_DEBUG( "ring rptr: offset=0x%08lx handle=0x%08lx\n",
-			   (unsigned long) entry->busaddr[page_ofs],
-			   entry->handle + tmp_ofs );
+		RADEON_WRITE(RADEON_CP_RB_RPTR_ADDR, entry->busaddr[page_ofs]);
+		DRM_DEBUG("ring rptr: offset=0x%08lx handle=0x%08lx\n",
+			  (unsigned long)entry->busaddr[page_ofs],
+			  entry->handle + tmp_ofs);
 	}
 
 	/* Initialize the scratch register pointer.  This will cause
@@ -916,123 +1173,126 @@ static void radeon_cp_init_ring_buffer( drm_device_t *dev,
 	 * We simply put this behind the ring read pointer, this works
 	 * with PCI GART as well as (whatever kind of) AGP GART
 	 */
-	RADEON_WRITE( RADEON_SCRATCH_ADDR, RADEON_READ( RADEON_CP_RB_RPTR_ADDR )
-					 + RADEON_SCRATCH_REG_OFFSET );
+	RADEON_WRITE(RADEON_SCRATCH_ADDR, RADEON_READ(RADEON_CP_RB_RPTR_ADDR)
+		     + RADEON_SCRATCH_REG_OFFSET);
 
 	dev_priv->scratch = ((__volatile__ u32 *)
 			     dev_priv->ring_rptr->handle +
 			     (RADEON_SCRATCH_REG_OFFSET / sizeof(u32)));
 
-	RADEON_WRITE( RADEON_SCRATCH_UMSK, 0x7 );
+	RADEON_WRITE(RADEON_SCRATCH_UMSK, 0x7);
 
 	/* Writeback doesn't seem to work everywhere, test it first */
-	DRM_WRITE32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0 );
-	RADEON_WRITE( RADEON_SCRATCH_REG1, 0xdeadbeef );
+	DRM_WRITE32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1), 0);
+	RADEON_WRITE(RADEON_SCRATCH_REG1, 0xdeadbeef);
 
-	for ( tmp = 0 ; tmp < dev_priv->usec_timeout ; tmp++ ) {
-		if ( DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(1) ) == 0xdeadbeef )
+	for (tmp = 0; tmp < dev_priv->usec_timeout; tmp++) {
+		if (DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1)) ==
+		    0xdeadbeef)
 			break;
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
-	if ( tmp < dev_priv->usec_timeout ) {
+	if (tmp < dev_priv->usec_timeout) {
 		dev_priv->writeback_works = 1;
-		DRM_DEBUG( "writeback test succeeded, tmp=%d\n", tmp );
+		DRM_DEBUG("writeback test succeeded, tmp=%d\n", tmp);
 	} else {
 		dev_priv->writeback_works = 0;
-		DRM_DEBUG( "writeback test failed\n" );
+		DRM_DEBUG("writeback test failed\n");
 	}
 
 	dev_priv->sarea_priv->last_frame = dev_priv->scratch[0] = 0;
-	RADEON_WRITE( RADEON_LAST_FRAME_REG,
-		      dev_priv->sarea_priv->last_frame );
+	RADEON_WRITE(RADEON_LAST_FRAME_REG, dev_priv->sarea_priv->last_frame);
 
 	dev_priv->sarea_priv->last_dispatch = dev_priv->scratch[1] = 0;
-	RADEON_WRITE( RADEON_LAST_DISPATCH_REG,
-		      dev_priv->sarea_priv->last_dispatch );
+	RADEON_WRITE(RADEON_LAST_DISPATCH_REG,
+		     dev_priv->sarea_priv->last_dispatch);
 
 	dev_priv->sarea_priv->last_clear = dev_priv->scratch[2] = 0;
-	RADEON_WRITE( RADEON_LAST_CLEAR_REG,
-		      dev_priv->sarea_priv->last_clear );
+	RADEON_WRITE(RADEON_LAST_CLEAR_REG, dev_priv->sarea_priv->last_clear);
 
 	/* Set ring buffer size */
 #ifdef __BIG_ENDIAN
-	RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT );
+	RADEON_WRITE(RADEON_CP_RB_CNTL,
+		     dev_priv->ring.size_l2qw | RADEON_BUF_SWAP_32BIT);
 #else
-	RADEON_WRITE( RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw );
+	RADEON_WRITE(RADEON_CP_RB_CNTL, dev_priv->ring.size_l2qw);
 #endif
 
-	radeon_do_wait_for_idle( dev_priv );
+	radeon_do_wait_for_idle(dev_priv);
 
 	/* Turn on bus mastering */
-	tmp = RADEON_READ( RADEON_BUS_CNTL ) & ~RADEON_BUS_MASTER_DIS;
-	RADEON_WRITE( RADEON_BUS_CNTL, tmp );
+	tmp = RADEON_READ(RADEON_BUS_CNTL) & ~RADEON_BUS_MASTER_DIS;
+	RADEON_WRITE(RADEON_BUS_CNTL, tmp);
 
 	/* Sync everything up */
-	RADEON_WRITE( RADEON_ISYNC_CNTL,
-		      (RADEON_ISYNC_ANY2D_IDLE3D |
-		       RADEON_ISYNC_ANY3D_IDLE2D |
-		       RADEON_ISYNC_WAIT_IDLEGUI |
-		       RADEON_ISYNC_CPSCRATCH_IDLEGUI) );
+	RADEON_WRITE(RADEON_ISYNC_CNTL,
+		     (RADEON_ISYNC_ANY2D_IDLE3D |
+		      RADEON_ISYNC_ANY3D_IDLE2D |
+		      RADEON_ISYNC_WAIT_IDLEGUI |
+		      RADEON_ISYNC_CPSCRATCH_IDLEGUI));
 }
 
 /* Enable or disable PCI GART on the chip */
-static void radeon_set_pcigart( drm_radeon_private_t *dev_priv, int on )
+static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on)
 {
-	u32 tmp	= RADEON_READ( RADEON_AIC_CNTL );
+	u32 tmp = RADEON_READ(RADEON_AIC_CNTL);
 
-	if ( on ) {
-		RADEON_WRITE( RADEON_AIC_CNTL, tmp | RADEON_PCIGART_TRANSLATE_EN );
+	if (on) {
+		RADEON_WRITE(RADEON_AIC_CNTL,
+			     tmp | RADEON_PCIGART_TRANSLATE_EN);
 
 		/* set PCI GART page-table base address
 		 */
-		RADEON_WRITE( RADEON_AIC_PT_BASE, dev_priv->bus_pci_gart );
+		RADEON_WRITE(RADEON_AIC_PT_BASE, dev_priv->bus_pci_gart);
 
 		/* set address range for PCI address translate
 		 */
-		RADEON_WRITE( RADEON_AIC_LO_ADDR, dev_priv->gart_vm_start );
-		RADEON_WRITE( RADEON_AIC_HI_ADDR, dev_priv->gart_vm_start
-						  + dev_priv->gart_size - 1);
+		RADEON_WRITE(RADEON_AIC_LO_ADDR, dev_priv->gart_vm_start);
+		RADEON_WRITE(RADEON_AIC_HI_ADDR, dev_priv->gart_vm_start
+			     + dev_priv->gart_size - 1);
 
 		/* Turn off AGP aperture -- is this required for PCI GART?
 		 */
-		RADEON_WRITE( RADEON_MC_AGP_LOCATION, 0xffffffc0 ); /* ?? */
-		RADEON_WRITE( RADEON_AGP_COMMAND, 0 ); /* clear AGP_COMMAND */
+		RADEON_WRITE(RADEON_MC_AGP_LOCATION, 0xffffffc0);	/* ?? */
+		RADEON_WRITE(RADEON_AGP_COMMAND, 0);	/* clear AGP_COMMAND */
 	} else {
-		RADEON_WRITE( RADEON_AIC_CNTL, tmp & ~RADEON_PCIGART_TRANSLATE_EN );
+		RADEON_WRITE(RADEON_AIC_CNTL,
+			     tmp & ~RADEON_PCIGART_TRANSLATE_EN);
 	}
 }
 
-static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
+static int radeon_do_init_cp(drm_device_t * dev, drm_radeon_init_t * init)
 {
-	drm_radeon_private_t *dev_priv;
-	DRM_DEBUG( "\n" );
-
-	dev_priv = DRM(alloc)( sizeof(drm_radeon_private_t), DRM_MEM_DRIVER );
-	if ( dev_priv == NULL )
-		return DRM_ERR(ENOMEM);
-
-	memset( dev_priv, 0, sizeof(drm_radeon_private_t) );
-
-	dev_priv->is_pci = init->is_pci;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG("\n");
 
-	if ( dev_priv->is_pci && !dev->sg ) {
-		DRM_ERROR( "PCI GART memory not allocated!\n" );
-		dev->dev_private = (void *)dev_priv;
+	if ((!(dev_priv->flags & CHIP_IS_AGP)) && !dev->sg) {
+		DRM_ERROR("PCI GART memory not allocated!\n");
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
 
 	dev_priv->usec_timeout = init->usec_timeout;
-	if ( dev_priv->usec_timeout < 1 ||
-	     dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT ) {
-		DRM_DEBUG( "TIMEOUT problem!\n" );
-		dev->dev_private = (void *)dev_priv;
+	if (dev_priv->usec_timeout < 1 ||
+	    dev_priv->usec_timeout > RADEON_MAX_USEC_TIMEOUT) {
+		DRM_DEBUG("TIMEOUT problem!\n");
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	dev_priv->is_r200 = (init->func == RADEON_INIT_R200_CP);
+	switch(init->func) {
+	case RADEON_INIT_R200_CP:
+		dev_priv->microcode_version=UCODE_R200;
+		break;
+	case RADEON_INIT_R300_CP:
+		dev_priv->microcode_version=UCODE_R300;
+		break;
+	default:
+		dev_priv->microcode_version=UCODE_R100;
+		break;
+	}
+
 	dev_priv->do_boxes = 0;
 	dev_priv->cp_mode = init->cp_mode;
 
@@ -1040,15 +1300,14 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 	 * but the ring can be in either AGP or PCI space for the ring
 	 * read pointer.
 	 */
-	if ( ( init->cp_mode != RADEON_CSQ_PRIBM_INDDIS ) &&
-	     ( init->cp_mode != RADEON_CSQ_PRIBM_INDBM ) ) {
-		DRM_DEBUG( "BAD cp_mode (%x)!\n", init->cp_mode );
-		dev->dev_private = (void *)dev_priv;
+	if ((init->cp_mode != RADEON_CSQ_PRIBM_INDDIS) &&
+	    (init->cp_mode != RADEON_CSQ_PRIBM_INDBM)) {
+		DRM_DEBUG("BAD cp_mode (%x)!\n", init->cp_mode);
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	switch ( init->fb_bpp ) {
+	switch (init->fb_bpp) {
 	case 16:
 		dev_priv->color_fmt = RADEON_COLOR_FORMAT_RGB565;
 		break;
@@ -1057,12 +1316,12 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 		dev_priv->color_fmt = RADEON_COLOR_FORMAT_ARGB8888;
 		break;
 	}
-	dev_priv->front_offset	= init->front_offset;
-	dev_priv->front_pitch	= init->front_pitch;
-	dev_priv->back_offset	= init->back_offset;
-	dev_priv->back_pitch	= init->back_pitch;
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->front_pitch = init->front_pitch;
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->back_pitch = init->back_pitch;
 
-	switch ( init->depth_bpp ) {
+	switch (init->depth_bpp) {
 	case 16:
 		dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_16BIT_INT_Z;
 		break;
@@ -1071,8 +1330,8 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 		dev_priv->depth_fmt = RADEON_DEPTH_FORMAT_24BIT_INT_Z;
 		break;
 	}
-	dev_priv->depth_offset	= init->depth_offset;
-	dev_priv->depth_pitch	= init->depth_pitch;
+	dev_priv->depth_offset = init->depth_offset;
+	dev_priv->depth_pitch = init->depth_pitch;
 
 	/* Hardware state for depth clears.  Remove this if/when we no
 	 * longer clear the depth buffer with a 3D rectangle.  Hard-code
@@ -1081,16 +1340,16 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 	 */
 	dev_priv->depth_clear.rb3d_cntl = (RADEON_PLANE_MASK_ENABLE |
 					   (dev_priv->color_fmt << 10) |
-					   (1<<15));
+					   (dev_priv->microcode_version == UCODE_R100 ?
+						RADEON_ZBLOCK16 : 0));
 
-	dev_priv->depth_clear.rb3d_zstencilcntl = 
-		(dev_priv->depth_fmt |
-		 RADEON_Z_TEST_ALWAYS |
-		 RADEON_STENCIL_TEST_ALWAYS |
-		 RADEON_STENCIL_S_FAIL_REPLACE |
-		 RADEON_STENCIL_ZPASS_REPLACE |
-		 RADEON_STENCIL_ZFAIL_REPLACE |
-		 RADEON_Z_WRITE_ENABLE);
+	dev_priv->depth_clear.rb3d_zstencilcntl =
+	    (dev_priv->depth_fmt |
+	     RADEON_Z_TEST_ALWAYS |
+	     RADEON_STENCIL_TEST_ALWAYS |
+	     RADEON_STENCIL_S_FAIL_REPLACE |
+	     RADEON_STENCIL_ZPASS_REPLACE |
+	     RADEON_STENCIL_ZFAIL_REPLACE | RADEON_Z_WRITE_ENABLE);
 
 	dev_priv->depth_clear.se_cntl = (RADEON_FFACE_CULL_CW |
 					 RADEON_BFACE_SOLID |
@@ -1112,286 +1371,274 @@ static int radeon_do_init_cp( drm_device_t *dev, drm_radeon_init_t *init )
 	dev_priv->ring_rptr_offset = init->ring_rptr_offset;
 	dev_priv->buffers_offset = init->buffers_offset;
 	dev_priv->gart_textures_offset = init->gart_textures_offset;
-	
-	if(!dev_priv->sarea) {
+
+	if (!dev_priv->sarea) {
 		DRM_ERROR("could not find sarea!\n");
-		dev->dev_private = (void *)dev_priv;
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_FIND_MAP( dev_priv->mmio, init->mmio_offset );
-	if(!dev_priv->mmio) {
+	dev_priv->mmio = drm_core_findmap(dev, init->mmio_offset);
+	if (!dev_priv->mmio) {
 		DRM_ERROR("could not find mmio region!\n");
-		dev->dev_private = (void *)dev_priv;
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->cp_ring, init->ring_offset );
-	if(!dev_priv->cp_ring) {
+	dev_priv->cp_ring = drm_core_findmap(dev, init->ring_offset);
+	if (!dev_priv->cp_ring) {
 		DRM_ERROR("could not find cp ring region!\n");
-		dev->dev_private = (void *)dev_priv;
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->ring_rptr, init->ring_rptr_offset );
-	if(!dev_priv->ring_rptr) {
+	dev_priv->ring_rptr = drm_core_findmap(dev, init->ring_rptr_offset);
+	if (!dev_priv->ring_rptr) {
 		DRM_ERROR("could not find ring read pointer!\n");
-		dev->dev_private = (void *)dev_priv;
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
-	DRM_FIND_MAP( dev_priv->buffers, init->buffers_offset );
-	if(!dev_priv->buffers) {
+	dev->agp_buffer_map = drm_core_findmap(dev, init->buffers_offset);
+	if (!dev->agp_buffer_map) {
 		DRM_ERROR("could not find dma buffer region!\n");
-		dev->dev_private = (void *)dev_priv;
 		radeon_do_cleanup_cp(dev);
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( init->gart_textures_offset ) {
-		DRM_FIND_MAP( dev_priv->gart_textures, init->gart_textures_offset );
-		if ( !dev_priv->gart_textures ) {
+	if (init->gart_textures_offset) {
+		dev_priv->gart_textures =
+		    drm_core_findmap(dev, init->gart_textures_offset);
+		if (!dev_priv->gart_textures) {
 			DRM_ERROR("could not find GART texture region!\n");
-			dev->dev_private = (void *)dev_priv;
 			radeon_do_cleanup_cp(dev);
 			return DRM_ERR(EINVAL);
 		}
 	}
 
 	dev_priv->sarea_priv =
-		(drm_radeon_sarea_t *)((u8 *)dev_priv->sarea->handle +
-				       init->sarea_priv_offset);
-
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci ) {
-		DRM_IOREMAP( dev_priv->cp_ring, dev );
-		DRM_IOREMAP( dev_priv->ring_rptr, dev );
-		DRM_IOREMAP( dev_priv->buffers, dev );
-		if(!dev_priv->cp_ring->handle ||
-		   !dev_priv->ring_rptr->handle ||
-		   !dev_priv->buffers->handle) {
+	    (drm_radeon_sarea_t *) ((u8 *) dev_priv->sarea->handle +
+				    init->sarea_priv_offset);
+
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP) {
+		drm_core_ioremap(dev_priv->cp_ring, dev);
+		drm_core_ioremap(dev_priv->ring_rptr, dev);
+		drm_core_ioremap(dev->agp_buffer_map, dev);
+		if (!dev_priv->cp_ring->handle ||
+		    !dev_priv->ring_rptr->handle ||
+		    !dev->agp_buffer_map->handle) {
 			DRM_ERROR("could not find ioremap agp regions!\n");
-			dev->dev_private = (void *)dev_priv;
 			radeon_do_cleanup_cp(dev);
 			return DRM_ERR(EINVAL);
 		}
 	} else
 #endif
 	{
-		dev_priv->cp_ring->handle =
-			(void *)dev_priv->cp_ring->offset;
+		dev_priv->cp_ring->handle = (void *)dev_priv->cp_ring->offset;
 		dev_priv->ring_rptr->handle =
-			(void *)dev_priv->ring_rptr->offset;
-		dev_priv->buffers->handle = (void *)dev_priv->buffers->offset;
-
-		DRM_DEBUG( "dev_priv->cp_ring->handle %p\n",
-			   dev_priv->cp_ring->handle );
-		DRM_DEBUG( "dev_priv->ring_rptr->handle %p\n",
-			   dev_priv->ring_rptr->handle );
-		DRM_DEBUG( "dev_priv->buffers->handle %p\n",
-			   dev_priv->buffers->handle );
+		    (void *)dev_priv->ring_rptr->offset;
+		dev->agp_buffer_map->handle =
+		    (void *)dev->agp_buffer_map->offset;
+
+		DRM_DEBUG("dev_priv->cp_ring->handle %p\n",
+			  dev_priv->cp_ring->handle);
+		DRM_DEBUG("dev_priv->ring_rptr->handle %p\n",
+			  dev_priv->ring_rptr->handle);
+		DRM_DEBUG("dev->agp_buffer_map->handle %p\n",
+			  dev->agp_buffer_map->handle);
 	}
 
-	dev_priv->fb_location = ( RADEON_READ( RADEON_MC_FB_LOCATION )
-				& 0xffff ) << 16;
+	dev_priv->fb_location = (RADEON_READ(RADEON_MC_FB_LOCATION)
+				 & 0xffff) << 16;
 
-	dev_priv->front_pitch_offset = (((dev_priv->front_pitch/64) << 22) |
-					( ( dev_priv->front_offset
-					  + dev_priv->fb_location ) >> 10 ) );
+	dev_priv->front_pitch_offset = (((dev_priv->front_pitch / 64) << 22) |
+					((dev_priv->front_offset
+					  + dev_priv->fb_location) >> 10));
 
-	dev_priv->back_pitch_offset = (((dev_priv->back_pitch/64) << 22) |
-				       ( ( dev_priv->back_offset
-					 + dev_priv->fb_location ) >> 10 ) );
-
-	dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch/64) << 22) |
-					( ( dev_priv->depth_offset
-					  + dev_priv->fb_location ) >> 10 ) );
+	dev_priv->back_pitch_offset = (((dev_priv->back_pitch / 64) << 22) |
+				       ((dev_priv->back_offset
+					 + dev_priv->fb_location) >> 10));
 
+	dev_priv->depth_pitch_offset = (((dev_priv->depth_pitch / 64) << 22) |
+					((dev_priv->depth_offset
+					  + dev_priv->fb_location) >> 10));
 
 	dev_priv->gart_size = init->gart_size;
 	dev_priv->gart_vm_start = dev_priv->fb_location
-				+ RADEON_READ( RADEON_CONFIG_APER_SIZE );
+	    + RADEON_READ(RADEON_CONFIG_APER_SIZE);
 
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci )
-		dev_priv->gart_buffers_offset = (dev_priv->buffers->offset
-						- dev->agp->base
-						+ dev_priv->gart_vm_start);
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP)
+		dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
+						 - dev->agp->base
+						 + dev_priv->gart_vm_start);
 	else
 #endif
-		dev_priv->gart_buffers_offset = (dev_priv->buffers->offset
-						- dev->sg->handle
-						+ dev_priv->gart_vm_start);
-
-	DRM_DEBUG( "dev_priv->gart_size %d\n",
-		   dev_priv->gart_size );
-	DRM_DEBUG( "dev_priv->gart_vm_start 0x%x\n",
-		   dev_priv->gart_vm_start );
-	DRM_DEBUG( "dev_priv->gart_buffers_offset 0x%lx\n",
-		   dev_priv->gart_buffers_offset );
-
-	dev_priv->ring.start = (u32 *)dev_priv->cp_ring->handle;
-	dev_priv->ring.end = ((u32 *)dev_priv->cp_ring->handle
+		dev_priv->gart_buffers_offset = (dev->agp_buffer_map->offset
+						 - dev->sg->handle
+						 + dev_priv->gart_vm_start);
+
+	DRM_DEBUG("dev_priv->gart_size %d\n", dev_priv->gart_size);
+	DRM_DEBUG("dev_priv->gart_vm_start 0x%x\n", dev_priv->gart_vm_start);
+	DRM_DEBUG("dev_priv->gart_buffers_offset 0x%lx\n",
+		  dev_priv->gart_buffers_offset);
+
+	dev_priv->ring.start = (u32 *) dev_priv->cp_ring->handle;
+	dev_priv->ring.end = ((u32 *) dev_priv->cp_ring->handle
 			      + init->ring_size / sizeof(u32));
 	dev_priv->ring.size = init->ring_size;
-	dev_priv->ring.size_l2qw = DRM(order)( init->ring_size / 8 );
+	dev_priv->ring.size_l2qw = drm_order(init->ring_size / 8);
 
-	dev_priv->ring.tail_mask =
-		(dev_priv->ring.size / sizeof(u32)) - 1;
+	dev_priv->ring.tail_mask = (dev_priv->ring.size / sizeof(u32)) - 1;
 
 	dev_priv->ring.high_mark = RADEON_RING_HIGH_MARK;
 
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci ) {
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP) {
 		/* Turn off PCI GART */
-		radeon_set_pcigart( dev_priv, 0 );
+		radeon_set_pcigart(dev_priv, 0);
 	} else
 #endif
 	{
-		if (!DRM(ati_pcigart_init)( dev, &dev_priv->phys_pci_gart,
-					    &dev_priv->bus_pci_gart)) {
-			DRM_ERROR( "failed to init PCI GART!\n" );
-			dev->dev_private = (void *)dev_priv;
+		if (!drm_ati_pcigart_init(dev, &dev_priv->phys_pci_gart,
+					  &dev_priv->bus_pci_gart)) {
+			DRM_ERROR("failed to init PCI GART!\n");
 			radeon_do_cleanup_cp(dev);
 			return DRM_ERR(ENOMEM);
 		}
 
 		/* Turn on PCI GART */
-		radeon_set_pcigart( dev_priv, 1 );
+		radeon_set_pcigart(dev_priv, 1);
 	}
 
-	radeon_cp_load_microcode( dev_priv );
-	radeon_cp_init_ring_buffer( dev, dev_priv );
+	radeon_cp_load_microcode(dev_priv);
+	radeon_cp_init_ring_buffer(dev, dev_priv);
 
 	dev_priv->last_buf = 0;
 
-	dev->dev_private = (void *)dev_priv;
-
-	radeon_do_engine_reset( dev );
+	radeon_do_engine_reset(dev);
 
 	return 0;
 }
 
-int radeon_do_cleanup_cp( drm_device_t *dev )
+static int radeon_do_cleanup_cp(drm_device_t * dev)
 {
-	DRM_DEBUG( "\n" );
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	DRM_DEBUG("\n");
 
-#if __HAVE_IRQ
 	/* Make sure interrupts are disabled here because the uninstall ioctl
 	 * may not have been called from userspace and after dev_private
 	 * is freed, it's too late.
 	 */
-	if ( dev->irq_enabled ) DRM(irq_uninstall)(dev);
-#endif
-
-	if ( dev->dev_private ) {
-		drm_radeon_private_t *dev_priv = dev->dev_private;
-
-#if __REALLY_HAVE_AGP
-		if ( !dev_priv->is_pci ) {
-			if ( dev_priv->cp_ring != NULL )
-				DRM_IOREMAPFREE( dev_priv->cp_ring, dev );
-			if ( dev_priv->ring_rptr != NULL )
-				DRM_IOREMAPFREE( dev_priv->ring_rptr, dev );
-			if ( dev_priv->buffers != NULL )
-				DRM_IOREMAPFREE( dev_priv->buffers, dev );
-		} else
-#endif
-		{
-			if (!DRM(ati_pcigart_cleanup)( dev,
-						dev_priv->phys_pci_gart,
-						dev_priv->bus_pci_gart ))
-				DRM_ERROR( "failed to cleanup PCI GART!\n" );
+	if (dev->irq_enabled)
+		drm_irq_uninstall(dev);
+
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP) {
+		if (dev_priv->cp_ring != NULL) {
+			drm_core_ioremapfree(dev_priv->cp_ring, dev);
+			dev_priv->cp_ring = NULL;
 		}
-
-		DRM(free)( dev->dev_private, sizeof(drm_radeon_private_t),
-			   DRM_MEM_DRIVER );
-		dev->dev_private = NULL;
+		if (dev_priv->ring_rptr != NULL) {
+			drm_core_ioremapfree(dev_priv->ring_rptr, dev);
+			dev_priv->ring_rptr = NULL;
+		}
+		if (dev->agp_buffer_map != NULL) {
+			drm_core_ioremapfree(dev->agp_buffer_map, dev);
+			dev->agp_buffer_map = NULL;
+		}
+	} else
+#endif
+	{
+		if (!drm_ati_pcigart_cleanup(dev,
+					     dev_priv->phys_pci_gart,
+					     dev_priv->bus_pci_gart))
+			DRM_ERROR("failed to cleanup PCI GART!\n");
 	}
+	/* only clear to the start of flags */
+	memset(dev_priv, 0, offsetof(drm_radeon_private_t, flags));
 
 	return 0;
 }
 
-/* This code will reinit the Radeon CP hardware after a resume from disc.  
- * AFAIK, it would be very difficult to pickle the state at suspend time, so 
+/* This code will reinit the Radeon CP hardware after a resume from disc.
+ * AFAIK, it would be very difficult to pickle the state at suspend time, so
  * here we make sure that all Radeon hardware initialisation is re-done without
  * affecting running applications.
  *
  * Charl P. Botha <http://cpbotha.net>
  */
-static int radeon_do_resume_cp( drm_device_t *dev )
+static int radeon_do_resume_cp(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "Called with no initialization\n" );
-		return DRM_ERR( EINVAL );
+	if (!dev_priv) {
+		DRM_ERROR("Called with no initialization\n");
+		return DRM_ERR(EINVAL);
 	}
 
 	DRM_DEBUG("Starting radeon_do_resume_cp()\n");
 
-#if __REALLY_HAVE_AGP
-	if ( !dev_priv->is_pci ) {
+#if __OS_HAS_AGP
+	if (dev_priv->flags & CHIP_IS_AGP) {
 		/* Turn off PCI GART */
-		radeon_set_pcigart( dev_priv, 0 );
+		radeon_set_pcigart(dev_priv, 0);
 	} else
 #endif
 	{
 		/* Turn on PCI GART */
-		radeon_set_pcigart( dev_priv, 1 );
+		radeon_set_pcigart(dev_priv, 1);
 	}
 
-	radeon_cp_load_microcode( dev_priv );
-	radeon_cp_init_ring_buffer( dev, dev_priv );
+	radeon_cp_load_microcode(dev_priv);
+	radeon_cp_init_ring_buffer(dev, dev_priv);
 
-	radeon_do_engine_reset( dev );
+	radeon_do_engine_reset(dev);
 
 	DRM_DEBUG("radeon_do_resume_cp() complete\n");
 
 	return 0;
 }
 
-
-int radeon_cp_init( DRM_IOCTL_ARGS )
+int radeon_cp_init(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_init_t init;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( init, (drm_radeon_init_t *)data, sizeof(init) );
+	DRM_COPY_FROM_USER_IOCTL(init, (drm_radeon_init_t __user *) data,
+				 sizeof(init));
 
-	switch ( init.func ) {
+	switch (init.func) {
 	case RADEON_INIT_CP:
 	case RADEON_INIT_R200_CP:
-		return radeon_do_init_cp( dev, &init );
+	case RADEON_INIT_R300_CP:
+		return radeon_do_init_cp(dev, &init);
 	case RADEON_CLEANUP_CP:
-		return radeon_do_cleanup_cp( dev );
+		return radeon_do_cleanup_cp(dev);
 	}
 
 	return DRM_ERR(EINVAL);
 }
 
-int radeon_cp_start( DRM_IOCTL_ARGS )
+int radeon_cp_start(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( dev_priv->cp_running ) {
-		DRM_DEBUG( "%s while CP running\n", __FUNCTION__ );
+	if (dev_priv->cp_running) {
+		DRM_DEBUG("%s while CP running\n", __FUNCTION__);
 		return 0;
 	}
-	if ( dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS ) {
-		DRM_DEBUG( "%s called with bogus CP mode (%d)\n",
-			   __FUNCTION__, dev_priv->cp_mode );
+	if (dev_priv->cp_mode == RADEON_CSQ_PRIDIS_INDDIS) {
+		DRM_DEBUG("%s called with bogus CP mode (%d)\n",
+			  __FUNCTION__, dev_priv->cp_mode);
 		return 0;
 	}
 
-	radeon_do_cp_start( dev_priv );
+	radeon_do_cp_start(dev_priv);
 
 	return 0;
 }
@@ -1399,17 +1646,18 @@ int radeon_cp_start( DRM_IOCTL_ARGS )
 /* Stop the CP.  The engine must have been idled before calling this
  * routine.
  */
-int radeon_cp_stop( DRM_IOCTL_ARGS )
+int radeon_cp_stop(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_cp_stop_t stop;
 	int ret;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( stop, (drm_radeon_cp_stop_t *)data, sizeof(stop) );
+	DRM_COPY_FROM_USER_IOCTL(stop, (drm_radeon_cp_stop_t __user *) data,
+				 sizeof(stop));
 
 	if (!dev_priv->cp_running)
 		return 0;
@@ -1417,40 +1665,41 @@ int radeon_cp_stop( DRM_IOCTL_ARGS )
 	/* Flush any pending CP commands.  This ensures any outstanding
 	 * commands are exectuted by the engine before we turn it off.
 	 */
-	if ( stop.flush ) {
-		radeon_do_cp_flush( dev_priv );
+	if (stop.flush) {
+		radeon_do_cp_flush(dev_priv);
 	}
 
 	/* If we fail to make the engine go idle, we return an error
 	 * code so that the DRM ioctl wrapper can try again.
 	 */
-	if ( stop.idle ) {
-		ret = radeon_do_cp_idle( dev_priv );
-		if ( ret ) return ret;
+	if (stop.idle) {
+		ret = radeon_do_cp_idle(dev_priv);
+		if (ret)
+			return ret;
 	}
 
 	/* Finally, we can turn off the CP.  If the engine isn't idle,
 	 * we will get some dropped triangles as they won't be fully
 	 * rendered before the CP is shut down.
 	 */
-	radeon_do_cp_stop( dev_priv );
+	radeon_do_cp_stop(dev_priv);
 
 	/* Reset the engine */
-	radeon_do_engine_reset( dev );
+	radeon_do_engine_reset(dev);
 
 	return 0;
 }
 
-
-void radeon_do_release( drm_device_t *dev )
+void radeon_do_release(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	int ret;
+	int i, ret;
 
 	if (dev_priv) {
+
 		if (dev_priv->cp_running) {
 			/* Stop the cp */
-			while ((ret = radeon_do_cp_idle( dev_priv )) != 0) {
+			while ((ret = radeon_do_cp_idle(dev_priv)) != 0) {
 				DRM_DEBUG("radeon_do_cp_idle %d\n", ret);
 #ifdef __linux__
 				schedule();
@@ -1458,38 +1707,47 @@ void radeon_do_release( drm_device_t *dev )
 				tsleep(&ret, PZERO, "rdnrel", 1);
 #endif
 			}
-			radeon_do_cp_stop( dev_priv );
-			radeon_do_engine_reset( dev );
+			radeon_do_cp_stop(dev_priv);
+			radeon_do_engine_reset(dev);
 		}
 
 		/* Disable *all* interrupts */
-		RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 );
+		if (dev_priv->mmio)	/* remove this after permanent addmaps */
+			RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
+
+		if (dev_priv->mmio) {/* remove all surfaces */
+			for (i = 0; i < RADEON_MAX_SURFACES; i++) {
+				RADEON_WRITE(RADEON_SURFACE0_INFO + 16*i, 0);
+				RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16*i, 0);
+				RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16*i, 0);
+			}
+		}
 
 		/* Free memory heap structures */
-		radeon_mem_takedown( &(dev_priv->gart_heap) );
-		radeon_mem_takedown( &(dev_priv->fb_heap) );
+		radeon_mem_takedown(&(dev_priv->gart_heap));
+		radeon_mem_takedown(&(dev_priv->fb_heap));
 
 		/* deallocate kernel resources */
-		radeon_do_cleanup_cp( dev );
+		radeon_do_cleanup_cp(dev);
 	}
 }
 
 /* Just reset the CP ring.  Called as part of an X Server engine reset.
  */
-int radeon_cp_reset( DRM_IOCTL_ARGS )
+int radeon_cp_reset(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_DEBUG( "%s called before init done\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_DEBUG("%s called before init done\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	radeon_do_cp_reset( dev_priv );
+	radeon_do_cp_reset(dev_priv);
 
 	/* The CP is no longer running after an engine reset */
 	dev_priv->cp_running = 0;
@@ -1497,50 +1755,47 @@ int radeon_cp_reset( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int radeon_cp_idle( DRM_IOCTL_ARGS )
+int radeon_cp_idle(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	return radeon_do_cp_idle( dev_priv );
+	return radeon_do_cp_idle(dev_priv);
 }
 
 /* Added by Charl P. Botha to call radeon_do_resume_cp().
  */
-int radeon_cp_resume( DRM_IOCTL_ARGS )
+int radeon_cp_resume(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 
 	return radeon_do_resume_cp(dev);
 }
 
-
-int radeon_engine_reset( DRM_IOCTL_ARGS )
+int radeon_engine_reset(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	return radeon_do_engine_reset( dev );
+	return radeon_do_engine_reset(dev);
 }
 
-
 /* ================================================================
  * Fullscreen mode
  */
 
 /* KW: Deprecated to say the least:
  */
-int radeon_fullscreen( DRM_IOCTL_ARGS )
+int radeon_fullscreen(DRM_IOCTL_ARGS)
 {
 	return 0;
 }
 
-
 /* ================================================================
  * Freelist management
  */
@@ -1549,20 +1804,20 @@ int radeon_fullscreen( DRM_IOCTL_ARGS )
  *   bufs until freelist code is used.  Note this hides a problem with
  *   the scratch register * (used to keep track of last buffer
  *   completed) being written to before * the last buffer has actually
- *   completed rendering.  
+ *   completed rendering.
  *
  * KW:  It's also a good way to find free buffers quickly.
  *
  * KW: Ideally this loop wouldn't exist, and freelist_get wouldn't
  * sleep.  However, bugs in older versions of radeon_accel.c mean that
  * we essentially have to do this, else old clients will break.
- * 
+ *
  * However, it does leave open a potential deadlock where all the
  * buffers are held by other clients, which can't release them because
- * they can't get the lock.  
+ * they can't get the lock.
  */
 
-drm_buf_t *radeon_freelist_get( drm_device_t *dev )
+drm_buf_t *radeon_freelist_get(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1571,19 +1826,19 @@ drm_buf_t *radeon_freelist_get( drm_device_t *dev )
 	int i, t;
 	int start;
 
-	if ( ++dev_priv->last_buf >= dma->buf_count )
+	if (++dev_priv->last_buf >= dma->buf_count)
 		dev_priv->last_buf = 0;
 
 	start = dev_priv->last_buf;
 
-	for ( t = 0 ; t < dev_priv->usec_timeout ; t++ ) {
-		u32 done_age = GET_SCRATCH( 1 );
-		DRM_DEBUG("done_age = %d\n",done_age);
-		for ( i = start ; i < dma->buf_count ; i++ ) {
+	for (t = 0; t < dev_priv->usec_timeout; t++) {
+		u32 done_age = GET_SCRATCH(1);
+		DRM_DEBUG("done_age = %d\n", done_age);
+		for (i = start; i < dma->buf_count; i++) {
 			buf = dma->buflist[i];
 			buf_priv = buf->dev_private;
-			if ( buf->filp == 0 || (buf->pending && 
-					       buf_priv->age <= done_age) ) {
+			if (buf->filp == 0 || (buf->pending &&
+					       buf_priv->age <= done_age)) {
 				dev_priv->stats.requested_bufs++;
 				buf->pending = 0;
 				return buf;
@@ -1592,16 +1847,17 @@ drm_buf_t *radeon_freelist_get( drm_device_t *dev )
 		}
 
 		if (t) {
-			DRM_UDELAY( 1 );
+			DRM_UDELAY(1);
 			dev_priv->stats.freelist_loops++;
 		}
 	}
 
-	DRM_DEBUG( "returning NULL!\n" );
+	DRM_DEBUG("returning NULL!\n");
 	return NULL;
 }
+
 #if 0
-drm_buf_t *radeon_freelist_get( drm_device_t *dev )
+drm_buf_t *radeon_freelist_get(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1611,18 +1867,18 @@ drm_buf_t *radeon_freelist_get( drm_device_t *dev )
 	int start;
 	u32 done_age = DRM_READ32(dev_priv->ring_rptr, RADEON_SCRATCHOFF(1));
 
-	if ( ++dev_priv->last_buf >= dma->buf_count )
+	if (++dev_priv->last_buf >= dma->buf_count)
 		dev_priv->last_buf = 0;
 
 	start = dev_priv->last_buf;
 	dev_priv->stats.freelist_loops++;
-	
-	for ( t = 0 ; t < 2 ; t++ ) {
-		for ( i = start ; i < dma->buf_count ; i++ ) {
+
+	for (t = 0; t < 2; t++) {
+		for (i = start; i < dma->buf_count; i++) {
 			buf = dma->buflist[i];
 			buf_priv = buf->dev_private;
-			if ( buf->filp == 0 || (buf->pending && 
-					       buf_priv->age <= done_age) ) {
+			if (buf->filp == 0 || (buf->pending &&
+					       buf_priv->age <= done_age)) {
 				dev_priv->stats.requested_bufs++;
 				buf->pending = 0;
 				return buf;
@@ -1635,73 +1891,74 @@ drm_buf_t *radeon_freelist_get( drm_device_t *dev )
 }
 #endif
 
-void radeon_freelist_reset( drm_device_t *dev )
+void radeon_freelist_reset(drm_device_t * dev)
 {
 	drm_device_dma_t *dma = dev->dma;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	int i;
 
 	dev_priv->last_buf = 0;
-	for ( i = 0 ; i < dma->buf_count ; i++ ) {
+	for (i = 0; i < dma->buf_count; i++) {
 		drm_buf_t *buf = dma->buflist[i];
 		drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
 		buf_priv->age = 0;
 	}
 }
 
-
 /* ================================================================
  * CP command submission
  */
 
-int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n )
+int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n)
 {
 	drm_radeon_ring_buffer_t *ring = &dev_priv->ring;
 	int i;
-	u32 last_head = GET_RING_HEAD( dev_priv );
+	u32 last_head = GET_RING_HEAD(dev_priv);
 
-	for ( i = 0 ; i < dev_priv->usec_timeout ; i++ ) {
-		u32 head = GET_RING_HEAD( dev_priv );
+	for (i = 0; i < dev_priv->usec_timeout; i++) {
+		u32 head = GET_RING_HEAD(dev_priv);
 
 		ring->space = (head - ring->tail) * sizeof(u32);
-		if ( ring->space <= 0 )
+		if (ring->space <= 0)
 			ring->space += ring->size;
-		if ( ring->space > n )
+		if (ring->space > n)
 			return 0;
-		
+
 		dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
 		if (head != last_head)
 			i = 0;
 		last_head = head;
 
-		DRM_UDELAY( 1 );
+		DRM_UDELAY(1);
 	}
 
 	/* FIXME: This return value is ignored in the BEGIN_RING macro! */
 #if RADEON_FIFO_DEBUG
-	radeon_status( dev_priv );
-	DRM_ERROR( "failed!\n" );
+	radeon_status(dev_priv);
+	DRM_ERROR("failed!\n");
 #endif
 	return DRM_ERR(EBUSY);
 }
 
-static int radeon_cp_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d )
+static int radeon_cp_get_buffers(DRMFILE filp, drm_device_t * dev,
+				 drm_dma_t * d)
 {
 	int i;
 	drm_buf_t *buf;
 
-	for ( i = d->granted_count ; i < d->request_count ; i++ ) {
-		buf = radeon_freelist_get( dev );
-		if ( !buf ) return DRM_ERR(EBUSY); /* NOTE: broken client */
+	for (i = d->granted_count; i < d->request_count; i++) {
+		buf = radeon_freelist_get(dev);
+		if (!buf)
+			return DRM_ERR(EBUSY);	/* NOTE: broken client */
 
 		buf->filp = filp;
 
-		if ( DRM_COPY_TO_USER( &d->request_indices[i], &buf->idx,
-				   sizeof(buf->idx) ) )
+		if (DRM_COPY_TO_USER(&d->request_indices[i], &buf->idx,
+				     sizeof(buf->idx)))
 			return DRM_ERR(EFAULT);
-		if ( DRM_COPY_TO_USER( &d->request_sizes[i], &buf->total,
-				   sizeof(buf->total) ) )
+		if (DRM_COPY_TO_USER(&d->request_sizes[i], &buf->total,
+				     sizeof(buf->total)))
 			return DRM_ERR(EFAULT);
 
 		d->granted_count++;
@@ -1709,40 +1966,114 @@ static int radeon_cp_get_buffers( DRMFILE filp, drm_device_t *dev, drm_dma_t *d
 	return 0;
 }
 
-int radeon_cp_buffers( DRM_IOCTL_ARGS )
+int radeon_cp_buffers(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_device_dma_t *dma = dev->dma;
 	int ret = 0;
+	drm_dma_t __user *argp = (void __user *)data;
 	drm_dma_t d;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( d, (drm_dma_t *)data, sizeof(d) );
+	DRM_COPY_FROM_USER_IOCTL(d, argp, sizeof(d));
 
 	/* Please don't send us buffers.
 	 */
-	if ( d.send_count != 0 ) {
-		DRM_ERROR( "Process %d trying to send %d buffers via drmDMA\n",
-			   DRM_CURRENTPID, d.send_count );
+	if (d.send_count != 0) {
+		DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
+			  DRM_CURRENTPID, d.send_count);
 		return DRM_ERR(EINVAL);
 	}
 
 	/* We'll send you buffers.
 	 */
-	if ( d.request_count < 0 || d.request_count > dma->buf_count ) {
-		DRM_ERROR( "Process %d trying to get %d buffers (of %d max)\n",
-			   DRM_CURRENTPID, d.request_count, dma->buf_count );
+	if (d.request_count < 0 || d.request_count > dma->buf_count) {
+		DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
+			  DRM_CURRENTPID, d.request_count, dma->buf_count);
 		return DRM_ERR(EINVAL);
 	}
 
 	d.granted_count = 0;
 
-	if ( d.request_count ) {
-		ret = radeon_cp_get_buffers( filp, dev, &d );
+	if (d.request_count) {
+		ret = radeon_cp_get_buffers(filp, dev, &d);
 	}
 
-	DRM_COPY_TO_USER_IOCTL( (drm_dma_t *)data, d, sizeof(d) );
+	DRM_COPY_TO_USER_IOCTL(argp, d, sizeof(d));
 
 	return ret;
 }
+
+/* Always create a map record for MMIO and FB memory, done from DRIVER_POSTINIT */
+int radeon_preinit(struct drm_device *dev, unsigned long flags)
+{
+	drm_radeon_private_t *dev_priv;
+	int ret = 0;
+
+	dev_priv = drm_alloc(sizeof(drm_radeon_private_t), DRM_MEM_DRIVER);
+	if (dev_priv == NULL)
+		return DRM_ERR(ENOMEM);
+
+	memset(dev_priv, 0, sizeof(drm_radeon_private_t));
+	dev->dev_private = (void *)dev_priv;
+	dev_priv->flags = flags;
+
+	switch (flags & CHIP_FAMILY_MASK) {
+	case CHIP_R100:
+	case CHIP_RV200:
+	case CHIP_R200:
+	case CHIP_R300:
+		dev_priv->flags |= CHIP_HAS_HIERZ;
+		break;
+	default:
+	/* all other chips have no hierarchical z buffer */
+		break;
+	}
+
+	ret = drm_initmap(dev, drm_get_resource_start(dev, 2),
+			  drm_get_resource_len(dev, 2), 2, _DRM_REGISTERS, 0);
+	if (ret != 0)
+		return ret;
+
+	ret = drm_initmap(dev, drm_get_resource_start(dev, 0),
+			  drm_get_resource_len(dev, 0), 0, _DRM_FRAME_BUFFER,
+			  _DRM_WRITE_COMBINING);
+	if (ret != 0)
+		return ret;
+
+	/* The original method of detecting AGP is known to not work correctly,
+	 * according to Mike Harris.  The solution is to walk the capabilities
+	 * list, which should be done in drm_device_is_agp().
+	 */
+	if (drm_device_is_agp(dev))
+		dev_priv->flags |= CHIP_IS_AGP;
+
+	DRM_DEBUG("%s card detected\n",
+		  ((dev_priv->flags & CHIP_IS_AGP) ? "AGP" : "PCI"));
+
+#if defined(__linux__)
+	/* Check if we need a reset */
+	if (!
+	    (dev_priv->mmio =
+	     drm_core_findmap(dev, pci_resource_start(dev->pdev, 2))))
+		return DRM_ERR(ENOMEM);
+
+	ret = radeon_create_i2c_busses(dev);
+#endif
+	return ret;
+}
+
+int radeon_postcleanup(struct drm_device *dev)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+
+	DRM_DEBUG("\n");
+#if defined(__linux__)
+	radeon_delete_i2c_busses(dev);
+#endif
+	drm_free(dev_priv, sizeof(*dev_priv), DRM_MEM_DRIVER);
+
+	dev->dev_private = NULL;
+	return 0;
+}
diff --git a/sys/dev/drm/radeon_drm.h b/sys/dev/drm/radeon_drm.h
index b0e59aa..ef18976 100644
--- a/sys/dev/drm/radeon_drm.h
+++ b/sys/dev/drm/radeon_drm.h
@@ -59,78 +59,77 @@
 #define RADEON_UPLOAD_TEX0IMAGES	0x00001000
 #define RADEON_UPLOAD_TEX1IMAGES	0x00002000
 #define RADEON_UPLOAD_TEX2IMAGES	0x00004000
-#define RADEON_UPLOAD_CLIPRECTS		0x00008000 /* handled client-side */
+#define RADEON_UPLOAD_CLIPRECTS		0x00008000	/* handled client-side */
 #define RADEON_REQUIRE_QUIESCENCE	0x00010000
-#define RADEON_UPLOAD_ZBIAS		0x00020000 /* version 1.2 and newer */
+#define RADEON_UPLOAD_ZBIAS		0x00020000	/* version 1.2 and newer */
 #define RADEON_UPLOAD_ALL		0x003effff
 #define RADEON_UPLOAD_CONTEXT_ALL       0x003e01ff
 
-
 /* New style per-packet identifiers for use in cmd_buffer ioctl with
  * the RADEON_EMIT_PACKET command.  Comments relate new packets to old
  * state bits and the packet size:
  */
-#define RADEON_EMIT_PP_MISC                         0 /* context/7 */
-#define RADEON_EMIT_PP_CNTL                         1 /* context/3 */
-#define RADEON_EMIT_RB3D_COLORPITCH                 2 /* context/1 */
-#define RADEON_EMIT_RE_LINE_PATTERN                 3 /* line/2 */
-#define RADEON_EMIT_SE_LINE_WIDTH                   4 /* line/1 */
-#define RADEON_EMIT_PP_LUM_MATRIX                   5 /* bumpmap/1 */
-#define RADEON_EMIT_PP_ROT_MATRIX_0                 6 /* bumpmap/2 */
-#define RADEON_EMIT_RB3D_STENCILREFMASK             7 /* masks/3 */
-#define RADEON_EMIT_SE_VPORT_XSCALE                 8 /* viewport/6 */
-#define RADEON_EMIT_SE_CNTL                         9 /* setup/2 */
-#define RADEON_EMIT_SE_CNTL_STATUS                  10 /* setup/1 */
-#define RADEON_EMIT_RE_MISC                         11 /* misc/1 */
-#define RADEON_EMIT_PP_TXFILTER_0                   12 /* tex0/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_0               13 /* tex0/1 */
-#define RADEON_EMIT_PP_TXFILTER_1                   14 /* tex1/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_1               15 /* tex1/1 */
-#define RADEON_EMIT_PP_TXFILTER_2                   16 /* tex2/6 */
-#define RADEON_EMIT_PP_BORDER_COLOR_2               17 /* tex2/1 */
-#define RADEON_EMIT_SE_ZBIAS_FACTOR                 18 /* zbias/2 */
-#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT           19 /* tcl/11 */
-#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20 /* material/17 */
-#define R200_EMIT_PP_TXCBLEND_0                     21 /* tex0/4 */
-#define R200_EMIT_PP_TXCBLEND_1                     22 /* tex1/4 */
-#define R200_EMIT_PP_TXCBLEND_2                     23 /* tex2/4 */
-#define R200_EMIT_PP_TXCBLEND_3                     24 /* tex3/4 */
-#define R200_EMIT_PP_TXCBLEND_4                     25 /* tex4/4 */
-#define R200_EMIT_PP_TXCBLEND_5                     26 /* tex5/4 */
-#define R200_EMIT_PP_TXCBLEND_6                     27 /* /4 */
-#define R200_EMIT_PP_TXCBLEND_7                     28 /* /4 */
-#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0             29 /* tcl/7 */
-#define R200_EMIT_TFACTOR_0                         30 /* tf/7 */
-#define R200_EMIT_VTX_FMT_0                         31 /* vtx/5 */
-#define R200_EMIT_VAP_CTL                           32 /* vap/1 */
-#define R200_EMIT_MATRIX_SELECT_0                   33 /* msl/5 */
-#define R200_EMIT_TEX_PROC_CTL_2                    34 /* tcg/5 */
-#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL            35 /* tcl/1 */
-#define R200_EMIT_PP_TXFILTER_0                     36 /* tex0/6 */
-#define R200_EMIT_PP_TXFILTER_1                     37 /* tex1/6 */
-#define R200_EMIT_PP_TXFILTER_2                     38 /* tex2/6 */
-#define R200_EMIT_PP_TXFILTER_3                     39 /* tex3/6 */
-#define R200_EMIT_PP_TXFILTER_4                     40 /* tex4/6 */
-#define R200_EMIT_PP_TXFILTER_5                     41 /* tex5/6 */
-#define R200_EMIT_PP_TXOFFSET_0                     42 /* tex0/1 */
-#define R200_EMIT_PP_TXOFFSET_1                     43 /* tex1/1 */
-#define R200_EMIT_PP_TXOFFSET_2                     44 /* tex2/1 */
-#define R200_EMIT_PP_TXOFFSET_3                     45 /* tex3/1 */
-#define R200_EMIT_PP_TXOFFSET_4                     46 /* tex4/1 */
-#define R200_EMIT_PP_TXOFFSET_5                     47 /* tex5/1 */
-#define R200_EMIT_VTE_CNTL                          48 /* vte/1 */
-#define R200_EMIT_OUTPUT_VTX_COMP_SEL               49 /* vtx/1 */
-#define R200_EMIT_PP_TAM_DEBUG3                     50 /* tam/1 */
-#define R200_EMIT_PP_CNTL_X                         51 /* cst/1 */
-#define R200_EMIT_RB3D_DEPTHXY_OFFSET               52 /* cst/1 */
-#define R200_EMIT_RE_AUX_SCISSOR_CNTL               53 /* cst/1 */
-#define R200_EMIT_RE_SCISSOR_TL_0                   54 /* cst/2 */
-#define R200_EMIT_RE_SCISSOR_TL_1                   55 /* cst/2 */
-#define R200_EMIT_RE_SCISSOR_TL_2                   56 /* cst/2 */
-#define R200_EMIT_SE_VAP_CNTL_STATUS                57 /* cst/1 */
-#define R200_EMIT_SE_VTX_STATE_CNTL                 58 /* cst/1 */
-#define R200_EMIT_RE_POINTSIZE                      59 /* cst/1 */
-#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0       60 /* cst/4 */
+#define RADEON_EMIT_PP_MISC                         0	/* context/7 */
+#define RADEON_EMIT_PP_CNTL                         1	/* context/3 */
+#define RADEON_EMIT_RB3D_COLORPITCH                 2	/* context/1 */
+#define RADEON_EMIT_RE_LINE_PATTERN                 3	/* line/2 */
+#define RADEON_EMIT_SE_LINE_WIDTH                   4	/* line/1 */
+#define RADEON_EMIT_PP_LUM_MATRIX                   5	/* bumpmap/1 */
+#define RADEON_EMIT_PP_ROT_MATRIX_0                 6	/* bumpmap/2 */
+#define RADEON_EMIT_RB3D_STENCILREFMASK             7	/* masks/3 */
+#define RADEON_EMIT_SE_VPORT_XSCALE                 8	/* viewport/6 */
+#define RADEON_EMIT_SE_CNTL                         9	/* setup/2 */
+#define RADEON_EMIT_SE_CNTL_STATUS                  10	/* setup/1 */
+#define RADEON_EMIT_RE_MISC                         11	/* misc/1 */
+#define RADEON_EMIT_PP_TXFILTER_0                   12	/* tex0/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_0               13	/* tex0/1 */
+#define RADEON_EMIT_PP_TXFILTER_1                   14	/* tex1/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_1               15	/* tex1/1 */
+#define RADEON_EMIT_PP_TXFILTER_2                   16	/* tex2/6 */
+#define RADEON_EMIT_PP_BORDER_COLOR_2               17	/* tex2/1 */
+#define RADEON_EMIT_SE_ZBIAS_FACTOR                 18	/* zbias/2 */
+#define RADEON_EMIT_SE_TCL_OUTPUT_VTX_FMT           19	/* tcl/11 */
+#define RADEON_EMIT_SE_TCL_MATERIAL_EMMISSIVE_RED   20	/* material/17 */
+#define R200_EMIT_PP_TXCBLEND_0                     21	/* tex0/4 */
+#define R200_EMIT_PP_TXCBLEND_1                     22	/* tex1/4 */
+#define R200_EMIT_PP_TXCBLEND_2                     23	/* tex2/4 */
+#define R200_EMIT_PP_TXCBLEND_3                     24	/* tex3/4 */
+#define R200_EMIT_PP_TXCBLEND_4                     25	/* tex4/4 */
+#define R200_EMIT_PP_TXCBLEND_5                     26	/* tex5/4 */
+#define R200_EMIT_PP_TXCBLEND_6                     27	/* /4 */
+#define R200_EMIT_PP_TXCBLEND_7                     28	/* /4 */
+#define R200_EMIT_TCL_LIGHT_MODEL_CTL_0             29	/* tcl/7 */
+#define R200_EMIT_TFACTOR_0                         30	/* tf/7 */
+#define R200_EMIT_VTX_FMT_0                         31	/* vtx/5 */
+#define R200_EMIT_VAP_CTL                           32	/* vap/1 */
+#define R200_EMIT_MATRIX_SELECT_0                   33	/* msl/5 */
+#define R200_EMIT_TEX_PROC_CTL_2                    34	/* tcg/5 */
+#define R200_EMIT_TCL_UCP_VERT_BLEND_CTL            35	/* tcl/1 */
+#define R200_EMIT_PP_TXFILTER_0                     36	/* tex0/6 */
+#define R200_EMIT_PP_TXFILTER_1                     37	/* tex1/6 */
+#define R200_EMIT_PP_TXFILTER_2                     38	/* tex2/6 */
+#define R200_EMIT_PP_TXFILTER_3                     39	/* tex3/6 */
+#define R200_EMIT_PP_TXFILTER_4                     40	/* tex4/6 */
+#define R200_EMIT_PP_TXFILTER_5                     41	/* tex5/6 */
+#define R200_EMIT_PP_TXOFFSET_0                     42	/* tex0/1 */
+#define R200_EMIT_PP_TXOFFSET_1                     43	/* tex1/1 */
+#define R200_EMIT_PP_TXOFFSET_2                     44	/* tex2/1 */
+#define R200_EMIT_PP_TXOFFSET_3                     45	/* tex3/1 */
+#define R200_EMIT_PP_TXOFFSET_4                     46	/* tex4/1 */
+#define R200_EMIT_PP_TXOFFSET_5                     47	/* tex5/1 */
+#define R200_EMIT_VTE_CNTL                          48	/* vte/1 */
+#define R200_EMIT_OUTPUT_VTX_COMP_SEL               49	/* vtx/1 */
+#define R200_EMIT_PP_TAM_DEBUG3                     50	/* tam/1 */
+#define R200_EMIT_PP_CNTL_X                         51	/* cst/1 */
+#define R200_EMIT_RB3D_DEPTHXY_OFFSET               52	/* cst/1 */
+#define R200_EMIT_RE_AUX_SCISSOR_CNTL               53	/* cst/1 */
+#define R200_EMIT_RE_SCISSOR_TL_0                   54	/* cst/2 */
+#define R200_EMIT_RE_SCISSOR_TL_1                   55	/* cst/2 */
+#define R200_EMIT_RE_SCISSOR_TL_2                   56	/* cst/2 */
+#define R200_EMIT_SE_VAP_CNTL_STATUS                57	/* cst/1 */
+#define R200_EMIT_SE_VTX_STATE_CNTL                 58	/* cst/1 */
+#define R200_EMIT_RE_POINTSIZE                      59	/* cst/1 */
+#define R200_EMIT_TCL_INPUT_VTX_VECTOR_ADDR_0       60	/* cst/4 */
 #define R200_EMIT_PP_CUBIC_FACES_0                  61
 #define R200_EMIT_PP_CUBIC_OFFSETS_0                62
 #define R200_EMIT_PP_CUBIC_FACES_1                  63
@@ -147,54 +146,62 @@
 #define RADEON_EMIT_PP_TEX_SIZE_1                   74
 #define RADEON_EMIT_PP_TEX_SIZE_2                   75
 #define R200_EMIT_RB3D_BLENDCOLOR                   76
-#define RADEON_MAX_STATE_PACKETS                    77
-
+#define R200_EMIT_TCL_POINT_SPRITE_CNTL             77
+#define RADEON_EMIT_PP_CUBIC_FACES_0                78
+#define RADEON_EMIT_PP_CUBIC_OFFSETS_T0             79
+#define RADEON_EMIT_PP_CUBIC_FACES_1                80
+#define RADEON_EMIT_PP_CUBIC_OFFSETS_T1             81
+#define RADEON_EMIT_PP_CUBIC_FACES_2                82
+#define RADEON_EMIT_PP_CUBIC_OFFSETS_T2             83
+#define R200_EMIT_PP_TRI_PERF_CNTL                  84
+#define RADEON_MAX_STATE_PACKETS                    85
 
 /* Commands understood by cmd_buffer ioctl.  More can be added but
  * obviously these can't be removed or changed:
  */
-#define RADEON_CMD_PACKET      1 /* emit one of the register packets above */
-#define RADEON_CMD_SCALARS     2 /* emit scalar data */
-#define RADEON_CMD_VECTORS     3 /* emit vector data */
-#define RADEON_CMD_DMA_DISCARD 4 /* discard current dma buf */
-#define RADEON_CMD_PACKET3     5 /* emit hw packet */
-#define RADEON_CMD_PACKET3_CLIP 6 /* emit hw packet wrapped in cliprects */
-#define RADEON_CMD_SCALARS2     7 /* r200 stopgap */
-#define RADEON_CMD_WAIT         8 /* emit hw wait commands -- note:
-				   *  doesn't make the cpu wait, just
-				   *  the graphics hardware */
-
+#define RADEON_CMD_PACKET      1	/* emit one of the register packets above */
+#define RADEON_CMD_SCALARS     2	/* emit scalar data */
+#define RADEON_CMD_VECTORS     3	/* emit vector data */
+#define RADEON_CMD_DMA_DISCARD 4	/* discard current dma buf */
+#define RADEON_CMD_PACKET3     5	/* emit hw packet */
+#define RADEON_CMD_PACKET3_CLIP 6	/* emit hw packet wrapped in cliprects */
+#define RADEON_CMD_SCALARS2     7	/* r200 stopgap */
+#define RADEON_CMD_WAIT         8	/* emit hw wait commands -- note:
+					 *  doesn't make the cpu wait, just
+					 *  the graphics hardware */
 
 typedef union {
 	int i;
-	struct { 
+	struct {
 		unsigned char cmd_type, pad0, pad1, pad2;
 	} header;
-	struct { 
+	struct {
 		unsigned char cmd_type, packet_id, pad0, pad1;
 	} packet;
-	struct { 
-		unsigned char cmd_type, offset, stride, count; 
+	struct {
+		unsigned char cmd_type, offset, stride, count;
 	} scalars;
-	struct { 
-		unsigned char cmd_type, offset, stride, count; 
+	struct {
+		unsigned char cmd_type, offset, stride, count;
 	} vectors;
-	struct { 
-		unsigned char cmd_type, buf_idx, pad0, pad1; 
+	struct {
+		unsigned char cmd_type, buf_idx, pad0, pad1;
 	} dma;
-	struct { 
-		unsigned char cmd_type, flags, pad0, pad1; 
+	struct {
+		unsigned char cmd_type, flags, pad0, pad1;
 	} wait;
 } drm_radeon_cmd_header_t;
 
 #define RADEON_WAIT_2D  0x1
 #define RADEON_WAIT_3D  0x2
 
-
 #define RADEON_FRONT			0x1
 #define RADEON_BACK			0x2
 #define RADEON_DEPTH			0x4
 #define RADEON_STENCIL                  0x8
+#define RADEON_CLEAR_FASTZ		0x80000000
+#define RADEON_USE_HIERZ		0x40000000
+#define RADEON_USE_COMP_ZBUF		0x20000000
 
 /* Primitive types
  */
@@ -229,6 +236,8 @@ typedef union {
 #define RADEON_MAX_TEXTURE_LEVELS	12
 #define RADEON_MAX_TEXTURE_UNITS	3
 
+#define RADEON_MAX_SURFACES		8
+
 /* Blits have strict offset rules.  All blit offset must be aligned on
  * a 1K-byte boundary.
  */
@@ -236,7 +245,7 @@ typedef union {
 #define RADEON_OFFSET_ALIGN             (1 << RADEON_OFFSET_SHIFT)
 #define RADEON_OFFSET_MASK              (RADEON_OFFSET_ALIGN - 1)
 
-#endif /* __RADEON_SAREA_DEFINES__ */
+#endif				/* __RADEON_SAREA_DEFINES__ */
 
 typedef struct {
 	unsigned int red;
@@ -247,7 +256,7 @@ typedef struct {
 
 typedef struct {
 	/* Context state */
-	unsigned int pp_misc;				/* 0x1c14 */
+	unsigned int pp_misc;	/* 0x1c14 */
 	unsigned int pp_fog_color;
 	unsigned int re_solid_color;
 	unsigned int rb3d_blendcntl;
@@ -255,7 +264,7 @@ typedef struct {
 	unsigned int rb3d_depthpitch;
 	unsigned int rb3d_zstencilcntl;
 
-	unsigned int pp_cntl;				/* 0x1c38 */
+	unsigned int pp_cntl;	/* 0x1c38 */
 	unsigned int rb3d_cntl;
 	unsigned int rb3d_coloroffset;
 	unsigned int re_width_height;
@@ -263,27 +272,27 @@ typedef struct {
 	unsigned int se_cntl;
 
 	/* Vertex format state */
-	unsigned int se_coord_fmt;			/* 0x1c50 */
+	unsigned int se_coord_fmt;	/* 0x1c50 */
 
 	/* Line state */
-	unsigned int re_line_pattern;			/* 0x1cd0 */
+	unsigned int re_line_pattern;	/* 0x1cd0 */
 	unsigned int re_line_state;
 
-	unsigned int se_line_width;			/* 0x1db8 */
+	unsigned int se_line_width;	/* 0x1db8 */
 
 	/* Bumpmap state */
-	unsigned int pp_lum_matrix;			/* 0x1d00 */
+	unsigned int pp_lum_matrix;	/* 0x1d00 */
 
-	unsigned int pp_rot_matrix_0;			/* 0x1d58 */
+	unsigned int pp_rot_matrix_0;	/* 0x1d58 */
 	unsigned int pp_rot_matrix_1;
 
 	/* Mask state */
-	unsigned int rb3d_stencilrefmask;		/* 0x1d7c */
+	unsigned int rb3d_stencilrefmask;	/* 0x1d7c */
 	unsigned int rb3d_ropcntl;
 	unsigned int rb3d_planemask;
 
 	/* Viewport state */
-	unsigned int se_vport_xscale;			/* 0x1d98 */
+	unsigned int se_vport_xscale;	/* 0x1d98 */
 	unsigned int se_vport_xoffset;
 	unsigned int se_vport_yscale;
 	unsigned int se_vport_yoffset;
@@ -291,20 +300,19 @@ typedef struct {
 	unsigned int se_vport_zoffset;
 
 	/* Setup state */
-	unsigned int se_cntl_status;			/* 0x2140 */
+	unsigned int se_cntl_status;	/* 0x2140 */
 
 	/* Misc state */
-	unsigned int re_top_left;			/* 0x26c0 */
+	unsigned int re_top_left;	/* 0x26c0 */
 	unsigned int re_misc;
 } drm_radeon_context_regs_t;
 
 typedef struct {
 	/* Zbias state */
-	unsigned int se_zbias_factor;			/* 0x1dac */
+	unsigned int se_zbias_factor;	/* 0x1dac */
 	unsigned int se_zbias_constant;
 } drm_radeon_context2_regs_t;
 
-
 /* Setup registers for each texture unit
  */
 typedef struct {
@@ -322,11 +330,10 @@ typedef struct {
 	unsigned int finish;
 	unsigned int prim:8;
 	unsigned int stateidx:8;
-	unsigned int numverts:16; /* overloaded as offset/64 for elt prims */
-        unsigned int vc_format;   /* vertex format */
+	unsigned int numverts:16;	/* overloaded as offset/64 for elt prims */
+	unsigned int vc_format;	/* vertex format */
 } drm_radeon_prim_t;
 
-
 typedef struct {
 	drm_radeon_context_regs_t context;
 	drm_radeon_texture_regs_t tex[RADEON_MAX_TEXTURE_UNITS];
@@ -334,7 +341,6 @@ typedef struct {
 	unsigned int dirty;
 } drm_radeon_state_t;
 
-
 typedef struct {
 	/* The channel for communication of state information to the
 	 * kernel on firing a vertex buffer with either of the
@@ -357,15 +363,16 @@ typedef struct {
 	unsigned int last_dispatch;
 	unsigned int last_clear;
 
-	drm_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS+1];
+	drm_tex_region_t tex_list[RADEON_NR_TEX_HEAPS][RADEON_NR_TEX_REGIONS +
+						       1];
 	unsigned int tex_age[RADEON_NR_TEX_HEAPS];
 	int ctx_owner;
-        int pfState;                /* number of 3d windows (0,1,2ormore) */
-        int pfCurrentPage;	    /* which buffer is being displayed? */
-	int crtc2_base;		    /* CRTC2 frame offset */
+	int pfState;		/* number of 3d windows (0,1,2ormore) */
+	int pfCurrentPage;	/* which buffer is being displayed? */
+	int crtc2_base;		/* CRTC2 frame offset */
+	int tiling_enabled;	/* set by drm, read by 2d + 3d clients */
 } drm_radeon_sarea_t;
 
-
 /* WARNING: If you change any of these defines, make sure to change the
  * defines in the Xserver file (xf86drmRadeon.h)
  *
@@ -375,15 +382,15 @@ typedef struct {
 /* Radeon specific ioctls
  * The device specific ioctl range is 0x40 to 0x79.
  */
-#define DRM_RADEON_CP_INIT    0x00 
-#define DRM_RADEON_CP_START   0x01 
+#define DRM_RADEON_CP_INIT    0x00
+#define DRM_RADEON_CP_START   0x01
 #define DRM_RADEON_CP_STOP    0x02
 #define DRM_RADEON_CP_RESET   0x03
 #define DRM_RADEON_CP_IDLE    0x04
-#define DRM_RADEON_RESET      0x05 
+#define DRM_RADEON_RESET      0x05
 #define DRM_RADEON_FULLSCREEN 0x06
-#define DRM_RADEON_SWAP       0x07 
-#define DRM_RADEON_CLEAR      0x08 
+#define DRM_RADEON_SWAP       0x07
+#define DRM_RADEON_CLEAR      0x08
 #define DRM_RADEON_VERTEX     0x09
 #define DRM_RADEON_INDICES    0x0A
 #define DRM_RADEON_NOT_USED
@@ -401,6 +408,8 @@ typedef struct {
 #define DRM_RADEON_IRQ_WAIT   0x17
 #define DRM_RADEON_CP_RESUME  0x18
 #define DRM_RADEON_SETPARAM   0x19
+#define DRM_RADEON_SURF_ALLOC 0x1a
+#define DRM_RADEON_SURF_FREE  0x1b
 
 #define DRM_IOCTL_RADEON_CP_INIT    DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_CP_INIT, drm_radeon_init_t)
 #define DRM_IOCTL_RADEON_CP_START   DRM_IO(  DRM_COMMAND_BASE + DRM_RADEON_CP_START)
@@ -427,15 +436,18 @@ typedef struct {
 #define DRM_IOCTL_RADEON_IRQ_WAIT   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_IRQ_WAIT, drm_radeon_irq_wait_t)
 #define DRM_IOCTL_RADEON_CP_RESUME  DRM_IO(  DRM_COMMAND_BASE + DRM_RADEON_CP_RESUME)
 #define DRM_IOCTL_RADEON_SETPARAM   DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SETPARAM, drm_radeon_setparam_t)
+#define DRM_IOCTL_RADEON_SURF_ALLOC DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_ALLOC, drm_radeon_surface_alloc_t)
+#define DRM_IOCTL_RADEON_SURF_FREE  DRM_IOW( DRM_COMMAND_BASE + DRM_RADEON_SURF_FREE, drm_radeon_surface_free_t)
 
 typedef struct drm_radeon_init {
 	enum {
-		RADEON_INIT_CP    = 0x01,
+		RADEON_INIT_CP = 0x01,
 		RADEON_CLEANUP_CP = 0x02,
-		RADEON_INIT_R200_CP = 0x03
+		RADEON_INIT_R200_CP = 0x03,
+		RADEON_INIT_R300_CP = 0x04
 	} func;
 	unsigned long sarea_priv_offset;
-	int is_pci;
+	int is_pci;		/* not used, driver asks hardware */
 	int cp_mode;
 	int gart_size;
 	int ring_size;
@@ -462,7 +474,7 @@ typedef struct drm_radeon_cp_stop {
 
 typedef struct drm_radeon_fullscreen {
 	enum {
-		RADEON_INIT_FULLSCREEN    = 0x01,
+		RADEON_INIT_FULLSCREEN = 0x01,
 		RADEON_CLEANUP_FULLSCREEN = 0x02
 	} func;
 } drm_radeon_fullscreen_t;
@@ -483,15 +495,15 @@ typedef struct drm_radeon_clear {
 	unsigned int clear_color;
 	unsigned int clear_depth;
 	unsigned int color_mask;
-	unsigned int depth_mask;   /* misnamed field:  should be stencil */
-	drm_radeon_clear_rect_t *depth_boxes;
+	unsigned int depth_mask;	/* misnamed field:  should be stencil */
+	drm_radeon_clear_rect_t __user *depth_boxes;
 } drm_radeon_clear_t;
 
 typedef struct drm_radeon_vertex {
 	int prim;
-	int idx;			/* Index of vertex buffer */
-	int count;			/* Number of vertices in buffer */
-	int discard;			/* Client finished with buffer? */
+	int idx;		/* Index of vertex buffer */
+	int count;		/* Number of vertices in buffer */
+	int discard;		/* Client finished with buffer? */
 } drm_radeon_vertex_t;
 
 typedef struct drm_radeon_indices {
@@ -499,7 +511,7 @@ typedef struct drm_radeon_indices {
 	int idx;
 	int start;
 	int end;
-	int discard;			/* Client finished with buffer? */
+	int discard;		/* Client finished with buffer? */
 } drm_radeon_indices_t;
 
 /* v1.2 - obsoletes drm_radeon_vertex and drm_radeon_indices
@@ -507,19 +519,19 @@ typedef struct drm_radeon_indices {
  *      - supports driver change to emit native primitives
  */
 typedef struct drm_radeon_vertex2 {
-	int idx;			/* Index of vertex buffer */
-	int discard;			/* Client finished with buffer? */
+	int idx;		/* Index of vertex buffer */
+	int discard;		/* Client finished with buffer? */
 	int nr_states;
-	drm_radeon_state_t *state;
+	drm_radeon_state_t __user *state;
 	int nr_prims;
-	drm_radeon_prim_t *prim;
+	drm_radeon_prim_t __user *prim;
 } drm_radeon_vertex2_t;
 
 /* v1.3 - obsoletes drm_radeon_vertex2
- *      - allows arbitarily large cliprect list 
+ *      - allows arbitarily large cliprect list
  *      - allows updating of tcl packet, vector and scalar state
  *      - allows memory-efficient description of state updates
- *      - allows state to be emitted without a primitive 
+ *      - allows state to be emitted without a primitive
  *           (for clears, ctx switches)
  *      - allows more than one dma buffer to be referenced per ioctl
  *      - supports tcl driver
@@ -527,28 +539,28 @@ typedef struct drm_radeon_vertex2 {
  */
 typedef struct drm_radeon_cmd_buffer {
 	int bufsz;
-	char *buf;
+	char __user *buf;
 	int nbox;
-	drm_clip_rect_t *boxes;
+	drm_clip_rect_t __user *boxes;
 } drm_radeon_cmd_buffer_t;
 
 typedef struct drm_radeon_tex_image {
-	unsigned int x, y;		/* Blit coordinates */
+	unsigned int x, y;	/* Blit coordinates */
 	unsigned int width, height;
-	const void *data;
+	const void __user *data;
 } drm_radeon_tex_image_t;
 
 typedef struct drm_radeon_texture {
 	unsigned int offset;
 	int pitch;
 	int format;
-	int width;			/* Texture image coordinates */
+	int width;		/* Texture image coordinates */
 	int height;
-	drm_radeon_tex_image_t *image;
+	drm_radeon_tex_image_t __user *image;
 } drm_radeon_texture_t;
 
 typedef struct drm_radeon_stipple {
-	unsigned int *mask;
+	unsigned int __user *mask;
 } drm_radeon_stipple_t;
 
 typedef struct drm_radeon_indirect {
@@ -558,19 +570,18 @@ typedef struct drm_radeon_indirect {
 	int discard;
 } drm_radeon_indirect_t;
 
-
 /* 1.3: An ioctl to get parameters that aren't available to the 3d
- * client any other way.  
+ * client any other way.
  */
-#define RADEON_PARAM_GART_BUFFER_OFFSET    1 /* card offset of 1st GART buffer */
+#define RADEON_PARAM_GART_BUFFER_OFFSET    1	/* card offset of 1st GART buffer */
 #define RADEON_PARAM_LAST_FRAME            2
 #define RADEON_PARAM_LAST_DISPATCH         3
 #define RADEON_PARAM_LAST_CLEAR            4
 /* Added with DRM version 1.6. */
 #define RADEON_PARAM_IRQ_NR                5
-#define RADEON_PARAM_GART_BASE             6 /* card offset of GART base */
+#define RADEON_PARAM_GART_BASE             6	/* card offset of GART base */
 /* Added with DRM version 1.8. */
-#define RADEON_PARAM_REGISTER_HANDLE       7 /* for drmMap() */
+#define RADEON_PARAM_REGISTER_HANDLE       7	/* for drmMap() */
 #define RADEON_PARAM_STATUS_HANDLE         8
 #define RADEON_PARAM_SAREA_HANDLE          9
 #define RADEON_PARAM_GART_TEX_HANDLE       10
@@ -578,7 +589,7 @@ typedef struct drm_radeon_indirect {
 
 typedef struct drm_radeon_getparam {
 	int param;
-	void *value;
+	void __user *value;
 } drm_radeon_getparam_t;
 
 /* 1.6: Set up a memory manager for regions of shared memory:
@@ -590,7 +601,7 @@ typedef struct drm_radeon_mem_alloc {
 	int region;
 	int alignment;
 	int size;
-	int *region_offset;	/* offset from start of fb or GART */
+	int __user *region_offset;	/* offset from start of fb or GART */
 } drm_radeon_mem_alloc_t;
 
 typedef struct drm_radeon_mem_free {
@@ -601,31 +612,42 @@ typedef struct drm_radeon_mem_free {
 typedef struct drm_radeon_mem_init_heap {
 	int region;
 	int size;
-	int start;	
+	int start;
 } drm_radeon_mem_init_heap_t;
 
-
 /* 1.6: Userspace can request & wait on irq's:
  */
 typedef struct drm_radeon_irq_emit {
-	int *irq_seq;
+	int __user *irq_seq;
 } drm_radeon_irq_emit_t;
 
 typedef struct drm_radeon_irq_wait {
 	int irq_seq;
 } drm_radeon_irq_wait_t;
 
-
 /* 1.10: Clients tell the DRM where they think the framebuffer is located in
  * the card's address space, via a new generic ioctl to set parameters
  */
 
 typedef struct drm_radeon_setparam {
 	unsigned int param;
-	int64_t      value;
+	int64_t value;
 } drm_radeon_setparam_t;
 
-#define RADEON_SETPARAM_FB_LOCATION    1 /* determined framebuffer location */
+#define RADEON_SETPARAM_FB_LOCATION    1	/* determined framebuffer location */
+#define RADEON_SETPARAM_SWITCH_TILING  2	/* enable/disable color tiling */
+
+/* 1.14: Clients can allocate/free a surface
+ */
+typedef struct drm_radeon_surface_alloc {
+	unsigned int address;
+	unsigned int size;
+	unsigned int flags;
+} drm_radeon_surface_alloc_t;
+
+typedef struct drm_radeon_surface_free {
+	unsigned int address;
+} drm_radeon_surface_free_t;
 
 
 #endif
diff --git a/sys/dev/drm/radeon_drv.c b/sys/dev/drm/radeon_drv.c
index ca94080..a515780 100644
--- a/sys/dev/drm/radeon_drv.c
+++ b/sys/dev/drm/radeon_drv.c
@@ -1,5 +1,6 @@
 /* radeon_drv.c -- ATI Radeon driver -*- linux-c -*-
- * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com */
+ * Created: Wed Feb 14 17:10:04 2001 by gareth@valinux.com
+ */
 /*-
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All Rights Reserved.
@@ -29,36 +30,91 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/radeon.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/radeon_drm.h"
 #include "dev/drm/radeon_drv.h"
-#if __REALLY_HAVE_SG
-#include "dev/drm/ati_pcigart.h"
-#endif
+#include "dev/drm/drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t radeon_pciidlist[] = {
+	radeon_PCI_IDS
+};
+
+extern drm_ioctl_desc_t radeon_ioctls[];
+extern int radeon_max_ioctl;
+
+static void radeon_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = sizeof(drm_radeon_buf_priv_t);
+	dev->preinit = radeon_preinit;
+	dev->postcleanup = radeon_postcleanup;
+	dev->prerelease = radeon_driver_prerelease;
+	dev->pretakedown = radeon_driver_pretakedown;
+	dev->open_helper = radeon_driver_open_helper;
+	dev->free_filp_priv = radeon_driver_free_filp_priv;
+	dev->vblank_wait = radeon_driver_vblank_wait;
+	dev->irq_preinstall = radeon_driver_irq_preinstall;
+	dev->irq_postinstall = radeon_driver_irq_postinstall;
+	dev->irq_uninstall = radeon_driver_irq_uninstall;
+	dev->irq_handler = radeon_driver_irq_handler;
+	dev->dma_ioctl = radeon_cp_buffers;
 
-#include "dev/drm/drm_agpsupport.h"
-#include "dev/drm/drm_auth.h"
-#include "dev/drm/drm_bufs.h"
-#include "dev/drm/drm_context.h"
-#include "dev/drm/drm_dma.h"
-#include "dev/drm/drm_drawable.h"
-#include "dev/drm/drm_drv.h"
-#include "dev/drm/drm_fops.h"
-#include "dev/drm/drm_ioctl.h"
-#include "dev/drm/drm_irq.h"
-#include "dev/drm/drm_lock.h"
-#include "dev/drm/drm_memory.h"
-#include "dev/drm/drm_pci.h"
-#include "dev/drm/drm_vm.h"
-#include "dev/drm/drm_sysctl.h"
-#if __HAVE_SG
-#include "dev/drm/drm_scatter.h"
-#endif
+	dev->driver_ioctls = radeon_ioctls;
+	dev->max_driver_ioctl = radeon_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->use_mtrr = 1;
+	dev->use_pci_dma = 1;
+	dev->use_sg = 1;
+	dev->use_dma = 1;
+	dev->use_irq = 1;
+	dev->use_vbl_irq = 1;
+}
 
 #ifdef __FreeBSD__
-DRIVER_MODULE(radeon, pci, DRM(driver), DRM(devclass), 0, 0);
-#elif defined(__NetBSD__)
+static int
+radeon_probe(device_t dev)
+{
+	return drm_probe(dev, radeon_pciidlist);
+}
+
+static int
+radeon_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	radeon_configure(dev);
+	return drm_attach(nbdev, radeon_pciidlist);
+}
+
+static device_method_t radeon_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		radeon_probe),
+	DEVMETHOD(device_attach,	radeon_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t radeon_driver = {
+	"drm",
+	radeon_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(radeon, pci, radeon_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(radeon, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 CFDRIVER_DECL(radeon, DV_TTY, NULL);
 #endif /* __FreeBSD__ */
diff --git a/sys/dev/drm/radeon_drv.h b/sys/dev/drm/radeon_drv.h
index ab694de..88b7ab1 100644
--- a/sys/dev/drm/radeon_drv.h
+++ b/sys/dev/drm/radeon_drv.h
@@ -33,14 +33,111 @@
 #ifndef __RADEON_DRV_H__
 #define __RADEON_DRV_H__
 
+#ifdef __linux__
+#include "radeon_i2c.h"
+#endif /* __linux__ */
+
+/* General customization:
+ */
+
+#define DRIVER_AUTHOR		"Gareth Hughes, Keith Whitwell, others."
+
+#define DRIVER_NAME		"radeon"
+#define DRIVER_DESC		"ATI Radeon"
+#define DRIVER_DATE		"20050311"
+
+/* Interface history:
+ *
+ * 1.1 - ??
+ * 1.2 - Add vertex2 ioctl (keith)
+ *     - Add stencil capability to clear ioctl (gareth, keith)
+ *     - Increase MAX_TEXTURE_LEVELS (brian)
+ * 1.3 - Add cmdbuf ioctl (keith)
+ *     - Add support for new radeon packets (keith)
+ *     - Add getparam ioctl (keith)
+ *     - Add flip-buffers ioctl, deprecate fullscreen foo (keith).
+ * 1.4 - Add scratch registers to get_param ioctl.
+ * 1.5 - Add r200 packets to cmdbuf ioctl
+ *     - Add r200 function to init ioctl
+ *     - Add 'scalar2' instruction to cmdbuf
+ * 1.6 - Add static GART memory manager
+ *       Add irq handler (won't be turned on unless X server knows to)
+ *       Add irq ioctls and irq_active getparam.
+ *       Add wait command for cmdbuf ioctl
+ *       Add GART offset query for getparam
+ * 1.7 - Add support for cube map registers: R200_PP_CUBIC_FACES_[0..5]
+ *       and R200_PP_CUBIC_OFFSET_F1_[0..5].
+ *       Added packets R200_EMIT_PP_CUBIC_FACES_[0..5] and
+ *       R200_EMIT_PP_CUBIC_OFFSETS_[0..5].  (brian)
+ * 1.8 - Remove need to call cleanup ioctls on last client exit (keith)
+ *       Add 'GET' queries for starting additional clients on different VT's.
+ * 1.9 - Add DRM_IOCTL_RADEON_CP_RESUME ioctl.
+ *       Add texture rectangle support for r100.
+ * 1.10- Add SETPARAM ioctl; first parameter to set is FB_LOCATION, which
+ *       clients use to tell the DRM where they think the framebuffer is
+ *       located in the card's address space
+ * 1.11- Add packet R200_EMIT_RB3D_BLENDCOLOR to support GL_EXT_blend_color
+ *       and GL_EXT_blend_[func|equation]_separate on r200
+ * 1.12- Add R300 CP microcode support - this just loads the CP on r300
+ *       (No 3D support yet - just microcode loading).
+ * 1.13- Add packet R200_EMIT_TCL_POINT_SPRITE_CNTL for ARB_point_parameters
+ *     - Add hyperz support, add hyperz flags to clear ioctl.
+ * 1.14- Add support for color tiling
+ *     - Add R100/R200 surface allocation/free support
+ * 1.15- Add support for texture micro tiling
+ *     - Add support for r100 cube maps
+ * 1.16- Add R200_EMIT_PP_TRI_PERF_CNTL packet to support brilinear
+ *       texture filtering on r200
+ */
+
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		16
+#define DRIVER_PATCHLEVEL	0
+
+enum radeon_family {
+	CHIP_R100,
+	CHIP_RS100,
+	CHIP_RV100,
+	CHIP_R200,
+	CHIP_RV200,
+	CHIP_RS200,
+	CHIP_R250,
+	CHIP_RS250,
+	CHIP_RV250,
+	CHIP_RV280,
+	CHIP_R300,
+	CHIP_RS300,
+	CHIP_RV350,
+	CHIP_LAST,
+};
+
+enum radeon_cp_microcode_version {
+	UCODE_R100,
+	UCODE_R200,
+	UCODE_R300,
+};
+
+/*
+ * Chip flags
+ */
+enum radeon_chip_flags {
+	CHIP_FAMILY_MASK = 0x0000ffffUL,
+	CHIP_FLAGS_MASK = 0xffff0000UL,
+	CHIP_IS_MOBILITY = 0x00010000UL,
+	CHIP_IS_IGP = 0x00020000UL,
+	CHIP_SINGLE_CRTC = 0x00040000UL,
+	CHIP_IS_AGP = 0x00080000UL,
+	CHIP_HAS_HIERZ = 0x00100000UL, 
+};
+
 #define GET_RING_HEAD(dev_priv)		DRM_READ32(  (dev_priv)->ring_rptr, 0 )
 #define SET_RING_HEAD(dev_priv,val)	DRM_WRITE32( (dev_priv)->ring_rptr, 0, (val) )
 
 typedef struct drm_radeon_freelist {
-   	unsigned int age;
-   	drm_buf_t *buf;
-   	struct drm_radeon_freelist *next;
-   	struct drm_radeon_freelist *prev;
+	unsigned int age;
+	drm_buf_t *buf;
+	struct drm_radeon_freelist *next;
+	struct drm_radeon_freelist *prev;
 } drm_radeon_freelist_t;
 
 typedef struct drm_radeon_ring_buffer {
@@ -62,6 +159,9 @@ typedef struct drm_radeon_depth_clear_t {
 	u32 se_cntl;
 } drm_radeon_depth_clear_t;
 
+struct drm_radeon_driver_file_fields {
+	int64_t radeon_fb_delta;
+};
 
 struct mem_block {
 	struct mem_block *next;
@@ -71,7 +171,23 @@ struct mem_block {
 	DRMFILE filp;		/* 0: free, -1: heap, other: real files */
 };
 
+struct radeon_surface {
+	int refcount;
+	u32 lower;
+	u32 upper;
+	u32 flags;
+};
+
+struct radeon_virt_surface {
+	int surface_index;
+	u32 lower;
+	u32 upper;
+	u32 flags;
+	DRMFILE filp;
+};
+
 typedef struct drm_radeon_private {
+
 	drm_radeon_ring_buffer_t ring;
 	drm_radeon_sarea_t *sarea_priv;
 
@@ -84,17 +200,16 @@ typedef struct drm_radeon_private {
 	int cp_mode;
 	int cp_running;
 
-   	drm_radeon_freelist_t *head;
-   	drm_radeon_freelist_t *tail;
+	drm_radeon_freelist_t *head;
+	drm_radeon_freelist_t *tail;
 	int last_buf;
 	volatile u32 *scratch;
 	int writeback_works;
 
 	int usec_timeout;
 
-	int is_r200;
+	int microcode_version;
 
-	int is_pci;
 	unsigned long phys_pci_gart;
 	dma_addr_t bus_pci_gart;
 
@@ -128,7 +243,7 @@ typedef struct drm_radeon_private {
 	u32 depth_pitch_offset;
 
 	drm_radeon_depth_clear_t depth_clear;
-	
+
 	unsigned long fb_offset;
 	unsigned long mmio_offset;
 	unsigned long ring_offset;
@@ -140,16 +255,24 @@ typedef struct drm_radeon_private {
 	drm_local_map_t *mmio;
 	drm_local_map_t *cp_ring;
 	drm_local_map_t *ring_rptr;
-	drm_local_map_t *buffers;
 	drm_local_map_t *gart_textures;
 
 	struct mem_block *gart_heap;
 	struct mem_block *fb_heap;
 
 	/* SW interrupt */
-   	wait_queue_head_t swi_queue;
-   	atomic_t swi_emitted;
+	wait_queue_head_t swi_queue;
+	atomic_t swi_emitted;
 
+	struct radeon_surface surfaces[RADEON_MAX_SURFACES];
+	struct radeon_virt_surface virt_surfaces[2*RADEON_MAX_SURFACES];
+	
+	/* starting from here on, data is preserved accross an open */
+	uint32_t flags;		/* see radeon_chip_flags */
+
+#ifdef __linux__
+	struct radeon_i2c_chan i2c[4];
+#endif /* __linux__ */
 } drm_radeon_private_t;
 
 typedef struct drm_radeon_buf_priv {
@@ -157,54 +280,46 @@ typedef struct drm_radeon_buf_priv {
 } drm_radeon_buf_priv_t;
 
 				/* radeon_cp.c */
-extern int radeon_cp_init( DRM_IOCTL_ARGS );
-extern int radeon_cp_start( DRM_IOCTL_ARGS );
-extern int radeon_cp_stop( DRM_IOCTL_ARGS );
-extern int radeon_cp_reset( DRM_IOCTL_ARGS );
-extern int radeon_cp_idle( DRM_IOCTL_ARGS );
-extern int radeon_cp_resume( DRM_IOCTL_ARGS );
-extern int radeon_engine_reset( DRM_IOCTL_ARGS );
-extern int radeon_fullscreen( DRM_IOCTL_ARGS );
-extern int radeon_cp_buffers( DRM_IOCTL_ARGS );
-
-extern void radeon_freelist_reset( drm_device_t *dev );
-extern drm_buf_t *radeon_freelist_get( drm_device_t *dev );
-
-extern int radeon_wait_ring( drm_radeon_private_t *dev_priv, int n );
-
-extern int radeon_do_cp_idle( drm_radeon_private_t *dev_priv );
-extern int radeon_do_cleanup_cp( drm_device_t *dev );
-extern int radeon_do_cleanup_pageflip( drm_device_t *dev );
-
-				/* radeon_state.c */
-extern int radeon_cp_clear( DRM_IOCTL_ARGS );
-extern int radeon_cp_swap( DRM_IOCTL_ARGS );
-extern int radeon_cp_vertex( DRM_IOCTL_ARGS );
-extern int radeon_cp_indices( DRM_IOCTL_ARGS );
-extern int radeon_cp_texture( DRM_IOCTL_ARGS );
-extern int radeon_cp_stipple( DRM_IOCTL_ARGS );
-extern int radeon_cp_indirect( DRM_IOCTL_ARGS );
-extern int radeon_cp_vertex2( DRM_IOCTL_ARGS );
-extern int radeon_cp_cmdbuf( DRM_IOCTL_ARGS );
-extern int radeon_cp_getparam( DRM_IOCTL_ARGS );
-extern int radeon_cp_setparam( DRM_IOCTL_ARGS );
-extern int radeon_cp_flip( DRM_IOCTL_ARGS );
-
-extern int radeon_mem_alloc( DRM_IOCTL_ARGS );
-extern int radeon_mem_free( DRM_IOCTL_ARGS );
-extern int radeon_mem_init_heap( DRM_IOCTL_ARGS );
-extern void radeon_mem_takedown( struct mem_block **heap );
-extern void radeon_mem_release( DRMFILE filp, struct mem_block *heap );
+extern int radeon_cp_init(DRM_IOCTL_ARGS);
+extern int radeon_cp_start(DRM_IOCTL_ARGS);
+extern int radeon_cp_stop(DRM_IOCTL_ARGS);
+extern int radeon_cp_reset(DRM_IOCTL_ARGS);
+extern int radeon_cp_idle(DRM_IOCTL_ARGS);
+extern int radeon_cp_resume(DRM_IOCTL_ARGS);
+extern int radeon_engine_reset(DRM_IOCTL_ARGS);
+extern int radeon_fullscreen(DRM_IOCTL_ARGS);
+extern int radeon_cp_buffers(DRM_IOCTL_ARGS);
 
-				/* radeon_irq.c */
-extern int radeon_irq_emit( DRM_IOCTL_ARGS );
-extern int radeon_irq_wait( DRM_IOCTL_ARGS );
+extern void radeon_freelist_reset(drm_device_t * dev);
+extern drm_buf_t *radeon_freelist_get(drm_device_t * dev);
+
+extern int radeon_wait_ring(drm_radeon_private_t * dev_priv, int n);
 
-extern int radeon_emit_and_wait_irq(drm_device_t *dev);
-extern int radeon_wait_irq(drm_device_t *dev, int swi_nr);
-extern int radeon_emit_irq(drm_device_t *dev);
+extern int radeon_do_cp_idle(drm_radeon_private_t * dev_priv);
 
-extern void radeon_do_release(drm_device_t *dev);
+extern int radeon_mem_alloc(DRM_IOCTL_ARGS);
+extern int radeon_mem_free(DRM_IOCTL_ARGS);
+extern int radeon_mem_init_heap(DRM_IOCTL_ARGS);
+extern void radeon_mem_takedown(struct mem_block **heap);
+extern void radeon_mem_release(DRMFILE filp, struct mem_block *heap);
+
+				/* radeon_irq.c */
+extern int radeon_irq_emit(DRM_IOCTL_ARGS);
+extern int radeon_irq_wait(DRM_IOCTL_ARGS);
+
+extern void radeon_do_release(drm_device_t * dev);
+extern int radeon_driver_vblank_wait(drm_device_t * dev,
+				     unsigned int *sequence);
+extern irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS);
+extern void radeon_driver_irq_preinstall(drm_device_t * dev);
+extern void radeon_driver_irq_postinstall(drm_device_t * dev);
+extern void radeon_driver_irq_uninstall(drm_device_t * dev);
+extern void radeon_driver_prerelease(drm_device_t * dev, DRMFILE filp);
+extern void radeon_driver_pretakedown(drm_device_t * dev);
+extern int radeon_driver_open_helper(drm_device_t * dev,
+				     drm_file_t * filp_priv);
+extern void radeon_driver_free_filp_priv(drm_device_t * dev,
+					 drm_file_t * filp_priv);
 
 /* Flags for stats.boxes
  */
@@ -214,13 +329,13 @@ extern void radeon_do_release(drm_device_t *dev);
 #define RADEON_BOX_WAIT_IDLE     0x8
 #define RADEON_BOX_TEXTURE_LOAD  0x10
 
-
-
 /* Register definitions, register access macros and drmAddMap constants
  * for Radeon kernel driver.
  */
-
 #define RADEON_AGP_COMMAND		0x0f60
+#define RADEON_AGP_COMMAND_PCI_CONFIG	0x0060	/* offset in PCI config */
+#       define RADEON_AGP_ENABLE            (1<<8)
+
 #define RADEON_AUX_SCISSOR_CNTL		0x26f0
 #	define RADEON_EXCLUSIVE_SCISSOR_0	(1 << 24)
 #	define RADEON_EXCLUSIVE_SCISSOR_1	(1 << 25)
@@ -243,6 +358,11 @@ extern void radeon_do_release(drm_device_t *dev);
 #define RADEON_CRTC2_OFFSET		0x0324
 #define RADEON_CRTC2_OFFSET_CNTL	0x0328
 
+#define RADEON_MPP_TB_CONFIG		0x01c0
+#define RADEON_MEM_CNTL			0x0140
+#define RADEON_MEM_SDRAM_MODE_REG	0x0158
+#define RADEON_AGP_BASE			0x0170
+
 #define RADEON_RB3D_COLOROFFSET		0x1c40
 #define RADEON_RB3D_COLORPITCH		0x1c48
 
@@ -285,7 +405,6 @@ extern void radeon_do_release(drm_device_t *dev);
 				? DRM_READ32( dev_priv->ring_rptr, RADEON_SCRATCHOFF(x) ) \
 				: RADEON_READ( RADEON_SCRATCH_REG0 + 4*(x) ) )
 
-
 #define RADEON_GEN_INT_CNTL		0x0040
 #	define RADEON_CRTC_VBLANK_MASK		(1 << 0)
 #	define RADEON_GUI_IDLE_INT_ENABLE	(1 << 19)
@@ -356,7 +475,9 @@ extern void radeon_do_release(drm_device_t *dev);
 #	define RADEON_ROP_ENABLE		(1 << 6)
 #	define RADEON_STENCIL_ENABLE		(1 << 7)
 #	define RADEON_Z_ENABLE			(1 << 8)
+#	define RADEON_ZBLOCK16			(1 << 15)
 #define RADEON_RB3D_DEPTHOFFSET		0x1c24
+#define RADEON_RB3D_DEPTHCLEARVALUE	0x3230
 #define RADEON_RB3D_DEPTHPITCH		0x1c28
 #define RADEON_RB3D_PLANEMASK		0x1d84
 #define RADEON_RB3D_STENCILREFMASK	0x1d7c
@@ -369,11 +490,15 @@ extern void radeon_do_release(drm_device_t *dev);
 #define RADEON_RB3D_ZSTENCILCNTL	0x1c2c
 #	define RADEON_Z_TEST_MASK		(7 << 4)
 #	define RADEON_Z_TEST_ALWAYS		(7 << 4)
+#	define RADEON_Z_HIERARCHY_ENABLE        (1 << 8)
 #	define RADEON_STENCIL_TEST_ALWAYS	(7 << 12)
 #	define RADEON_STENCIL_S_FAIL_REPLACE	(2 << 16)
 #	define RADEON_STENCIL_ZPASS_REPLACE	(2 << 20)
 #	define RADEON_STENCIL_ZFAIL_REPLACE	(2 << 24)
+#	define RADEON_Z_COMPRESSION_ENABLE      (1 << 28)
+#	define RADEON_FORCE_Z_DIRTY             (1 << 29)
 #	define RADEON_Z_WRITE_ENABLE		(1 << 30)
+#	define RADEON_Z_DECOMPRESSION_ENABLE    (1 << 31)
 #define RADEON_RBBM_SOFT_RESET		0x00f0
 #	define RADEON_SOFT_RESET_CP		(1 <<  0)
 #	define RADEON_SOFT_RESET_HI		(1 <<  1)
@@ -452,6 +577,7 @@ extern void radeon_do_release(drm_device_t *dev);
 #	define RADEON_SURF_TILE_MODE_16BIT_Z	(3 << 16)
 #define RADEON_SURFACE0_LOWER_BOUND	0x0b04
 #define RADEON_SURFACE0_UPPER_BOUND	0x0b08
+#	define RADEON_SURF_ADDRESS_FIXED_MASK	(0x3ff << 0)
 #define RADEON_SURFACE1_INFO		0x0b1c
 #define RADEON_SURFACE1_LOWER_BOUND	0x0b14
 #define RADEON_SURFACE1_UPPER_BOUND	0x0b18
@@ -481,12 +607,11 @@ extern void radeon_do_release(drm_device_t *dev);
 #	define RADEON_WAIT_3D_IDLECLEAN		(1 << 17)
 #	define RADEON_WAIT_HOST_IDLECLEAN	(1 << 18)
 
-#define RADEON_RB3D_ZMASKOFFSET		0x1c34
+#define RADEON_RB3D_ZMASKOFFSET		0x3234
 #define RADEON_RB3D_ZSTENCILCNTL	0x1c2c
 #	define RADEON_DEPTH_FORMAT_16BIT_INT_Z	(0 << 0)
 #	define RADEON_DEPTH_FORMAT_24BIT_INT_Z	(2 << 0)
 
-
 /* CP registers */
 #define RADEON_CP_ME_RAM_ADDR		0x07d4
 #define RADEON_CP_ME_RAM_RADDR		0x07d8
@@ -536,6 +661,10 @@ extern void radeon_do_release(drm_device_t *dev);
 #	define RADEON_3D_DRAW_IMMD		0x00002900
 #	define RADEON_3D_DRAW_INDX		0x00002A00
 #	define RADEON_3D_LOAD_VBPNTR		0x00002F00
+#	define RADEON_MPEG_IDCT_MACROBLOCK	0x00003000
+#	define RADEON_MPEG_IDCT_MACROBLOCK_REV	0x00003100
+#	define RADEON_3D_CLEAR_ZMASK		0x00003200
+#	define RADEON_3D_CLEAR_HIZ		0x00003700
 #	define RADEON_CNTL_HOSTDATA_BLT		0x00009400
 #	define RADEON_CNTL_PAINT_MULTI		0x00009A00
 #	define RADEON_CNTL_BITBLT_MULTI		0x00009B00
@@ -603,19 +732,19 @@ extern void radeon_do_release(drm_device_t *dev);
 #define R200_PP_TXCBLEND_5                0x2f50
 #define R200_PP_TXCBLEND_6                0x2f60
 #define R200_PP_TXCBLEND_7                0x2f70
-#define R200_SE_TCL_LIGHT_MODEL_CTL_0     0x2268 
+#define R200_SE_TCL_LIGHT_MODEL_CTL_0     0x2268
 #define R200_PP_TFACTOR_0                 0x2ee0
 #define R200_SE_VTX_FMT_0                 0x2088
 #define R200_SE_VAP_CNTL                  0x2080
 #define R200_SE_TCL_MATRIX_SEL_0          0x2230
-#define R200_SE_TCL_TEX_PROC_CTL_2        0x22a8 
-#define R200_SE_TCL_UCP_VERT_BLEND_CTL    0x22c0 
-#define R200_PP_TXFILTER_5                0x2ca0 
-#define R200_PP_TXFILTER_4                0x2c80 
-#define R200_PP_TXFILTER_3                0x2c60 
-#define R200_PP_TXFILTER_2                0x2c40 
-#define R200_PP_TXFILTER_1                0x2c20 
-#define R200_PP_TXFILTER_0                0x2c00 
+#define R200_SE_TCL_TEX_PROC_CTL_2        0x22a8
+#define R200_SE_TCL_UCP_VERT_BLEND_CTL    0x22c0
+#define R200_PP_TXFILTER_5                0x2ca0
+#define R200_PP_TXFILTER_4                0x2c80
+#define R200_PP_TXFILTER_3                0x2c60
+#define R200_PP_TXFILTER_2                0x2c40
+#define R200_PP_TXFILTER_1                0x2c20
+#define R200_PP_TXFILTER_0                0x2c00
 #define R200_PP_TXOFFSET_5                0x2d78
 #define R200_PP_TXOFFSET_4                0x2d60
 #define R200_PP_TXOFFSET_3                0x2d48
@@ -669,16 +798,22 @@ extern void radeon_do_release(drm_device_t *dev);
 #define R200_RE_SCISSOR_TL_0              0x1cd8
 #define R200_RE_SCISSOR_TL_1              0x1ce0
 #define R200_RE_SCISSOR_TL_2              0x1ce8
-#define R200_RB3D_DEPTHXY_OFFSET          0x1d60 
+#define R200_RB3D_DEPTHXY_OFFSET          0x1d60
 #define R200_RE_AUX_SCISSOR_CNTL          0x26f0
 #define R200_SE_VTX_STATE_CNTL            0x2180
 #define R200_RE_POINTSIZE                 0x2648
 #define R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0 0x2254
 
-#define RADEON_PP_TEX_SIZE_0                0x1d04  /* NPOT */
+#define RADEON_PP_TEX_SIZE_0                0x1d04	/* NPOT */
 #define RADEON_PP_TEX_SIZE_1                0x1d0c
 #define RADEON_PP_TEX_SIZE_2                0x1d14
 
+#define RADEON_PP_CUBIC_FACES_0             0x1d24
+#define RADEON_PP_CUBIC_FACES_1             0x1d28
+#define RADEON_PP_CUBIC_FACES_2             0x1d2c
+#define RADEON_PP_CUBIC_OFFSET_T0_0         0x1dd0	/* bits [31:5] */
+#define RADEON_PP_CUBIC_OFFSET_T1_0         0x1e00
+#define RADEON_PP_CUBIC_OFFSET_T2_0         0x1e14
 
 #define SE_VAP_CNTL__TCL_ENA_MASK                          0x00000001
 #define SE_VAP_CNTL__FORCE_W_TO_ONE_MASK                   0x00010000
@@ -690,10 +825,14 @@ extern void radeon_do_release(drm_device_t *dev);
 #define SE_VTX_FMT_0__VTX_COLOR_0_FMT__SHIFT               0x0000000b
 #define R200_3D_DRAW_IMMD_2      0xC0003500
 #define R200_SE_VTX_FMT_1                 0x208c
-#define R200_RE_CNTL                      0x1c50 
+#define R200_RE_CNTL                      0x1c50
 
 #define R200_RB3D_BLENDCOLOR              0x3218
 
+#define R200_SE_TCL_POINT_SPRITE_CNTL     0x22c4
+
+#define R200_PP_TRI_PERF                  0x2cf8
+
 /* Constants */
 #define RADEON_MAX_USEC_TIMEOUT		100000	/* 100 ms */
 
@@ -720,8 +859,8 @@ do {									\
 	RADEON_WRITE( RADEON_CLOCK_CNTL_DATA, (val) );			\
 } while (0)
 
-extern int RADEON_READ_PLL( drm_device_t *dev, int addr );
-
+extern int radeon_preinit(struct drm_device *dev, unsigned long flags);
+extern int radeon_postcleanup(struct drm_device *dev);
 
 #define CP_PACKET0( reg, n )						\
 	(RADEON_CP_PACKET0 | ((n) << 16) | ((reg) >> 2))
@@ -734,7 +873,6 @@ extern int RADEON_READ_PLL( drm_device_t *dev, int addr );
 #define CP_PACKET3( pkt, n )						\
 	(RADEON_CP_PACKET3 | (pkt) | ((n) << 16))
 
-
 /* ================================================================
  * Engine control helper macros
  */
@@ -783,12 +921,11 @@ extern int RADEON_READ_PLL( drm_device_t *dev, int addr );
 	OUT_RING( RADEON_RB3D_ZC_FLUSH_ALL );				\
 } while (0)
 
-
 /* ================================================================
  * Misc helper macros
  */
 
-/* Perfbox functionality only.  
+/* Perfbox functionality only.
  */
 #define RING_SPACE_TEST_WITH_RETURN( dev_priv )				\
 do {									\
@@ -825,7 +962,6 @@ do {									\
 	OUT_RING( age );						\
 } while (0)
 
-
 /* ================================================================
  * Ring control
  */
@@ -886,28 +1022,27 @@ do {									\
 	OUT_RING( val );						\
 } while (0)
 
-
-#define OUT_RING_USER_TABLE( tab, sz ) do {			\
+#define OUT_RING_TABLE( tab, sz ) do {				\
 	int _size = (sz);					\
-	int *_tab = (tab);					\
+	int *_tab = (int *)(tab);				\
 								\
 	if (write + _size > mask) {				\
-		int i = (mask+1) - write;			\
-		if (DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write),	\
-				      _tab, i*4 ))		\
-			return DRM_ERR(EFAULT);		\
+		int _i = (mask+1) - write;			\
+		_size -= _i;					\
+		while (_i > 0) {				\
+			*(int *)(ring + write) = *_tab++;	\
+			write++;				\
+			_i--;					\
+		}						\
 		write = 0;					\
-		_size -= i;					\
-		_tab += i;					\
+		_tab += _i;					\
+	}							\
+	while (_size > 0) {					\
+		*(ring + write) = *_tab++;			\
+		write++;					\
+		_size--;					\
 	}							\
-								\
-	if (_size && DRM_COPY_FROM_USER_UNCHECKED( (int *)(ring+write),	\
-			               _tab, _size*4 ))		\
-		return DRM_ERR(EFAULT);			\
-								\
-	write += _size;						\
 	write &= mask;						\
 } while (0)
 
-
-#endif /* __RADEON_DRV_H__ */
+#endif				/* __RADEON_DRV_H__ */
diff --git a/sys/dev/drm/radeon_irq.c b/sys/dev/drm/radeon_irq.c
index 2d600a4..56be38a 100644
--- a/sys/dev/drm/radeon_irq.c
+++ b/sys/dev/drm/radeon_irq.c
@@ -1,7 +1,7 @@
 /* radeon_irq.c -- IRQ handling for radeon -*- linux-c -*- */
 /*-
  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
- * 
+ *
  * The Weather Channel (TM) funded Tungsten Graphics to develop the
  * initial release of the Radeon 8500 driver under the XFree86 license.
  * This notice must be preserved.
@@ -27,12 +27,11 @@
  *
  * Authors:
  *    Keith Whitwell <keith@tungstengraphics.com>
- *    Michel Dänzer <michel@daenzer.net>
+ *    Michel D�zer <michel@daenzer.net>
  *
  * $FreeBSD$
  */
 
-#include "dev/drm/radeon.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/radeon_drm.h"
@@ -56,31 +55,31 @@
  * tied to dma at all, this is just a hangover from dri prehistory.
  */
 
-irqreturn_t DRM(irq_handler)( DRM_IRQ_ARGS )
+irqreturn_t radeon_driver_irq_handler(DRM_IRQ_ARGS)
 {
 	drm_device_t *dev = (drm_device_t *) arg;
-	drm_radeon_private_t *dev_priv = 
-	   (drm_radeon_private_t *)dev->dev_private;
-   	u32 stat;
+	drm_radeon_private_t *dev_priv =
+	    (drm_radeon_private_t *) dev->dev_private;
+	u32 stat;
 
 	/* Only consider the bits we're interested in - others could be used
 	 * outside the DRM
 	 */
 	stat = RADEON_READ(RADEON_GEN_INT_STATUS)
-	     & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT);
+	    & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT);
 	if (!stat)
 		return IRQ_NONE;
 
 	/* SW interrupt */
 	if (stat & RADEON_SW_INT_TEST) {
-		DRM_WAKEUP( &dev_priv->swi_queue );
+		DRM_WAKEUP(&dev_priv->swi_queue);
 	}
 
 	/* VBLANK interrupt */
 	if (stat & RADEON_CRTC_VBLANK_STAT) {
 		atomic_inc(&dev->vbl_received);
 		DRM_WAKEUP(&dev->vbl_queue);
-		DRM(vbl_send_signals)( dev );
+		drm_vbl_send_signals(dev);
 	}
 
 	/* Acknowledge interrupts we handle */
@@ -88,15 +87,15 @@ irqreturn_t DRM(irq_handler)( DRM_IRQ_ARGS )
 	return IRQ_HANDLED;
 }
 
-static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv)
+static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t * dev_priv)
 {
-	u32 tmp = RADEON_READ( RADEON_GEN_INT_STATUS )
-		& (RADEON_SW_INT_TEST_ACK | RADEON_CRTC_VBLANK_STAT);
+	u32 tmp = RADEON_READ(RADEON_GEN_INT_STATUS)
+	    & (RADEON_SW_INT_TEST_ACK | RADEON_CRTC_VBLANK_STAT);
 	if (tmp)
-		RADEON_WRITE( RADEON_GEN_INT_STATUS, tmp );
+		RADEON_WRITE(RADEON_GEN_INT_STATUS, tmp);
 }
 
-int radeon_emit_irq(drm_device_t *dev)
+static int radeon_emit_irq(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	unsigned int ret;
@@ -105,156 +104,148 @@ int radeon_emit_irq(drm_device_t *dev)
 	atomic_inc(&dev_priv->swi_emitted);
 	ret = atomic_read(&dev_priv->swi_emitted);
 
-	BEGIN_RING( 4 );
-	OUT_RING_REG( RADEON_LAST_SWI_REG, ret );
-	OUT_RING_REG( RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE );
-	ADVANCE_RING(); 
- 	COMMIT_RING();
+	BEGIN_RING(4);
+	OUT_RING_REG(RADEON_LAST_SWI_REG, ret);
+	OUT_RING_REG(RADEON_GEN_INT_STATUS, RADEON_SW_INT_FIRE);
+	ADVANCE_RING();
+	COMMIT_RING();
 
 	return ret;
 }
 
-
-int radeon_wait_irq(drm_device_t *dev, int swi_nr)
+static int radeon_wait_irq(drm_device_t * dev, int swi_nr)
 {
-  	drm_radeon_private_t *dev_priv = 
-	   (drm_radeon_private_t *)dev->dev_private;
+	drm_radeon_private_t *dev_priv =
+	    (drm_radeon_private_t *) dev->dev_private;
 	int ret = 0;
 
- 	if (RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr)  
- 		return 0; 
+	if (RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr)
+		return 0;
 
 	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
 	/* This is a hack to work around mysterious freezes on certain
 	 * systems:
-	 */ 
-	radeon_acknowledge_irqs( dev_priv );
+	 */
+	radeon_acknowledge_irqs(dev_priv);
 
-	DRM_WAIT_ON( ret, dev_priv->swi_queue, 3 * DRM_HZ, 
-		     RADEON_READ( RADEON_LAST_SWI_REG ) >= swi_nr );
+	DRM_WAIT_ON(ret, dev_priv->swi_queue, 3 * DRM_HZ,
+		    RADEON_READ(RADEON_LAST_SWI_REG) >= swi_nr);
 
 	return ret;
 }
 
-int radeon_emit_and_wait_irq(drm_device_t *dev)
-{
-	return radeon_wait_irq( dev, radeon_emit_irq(dev) );
-}
-
-
-int DRM(vblank_wait)(drm_device_t *dev, unsigned int *sequence)
+int radeon_driver_vblank_wait(drm_device_t * dev, unsigned int *sequence)
 {
-  	drm_radeon_private_t *dev_priv = 
-	   (drm_radeon_private_t *)dev->dev_private;
+	drm_radeon_private_t *dev_priv =
+	    (drm_radeon_private_t *) dev->dev_private;
 	unsigned int cur_vblank;
 	int ret = 0;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	radeon_acknowledge_irqs( dev_priv );
+	radeon_acknowledge_irqs(dev_priv);
 
 	dev_priv->stats.boxes |= RADEON_BOX_WAIT_IDLE;
 
 	/* Assume that the user has missed the current sequence number
 	 * by about a day rather than she wants to wait for years
-	 * using vertical blanks... 
+	 * using vertical blanks...
 	 */
-	DRM_WAIT_ON( ret, dev->vbl_queue, 3*DRM_HZ, 
-		     ( ( ( cur_vblank = atomic_read(&dev->vbl_received ) )
-			 - *sequence ) <= (1<<23) ) );
+	DRM_WAIT_ON(ret, dev->vbl_queue, 3 * DRM_HZ,
+		    (((cur_vblank = atomic_read(&dev->vbl_received))
+		      - *sequence) <= (1 << 23)));
 
 	*sequence = cur_vblank;
 
 	return ret;
 }
 
-
 /* Needs the lock as it touches the ring.
  */
-int radeon_irq_emit( DRM_IOCTL_ARGS )
+int radeon_irq_emit(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_irq_emit_t emit;
 	int result;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( emit, (drm_radeon_irq_emit_t *)data,
-				  sizeof(emit) );
+	DRM_COPY_FROM_USER_IOCTL(emit, (drm_radeon_irq_emit_t __user *) data,
+				 sizeof(emit));
 
-	result = radeon_emit_irq( dev );
+	result = radeon_emit_irq(dev);
 
-	if ( DRM_COPY_TO_USER( emit.irq_seq, &result, sizeof(int) ) ) {
-		DRM_ERROR( "copy_to_user\n" );
+	if (DRM_COPY_TO_USER(emit.irq_seq, &result, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
 		return DRM_ERR(EFAULT);
 	}
 
 	return 0;
 }
 
-
 /* Doesn't need the hardware lock.
  */
-int radeon_irq_wait( DRM_IOCTL_ARGS )
+int radeon_irq_wait(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_irq_wait_t irqwait;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( irqwait, (drm_radeon_irq_wait_t *)data,
-				  sizeof(irqwait) );
+	DRM_COPY_FROM_USER_IOCTL(irqwait, (drm_radeon_irq_wait_t __user *) data,
+				 sizeof(irqwait));
 
-	return radeon_wait_irq( dev, irqwait.irq_seq );
+	return radeon_wait_irq(dev, irqwait.irq_seq);
 }
 
-
 /* drm_dma.h hooks
 */
-void DRM(driver_irq_preinstall)( drm_device_t *dev ) {
+void radeon_driver_irq_preinstall(drm_device_t * dev)
+{
 	drm_radeon_private_t *dev_priv =
-		(drm_radeon_private_t *)dev->dev_private;
+	    (drm_radeon_private_t *) dev->dev_private;
 
- 	/* Disable *all* interrupts */
-      	RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 );
+	/* Disable *all* interrupts */
+	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 
 	/* Clear bits if they're already high */
-	radeon_acknowledge_irqs( dev_priv );
+	radeon_acknowledge_irqs(dev_priv);
 }
 
-void DRM(driver_irq_postinstall)( drm_device_t *dev ) {
+void radeon_driver_irq_postinstall(drm_device_t * dev)
+{
 	drm_radeon_private_t *dev_priv =
-		(drm_radeon_private_t *)dev->dev_private;
+	    (drm_radeon_private_t *) dev->dev_private;
 
-   	atomic_set(&dev_priv->swi_emitted, 0);
-	DRM_INIT_WAITQUEUE( &dev_priv->swi_queue );
+	atomic_set(&dev_priv->swi_emitted, 0);
+	DRM_INIT_WAITQUEUE(&dev_priv->swi_queue);
 
 	/* Turn on SW and VBL ints */
-   	RADEON_WRITE( RADEON_GEN_INT_CNTL,
-		      RADEON_CRTC_VBLANK_MASK |	
-		      RADEON_SW_INT_ENABLE );
+	RADEON_WRITE(RADEON_GEN_INT_CNTL,
+		     RADEON_CRTC_VBLANK_MASK | RADEON_SW_INT_ENABLE);
 }
 
-void DRM(driver_irq_uninstall)( drm_device_t *dev ) {
+void radeon_driver_irq_uninstall(drm_device_t * dev)
+{
 	drm_radeon_private_t *dev_priv =
-		(drm_radeon_private_t *)dev->dev_private;
+	    (drm_radeon_private_t *) dev->dev_private;
 	if (!dev_priv)
 		return;
 
 	/* Disable *all* interrupts */
-	RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 );
+	RADEON_WRITE(RADEON_GEN_INT_CNTL, 0);
 }
diff --git a/sys/dev/drm/radeon_mem.c b/sys/dev/drm/radeon_mem.c
index 472b21f..89c07af 100644
--- a/sys/dev/drm/radeon_mem.c
+++ b/sys/dev/drm/radeon_mem.c
@@ -1,7 +1,7 @@
 /* radeon_mem.c -- Simple GART/fb memory manager for radeon -*- linux-c -*- */
 /*-
  * Copyright (C) The Weather Channel, Inc.  2002.  All Rights Reserved.
- * 
+ *
  * The Weather Channel (TM) funded Tungsten Graphics to develop the
  * initial release of the Radeon 8500 driver under the XFree86 license.
  * This notice must be preserved.
@@ -28,32 +28,30 @@
  * Authors:
  *    Keith Whitwell <keith@tungstengraphics.com>
  *
+ * $FreeBSD$
  */
 
-#include <sys/cdefs.h>
-__FBSDID("$FreeBSD$");
-
-#include "dev/drm/radeon.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/radeon_drm.h"
 #include "dev/drm/radeon_drv.h"
 
 /* Very simple allocator for GART memory, working on a static range
- * already mapped into each client's address space.  
+ * already mapped into each client's address space.
  */
 
 static struct mem_block *split_block(struct mem_block *p, int start, int size,
-				     DRMFILE filp )
+				     DRMFILE filp)
 {
 	/* Maybe cut off the start of an existing block */
 	if (start > p->start) {
-		struct mem_block *newblock = DRM_MALLOC(sizeof(*newblock));
-		if (!newblock) 
+		struct mem_block *newblock =
+		    drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
+		if (!newblock)
 			goto out;
 		newblock->start = start;
 		newblock->size = p->size - (start - p->start);
-		newblock->filp = 0;
+		newblock->filp = NULL;
 		newblock->next = p->next;
 		newblock->prev = p;
 		p->next->prev = newblock;
@@ -61,15 +59,16 @@ static struct mem_block *split_block(struct mem_block *p, int start, int size,
 		p->size -= newblock->size;
 		p = newblock;
 	}
-   
+
 	/* Maybe cut off the end of an existing block */
 	if (size < p->size) {
-		struct mem_block *newblock = DRM_MALLOC(sizeof(*newblock));
+		struct mem_block *newblock =
+		    drm_alloc(sizeof(*newblock), DRM_MEM_BUFS);
 		if (!newblock)
 			goto out;
 		newblock->start = start + size;
 		newblock->size = p->size - size;
-		newblock->filp = 0;
+		newblock->filp = NULL;
 		newblock->next = p->next;
 		newblock->prev = p;
 		p->next->prev = newblock;
@@ -77,42 +76,41 @@ static struct mem_block *split_block(struct mem_block *p, int start, int size,
 		p->size = size;
 	}
 
- out:
+      out:
 	/* Our block is in the middle */
 	p->filp = filp;
 	return p;
 }
 
-static struct mem_block *alloc_block( struct mem_block *heap, int size, 
-				      int align2, DRMFILE filp )
+static struct mem_block *alloc_block(struct mem_block *heap, int size,
+				     int align2, DRMFILE filp)
 {
 	struct mem_block *p;
-	int mask = (1 << align2)-1;
+	int mask = (1 << align2) - 1;
 
-	for (p = heap->next ; p != heap ; p = p->next) {
+	list_for_each(p, heap) {
 		int start = (p->start + mask) & ~mask;
 		if (p->filp == 0 && start + size <= p->start + p->size)
-			return split_block( p, start, size, filp );
+			return split_block(p, start, size, filp);
 	}
 
 	return NULL;
 }
 
-static struct mem_block *find_block( struct mem_block *heap, int start )
+static struct mem_block *find_block(struct mem_block *heap, int start)
 {
 	struct mem_block *p;
 
-	for (p = heap->next ; p != heap ; p = p->next) 
+	list_for_each(p, heap)
 		if (p->start == start)
 			return p;
 
 	return NULL;
 }
 
-
-static void free_block( struct mem_block *p )
+static void free_block(struct mem_block *p)
 {
-	p->filp = 0;
+	p->filp = NULL;
 
 	/* Assumes a single contiguous range.  Needs a special filp in
 	 * 'heap' to stop it being subsumed.
@@ -122,7 +120,7 @@ static void free_block( struct mem_block *p )
 		p->size += q->size;
 		p->next = q->next;
 		p->next->prev = p;
-		DRM_FREE(q, sizeof(*q));
+		drm_free(q, sizeof(*q), DRM_MEM_BUFS);
 	}
 
 	if (p->prev->filp == 0) {
@@ -130,7 +128,7 @@ static void free_block( struct mem_block *p )
 		q->size += p->size;
 		q->next = p->next;
 		q->next->prev = q;
-		DRM_FREE(p, sizeof(*q));
+		drm_free(p, sizeof(*q), DRM_MEM_BUFS);
 	}
 }
 
@@ -138,190 +136,181 @@ static void free_block( struct mem_block *p )
  */
 static int init_heap(struct mem_block **heap, int start, int size)
 {
-	struct mem_block *blocks = DRM_MALLOC(sizeof(*blocks));
+	struct mem_block *blocks = drm_alloc(sizeof(*blocks), DRM_MEM_BUFS);
 
-	if (!blocks) 
+	if (!blocks)
 		return DRM_ERR(ENOMEM);
-	
-	*heap = DRM_MALLOC(sizeof(**heap));
+
+	*heap = drm_alloc(sizeof(**heap), DRM_MEM_BUFS);
 	if (!*heap) {
-		DRM_FREE( blocks, sizeof(*blocks) );
+		drm_free(blocks, sizeof(*blocks), DRM_MEM_BUFS);
 		return DRM_ERR(ENOMEM);
 	}
 
 	blocks->start = start;
 	blocks->size = size;
-	blocks->filp = 0;
+	blocks->filp = NULL;
 	blocks->next = blocks->prev = *heap;
 
-	memset( *heap, 0, sizeof(**heap) );
-	(*heap)->filp = (DRMFILE) -1;
+	memset(*heap, 0, sizeof(**heap));
+	(*heap)->filp = (DRMFILE) - 1;
 	(*heap)->next = (*heap)->prev = blocks;
 	return 0;
 }
 
-
 /* Free all blocks associated with the releasing file.
  */
-void radeon_mem_release( DRMFILE filp, struct mem_block *heap )
+void radeon_mem_release(DRMFILE filp, struct mem_block *heap)
 {
 	struct mem_block *p;
 
 	if (!heap || !heap->next)
 		return;
 
-	for (p = heap->next ; p != heap ; p = p->next) {
-		if (p->filp == filp) 
-			p->filp = 0;
+	list_for_each(p, heap) {
+		if (p->filp == filp)
+			p->filp = NULL;
 	}
 
 	/* Assumes a single contiguous range.  Needs a special filp in
 	 * 'heap' to stop it being subsumed.
 	 */
-	for (p = heap->next ; p != heap ; p = p->next) {
+	list_for_each(p, heap) {
 		while (p->filp == 0 && p->next->filp == 0) {
 			struct mem_block *q = p->next;
 			p->size += q->size;
 			p->next = q->next;
 			p->next->prev = p;
-			DRM_FREE(q, sizeof(*q));
+			drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
 		}
 	}
 }
 
 /* Shutdown.
  */
-void radeon_mem_takedown( struct mem_block **heap )
+void radeon_mem_takedown(struct mem_block **heap)
 {
 	struct mem_block *p;
-	
+
 	if (!*heap)
 		return;
 
-	for (p = (*heap)->next ; p != *heap ; ) {
+	for (p = (*heap)->next; p != *heap;) {
 		struct mem_block *q = p;
 		p = p->next;
-		DRM_FREE(q, sizeof(*q));
+		drm_free(q, sizeof(*q), DRM_MEM_DRIVER);
 	}
 
-	DRM_FREE( *heap, sizeof(**heap) );
-	*heap = 0;
+	drm_free(*heap, sizeof(**heap), DRM_MEM_DRIVER);
+	*heap = NULL;
 }
 
-
-
 /* IOCTL HANDLERS */
 
-static struct mem_block **get_heap( drm_radeon_private_t *dev_priv,
-				   int region )
+static struct mem_block **get_heap(drm_radeon_private_t * dev_priv, int region)
 {
-	switch( region ) {
+	switch (region) {
 	case RADEON_MEM_REGION_GART:
- 		return &dev_priv->gart_heap; 
+		return &dev_priv->gart_heap;
 	case RADEON_MEM_REGION_FB:
 		return &dev_priv->fb_heap;
 	default:
-		return 0;
+		return NULL;
 	}
 }
 
-int radeon_mem_alloc( DRM_IOCTL_ARGS )
+int radeon_mem_alloc(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_mem_alloc_t alloc;
 	struct mem_block *block, **heap;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( alloc, (drm_radeon_mem_alloc_t *)data,
-				  sizeof(alloc) );
+	DRM_COPY_FROM_USER_IOCTL(alloc, (drm_radeon_mem_alloc_t __user *) data,
+				 sizeof(alloc));
 
-	heap = get_heap( dev_priv, alloc.region );
+	heap = get_heap(dev_priv, alloc.region);
 	if (!heap || !*heap)
 		return DRM_ERR(EFAULT);
-	
+
 	/* Make things easier on ourselves: all allocations at least
 	 * 4k aligned.
 	 */
 	if (alloc.alignment < 12)
 		alloc.alignment = 12;
 
-	block = alloc_block( *heap, alloc.size, alloc.alignment,
-			     filp );
+	block = alloc_block(*heap, alloc.size, alloc.alignment, filp);
 
-	if (!block) 
+	if (!block)
 		return DRM_ERR(ENOMEM);
 
-	if ( DRM_COPY_TO_USER( alloc.region_offset, &block->start, 
-			       sizeof(int) ) ) {
-		DRM_ERROR( "copy_to_user\n" );
+	if (DRM_COPY_TO_USER(alloc.region_offset, &block->start, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
 		return DRM_ERR(EFAULT);
 	}
-	
+
 	return 0;
 }
 
-
-
-int radeon_mem_free( DRM_IOCTL_ARGS )
+int radeon_mem_free(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_mem_free_t memfree;
 	struct mem_block *block, **heap;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( memfree, (drm_radeon_mem_free_t *)data,
-				  sizeof(memfree) );
+	DRM_COPY_FROM_USER_IOCTL(memfree, (drm_radeon_mem_free_t __user *) data,
+				 sizeof(memfree));
 
-	heap = get_heap( dev_priv, memfree.region );
+	heap = get_heap(dev_priv, memfree.region);
 	if (!heap || !*heap)
 		return DRM_ERR(EFAULT);
-	
-	block = find_block( *heap, memfree.region_offset );
+
+	block = find_block(*heap, memfree.region_offset);
 	if (!block)
 		return DRM_ERR(EFAULT);
 
 	if (block->filp != filp)
 		return DRM_ERR(EPERM);
 
-	free_block( block );	
+	free_block(block);
 	return 0;
 }
 
-int radeon_mem_init_heap( DRM_IOCTL_ARGS )
+int radeon_mem_init_heap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_mem_init_heap_t initheap;
 	struct mem_block **heap;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( initheap, (drm_radeon_mem_init_heap_t *)data,
-				  sizeof(initheap) );
+	DRM_COPY_FROM_USER_IOCTL(initheap,
+				 (drm_radeon_mem_init_heap_t __user *) data,
+				 sizeof(initheap));
 
-	heap = get_heap( dev_priv, initheap.region );
-	if (!heap) 
+	heap = get_heap(dev_priv, initheap.region);
+	if (!heap)
 		return DRM_ERR(EFAULT);
-	
+
 	if (*heap) {
 		DRM_ERROR("heap already initialized?");
 		return DRM_ERR(EFAULT);
 	}
-		
-	return init_heap( heap, initheap.start, initheap.size );
-}
-
 
+	return init_heap(heap, initheap.start, initheap.size);
+}
diff --git a/sys/dev/drm/radeon_state.c b/sys/dev/drm/radeon_state.c
index 70e1b07..50c2887 100644
--- a/sys/dev/drm/radeon_state.c
+++ b/sys/dev/drm/radeon_state.c
@@ -29,76 +29,63 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/radeon.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/drm_sarea.h"
 #include "dev/drm/radeon_drm.h"
 #include "dev/drm/radeon_drv.h"
 
-
 /* ================================================================
  * Helper functions for client state checking and fixup
  */
 
-static __inline__ int radeon_check_and_fixup_offset( drm_radeon_private_t *dev_priv,
-						     drm_file_t *filp_priv,
-						     u32 *offset ) {
+static __inline__ int radeon_check_and_fixup_offset(drm_radeon_private_t *
+						    dev_priv,
+						    drm_file_t * filp_priv,
+						    u32 * offset)
+{
 	u32 off = *offset;
+	struct drm_radeon_driver_file_fields *radeon_priv;
 
-	if ( off >= dev_priv->fb_location &&
-	     off < ( dev_priv->gart_vm_start + dev_priv->gart_size ) )
+	if (off >= dev_priv->fb_location &&
+	    off < (dev_priv->gart_vm_start + dev_priv->gart_size))
 		return 0;
 
-	off += filp_priv->radeon_fb_delta;
-
-	DRM_DEBUG( "offset fixed up to 0x%x\n", off );
+	radeon_priv = filp_priv->driver_priv;
 
-	if ( off < dev_priv->fb_location ||
-	     off >= ( dev_priv->gart_vm_start + dev_priv->gart_size ) )
-		return DRM_ERR( EINVAL );
+	off += radeon_priv->radeon_fb_delta;
 
-	*offset = off;
+	DRM_DEBUG("offset fixed up to 0x%x\n", off);
 
-	return 0;
-}
-
-static __inline__ int radeon_check_and_fixup_offset_user( drm_radeon_private_t *dev_priv,
-							  drm_file_t *filp_priv,
-							  u32 *offset ) {
-	u32 off;
-
-	DRM_GET_USER_UNCHECKED( off, offset );
-
-	if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &off ) )
-		return DRM_ERR( EINVAL );
+	if (off < dev_priv->fb_location ||
+	    off >= (dev_priv->gart_vm_start + dev_priv->gart_size))
+		return DRM_ERR(EINVAL);
 
-	DRM_PUT_USER_UNCHECKED( offset, off );
+	*offset = off;
 
 	return 0;
 }
 
-static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_priv,
-						      drm_file_t *filp_priv,
-						      int id,
-						      u32 *data ) {
-	switch ( id ) {
+static __inline__ int radeon_check_and_fixup_packets(drm_radeon_private_t *
+						     dev_priv,
+						     drm_file_t * filp_priv,
+						     int id, u32 __user * data)
+{
+	switch (id) {
 
 	case RADEON_EMIT_PP_MISC:
-		if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
-							 &data[( RADEON_RB3D_DEPTHOFFSET
-								 - RADEON_PP_MISC ) / 4] ) ) {
-			DRM_ERROR( "Invalid depth buffer offset\n" );
-			return DRM_ERR( EINVAL );
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+		    &data[(RADEON_RB3D_DEPTHOFFSET - RADEON_PP_MISC) / 4])) {
+			DRM_ERROR("Invalid depth buffer offset\n");
+			return DRM_ERR(EINVAL);
 		}
 		break;
 
 	case RADEON_EMIT_PP_CNTL:
-		if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
-							 &data[( RADEON_RB3D_COLOROFFSET
-								 - RADEON_PP_CNTL ) / 4] ) ) {
-			DRM_ERROR( "Invalid colour buffer offset\n" );
-			return DRM_ERR( EINVAL );
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+		    &data[(RADEON_RB3D_COLOROFFSET - RADEON_PP_CNTL) / 4])) {
+			DRM_ERROR("Invalid colour buffer offset\n");
+			return DRM_ERR(EINVAL);
 		}
 		break;
 
@@ -108,21 +95,20 @@ static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_
 	case R200_EMIT_PP_TXOFFSET_3:
 	case R200_EMIT_PP_TXOFFSET_4:
 	case R200_EMIT_PP_TXOFFSET_5:
-		if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
-							 &data[0] ) ) {
-			DRM_ERROR( "Invalid R200 texture offset\n" );
-			return DRM_ERR( EINVAL );
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+						  &data[0])) {
+			DRM_ERROR("Invalid R200 texture offset\n");
+			return DRM_ERR(EINVAL);
 		}
 		break;
 
 	case RADEON_EMIT_PP_TXFILTER_0:
 	case RADEON_EMIT_PP_TXFILTER_1:
 	case RADEON_EMIT_PP_TXFILTER_2:
-		if ( radeon_check_and_fixup_offset_user( dev_priv, filp_priv,
-							 &data[( RADEON_PP_TXOFFSET_0
-								 - RADEON_PP_TXFILTER_0 ) / 4] ) ) {
-			DRM_ERROR( "Invalid R100 texture offset\n" );
-			return DRM_ERR( EINVAL );
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+		    &data[(RADEON_PP_TXOFFSET_0 - RADEON_PP_TXFILTER_0) / 4])) {
+			DRM_ERROR("Invalid R100 texture offset\n");
+			return DRM_ERR(EINVAL);
 		}
 		break;
 
@@ -131,18 +117,35 @@ static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_
 	case R200_EMIT_PP_CUBIC_OFFSETS_2:
 	case R200_EMIT_PP_CUBIC_OFFSETS_3:
 	case R200_EMIT_PP_CUBIC_OFFSETS_4:
-	case R200_EMIT_PP_CUBIC_OFFSETS_5: {
-		int i;
-		for ( i = 0; i < 5; i++ ) {
-			if ( radeon_check_and_fixup_offset_user( dev_priv,
-								 filp_priv,
-								 &data[i] ) ) {
-				DRM_ERROR( "Invalid R200 cubic texture offset\n" );
-				return DRM_ERR( EINVAL );
+	case R200_EMIT_PP_CUBIC_OFFSETS_5:{
+			int i;
+			for (i = 0; i < 5; i++) {
+				if (radeon_check_and_fixup_offset(dev_priv,
+								  filp_priv,
+								  &data[i])) {
+					DRM_ERROR
+					    ("Invalid R200 cubic texture offset\n");
+					return DRM_ERR(EINVAL);
+				}
+			}
+			break;
+		}
+
+	case RADEON_EMIT_PP_CUBIC_OFFSETS_T0:
+	case RADEON_EMIT_PP_CUBIC_OFFSETS_T1:
+	case RADEON_EMIT_PP_CUBIC_OFFSETS_T2:{
+			int i;
+			for (i = 0; i < 5; i++) {
+				if (radeon_check_and_fixup_offset(dev_priv,
+								  filp_priv,
+								  &data[i])) {
+					DRM_ERROR
+					    ("Invalid R100 cubic texture offset\n");
+					return DRM_ERR(EINVAL);
+				}
 			}
 		}
 		break;
-	}
 
 	case RADEON_EMIT_RB3D_COLORPITCH:
 	case RADEON_EMIT_RE_LINE_PATTERN:
@@ -204,257 +207,256 @@ static __inline__ int radeon_check_and_fixup_packets( drm_radeon_private_t *dev_
 	case RADEON_EMIT_PP_TEX_SIZE_1:
 	case RADEON_EMIT_PP_TEX_SIZE_2:
 	case R200_EMIT_RB3D_BLENDCOLOR:
+	case R200_EMIT_TCL_POINT_SPRITE_CNTL:
+	case RADEON_EMIT_PP_CUBIC_FACES_0:
+	case RADEON_EMIT_PP_CUBIC_FACES_1:
+	case RADEON_EMIT_PP_CUBIC_FACES_2:
+	case R200_EMIT_PP_TRI_PERF_CNTL:
 		/* These packets don't contain memory offsets */
 		break;
 
 	default:
-		DRM_ERROR( "Unknown state packet ID %d\n", id );
-		return DRM_ERR( EINVAL );
+		DRM_ERROR("Unknown state packet ID %d\n", id);
+		return DRM_ERR(EINVAL);
 	}
 
 	return 0;
 }
 
-static __inline__ int radeon_check_and_fixup_packet3( drm_radeon_private_t *dev_priv,
-						      drm_file_t *filp_priv,
-						      drm_radeon_cmd_buffer_t *cmdbuf,
-						      unsigned int *cmdsz ) {
-	u32 tmp[4], *cmd = ( u32* )cmdbuf->buf;
-
-	if ( DRM_COPY_FROM_USER_UNCHECKED( tmp, cmd, sizeof( tmp ) ) ) {
-		DRM_ERROR( "Failed to copy data from user space\n" );
-		return DRM_ERR( EFAULT );
-	}
+static __inline__ int radeon_check_and_fixup_packet3(drm_radeon_private_t *
+						     dev_priv,
+						     drm_file_t * filp_priv,
+						     drm_radeon_cmd_buffer_t *
+						     cmdbuf,
+						     unsigned int *cmdsz)
+{
+	u32 *cmd = (u32 *) cmdbuf->buf;
 
-	*cmdsz = 2 + ( ( tmp[0] & RADEON_CP_PACKET_COUNT_MASK ) >> 16 );
+	*cmdsz = 2 + ((cmd[0] & RADEON_CP_PACKET_COUNT_MASK) >> 16);
 
-	if ( ( tmp[0] & 0xc0000000 ) != RADEON_CP_PACKET3 ) {
-		DRM_ERROR( "Not a type 3 packet\n" );
-		return DRM_ERR( EINVAL );
+	if ((cmd[0] & 0xc0000000) != RADEON_CP_PACKET3) {
+		DRM_ERROR("Not a type 3 packet\n");
+		return DRM_ERR(EINVAL);
 	}
 
-	if ( 4 * *cmdsz > cmdbuf->bufsz ) {
-		DRM_ERROR( "Packet size larger than size of data provided\n" );
-		return DRM_ERR( EINVAL );
+	if (4 * *cmdsz > cmdbuf->bufsz) {
+		DRM_ERROR("Packet size larger than size of data provided\n");
+		return DRM_ERR(EINVAL);
 	}
 
 	/* Check client state and fix it up if necessary */
-	if ( tmp[0] & 0x8000 ) { /* MSB of opcode: next DWORD GUI_CNTL */
+	if (cmd[0] & 0x8000) {	/* MSB of opcode: next DWORD GUI_CNTL */
 		u32 offset;
 
-		if ( tmp[1] & ( RADEON_GMC_SRC_PITCH_OFFSET_CNTL
-			      | RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) {
-			offset = tmp[2] << 10;
-			if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &offset ) ) {
-				DRM_ERROR( "Invalid first packet offset\n" );
-				return DRM_ERR( EINVAL );
+		if (cmd[1] & (RADEON_GMC_SRC_PITCH_OFFSET_CNTL
+			      | RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
+			offset = cmd[2] << 10;
+			if (radeon_check_and_fixup_offset
+			    (dev_priv, filp_priv, &offset)) {
+				DRM_ERROR("Invalid first packet offset\n");
+				return DRM_ERR(EINVAL);
 			}
-			tmp[2] = ( tmp[2] & 0xffc00000 ) | offset >> 10;
+			cmd[2] = (cmd[2] & 0xffc00000) | offset >> 10;
 		}
 
-		if ( ( tmp[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL ) &&
-		     ( tmp[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL ) ) {
-			offset = tmp[3] << 10;
-			if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &offset ) ) {
-				DRM_ERROR( "Invalid second packet offset\n" );
-				return DRM_ERR( EINVAL );
+		if ((cmd[1] & RADEON_GMC_SRC_PITCH_OFFSET_CNTL) &&
+		    (cmd[1] & RADEON_GMC_DST_PITCH_OFFSET_CNTL)) {
+			offset = cmd[3] << 10;
+			if (radeon_check_and_fixup_offset
+			    (dev_priv, filp_priv, &offset)) {
+				DRM_ERROR("Invalid second packet offset\n");
+				return DRM_ERR(EINVAL);
 			}
-			tmp[3] = ( tmp[3] & 0xffc00000 ) | offset >> 10;
-		}
-
-		if ( DRM_COPY_TO_USER_UNCHECKED( cmd, tmp, sizeof( tmp ) ) ) {
-			DRM_ERROR( "Failed to copy data to user space\n" );
-			return DRM_ERR( EFAULT );
+			cmd[3] = (cmd[3] & 0xffc00000) | offset >> 10;
 		}
 	}
 
 	return 0;
 }
 
-
 /* ================================================================
  * CP hardware state programming functions
  */
 
-static __inline__ void radeon_emit_clip_rect( drm_radeon_private_t *dev_priv,
-					  drm_clip_rect_t *box )
+static __inline__ void radeon_emit_clip_rect(drm_radeon_private_t * dev_priv,
+					     drm_clip_rect_t * box)
 {
 	RING_LOCALS;
 
-	DRM_DEBUG( "   box:  x1=%d y1=%d  x2=%d y2=%d\n",
-		   box->x1, box->y1, box->x2, box->y2 );
+	DRM_DEBUG("   box:  x1=%d y1=%d  x2=%d y2=%d\n",
+		  box->x1, box->y1, box->x2, box->y2);
 
-	BEGIN_RING( 4 );
-	OUT_RING( CP_PACKET0( RADEON_RE_TOP_LEFT, 0 ) );
-	OUT_RING( (box->y1 << 16) | box->x1 );
-	OUT_RING( CP_PACKET0( RADEON_RE_WIDTH_HEIGHT, 0 ) );
-	OUT_RING( ((box->y2 - 1) << 16) | (box->x2 - 1) );
+	BEGIN_RING(4);
+	OUT_RING(CP_PACKET0(RADEON_RE_TOP_LEFT, 0));
+	OUT_RING((box->y1 << 16) | box->x1);
+	OUT_RING(CP_PACKET0(RADEON_RE_WIDTH_HEIGHT, 0));
+	OUT_RING(((box->y2 - 1) << 16) | (box->x2 - 1));
 	ADVANCE_RING();
 }
 
 /* Emit 1.1 state
  */
-static int radeon_emit_state( drm_radeon_private_t *dev_priv,
-			      drm_file_t *filp_priv,
-			      drm_radeon_context_regs_t *ctx,
-			      drm_radeon_texture_regs_t *tex,
-			      unsigned int dirty )
+static int radeon_emit_state(drm_radeon_private_t * dev_priv,
+			     drm_file_t * filp_priv,
+			     drm_radeon_context_regs_t * ctx,
+			     drm_radeon_texture_regs_t * tex,
+			     unsigned int dirty)
 {
 	RING_LOCALS;
-	DRM_DEBUG( "dirty=0x%08x\n", dirty );
+	DRM_DEBUG("dirty=0x%08x\n", dirty);
 
-	if ( dirty & RADEON_UPLOAD_CONTEXT ) {
-		if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
-						    &ctx->rb3d_depthoffset ) ) {
-			DRM_ERROR( "Invalid depth buffer offset\n" );
-			return DRM_ERR( EINVAL );
+	if (dirty & RADEON_UPLOAD_CONTEXT) {
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+						  &ctx->rb3d_depthoffset)) {
+			DRM_ERROR("Invalid depth buffer offset\n");
+			return DRM_ERR(EINVAL);
 		}
 
-		if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
-						    &ctx->rb3d_coloroffset ) ) {
-			DRM_ERROR( "Invalid depth buffer offset\n" );
-			return DRM_ERR( EINVAL );
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+						  &ctx->rb3d_coloroffset)) {
+			DRM_ERROR("Invalid depth buffer offset\n");
+			return DRM_ERR(EINVAL);
 		}
 
-		BEGIN_RING( 14 );
-		OUT_RING( CP_PACKET0( RADEON_PP_MISC, 6 ) );
-		OUT_RING( ctx->pp_misc );
-		OUT_RING( ctx->pp_fog_color );
-		OUT_RING( ctx->re_solid_color );
-		OUT_RING( ctx->rb3d_blendcntl );
-		OUT_RING( ctx->rb3d_depthoffset );
-		OUT_RING( ctx->rb3d_depthpitch );
-		OUT_RING( ctx->rb3d_zstencilcntl );
-		OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 2 ) );
-		OUT_RING( ctx->pp_cntl );
-		OUT_RING( ctx->rb3d_cntl );
-		OUT_RING( ctx->rb3d_coloroffset );
-		OUT_RING( CP_PACKET0( RADEON_RB3D_COLORPITCH, 0 ) );
-		OUT_RING( ctx->rb3d_colorpitch );
+		BEGIN_RING(14);
+		OUT_RING(CP_PACKET0(RADEON_PP_MISC, 6));
+		OUT_RING(ctx->pp_misc);
+		OUT_RING(ctx->pp_fog_color);
+		OUT_RING(ctx->re_solid_color);
+		OUT_RING(ctx->rb3d_blendcntl);
+		OUT_RING(ctx->rb3d_depthoffset);
+		OUT_RING(ctx->rb3d_depthpitch);
+		OUT_RING(ctx->rb3d_zstencilcntl);
+		OUT_RING(CP_PACKET0(RADEON_PP_CNTL, 2));
+		OUT_RING(ctx->pp_cntl);
+		OUT_RING(ctx->rb3d_cntl);
+		OUT_RING(ctx->rb3d_coloroffset);
+		OUT_RING(CP_PACKET0(RADEON_RB3D_COLORPITCH, 0));
+		OUT_RING(ctx->rb3d_colorpitch);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_VERTFMT ) {
-		BEGIN_RING( 2 );
-		OUT_RING( CP_PACKET0( RADEON_SE_COORD_FMT, 0 ) );
-		OUT_RING( ctx->se_coord_fmt );
+	if (dirty & RADEON_UPLOAD_VERTFMT) {
+		BEGIN_RING(2);
+		OUT_RING(CP_PACKET0(RADEON_SE_COORD_FMT, 0));
+		OUT_RING(ctx->se_coord_fmt);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_LINE ) {
-		BEGIN_RING( 5 );
-		OUT_RING( CP_PACKET0( RADEON_RE_LINE_PATTERN, 1 ) );
-		OUT_RING( ctx->re_line_pattern );
-		OUT_RING( ctx->re_line_state );
-		OUT_RING( CP_PACKET0( RADEON_SE_LINE_WIDTH, 0 ) );
-		OUT_RING( ctx->se_line_width );
+	if (dirty & RADEON_UPLOAD_LINE) {
+		BEGIN_RING(5);
+		OUT_RING(CP_PACKET0(RADEON_RE_LINE_PATTERN, 1));
+		OUT_RING(ctx->re_line_pattern);
+		OUT_RING(ctx->re_line_state);
+		OUT_RING(CP_PACKET0(RADEON_SE_LINE_WIDTH, 0));
+		OUT_RING(ctx->se_line_width);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_BUMPMAP ) {
-		BEGIN_RING( 5 );
-		OUT_RING( CP_PACKET0( RADEON_PP_LUM_MATRIX, 0 ) );
-		OUT_RING( ctx->pp_lum_matrix );
-		OUT_RING( CP_PACKET0( RADEON_PP_ROT_MATRIX_0, 1 ) );
-		OUT_RING( ctx->pp_rot_matrix_0 );
-		OUT_RING( ctx->pp_rot_matrix_1 );
+	if (dirty & RADEON_UPLOAD_BUMPMAP) {
+		BEGIN_RING(5);
+		OUT_RING(CP_PACKET0(RADEON_PP_LUM_MATRIX, 0));
+		OUT_RING(ctx->pp_lum_matrix);
+		OUT_RING(CP_PACKET0(RADEON_PP_ROT_MATRIX_0, 1));
+		OUT_RING(ctx->pp_rot_matrix_0);
+		OUT_RING(ctx->pp_rot_matrix_1);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_MASKS ) {
-		BEGIN_RING( 4 );
-		OUT_RING( CP_PACKET0( RADEON_RB3D_STENCILREFMASK, 2 ) );
-		OUT_RING( ctx->rb3d_stencilrefmask );
-		OUT_RING( ctx->rb3d_ropcntl );
-		OUT_RING( ctx->rb3d_planemask );
+	if (dirty & RADEON_UPLOAD_MASKS) {
+		BEGIN_RING(4);
+		OUT_RING(CP_PACKET0(RADEON_RB3D_STENCILREFMASK, 2));
+		OUT_RING(ctx->rb3d_stencilrefmask);
+		OUT_RING(ctx->rb3d_ropcntl);
+		OUT_RING(ctx->rb3d_planemask);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_VIEWPORT ) {
-		BEGIN_RING( 7 );
-		OUT_RING( CP_PACKET0( RADEON_SE_VPORT_XSCALE, 5 ) );
-		OUT_RING( ctx->se_vport_xscale );
-		OUT_RING( ctx->se_vport_xoffset );
-		OUT_RING( ctx->se_vport_yscale );
-		OUT_RING( ctx->se_vport_yoffset );
-		OUT_RING( ctx->se_vport_zscale );
-		OUT_RING( ctx->se_vport_zoffset );
+	if (dirty & RADEON_UPLOAD_VIEWPORT) {
+		BEGIN_RING(7);
+		OUT_RING(CP_PACKET0(RADEON_SE_VPORT_XSCALE, 5));
+		OUT_RING(ctx->se_vport_xscale);
+		OUT_RING(ctx->se_vport_xoffset);
+		OUT_RING(ctx->se_vport_yscale);
+		OUT_RING(ctx->se_vport_yoffset);
+		OUT_RING(ctx->se_vport_zscale);
+		OUT_RING(ctx->se_vport_zoffset);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_SETUP ) {
-		BEGIN_RING( 4 );
-		OUT_RING( CP_PACKET0( RADEON_SE_CNTL, 0 ) );
-		OUT_RING( ctx->se_cntl );
-		OUT_RING( CP_PACKET0( RADEON_SE_CNTL_STATUS, 0 ) );
-		OUT_RING( ctx->se_cntl_status );
+	if (dirty & RADEON_UPLOAD_SETUP) {
+		BEGIN_RING(4);
+		OUT_RING(CP_PACKET0(RADEON_SE_CNTL, 0));
+		OUT_RING(ctx->se_cntl);
+		OUT_RING(CP_PACKET0(RADEON_SE_CNTL_STATUS, 0));
+		OUT_RING(ctx->se_cntl_status);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_MISC ) {
-		BEGIN_RING( 2 );
-		OUT_RING( CP_PACKET0( RADEON_RE_MISC, 0 ) );
-		OUT_RING( ctx->re_misc );
+	if (dirty & RADEON_UPLOAD_MISC) {
+		BEGIN_RING(2);
+		OUT_RING(CP_PACKET0(RADEON_RE_MISC, 0));
+		OUT_RING(ctx->re_misc);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_TEX0 ) {
-		if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
-						    &tex[0].pp_txoffset ) ) {
-			DRM_ERROR( "Invalid texture offset for unit 0\n" );
-			return DRM_ERR( EINVAL );
+	if (dirty & RADEON_UPLOAD_TEX0) {
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+						  &tex[0].pp_txoffset)) {
+			DRM_ERROR("Invalid texture offset for unit 0\n");
+			return DRM_ERR(EINVAL);
 		}
 
-		BEGIN_RING( 9 );
-		OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_0, 5 ) );
-		OUT_RING( tex[0].pp_txfilter );
-		OUT_RING( tex[0].pp_txformat );
-		OUT_RING( tex[0].pp_txoffset );
-		OUT_RING( tex[0].pp_txcblend );
-		OUT_RING( tex[0].pp_txablend );
-		OUT_RING( tex[0].pp_tfactor );
-		OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_0, 0 ) );
-		OUT_RING( tex[0].pp_border_color );
+		BEGIN_RING(9);
+		OUT_RING(CP_PACKET0(RADEON_PP_TXFILTER_0, 5));
+		OUT_RING(tex[0].pp_txfilter);
+		OUT_RING(tex[0].pp_txformat);
+		OUT_RING(tex[0].pp_txoffset);
+		OUT_RING(tex[0].pp_txcblend);
+		OUT_RING(tex[0].pp_txablend);
+		OUT_RING(tex[0].pp_tfactor);
+		OUT_RING(CP_PACKET0(RADEON_PP_BORDER_COLOR_0, 0));
+		OUT_RING(tex[0].pp_border_color);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_TEX1 ) {
-		if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
-						    &tex[1].pp_txoffset ) ) {
-			DRM_ERROR( "Invalid texture offset for unit 1\n" );
-			return DRM_ERR( EINVAL );
+	if (dirty & RADEON_UPLOAD_TEX1) {
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+						  &tex[1].pp_txoffset)) {
+			DRM_ERROR("Invalid texture offset for unit 1\n");
+			return DRM_ERR(EINVAL);
 		}
 
-		BEGIN_RING( 9 );
-		OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_1, 5 ) );
-		OUT_RING( tex[1].pp_txfilter );
-		OUT_RING( tex[1].pp_txformat );
-		OUT_RING( tex[1].pp_txoffset );
-		OUT_RING( tex[1].pp_txcblend );
-		OUT_RING( tex[1].pp_txablend );
-		OUT_RING( tex[1].pp_tfactor );
-		OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_1, 0 ) );
-		OUT_RING( tex[1].pp_border_color );
+		BEGIN_RING(9);
+		OUT_RING(CP_PACKET0(RADEON_PP_TXFILTER_1, 5));
+		OUT_RING(tex[1].pp_txfilter);
+		OUT_RING(tex[1].pp_txformat);
+		OUT_RING(tex[1].pp_txoffset);
+		OUT_RING(tex[1].pp_txcblend);
+		OUT_RING(tex[1].pp_txablend);
+		OUT_RING(tex[1].pp_tfactor);
+		OUT_RING(CP_PACKET0(RADEON_PP_BORDER_COLOR_1, 0));
+		OUT_RING(tex[1].pp_border_color);
 		ADVANCE_RING();
 	}
 
-	if ( dirty & RADEON_UPLOAD_TEX2 ) {
-		if ( radeon_check_and_fixup_offset( dev_priv, filp_priv,
-						    &tex[2].pp_txoffset ) ) {
-			DRM_ERROR( "Invalid texture offset for unit 2\n" );
-			return DRM_ERR( EINVAL );
+	if (dirty & RADEON_UPLOAD_TEX2) {
+		if (radeon_check_and_fixup_offset(dev_priv, filp_priv,
+						  &tex[2].pp_txoffset)) {
+			DRM_ERROR("Invalid texture offset for unit 2\n");
+			return DRM_ERR(EINVAL);
 		}
 
-		BEGIN_RING( 9 );
-		OUT_RING( CP_PACKET0( RADEON_PP_TXFILTER_2, 5 ) );
-		OUT_RING( tex[2].pp_txfilter );
-		OUT_RING( tex[2].pp_txformat );
-		OUT_RING( tex[2].pp_txoffset );
-		OUT_RING( tex[2].pp_txcblend );
-		OUT_RING( tex[2].pp_txablend );
-		OUT_RING( tex[2].pp_tfactor );
-		OUT_RING( CP_PACKET0( RADEON_PP_BORDER_COLOR_2, 0 ) );
-		OUT_RING( tex[2].pp_border_color );
+		BEGIN_RING(9);
+		OUT_RING(CP_PACKET0(RADEON_PP_TXFILTER_2, 5));
+		OUT_RING(tex[2].pp_txfilter);
+		OUT_RING(tex[2].pp_txformat);
+		OUT_RING(tex[2].pp_txoffset);
+		OUT_RING(tex[2].pp_txcblend);
+		OUT_RING(tex[2].pp_txablend);
+		OUT_RING(tex[2].pp_tfactor);
+		OUT_RING(CP_PACKET0(RADEON_PP_BORDER_COLOR_2, 0));
+		OUT_RING(tex[2].pp_border_color);
 		ADVANCE_RING();
 	}
 
@@ -463,121 +465,135 @@ static int radeon_emit_state( drm_radeon_private_t *dev_priv,
 
 /* Emit 1.2 state
  */
-static int radeon_emit_state2( drm_radeon_private_t *dev_priv,
-			       drm_file_t *filp_priv,
-			       drm_radeon_state_t *state )
+static int radeon_emit_state2(drm_radeon_private_t * dev_priv,
+			      drm_file_t * filp_priv,
+			      drm_radeon_state_t * state)
 {
 	RING_LOCALS;
 
 	if (state->dirty & RADEON_UPLOAD_ZBIAS) {
-		BEGIN_RING( 3 );
-		OUT_RING( CP_PACKET0( RADEON_SE_ZBIAS_FACTOR, 1 ) );
-		OUT_RING( state->context2.se_zbias_factor ); 
-		OUT_RING( state->context2.se_zbias_constant ); 
+		BEGIN_RING(3);
+		OUT_RING(CP_PACKET0(RADEON_SE_ZBIAS_FACTOR, 1));
+		OUT_RING(state->context2.se_zbias_factor);
+		OUT_RING(state->context2.se_zbias_constant);
 		ADVANCE_RING();
 	}
 
-	return radeon_emit_state( dev_priv, filp_priv, &state->context,
-			   state->tex, state->dirty );
+	return radeon_emit_state(dev_priv, filp_priv, &state->context,
+				 state->tex, state->dirty);
 }
 
 /* New (1.3) state mechanism.  3 commands (packet, scalar, vector) in
  * 1.3 cmdbuffers allow all previous state to be updated as well as
- * the tcl scalar and vector areas.  
+ * the tcl scalar and vector areas.
  */
-static struct { 
-	int start; 
-	int len; 
+static struct {
+	int start;
+	int len;
 	const char *name;
 } packet[RADEON_MAX_STATE_PACKETS] = {
-	{ RADEON_PP_MISC,7,"RADEON_PP_MISC" },
-	{ RADEON_PP_CNTL,3,"RADEON_PP_CNTL" },
-	{ RADEON_RB3D_COLORPITCH,1,"RADEON_RB3D_COLORPITCH" },
-	{ RADEON_RE_LINE_PATTERN,2,"RADEON_RE_LINE_PATTERN" },
-	{ RADEON_SE_LINE_WIDTH,1,"RADEON_SE_LINE_WIDTH" },
-	{ RADEON_PP_LUM_MATRIX,1,"RADEON_PP_LUM_MATRIX" },
-	{ RADEON_PP_ROT_MATRIX_0,2,"RADEON_PP_ROT_MATRIX_0" },
-	{ RADEON_RB3D_STENCILREFMASK,3,"RADEON_RB3D_STENCILREFMASK" },
-	{ RADEON_SE_VPORT_XSCALE,6,"RADEON_SE_VPORT_XSCALE" },
-	{ RADEON_SE_CNTL,2,"RADEON_SE_CNTL" },
-	{ RADEON_SE_CNTL_STATUS,1,"RADEON_SE_CNTL_STATUS" },
-	{ RADEON_RE_MISC,1,"RADEON_RE_MISC" },
-	{ RADEON_PP_TXFILTER_0,6,"RADEON_PP_TXFILTER_0" },
-	{ RADEON_PP_BORDER_COLOR_0,1,"RADEON_PP_BORDER_COLOR_0" },
-	{ RADEON_PP_TXFILTER_1,6,"RADEON_PP_TXFILTER_1" },
-	{ RADEON_PP_BORDER_COLOR_1,1,"RADEON_PP_BORDER_COLOR_1" },
-	{ RADEON_PP_TXFILTER_2,6,"RADEON_PP_TXFILTER_2" },
-	{ RADEON_PP_BORDER_COLOR_2,1,"RADEON_PP_BORDER_COLOR_2" },
-	{ RADEON_SE_ZBIAS_FACTOR,2,"RADEON_SE_ZBIAS_FACTOR" },
-	{ RADEON_SE_TCL_OUTPUT_VTX_FMT,11,"RADEON_SE_TCL_OUTPUT_VTX_FMT" },
-	{ RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED,17,"RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED" },
-	{ R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0" },
-	{ R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1" },
-	{ R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2" },
-	{ R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3" },
-	{ R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4" },
-	{ R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5" },
-	{ R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6" },
-	{ R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7" },
-	{ R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0" },
-	{ R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0" },
-	{ R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0" },
-	{ R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL" },
-	{ R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0" },
-	{ R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2" },
-	{ R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL" },
-	{ R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0" },
-	{ R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1" },
-	{ R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2" },
-	{ R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3" },
-	{ R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4" },
-	{ R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5" },
-	{ R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0" },
-	{ R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1" },
-	{ R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2" },
-	{ R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3" },
-	{ R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4" },
-	{ R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5" },
-	{ R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL" },
-	{ R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL" },
-	{ R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3" },
-	{ R200_PP_CNTL_X, 1, "R200_PP_CNTL_X" }, 
-	{ R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET" }, 
-	{ R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL" }, 
-	{ R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0" }, 
-	{ R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1" }, 
-	{ R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2" }, 
-	{ R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS" }, 
-	{ R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL" }, 
-	{ R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE" }, 
-	{ R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4, "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0" },
-	{ R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0" }, /* 61 */
-	{ R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0" }, /* 62 */
-	{ R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1" },
-	{ R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1" },
-	{ R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2" },
-	{ R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2" },
-	{ R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3" },
-	{ R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3" },
-	{ R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4" },
-	{ R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4" },
-	{ R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5" },
-	{ R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5" },
-	{ RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0" },
-	{ RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1" },
-	{ RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2" },
-	{ R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR" },
+	{
+	RADEON_PP_MISC, 7, "RADEON_PP_MISC"}, {
+	RADEON_PP_CNTL, 3, "RADEON_PP_CNTL"}, {
+	RADEON_RB3D_COLORPITCH, 1, "RADEON_RB3D_COLORPITCH"}, {
+	RADEON_RE_LINE_PATTERN, 2, "RADEON_RE_LINE_PATTERN"}, {
+	RADEON_SE_LINE_WIDTH, 1, "RADEON_SE_LINE_WIDTH"}, {
+	RADEON_PP_LUM_MATRIX, 1, "RADEON_PP_LUM_MATRIX"}, {
+	RADEON_PP_ROT_MATRIX_0, 2, "RADEON_PP_ROT_MATRIX_0"}, {
+	RADEON_RB3D_STENCILREFMASK, 3, "RADEON_RB3D_STENCILREFMASK"}, {
+	RADEON_SE_VPORT_XSCALE, 6, "RADEON_SE_VPORT_XSCALE"}, {
+	RADEON_SE_CNTL, 2, "RADEON_SE_CNTL"}, {
+	RADEON_SE_CNTL_STATUS, 1, "RADEON_SE_CNTL_STATUS"}, {
+	RADEON_RE_MISC, 1, "RADEON_RE_MISC"}, {
+	RADEON_PP_TXFILTER_0, 6, "RADEON_PP_TXFILTER_0"}, {
+	RADEON_PP_BORDER_COLOR_0, 1, "RADEON_PP_BORDER_COLOR_0"}, {
+	RADEON_PP_TXFILTER_1, 6, "RADEON_PP_TXFILTER_1"}, {
+	RADEON_PP_BORDER_COLOR_1, 1, "RADEON_PP_BORDER_COLOR_1"}, {
+	RADEON_PP_TXFILTER_2, 6, "RADEON_PP_TXFILTER_2"}, {
+	RADEON_PP_BORDER_COLOR_2, 1, "RADEON_PP_BORDER_COLOR_2"}, {
+	RADEON_SE_ZBIAS_FACTOR, 2, "RADEON_SE_ZBIAS_FACTOR"}, {
+	RADEON_SE_TCL_OUTPUT_VTX_FMT, 11, "RADEON_SE_TCL_OUTPUT_VTX_FMT"}, {
+	RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED, 17,
+		    "RADEON_SE_TCL_MATERIAL_EMMISSIVE_RED"}, {
+	R200_PP_TXCBLEND_0, 4, "R200_PP_TXCBLEND_0"}, {
+	R200_PP_TXCBLEND_1, 4, "R200_PP_TXCBLEND_1"}, {
+	R200_PP_TXCBLEND_2, 4, "R200_PP_TXCBLEND_2"}, {
+	R200_PP_TXCBLEND_3, 4, "R200_PP_TXCBLEND_3"}, {
+	R200_PP_TXCBLEND_4, 4, "R200_PP_TXCBLEND_4"}, {
+	R200_PP_TXCBLEND_5, 4, "R200_PP_TXCBLEND_5"}, {
+	R200_PP_TXCBLEND_6, 4, "R200_PP_TXCBLEND_6"}, {
+	R200_PP_TXCBLEND_7, 4, "R200_PP_TXCBLEND_7"}, {
+	R200_SE_TCL_LIGHT_MODEL_CTL_0, 6, "R200_SE_TCL_LIGHT_MODEL_CTL_0"},
+	{
+	R200_PP_TFACTOR_0, 6, "R200_PP_TFACTOR_0"}, {
+	R200_SE_VTX_FMT_0, 4, "R200_SE_VTX_FMT_0"}, {
+	R200_SE_VAP_CNTL, 1, "R200_SE_VAP_CNTL"}, {
+	R200_SE_TCL_MATRIX_SEL_0, 5, "R200_SE_TCL_MATRIX_SEL_0"}, {
+	R200_SE_TCL_TEX_PROC_CTL_2, 5, "R200_SE_TCL_TEX_PROC_CTL_2"}, {
+	R200_SE_TCL_UCP_VERT_BLEND_CTL, 1, "R200_SE_TCL_UCP_VERT_BLEND_CTL"},
+	{
+	R200_PP_TXFILTER_0, 6, "R200_PP_TXFILTER_0"}, {
+	R200_PP_TXFILTER_1, 6, "R200_PP_TXFILTER_1"}, {
+	R200_PP_TXFILTER_2, 6, "R200_PP_TXFILTER_2"}, {
+	R200_PP_TXFILTER_3, 6, "R200_PP_TXFILTER_3"}, {
+	R200_PP_TXFILTER_4, 6, "R200_PP_TXFILTER_4"}, {
+	R200_PP_TXFILTER_5, 6, "R200_PP_TXFILTER_5"}, {
+	R200_PP_TXOFFSET_0, 1, "R200_PP_TXOFFSET_0"}, {
+	R200_PP_TXOFFSET_1, 1, "R200_PP_TXOFFSET_1"}, {
+	R200_PP_TXOFFSET_2, 1, "R200_PP_TXOFFSET_2"}, {
+	R200_PP_TXOFFSET_3, 1, "R200_PP_TXOFFSET_3"}, {
+	R200_PP_TXOFFSET_4, 1, "R200_PP_TXOFFSET_4"}, {
+	R200_PP_TXOFFSET_5, 1, "R200_PP_TXOFFSET_5"}, {
+	R200_SE_VTE_CNTL, 1, "R200_SE_VTE_CNTL"}, {
+	R200_SE_TCL_OUTPUT_VTX_COMP_SEL, 1, "R200_SE_TCL_OUTPUT_VTX_COMP_SEL"},
+	{
+	R200_PP_TAM_DEBUG3, 1, "R200_PP_TAM_DEBUG3"}, {
+	R200_PP_CNTL_X, 1, "R200_PP_CNTL_X"}, {
+	R200_RB3D_DEPTHXY_OFFSET, 1, "R200_RB3D_DEPTHXY_OFFSET"}, {
+	R200_RE_AUX_SCISSOR_CNTL, 1, "R200_RE_AUX_SCISSOR_CNTL"}, {
+	R200_RE_SCISSOR_TL_0, 2, "R200_RE_SCISSOR_TL_0"}, {
+	R200_RE_SCISSOR_TL_1, 2, "R200_RE_SCISSOR_TL_1"}, {
+	R200_RE_SCISSOR_TL_2, 2, "R200_RE_SCISSOR_TL_2"}, {
+	R200_SE_VAP_CNTL_STATUS, 1, "R200_SE_VAP_CNTL_STATUS"}, {
+	R200_SE_VTX_STATE_CNTL, 1, "R200_SE_VTX_STATE_CNTL"}, {
+	R200_RE_POINTSIZE, 1, "R200_RE_POINTSIZE"}, {
+	R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0, 4,
+		    "R200_SE_TCL_INPUT_VTX_VECTOR_ADDR_0"}, {
+	R200_PP_CUBIC_FACES_0, 1, "R200_PP_CUBIC_FACES_0"},	/* 61 */
+	{
+	R200_PP_CUBIC_OFFSET_F1_0, 5, "R200_PP_CUBIC_OFFSET_F1_0"},	/* 62 */
+	{
+	R200_PP_CUBIC_FACES_1, 1, "R200_PP_CUBIC_FACES_1"}, {
+	R200_PP_CUBIC_OFFSET_F1_1, 5, "R200_PP_CUBIC_OFFSET_F1_1"}, {
+	R200_PP_CUBIC_FACES_2, 1, "R200_PP_CUBIC_FACES_2"}, {
+	R200_PP_CUBIC_OFFSET_F1_2, 5, "R200_PP_CUBIC_OFFSET_F1_2"}, {
+	R200_PP_CUBIC_FACES_3, 1, "R200_PP_CUBIC_FACES_3"}, {
+	R200_PP_CUBIC_OFFSET_F1_3, 5, "R200_PP_CUBIC_OFFSET_F1_3"}, {
+	R200_PP_CUBIC_FACES_4, 1, "R200_PP_CUBIC_FACES_4"}, {
+	R200_PP_CUBIC_OFFSET_F1_4, 5, "R200_PP_CUBIC_OFFSET_F1_4"}, {
+	R200_PP_CUBIC_FACES_5, 1, "R200_PP_CUBIC_FACES_5"}, {
+	R200_PP_CUBIC_OFFSET_F1_5, 5, "R200_PP_CUBIC_OFFSET_F1_5"}, {
+	RADEON_PP_TEX_SIZE_0, 2, "RADEON_PP_TEX_SIZE_0"}, {
+	RADEON_PP_TEX_SIZE_1, 2, "RADEON_PP_TEX_SIZE_1"}, {
+	RADEON_PP_TEX_SIZE_2, 2, "RADEON_PP_TEX_SIZE_2"}, {
+	R200_RB3D_BLENDCOLOR, 3, "R200_RB3D_BLENDCOLOR"}, {
+	R200_SE_TCL_POINT_SPRITE_CNTL, 1, "R200_SE_TCL_POINT_SPRITE_CNTL"},
+	{
+	RADEON_PP_CUBIC_FACES_0, 1, "RADEON_PP_CUBIC_FACES_0"}, {
+	RADEON_PP_CUBIC_OFFSET_T0_0, 5, "RADEON_PP_CUBIC_OFFSET_T0_0"}, {
+	RADEON_PP_CUBIC_FACES_1, 1, "RADEON_PP_CUBIC_FACES_1"}, {
+	RADEON_PP_CUBIC_OFFSET_T1_0, 5, "RADEON_PP_CUBIC_OFFSET_T1_0"}, {
+	RADEON_PP_CUBIC_FACES_2, 1, "RADEON_PP_CUBIC_FACES_2"}, {
+	RADEON_PP_CUBIC_OFFSET_T2_0, 5, "RADEON_PP_CUBIC_OFFSET_T2_0"}, {
+	R200_PP_TRI_PERF, 2, "R200_PP_TRI_PERF"},
 };
 
-
-
 /* ================================================================
  * Performance monitoring functions
  */
 
-static void radeon_clear_box( drm_radeon_private_t *dev_priv,
-			      int x, int y, int w, int h,
-			      int r, int g, int b )
+static void radeon_clear_box(drm_radeon_private_t * dev_priv,
+			     int x, int y, int w, int h, int r, int g, int b)
 {
 	u32 color;
 	RING_LOCALS;
@@ -585,49 +601,47 @@ static void radeon_clear_box( drm_radeon_private_t *dev_priv,
 	x += dev_priv->sarea_priv->boxes[0].x1;
 	y += dev_priv->sarea_priv->boxes[0].y1;
 
-	switch ( dev_priv->color_fmt ) {
+	switch (dev_priv->color_fmt) {
 	case RADEON_COLOR_FORMAT_RGB565:
 		color = (((r & 0xf8) << 8) |
-			 ((g & 0xfc) << 3) |
-			 ((b & 0xf8) >> 3));
+			 ((g & 0xfc) << 3) | ((b & 0xf8) >> 3));
 		break;
 	case RADEON_COLOR_FORMAT_ARGB8888:
 	default:
-		color = (((0xff) << 24) | (r << 16) | (g <<  8) | b);
+		color = (((0xff) << 24) | (r << 16) | (g << 8) | b);
 		break;
 	}
 
-	BEGIN_RING( 4 );
-	RADEON_WAIT_UNTIL_3D_IDLE();		
-	OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) );
-	OUT_RING( 0xffffffff );
+	BEGIN_RING(4);
+	RADEON_WAIT_UNTIL_3D_IDLE();
+	OUT_RING(CP_PACKET0(RADEON_DP_WRITE_MASK, 0));
+	OUT_RING(0xffffffff);
 	ADVANCE_RING();
 
-	BEGIN_RING( 6 );
+	BEGIN_RING(6);
 
-	OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) );
-	OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL |
-		  RADEON_GMC_BRUSH_SOLID_COLOR |
-		  (dev_priv->color_fmt << 8) |
-		  RADEON_GMC_SRC_DATATYPE_COLOR |
-		  RADEON_ROP3_P |
-		  RADEON_GMC_CLR_CMP_CNTL_DIS );
+	OUT_RING(CP_PACKET3(RADEON_CNTL_PAINT_MULTI, 4));
+	OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+		 RADEON_GMC_BRUSH_SOLID_COLOR |
+		 (dev_priv->color_fmt << 8) |
+		 RADEON_GMC_SRC_DATATYPE_COLOR |
+		 RADEON_ROP3_P | RADEON_GMC_CLR_CMP_CNTL_DIS);
 
- 	if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) { 
-		OUT_RING( dev_priv->front_pitch_offset );
- 	} else {	 
-		OUT_RING( dev_priv->back_pitch_offset );
- 	} 
+	if (dev_priv->page_flipping && dev_priv->current_page == 1) {
+		OUT_RING(dev_priv->front_pitch_offset);
+	} else {
+		OUT_RING(dev_priv->back_pitch_offset);
+	}
 
-	OUT_RING( color );
+	OUT_RING(color);
 
-	OUT_RING( (x << 16) | y );
-	OUT_RING( (w << 16) | h );
+	OUT_RING((x << 16) | y);
+	OUT_RING((w << 16) | h);
 
 	ADVANCE_RING();
 }
 
-static void radeon_cp_performance_boxes( drm_radeon_private_t *dev_priv )
+static void radeon_cp_performance_boxes(drm_radeon_private_t * dev_priv)
 {
 	/* Collapse various things into a wait flag -- trying to
 	 * guess if userspase slept -- better just to have them tell us.
@@ -643,50 +657,50 @@ static void radeon_cp_performance_boxes( drm_radeon_private_t *dev_priv )
 
 	/* Purple box for page flipping
 	 */
-	if ( dev_priv->stats.boxes & RADEON_BOX_FLIP ) 
-		radeon_clear_box( dev_priv, 4, 4, 8, 8, 255, 0, 255 );
+	if (dev_priv->stats.boxes & RADEON_BOX_FLIP)
+		radeon_clear_box(dev_priv, 4, 4, 8, 8, 255, 0, 255);
 
 	/* Red box if we have to wait for idle at any point
 	 */
-	if ( dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE ) 
-		radeon_clear_box( dev_priv, 16, 4, 8, 8, 255, 0, 0 );
+	if (dev_priv->stats.boxes & RADEON_BOX_WAIT_IDLE)
+		radeon_clear_box(dev_priv, 16, 4, 8, 8, 255, 0, 0);
 
 	/* Blue box: lost context?
 	 */
 
 	/* Yellow box for texture swaps
 	 */
-	if ( dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD ) 
-		radeon_clear_box( dev_priv, 40, 4, 8, 8, 255, 255, 0 );
+	if (dev_priv->stats.boxes & RADEON_BOX_TEXTURE_LOAD)
+		radeon_clear_box(dev_priv, 40, 4, 8, 8, 255, 255, 0);
 
 	/* Green box if hardware never idles (as far as we can tell)
 	 */
-	if ( !(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE) ) 
-		radeon_clear_box( dev_priv, 64, 4, 8, 8, 0, 255, 0 );
+	if (!(dev_priv->stats.boxes & RADEON_BOX_DMA_IDLE))
+		radeon_clear_box(dev_priv, 64, 4, 8, 8, 0, 255, 0);
 
-
-	/* Draw bars indicating number of buffers allocated 
+	/* Draw bars indicating number of buffers allocated
 	 * (not a great measure, easily confused)
 	 */
 	if (dev_priv->stats.requested_bufs) {
 		if (dev_priv->stats.requested_bufs > 100)
 			dev_priv->stats.requested_bufs = 100;
 
-		radeon_clear_box( dev_priv, 4, 16,  
-				  dev_priv->stats.requested_bufs, 4,
-				  196, 128, 128 );
+		radeon_clear_box(dev_priv, 4, 16,
+				 dev_priv->stats.requested_bufs, 4,
+				 196, 128, 128);
 	}
 
-	memset( &dev_priv->stats, 0, sizeof(dev_priv->stats) );
+	memset(&dev_priv->stats, 0, sizeof(dev_priv->stats));
 
 }
+
 /* ================================================================
  * CP command dispatch functions
  */
 
-static void radeon_cp_dispatch_clear( drm_device_t *dev,
-				      drm_radeon_clear_t *clear,
-				      drm_radeon_clear_rect_t *depth_boxes )
+static void radeon_cp_dispatch_clear(drm_device_t * dev,
+				     drm_radeon_clear_t * clear,
+				     drm_radeon_clear_rect_t * depth_boxes)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -694,32 +708,34 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
 	int nbox = sarea_priv->nbox;
 	drm_clip_rect_t *pbox = sarea_priv->boxes;
 	unsigned int flags = clear->flags;
-	u32 rb3d_cntl = 0, rb3d_stencilrefmask= 0;
+	u32 rb3d_cntl = 0, rb3d_stencilrefmask = 0;
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "flags = 0x%x\n", flags );
+	DRM_DEBUG("flags = 0x%x\n", flags);
 
 	dev_priv->stats.clears++;
 
-	if ( dev_priv->page_flipping && dev_priv->current_page == 1 ) {
+	if (dev_priv->page_flipping && dev_priv->current_page == 1) {
 		unsigned int tmp = flags;
 
 		flags &= ~(RADEON_FRONT | RADEON_BACK);
-		if ( tmp & RADEON_FRONT ) flags |= RADEON_BACK;
-		if ( tmp & RADEON_BACK )  flags |= RADEON_FRONT;
+		if (tmp & RADEON_FRONT)
+			flags |= RADEON_BACK;
+		if (tmp & RADEON_BACK)
+			flags |= RADEON_FRONT;
 	}
 
-	if ( flags & (RADEON_FRONT | RADEON_BACK) ) {
+	if (flags & (RADEON_FRONT | RADEON_BACK)) {
 
-		BEGIN_RING( 4 );
+		BEGIN_RING(4);
 
 		/* Ensure the 3D stream is idle before doing a
 		 * 2D fill to clear the front or back buffer.
 		 */
 		RADEON_WAIT_UNTIL_3D_IDLE();
-		
-		OUT_RING( CP_PACKET0( RADEON_DP_WRITE_MASK, 0 ) );
-		OUT_RING( clear->color_mask );
+
+		OUT_RING(CP_PACKET0(RADEON_DP_WRITE_MASK, 0));
+		OUT_RING(clear->color_mask);
 
 		ADVANCE_RING();
 
@@ -727,63 +743,214 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
 		 */
 		dev_priv->sarea_priv->ctx_owner = 0;
 
-		for ( i = 0 ; i < nbox ; i++ ) {
+		for (i = 0; i < nbox; i++) {
 			int x = pbox[i].x1;
 			int y = pbox[i].y1;
 			int w = pbox[i].x2 - x;
 			int h = pbox[i].y2 - y;
 
-			DRM_DEBUG( "dispatch clear %d,%d-%d,%d flags 0x%x\n",
-				   x, y, w, h, flags );
-
-			if ( flags & RADEON_FRONT ) {
-				BEGIN_RING( 6 );
-				
-				OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) );
-				OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL |
-					  RADEON_GMC_BRUSH_SOLID_COLOR |
-					  (dev_priv->color_fmt << 8) |
-					  RADEON_GMC_SRC_DATATYPE_COLOR |
-					  RADEON_ROP3_P |
-					  RADEON_GMC_CLR_CMP_CNTL_DIS );
-
-				OUT_RING( dev_priv->front_pitch_offset );
-				OUT_RING( clear->clear_color );
-				
-				OUT_RING( (x << 16) | y );
-				OUT_RING( (w << 16) | h );
-				
+			DRM_DEBUG("dispatch clear %d,%d-%d,%d flags 0x%x\n",
+				  x, y, w, h, flags);
+
+			if (flags & RADEON_FRONT) {
+				BEGIN_RING(6);
+
+				OUT_RING(CP_PACKET3
+					 (RADEON_CNTL_PAINT_MULTI, 4));
+				OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+					 RADEON_GMC_BRUSH_SOLID_COLOR |
+					 (dev_priv->
+					  color_fmt << 8) |
+					 RADEON_GMC_SRC_DATATYPE_COLOR |
+					 RADEON_ROP3_P |
+					 RADEON_GMC_CLR_CMP_CNTL_DIS);
+
+				OUT_RING(dev_priv->front_pitch_offset);
+				OUT_RING(clear->clear_color);
+
+				OUT_RING((x << 16) | y);
+				OUT_RING((w << 16) | h);
+
 				ADVANCE_RING();
 			}
-			
-			if ( flags & RADEON_BACK ) {
-				BEGIN_RING( 6 );
-				
-				OUT_RING( CP_PACKET3( RADEON_CNTL_PAINT_MULTI, 4 ) );
-				OUT_RING( RADEON_GMC_DST_PITCH_OFFSET_CNTL |
-					  RADEON_GMC_BRUSH_SOLID_COLOR |
-					  (dev_priv->color_fmt << 8) |
-					  RADEON_GMC_SRC_DATATYPE_COLOR |
-					  RADEON_ROP3_P |
-					  RADEON_GMC_CLR_CMP_CNTL_DIS );
-				
-				OUT_RING( dev_priv->back_pitch_offset );
-				OUT_RING( clear->clear_color );
-
-				OUT_RING( (x << 16) | y );
-				OUT_RING( (w << 16) | h );
+
+			if (flags & RADEON_BACK) {
+				BEGIN_RING(6);
+
+				OUT_RING(CP_PACKET3
+					 (RADEON_CNTL_PAINT_MULTI, 4));
+				OUT_RING(RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+					 RADEON_GMC_BRUSH_SOLID_COLOR |
+					 (dev_priv->
+					  color_fmt << 8) |
+					 RADEON_GMC_SRC_DATATYPE_COLOR |
+					 RADEON_ROP3_P |
+					 RADEON_GMC_CLR_CMP_CNTL_DIS);
+
+				OUT_RING(dev_priv->back_pitch_offset);
+				OUT_RING(clear->clear_color);
+
+				OUT_RING((x << 16) | y);
+				OUT_RING((w << 16) | h);
 
 				ADVANCE_RING();
 			}
 		}
 	}
 
+	/* hyper z clear */
+	/* no docs available, based on reverse engeneering by Stephane Marchesin */
+	if ((flags & (RADEON_DEPTH | RADEON_STENCIL)) && (flags & RADEON_CLEAR_FASTZ)) {
+
+		int i;
+		int depthpixperline = dev_priv->depth_fmt==RADEON_DEPTH_FORMAT_16BIT_INT_Z? 
+			(dev_priv->depth_pitch / 2): (dev_priv->depth_pitch / 4);
+		
+		u32 clearmask;
+
+		u32 tempRB3D_DEPTHCLEARVALUE = clear->clear_depth |
+			((clear->depth_mask & 0xff) << 24);
+	
+		
+		/* Make sure we restore the 3D state next time.
+		 * we haven't touched any "normal" state - still need this?
+		 */
+		dev_priv->sarea_priv->ctx_owner = 0;
+
+		if ((dev_priv->flags & CHIP_HAS_HIERZ) && (flags & RADEON_USE_HIERZ)) {
+		/* FIXME : reverse engineer that for Rx00 cards */
+		/* FIXME : the mask supposedly contains low-res z values. So can't set
+		   just to the max (0xff? or actually 0x3fff?), need to take z clear
+		   value into account? */
+		/* pattern seems to work for r100, though get slight
+		   rendering errors with glxgears. If hierz is not enabled for r100,
+		   only 4 bits which indicate clear (15,16,31,32, all zero) matter, the
+		   other ones are ignored, and the same clear mask can be used. That's
+		   very different behaviour than R200 which needs different clear mask
+		   and different number of tiles to clear if hierz is enabled or not !?!
+		*/
+			clearmask = (0xff<<22)|(0xff<<6)| 0x003f003f;
+		}
+		else {
+		/* clear mask : chooses the clearing pattern.
+		   rv250: could be used to clear only parts of macrotiles
+		   (but that would get really complicated...)?
+		   bit 0 and 1 (either or both of them ?!?!) are used to
+		   not clear tile (or maybe one of the bits indicates if the tile is
+		   compressed or not), bit 2 and 3 to not clear tile 1,...,.
+		   Pattern is as follows:
+		        | 0,1 | 4,5 | 8,9 |12,13|16,17|20,21|24,25|28,29|
+		   bits -------------------------------------------------
+		        | 2,3 | 6,7 |10,11|14,15|18,19|22,23|26,27|30,31|
+		   rv100: clearmask covers 2x8 4x1 tiles, but one clear still
+		   covers 256 pixels ?!?
+		*/
+			clearmask = 0x0;
+		}
+
+		BEGIN_RING( 8 );
+		RADEON_WAIT_UNTIL_2D_IDLE();
+		OUT_RING_REG( RADEON_RB3D_DEPTHCLEARVALUE,
+			tempRB3D_DEPTHCLEARVALUE);
+		/* what offset is this exactly ? */
+		OUT_RING_REG( RADEON_RB3D_ZMASKOFFSET, 0 );
+		/* need ctlstat, otherwise get some strange black flickering */
+		OUT_RING_REG( RADEON_RB3D_ZCACHE_CTLSTAT, RADEON_RB3D_ZC_FLUSH_ALL );
+		ADVANCE_RING();
+
+		for (i = 0; i < nbox; i++) {
+			int tileoffset, nrtilesx, nrtilesy, j;
+			/* it looks like r200 needs rv-style clears, at least if hierz is not enabled? */
+			if ((dev_priv->flags&CHIP_HAS_HIERZ) && !(dev_priv->microcode_version==UCODE_R200)) {
+				/* FIXME : figure this out for r200 (when hierz is enabled). Or
+				   maybe r200 actually doesn't need to put the low-res z value into
+				   the tile cache like r100, but just needs to clear the hi-level z-buffer?
+				   Works for R100, both with hierz and without.
+				   R100 seems to operate on 2x1 8x8 tiles, but...
+				   odd: offset/nrtiles need to be 64 pix (4 block) aligned? Potentially
+				   problematic with resolutions which are not 64 pix aligned? */
+				tileoffset = ((pbox[i].y1 >> 3) * depthpixperline + pbox[i].x1) >> 6;
+				nrtilesx = ((pbox[i].x2 & ~63) - (pbox[i].x1 & ~63)) >> 4;
+				nrtilesy = (pbox[i].y2 >> 3) - (pbox[i].y1 >> 3);
+				for (j = 0; j <= nrtilesy; j++) {
+					BEGIN_RING( 4 );
+					OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_ZMASK, 2 ) );
+					/* first tile */
+					OUT_RING( tileoffset * 8 );
+					/* the number of tiles to clear */
+					OUT_RING( nrtilesx + 4 );
+					/* clear mask : chooses the clearing pattern. */
+					OUT_RING( clearmask );
+					ADVANCE_RING();
+					tileoffset += depthpixperline >> 6;
+				}
+			}
+			else if (dev_priv->microcode_version==UCODE_R200) {
+				/* works for rv250. */
+				/* find first macro tile (8x2 4x4 z-pixels on rv250) */
+				tileoffset = ((pbox[i].y1 >> 3) * depthpixperline + pbox[i].x1) >> 5;
+				nrtilesx = (pbox[i].x2 >> 5) - (pbox[i].x1 >> 5);
+				nrtilesy = (pbox[i].y2 >> 3) - (pbox[i].y1 >> 3);
+				for (j = 0; j <= nrtilesy; j++) {
+					BEGIN_RING( 4 );
+					OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_ZMASK, 2 ) );
+					/* first tile */
+					/* judging by the first tile offset needed, could possibly
+					   directly address/clear 4x4 tiles instead of 8x2 * 4x4
+					   macro tiles, though would still need clear mask for
+					   right/bottom if truely 4x4 granularity is desired ? */
+					OUT_RING( tileoffset * 16 );
+					/* the number of tiles to clear */
+					OUT_RING( nrtilesx + 1 );
+					/* clear mask : chooses the clearing pattern. */
+					OUT_RING( clearmask );
+					ADVANCE_RING();
+					tileoffset += depthpixperline >> 5;
+				}
+			}
+			else { /* rv 100 */
+				/* rv100 might not need 64 pix alignment, who knows */
+				/* offsets are, hmm, weird */
+				tileoffset = ((pbox[i].y1 >> 4) * depthpixperline + pbox[i].x1) >> 6;
+				nrtilesx = ((pbox[i].x2 & ~63) - (pbox[i].x1 & ~63)) >> 4;
+				nrtilesy = (pbox[i].y2 >> 4) - (pbox[i].y1 >> 4);
+				for (j = 0; j <= nrtilesy; j++) {
+					BEGIN_RING( 4 );
+					OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_ZMASK, 2 ) );
+					OUT_RING( tileoffset * 128 );
+					/* the number of tiles to clear */
+					OUT_RING( nrtilesx + 4 );
+					/* clear mask : chooses the clearing pattern. */
+					OUT_RING( clearmask );
+					ADVANCE_RING();
+					tileoffset += depthpixperline >> 6;
+				}
+			}
+		}
+
+		/* TODO don't always clear all hi-level z tiles */
+		if ((dev_priv->flags & CHIP_HAS_HIERZ) && (dev_priv->microcode_version==UCODE_R200)
+			&& (flags & RADEON_USE_HIERZ))
+		/* r100 and cards without hierarchical z-buffer have no high-level z-buffer */
+		/* FIXME : the mask supposedly contains low-res z values. So can't set
+		   just to the max (0xff? or actually 0x3fff?), need to take z clear
+		   value into account? */
+		{
+			BEGIN_RING( 4 );
+			OUT_RING( CP_PACKET3( RADEON_3D_CLEAR_HIZ, 2 ) );
+			OUT_RING( 0x0 ); /* First tile */
+			OUT_RING( 0x3cc0 );
+			OUT_RING( (0xff<<22)|(0xff<<6)| 0x003f003f);
+			ADVANCE_RING();
+		}
+	}
+
 	/* We have to clear the depth and/or stencil buffers by
 	 * rendering a quad into just those buffers.  Thus, we have to
 	 * make sure the 3D engine is configured correctly.
 	 */
-	if ( dev_priv->is_r200 &&
-	     (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) {
+	else if ((dev_priv->microcode_version == UCODE_R200) &&
+		(flags & (RADEON_DEPTH | RADEON_STENCIL))) {
 
 		int tempPP_CNTL;
 		int tempRE_CNTL;
@@ -802,37 +969,33 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
 		tempRE_CNTL = 0;
 
 		tempRB3D_CNTL = depth_clear->rb3d_cntl;
-		tempRB3D_CNTL &= ~(1<<15); /* unset radeon magic flag */
 
 		tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl;
 		tempRB3D_STENCILREFMASK = 0x0;
 
 		tempSE_CNTL = depth_clear->se_cntl;
 
-
-
 		/* Disable TCL */
 
-		tempSE_VAP_CNTL = (/* SE_VAP_CNTL__FORCE_W_TO_ONE_MASK |  */
-				   (0x9 << SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT));
+		tempSE_VAP_CNTL = (	/* SE_VAP_CNTL__FORCE_W_TO_ONE_MASK |  */
+					  (0x9 <<
+					   SE_VAP_CNTL__VF_MAX_VTX_NUM__SHIFT));
 
 		tempRB3D_PLANEMASK = 0x0;
 
 		tempRE_AUX_SCISSOR_CNTL = 0x0;
 
 		tempSE_VTE_CNTL =
-			SE_VTE_CNTL__VTX_XY_FMT_MASK |
-			SE_VTE_CNTL__VTX_Z_FMT_MASK;
+		    SE_VTE_CNTL__VTX_XY_FMT_MASK | SE_VTE_CNTL__VTX_Z_FMT_MASK;
 
-		/* Vertex format (X, Y, Z, W)*/
+		/* Vertex format (X, Y, Z, W) */
 		tempSE_VTX_FMT_0 =
-			SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK |
-			SE_VTX_FMT_0__VTX_W0_PRESENT_MASK;
+		    SE_VTX_FMT_0__VTX_Z0_PRESENT_MASK |
+		    SE_VTX_FMT_0__VTX_W0_PRESENT_MASK;
 		tempSE_VTX_FMT_1 = 0x0;
 
-
-		/* 
-		 * Depth buffer specific enables 
+		/*
+		 * Depth buffer specific enables
 		 */
 		if (flags & RADEON_DEPTH) {
 			/* Enable depth buffer */
@@ -842,142 +1005,150 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
 			tempRB3D_CNTL &= ~RADEON_Z_ENABLE;
 		}
 
-		/* 
+		/*
 		 * Stencil buffer specific enables
 		 */
-		if ( flags & RADEON_STENCIL ) {
-			tempRB3D_CNTL |=  RADEON_STENCIL_ENABLE;
-			tempRB3D_STENCILREFMASK = clear->depth_mask; 
+		if (flags & RADEON_STENCIL) {
+			tempRB3D_CNTL |= RADEON_STENCIL_ENABLE;
+			tempRB3D_STENCILREFMASK = clear->depth_mask;
 		} else {
 			tempRB3D_CNTL &= ~RADEON_STENCIL_ENABLE;
 			tempRB3D_STENCILREFMASK = 0x00000000;
 		}
 
-		BEGIN_RING( 26 );
+		if (flags & RADEON_USE_COMP_ZBUF) {
+			tempRB3D_ZSTENCILCNTL |= RADEON_Z_COMPRESSION_ENABLE |
+				RADEON_Z_DECOMPRESSION_ENABLE;
+		}
+		if (flags & RADEON_USE_HIERZ) {
+			tempRB3D_ZSTENCILCNTL |= RADEON_Z_HIERARCHY_ENABLE;
+		}
+
+		BEGIN_RING(26);
 		RADEON_WAIT_UNTIL_2D_IDLE();
 
-		OUT_RING_REG( RADEON_PP_CNTL, tempPP_CNTL );
-		OUT_RING_REG( R200_RE_CNTL, tempRE_CNTL );
-		OUT_RING_REG( RADEON_RB3D_CNTL, tempRB3D_CNTL );
-		OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL,
-			      tempRB3D_ZSTENCILCNTL );
-		OUT_RING_REG( RADEON_RB3D_STENCILREFMASK, 
-			      tempRB3D_STENCILREFMASK );
-		OUT_RING_REG( RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK );
-		OUT_RING_REG( RADEON_SE_CNTL, tempSE_CNTL );
-		OUT_RING_REG( R200_SE_VTE_CNTL, tempSE_VTE_CNTL );
-		OUT_RING_REG( R200_SE_VTX_FMT_0, tempSE_VTX_FMT_0 );
-		OUT_RING_REG( R200_SE_VTX_FMT_1, tempSE_VTX_FMT_1 );
-		OUT_RING_REG( R200_SE_VAP_CNTL, tempSE_VAP_CNTL );
-		OUT_RING_REG( R200_RE_AUX_SCISSOR_CNTL, 
-			      tempRE_AUX_SCISSOR_CNTL );
+		OUT_RING_REG(RADEON_PP_CNTL, tempPP_CNTL);
+		OUT_RING_REG(R200_RE_CNTL, tempRE_CNTL);
+		OUT_RING_REG(RADEON_RB3D_CNTL, tempRB3D_CNTL);
+		OUT_RING_REG(RADEON_RB3D_ZSTENCILCNTL, tempRB3D_ZSTENCILCNTL);
+		OUT_RING_REG(RADEON_RB3D_STENCILREFMASK,
+			     tempRB3D_STENCILREFMASK);
+		OUT_RING_REG(RADEON_RB3D_PLANEMASK, tempRB3D_PLANEMASK);
+		OUT_RING_REG(RADEON_SE_CNTL, tempSE_CNTL);
+		OUT_RING_REG(R200_SE_VTE_CNTL, tempSE_VTE_CNTL);
+		OUT_RING_REG(R200_SE_VTX_FMT_0, tempSE_VTX_FMT_0);
+		OUT_RING_REG(R200_SE_VTX_FMT_1, tempSE_VTX_FMT_1);
+		OUT_RING_REG(R200_SE_VAP_CNTL, tempSE_VAP_CNTL);
+		OUT_RING_REG(R200_RE_AUX_SCISSOR_CNTL, tempRE_AUX_SCISSOR_CNTL);
 		ADVANCE_RING();
 
 		/* Make sure we restore the 3D state next time.
 		 */
 		dev_priv->sarea_priv->ctx_owner = 0;
 
-		for ( i = 0 ; i < nbox ; i++ ) {
-			
-			/* Funny that this should be required -- 
+		for (i = 0; i < nbox; i++) {
+
+			/* Funny that this should be required --
 			 *  sets top-left?
 			 */
-			radeon_emit_clip_rect( dev_priv,
-					       &sarea_priv->boxes[i] );
-
-			BEGIN_RING( 14 );
-			OUT_RING( CP_PACKET3( R200_3D_DRAW_IMMD_2, 12 ) );
-			OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST |
-				   RADEON_PRIM_WALK_RING |
-				   (3 << RADEON_NUM_VERTICES_SHIFT)) );
-			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_Y1] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
-			OUT_RING( 0x3f800000 );
-			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
-			OUT_RING( 0x3f800000 );
-			OUT_RING( depth_boxes[i].ui[CLEAR_X2] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
-			OUT_RING( 0x3f800000 );
+			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
+
+			BEGIN_RING(14);
+			OUT_RING(CP_PACKET3(R200_3D_DRAW_IMMD_2, 12));
+			OUT_RING((RADEON_PRIM_TYPE_RECT_LIST |
+				  RADEON_PRIM_WALK_RING |
+				  (3 << RADEON_NUM_VERTICES_SHIFT)));
+			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_Y1]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
+			OUT_RING(0x3f800000);
+			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
+			OUT_RING(0x3f800000);
+			OUT_RING(depth_boxes[i].ui[CLEAR_X2]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
+			OUT_RING(0x3f800000);
 			ADVANCE_RING();
 		}
-	} 
-	else if ( (flags & (RADEON_DEPTH | RADEON_STENCIL)) ) {
+	} else if ((flags & (RADEON_DEPTH | RADEON_STENCIL))) {
 
+		int tempRB3D_ZSTENCILCNTL = depth_clear->rb3d_zstencilcntl;
+		
 		rb3d_cntl = depth_clear->rb3d_cntl;
 
-		if ( flags & RADEON_DEPTH ) {
-			rb3d_cntl |=  RADEON_Z_ENABLE;
+		if (flags & RADEON_DEPTH) {
+			rb3d_cntl |= RADEON_Z_ENABLE;
 		} else {
 			rb3d_cntl &= ~RADEON_Z_ENABLE;
 		}
 
-		if ( flags & RADEON_STENCIL ) {
-			rb3d_cntl |=  RADEON_STENCIL_ENABLE;
-			rb3d_stencilrefmask = clear->depth_mask; /* misnamed field */
+		if (flags & RADEON_STENCIL) {
+			rb3d_cntl |= RADEON_STENCIL_ENABLE;
+			rb3d_stencilrefmask = clear->depth_mask;	/* misnamed field */
 		} else {
 			rb3d_cntl &= ~RADEON_STENCIL_ENABLE;
 			rb3d_stencilrefmask = 0x00000000;
 		}
 
-		BEGIN_RING( 13 );
+		if (flags & RADEON_USE_COMP_ZBUF) {
+			tempRB3D_ZSTENCILCNTL |= RADEON_Z_COMPRESSION_ENABLE |
+				RADEON_Z_DECOMPRESSION_ENABLE;
+		}
+		if (flags & RADEON_USE_HIERZ) {
+			tempRB3D_ZSTENCILCNTL |= RADEON_Z_HIERARCHY_ENABLE;
+		}
+
+		BEGIN_RING(13);
 		RADEON_WAIT_UNTIL_2D_IDLE();
 
-		OUT_RING( CP_PACKET0( RADEON_PP_CNTL, 1 ) );
-		OUT_RING( 0x00000000 );
-		OUT_RING( rb3d_cntl );
-		
-		OUT_RING_REG( RADEON_RB3D_ZSTENCILCNTL,
-			      depth_clear->rb3d_zstencilcntl );
-		OUT_RING_REG( RADEON_RB3D_STENCILREFMASK,
-			      rb3d_stencilrefmask );
-		OUT_RING_REG( RADEON_RB3D_PLANEMASK,
-			      0x00000000 );
-		OUT_RING_REG( RADEON_SE_CNTL,
-			      depth_clear->se_cntl );
+		OUT_RING(CP_PACKET0(RADEON_PP_CNTL, 1));
+		OUT_RING(0x00000000);
+		OUT_RING(rb3d_cntl);
+
+		OUT_RING_REG(RADEON_RB3D_ZSTENCILCNTL, tempRB3D_ZSTENCILCNTL);
+		OUT_RING_REG(RADEON_RB3D_STENCILREFMASK, rb3d_stencilrefmask);
+		OUT_RING_REG(RADEON_RB3D_PLANEMASK, 0x00000000);
+		OUT_RING_REG(RADEON_SE_CNTL, depth_clear->se_cntl);
 		ADVANCE_RING();
 
 		/* Make sure we restore the 3D state next time.
 		 */
 		dev_priv->sarea_priv->ctx_owner = 0;
 
-		for ( i = 0 ; i < nbox ; i++ ) {
-			
-			/* Funny that this should be required -- 
+		for (i = 0; i < nbox; i++) {
+
+			/* Funny that this should be required --
 			 *  sets top-left?
 			 */
-			radeon_emit_clip_rect( dev_priv,
-					       &sarea_priv->boxes[i] );
-
-			BEGIN_RING( 15 );
-
-			OUT_RING( CP_PACKET3( RADEON_3D_DRAW_IMMD, 13 ) );
-			OUT_RING( RADEON_VTX_Z_PRESENT |
-				  RADEON_VTX_PKCOLOR_PRESENT);
-			OUT_RING( (RADEON_PRIM_TYPE_RECT_LIST |
-				   RADEON_PRIM_WALK_RING |
-				   RADEON_MAOS_ENABLE |
-				   RADEON_VTX_FMT_RADEON_MODE |
-				   (3 << RADEON_NUM_VERTICES_SHIFT)) );
-
-
-			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_Y1] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
-			OUT_RING( 0x0 );
-
-			OUT_RING( depth_boxes[i].ui[CLEAR_X1] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
-			OUT_RING( 0x0 );
-
-			OUT_RING( depth_boxes[i].ui[CLEAR_X2] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_Y2] );
-			OUT_RING( depth_boxes[i].ui[CLEAR_DEPTH] );
-			OUT_RING( 0x0 );
+			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
+
+			BEGIN_RING(15);
+
+			OUT_RING(CP_PACKET3(RADEON_3D_DRAW_IMMD, 13));
+			OUT_RING(RADEON_VTX_Z_PRESENT |
+				 RADEON_VTX_PKCOLOR_PRESENT);
+			OUT_RING((RADEON_PRIM_TYPE_RECT_LIST |
+				  RADEON_PRIM_WALK_RING |
+				  RADEON_MAOS_ENABLE |
+				  RADEON_VTX_FMT_RADEON_MODE |
+				  (3 << RADEON_NUM_VERTICES_SHIFT)));
+
+			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_Y1]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
+			OUT_RING(0x0);
+
+			OUT_RING(depth_boxes[i].ui[CLEAR_X1]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
+			OUT_RING(0x0);
+
+			OUT_RING(depth_boxes[i].ui[CLEAR_X2]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_Y2]);
+			OUT_RING(depth_boxes[i].ui[CLEAR_DEPTH]);
+			OUT_RING(0x0);
 
 			ADVANCE_RING();
 		}
@@ -989,15 +1160,15 @@ static void radeon_cp_dispatch_clear( drm_device_t *dev,
 	 */
 	dev_priv->sarea_priv->last_clear++;
 
-	BEGIN_RING( 4 );
+	BEGIN_RING(4);
 
-	RADEON_CLEAR_AGE( dev_priv->sarea_priv->last_clear );
+	RADEON_CLEAR_AGE(dev_priv->sarea_priv->last_clear);
 	RADEON_WAIT_UNTIL_IDLE();
 
 	ADVANCE_RING();
 }
 
-static void radeon_cp_dispatch_swap( drm_device_t *dev )
+static void radeon_cp_dispatch_swap(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -1005,59 +1176,55 @@ static void radeon_cp_dispatch_swap( drm_device_t *dev )
 	drm_clip_rect_t *pbox = sarea_priv->boxes;
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	/* Do some trivial performance monitoring...
 	 */
 	if (dev_priv->do_boxes)
-		radeon_cp_performance_boxes( dev_priv );
-
+		radeon_cp_performance_boxes(dev_priv);
 
 	/* Wait for the 3D stream to idle before dispatching the bitblt.
 	 * This will prevent data corruption between the two streams.
 	 */
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
 	RADEON_WAIT_UNTIL_3D_IDLE();
 
 	ADVANCE_RING();
 
-	for ( i = 0 ; i < nbox ; i++ ) {
+	for (i = 0; i < nbox; i++) {
 		int x = pbox[i].x1;
 		int y = pbox[i].y1;
 		int w = pbox[i].x2 - x;
 		int h = pbox[i].y2 - y;
 
-		DRM_DEBUG( "dispatch swap %d,%d-%d,%d\n",
-			   x, y, w, h );
-
-		BEGIN_RING( 7 );
-
-		OUT_RING( CP_PACKET3( RADEON_CNTL_BITBLT_MULTI, 5 ) );
-		OUT_RING( RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
-			  RADEON_GMC_DST_PITCH_OFFSET_CNTL |
-			  RADEON_GMC_BRUSH_NONE |
-			  (dev_priv->color_fmt << 8) |
-			  RADEON_GMC_SRC_DATATYPE_COLOR |
-			  RADEON_ROP3_S |
-			  RADEON_DP_SRC_SOURCE_MEMORY |
-			  RADEON_GMC_CLR_CMP_CNTL_DIS |
-			  RADEON_GMC_WR_MSK_DIS );
-		
+		DRM_DEBUG("dispatch swap %d,%d-%d,%d\n", x, y, w, h);
+
+		BEGIN_RING(7);
+
+		OUT_RING(CP_PACKET3(RADEON_CNTL_BITBLT_MULTI, 5));
+		OUT_RING(RADEON_GMC_SRC_PITCH_OFFSET_CNTL |
+			 RADEON_GMC_DST_PITCH_OFFSET_CNTL |
+			 RADEON_GMC_BRUSH_NONE |
+			 (dev_priv->color_fmt << 8) |
+			 RADEON_GMC_SRC_DATATYPE_COLOR |
+			 RADEON_ROP3_S |
+			 RADEON_DP_SRC_SOURCE_MEMORY |
+			 RADEON_GMC_CLR_CMP_CNTL_DIS | RADEON_GMC_WR_MSK_DIS);
+
 		/* Make this work even if front & back are flipped:
 		 */
 		if (dev_priv->current_page == 0) {
-			OUT_RING( dev_priv->back_pitch_offset );
-			OUT_RING( dev_priv->front_pitch_offset );
-		} 
-		else {
-			OUT_RING( dev_priv->front_pitch_offset );
-			OUT_RING( dev_priv->back_pitch_offset );
+			OUT_RING(dev_priv->back_pitch_offset);
+			OUT_RING(dev_priv->front_pitch_offset);
+		} else {
+			OUT_RING(dev_priv->front_pitch_offset);
+			OUT_RING(dev_priv->back_pitch_offset);
 		}
 
-		OUT_RING( (x << 16) | y );
-		OUT_RING( (x << 16) | y );
-		OUT_RING( (w << 16) | h );
+		OUT_RING((x << 16) | y);
+		OUT_RING((x << 16) | y);
+		OUT_RING((w << 16) | h);
 
 		ADVANCE_RING();
 	}
@@ -1068,44 +1235,43 @@ static void radeon_cp_dispatch_swap( drm_device_t *dev )
 	 */
 	dev_priv->sarea_priv->last_frame++;
 
-	BEGIN_RING( 4 );
+	BEGIN_RING(4);
 
-	RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame );
+	RADEON_FRAME_AGE(dev_priv->sarea_priv->last_frame);
 	RADEON_WAIT_UNTIL_2D_IDLE();
 
 	ADVANCE_RING();
 }
 
-static void radeon_cp_dispatch_flip( drm_device_t *dev )
+static void radeon_cp_dispatch_flip(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	drm_sarea_t *sarea = (drm_sarea_t *)dev_priv->sarea->handle;
+	drm_sarea_t *sarea = (drm_sarea_t *) dev_priv->sarea->handle;
 	int offset = (dev_priv->current_page == 1)
-		   ? dev_priv->front_offset : dev_priv->back_offset;
+	    ? dev_priv->front_offset : dev_priv->back_offset;
 	RING_LOCALS;
-	DRM_DEBUG( "%s: page=%d pfCurrentPage=%d\n", 
-		__FUNCTION__, 
-		dev_priv->current_page,
-		dev_priv->sarea_priv->pfCurrentPage);
+	DRM_DEBUG("%s: page=%d pfCurrentPage=%d\n",
+		  __FUNCTION__,
+		  dev_priv->current_page, dev_priv->sarea_priv->pfCurrentPage);
 
 	/* Do some trivial performance monitoring...
 	 */
 	if (dev_priv->do_boxes) {
 		dev_priv->stats.boxes |= RADEON_BOX_FLIP;
-		radeon_cp_performance_boxes( dev_priv );
+		radeon_cp_performance_boxes(dev_priv);
 	}
 
 	/* Update the frame offsets for both CRTCs
 	 */
-	BEGIN_RING( 6 );
+	BEGIN_RING(6);
 
 	RADEON_WAIT_UNTIL_3D_IDLE();
-	OUT_RING_REG( RADEON_CRTC_OFFSET, ( ( sarea->frame.y * dev_priv->front_pitch
-					      + sarea->frame.x 
-					      * ( dev_priv->color_fmt - 2 ) ) & ~7 )
-					  + offset );
-	OUT_RING_REG( RADEON_CRTC2_OFFSET, dev_priv->sarea_priv->crtc2_base
-					   + offset );
+	OUT_RING_REG(RADEON_CRTC_OFFSET,
+		     ((sarea->frame.y * dev_priv->front_pitch +
+		       sarea->frame.x * (dev_priv->color_fmt - 2)) & ~7)
+		     + offset);
+	OUT_RING_REG(RADEON_CRTC2_OFFSET, dev_priv->sarea_priv->crtc2_base
+		     + offset);
 
 	ADVANCE_RING();
 
@@ -1115,16 +1281,16 @@ static void radeon_cp_dispatch_flip( drm_device_t *dev )
 	 */
 	dev_priv->sarea_priv->last_frame++;
 	dev_priv->sarea_priv->pfCurrentPage = dev_priv->current_page =
-					      1 - dev_priv->current_page;
+	    1 - dev_priv->current_page;
 
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
-	RADEON_FRAME_AGE( dev_priv->sarea_priv->last_frame );
+	RADEON_FRAME_AGE(dev_priv->sarea_priv->last_frame);
 
 	ADVANCE_RING();
 }
 
-static int bad_prim_vertex_nr( int primitive, int nr )
+static int bad_prim_vertex_nr(int primitive, int nr)
 {
 	switch (primitive & RADEON_PRIM_TYPE_MASK) {
 	case RADEON_PRIM_TYPE_NONE:
@@ -1144,24 +1310,21 @@ static int bad_prim_vertex_nr( int primitive, int nr )
 		return nr < 3;
 	default:
 		return 1;
-	}	
+	}
 }
 
-
-
 typedef struct {
 	unsigned int start;
 	unsigned int finish;
 	unsigned int prim;
 	unsigned int numverts;
-	unsigned int offset;   
-        unsigned int vc_format;
+	unsigned int offset;
+	unsigned int vc_format;
 } drm_radeon_tcl_prim_t;
 
-static void radeon_cp_dispatch_vertex( drm_device_t *dev,
-				       drm_buf_t *buf,
-				       drm_radeon_tcl_prim_t *prim )
-
+static void radeon_cp_dispatch_vertex(drm_device_t * dev,
+				      drm_buf_t * buf,
+				      drm_radeon_tcl_prim_t * prim)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -1173,45 +1336,39 @@ static void radeon_cp_dispatch_vertex( drm_device_t *dev,
 
 	DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d %d verts\n",
 		  prim->prim,
-		  prim->vc_format,
-		  prim->start,
-		  prim->finish,
-		  prim->numverts);
+		  prim->vc_format, prim->start, prim->finish, prim->numverts);
 
-	if (bad_prim_vertex_nr( prim->prim, prim->numverts )) {
-		DRM_ERROR( "bad prim %x numverts %d\n", 
-			   prim->prim, prim->numverts );
+	if (bad_prim_vertex_nr(prim->prim, prim->numverts)) {
+		DRM_ERROR("bad prim %x numverts %d\n",
+			  prim->prim, prim->numverts);
 		return;
 	}
 
 	do {
 		/* Emit the next cliprect */
-		if ( i < nbox ) {
-			radeon_emit_clip_rect( dev_priv, 
-					       &sarea_priv->boxes[i] );
+		if (i < nbox) {
+			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
 		}
 
 		/* Emit the vertex buffer rendering commands */
-		BEGIN_RING( 5 );
+		BEGIN_RING(5);
 
-		OUT_RING( CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, 3 ) );
-		OUT_RING( offset );
-		OUT_RING( numverts );
-		OUT_RING( prim->vc_format );
-		OUT_RING( prim->prim | RADEON_PRIM_WALK_LIST |
-			  RADEON_COLOR_ORDER_RGBA |
-			  RADEON_VTX_FMT_RADEON_MODE |
-			  (numverts << RADEON_NUM_VERTICES_SHIFT) );
+		OUT_RING(CP_PACKET3(RADEON_3D_RNDR_GEN_INDX_PRIM, 3));
+		OUT_RING(offset);
+		OUT_RING(numverts);
+		OUT_RING(prim->vc_format);
+		OUT_RING(prim->prim | RADEON_PRIM_WALK_LIST |
+			 RADEON_COLOR_ORDER_RGBA |
+			 RADEON_VTX_FMT_RADEON_MODE |
+			 (numverts << RADEON_NUM_VERTICES_SHIFT));
 
 		ADVANCE_RING();
 
 		i++;
-	} while ( i < nbox );
+	} while (i < nbox);
 }
 
-
-
-static void radeon_cp_discard_buffer( drm_device_t *dev, drm_buf_t *buf )
+static void radeon_cp_discard_buffer(drm_device_t * dev, drm_buf_t * buf)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_buf_priv_t *buf_priv = buf->dev_private;
@@ -1220,24 +1377,22 @@ static void radeon_cp_discard_buffer( drm_device_t *dev, drm_buf_t *buf )
 	buf_priv->age = ++dev_priv->sarea_priv->last_dispatch;
 
 	/* Emit the vertex buffer age */
-	BEGIN_RING( 2 );
-	RADEON_DISPATCH_AGE( buf_priv->age );
+	BEGIN_RING(2);
+	RADEON_DISPATCH_AGE(buf_priv->age);
 	ADVANCE_RING();
 
 	buf->pending = 1;
 	buf->used = 0;
 }
 
-static void radeon_cp_dispatch_indirect( drm_device_t *dev,
-					 drm_buf_t *buf,
-					 int start, int end )
+static void radeon_cp_dispatch_indirect(drm_device_t * dev,
+					drm_buf_t * buf, int start, int end)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	RING_LOCALS;
-	DRM_DEBUG( "indirect: buf=%d s=0x%x e=0x%x\n",
-		   buf->idx, start, end );
+	DRM_DEBUG("indirect: buf=%d s=0x%x e=0x%x\n", buf->idx, start, end);
 
-	if ( start != end ) {
+	if (start != end) {
 		int offset = (dev_priv->gart_buffers_offset
 			      + buf->offset + start);
 		int dwords = (end - start + 3) / sizeof(u32);
@@ -1246,28 +1401,27 @@ static void radeon_cp_dispatch_indirect( drm_device_t *dev,
 		 * dwords, so if we've been given an odd number we must
 		 * pad the data with a Type-2 CP packet.
 		 */
-		if ( dwords & 1 ) {
+		if (dwords & 1) {
 			u32 *data = (u32 *)
-				((char *)dev_priv->buffers->handle
-				 + buf->offset + start);
+			    ((char *)dev->agp_buffer_map->handle
+			     + buf->offset + start);
 			data[dwords++] = RADEON_CP_PACKET2;
 		}
 
 		/* Fire off the indirect buffer */
-		BEGIN_RING( 3 );
+		BEGIN_RING(3);
 
-		OUT_RING( CP_PACKET0( RADEON_CP_IB_BASE, 1 ) );
-		OUT_RING( offset );
-		OUT_RING( dwords );
+		OUT_RING(CP_PACKET0(RADEON_CP_IB_BASE, 1));
+		OUT_RING(offset);
+		OUT_RING(dwords);
 
 		ADVANCE_RING();
 	}
 }
 
-
-static void radeon_cp_dispatch_indices( drm_device_t *dev,
-					drm_buf_t *elt_buf,
-					drm_radeon_tcl_prim_t *prim )
+static void radeon_cp_dispatch_indices(drm_device_t * dev,
+				       drm_buf_t * elt_buf,
+				       drm_radeon_tcl_prim_t * prim)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
@@ -1282,30 +1436,24 @@ static void radeon_cp_dispatch_indices( drm_device_t *dev,
 	DRM_DEBUG("hwprim 0x%x vfmt 0x%x %d..%d offset: %x nr %d\n",
 		  prim->prim,
 		  prim->vc_format,
-		  prim->start,
-		  prim->finish,
-		  prim->offset,
-		  prim->numverts);
-
-	if (bad_prim_vertex_nr( prim->prim, count )) {
-		DRM_ERROR( "bad prim %x count %d\n", 
-			   prim->prim, count );
+		  prim->start, prim->finish, prim->offset, prim->numverts);
+
+	if (bad_prim_vertex_nr(prim->prim, count)) {
+		DRM_ERROR("bad prim %x count %d\n", prim->prim, count);
 		return;
 	}
 
-
-	if ( start >= prim->finish ||
-	     (prim->start & 0x7) ) {
-		DRM_ERROR( "buffer prim %d\n", prim->prim );
+	if (start >= prim->finish || (prim->start & 0x7)) {
+		DRM_ERROR("buffer prim %d\n", prim->prim);
 		return;
 	}
 
 	dwords = (prim->finish - prim->start + 3) / sizeof(u32);
 
-	data = (u32 *)((char *)dev_priv->buffers->handle +
-		       elt_buf->offset + prim->start);
+	data = (u32 *) ((char *)dev->agp_buffer_map->handle +
+			elt_buf->offset + prim->start);
 
-	data[0] = CP_PACKET3( RADEON_3D_RNDR_GEN_INDX_PRIM, dwords-2 );
+	data[0] = CP_PACKET3(RADEON_3D_RNDR_GEN_INDX_PRIM, dwords - 2);
 	data[1] = offset;
 	data[2] = prim->numverts;
 	data[3] = prim->vc_format;
@@ -1313,45 +1461,44 @@ static void radeon_cp_dispatch_indices( drm_device_t *dev,
 		   RADEON_PRIM_WALK_IND |
 		   RADEON_COLOR_ORDER_RGBA |
 		   RADEON_VTX_FMT_RADEON_MODE |
-		   (count << RADEON_NUM_VERTICES_SHIFT) );
+		   (count << RADEON_NUM_VERTICES_SHIFT));
 
 	do {
-		if ( i < nbox ) 
-			radeon_emit_clip_rect( dev_priv, 
-					       &sarea_priv->boxes[i] );
+		if (i < nbox)
+			radeon_emit_clip_rect(dev_priv, &sarea_priv->boxes[i]);
 
-		radeon_cp_dispatch_indirect( dev, elt_buf,
-					     prim->start,
-					     prim->finish );
+		radeon_cp_dispatch_indirect(dev, elt_buf,
+					    prim->start, prim->finish);
 
 		i++;
-	} while ( i < nbox );
+	} while (i < nbox);
 
 }
 
 #define RADEON_MAX_TEXTURE_SIZE (RADEON_BUFFER_SIZE - 8 * sizeof(u32))
 
-static int radeon_cp_dispatch_texture( DRMFILE filp,
-				       drm_device_t *dev,
-				       drm_radeon_texture_t *tex,
-				       drm_radeon_tex_image_t *image )
+static int radeon_cp_dispatch_texture(DRMFILE filp,
+				      drm_device_t * dev,
+				      drm_radeon_texture_t * tex,
+				      drm_radeon_tex_image_t * image)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_file_t *filp_priv;
 	drm_buf_t *buf;
 	u32 format;
 	u32 *buffer;
-	const u8 *data;
+	const u8 __user *data;
 	int size, dwords, tex_width, blit_width;
 	u32 height;
 	int i;
+	u32 texpitch, microtile;
 	RING_LOCALS;
 
-	DRM_GET_PRIV_WITH_RETURN( filp_priv, filp );
+	DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
 
-	if ( radeon_check_and_fixup_offset( dev_priv, filp_priv, &tex->offset ) ) {
-		DRM_ERROR( "Invalid destination offset\n" );
-		return DRM_ERR( EINVAL );
+	if (radeon_check_and_fixup_offset(dev_priv, filp_priv, &tex->offset)) {
+		DRM_ERROR("Invalid destination offset\n");
+		return DRM_ERR(EINVAL);
 	}
 
 	dev_priv->stats.boxes |= RADEON_BOX_TEXTURE_LOAD;
@@ -1360,7 +1507,7 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
 	 * up with the texture data from the host data blit, otherwise
 	 * part of the texture image may be corrupted.
 	 */
-	BEGIN_RING( 4 );
+	BEGIN_RING(4);
 	RADEON_FLUSH_CACHE();
 	RADEON_WAIT_UNTIL_IDLE();
 	ADVANCE_RING();
@@ -1370,17 +1517,16 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
 	 * chip wants it, but we need to compensate for the fact that the CP
 	 * ring gets byte-swapped
 	 */
-	BEGIN_RING( 2 );
-	OUT_RING_REG( RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT );
+	BEGIN_RING(2);
+	OUT_RING_REG(RADEON_RBBM_GUICNTL, RADEON_HOST_DATA_SWAP_32BIT);
 	ADVANCE_RING();
 #endif
 
-
 	/* The compiler won't optimize away a division by a variable,
 	 * even if the only legal values are powers of two.  Thus, we'll
 	 * use a shift instead.
 	 */
-	switch ( tex->format ) {
+	switch (tex->format) {
 	case RADEON_TXFORMAT_ARGB8888:
 	case RADEON_TXFORMAT_RGBA8888:
 		format = RADEON_COLOR_FORMAT_ARGB8888;
@@ -1404,51 +1550,62 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
 		blit_width = image->width * 1;
 		break;
 	default:
-		DRM_ERROR( "invalid texture format %d\n", tex->format );
+		DRM_ERROR("invalid texture format %d\n", tex->format);
 		return DRM_ERR(EINVAL);
 	}
+	texpitch = tex->pitch;
+	if ((texpitch << 22) & RADEON_DST_TILE_MICRO) {
+		microtile = 1;
+		if (tex_width < 64) {
+			texpitch &= ~(RADEON_DST_TILE_MICRO >> 22);
+			/* we got tiled coordinates, untile them */
+			image->x *= 2;
+		}
+	}
+	else microtile = 0;
 
-	DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width );
+	DRM_DEBUG("tex=%dx%d blit=%d\n", tex_width, tex->height, blit_width);
 
 	do {
-		DRM_DEBUG( "tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n",
-			   tex->offset >> 10, tex->pitch, tex->format,
-			   image->x, image->y, image->width, image->height );
+		DRM_DEBUG("tex: ofs=0x%x p=%d f=%d x=%hd y=%hd w=%hd h=%hd\n",
+			  tex->offset >> 10, tex->pitch, tex->format,
+			  image->x, image->y, image->width, image->height);
 
 		/* Make a copy of some parameters in case we have to
 		 * update them for a multi-pass texture blit.
 		 */
 		height = image->height;
-		data = (const u8 *)image->data;
-		
+		data = (const u8 __user *)image->data;
+
 		size = height * blit_width;
 
-		if ( size > RADEON_MAX_TEXTURE_SIZE ) {
+		if (size > RADEON_MAX_TEXTURE_SIZE) {
 			height = RADEON_MAX_TEXTURE_SIZE / blit_width;
 			size = height * blit_width;
-		} else if ( size < 4 && size > 0 ) {
+		} else if (size < 4 && size > 0) {
 			size = 4;
-		} else if ( size == 0 ) {
+		} else if (size == 0) {
 			return 0;
 		}
 
-		buf = radeon_freelist_get( dev );
-		if ( 0 && !buf ) {
-			radeon_do_cp_idle( dev_priv );
-			buf = radeon_freelist_get( dev );
+		buf = radeon_freelist_get(dev);
+		if (0 && !buf) {
+			radeon_do_cp_idle(dev_priv);
+			buf = radeon_freelist_get(dev);
 		}
-		if ( !buf ) {
+		if (!buf) {
 			DRM_DEBUG("radeon_cp_dispatch_texture: EAGAIN\n");
-			DRM_COPY_TO_USER( tex->image, image, sizeof(*image) );
+			if (DRM_COPY_TO_USER(tex->image, image, sizeof(*image)))
+				return DRM_ERR(EFAULT);
 			return DRM_ERR(EAGAIN);
 		}
 
-
 		/* Dispatch the indirect buffer.
 		 */
-		buffer = (u32*)((char*)dev_priv->buffers->handle + buf->offset);
+		buffer =
+		    (u32 *) ((char *)dev->agp_buffer_map->handle + buf->offset);
 		dwords = size / 4;
-		buffer[0] = CP_PACKET3( RADEON_CNTL_HOSTDATA_BLT, dwords + 6 );
+		buffer[0] = CP_PACKET3(RADEON_CNTL_HOSTDATA_BLT, dwords + 6);
 		buffer[1] = (RADEON_GMC_DST_PITCH_OFFSET_CNTL |
 			     RADEON_GMC_BRUSH_NONE |
 			     (format << 8) |
@@ -1457,8 +1614,8 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
 			     RADEON_DP_SRC_SOURCE_HOST_DATA |
 			     RADEON_GMC_CLR_CMP_CNTL_DIS |
 			     RADEON_GMC_WR_MSK_DIS);
-		
-		buffer[2] = (tex->pitch << 22) | (tex->offset >> 10);
+
+		buffer[2] = (texpitch << 22) | (tex->offset >> 10);
 		buffer[3] = 0xffffffff;
 		buffer[4] = 0xffffffff;
 		buffer[5] = (image->y << 16) | image->x;
@@ -1466,126 +1623,398 @@ static int radeon_cp_dispatch_texture( DRMFILE filp,
 		buffer[7] = dwords;
 		buffer += 8;
 
-		if ( tex_width >= 32 ) {
-			/* Texture image width is larger than the minimum, so we
-			 * can upload it directly.
-			 */
-			if ( DRM_COPY_FROM_USER( buffer, data, 
-						 dwords * sizeof(u32) ) ) {
-				DRM_ERROR( "EFAULT on data, %d dwords\n", 
-					   dwords );
-				return DRM_ERR(EFAULT);
+		if (microtile) {
+			/* texture micro tiling in use, minimum texture width is thus 16 bytes.
+			   however, we cannot use blitter directly for texture width < 64 bytes,
+			   since minimum tex pitch is 64 bytes and we need this to match
+			   the texture width, otherwise the blitter will tile it wrong.
+			   Thus, tiling manually in this case. Additionally, need to special
+			   case tex height = 1, since our actual image will have height 2
+			   and we need to ensure we don't read beyond the texture size
+			   from user space. */
+			if (tex->height == 1) {
+				if (tex_width >= 64 || tex_width <= 16) {
+					if (DRM_COPY_FROM_USER(buffer, data,
+						       tex_width * sizeof(u32))) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+				} else if (tex_width == 32) {
+					if (DRM_COPY_FROM_USER(buffer, data, 16)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					if (DRM_COPY_FROM_USER(buffer + 8, data + 16, 16)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+				}
+			} else if (tex_width >= 64 || tex_width == 16) {
+				if (DRM_COPY_FROM_USER(buffer, data,
+						       dwords * sizeof(u32))) {
+					DRM_ERROR("EFAULT on data, %d dwords\n",
+						  dwords);
+					return DRM_ERR(EFAULT);
+				}
+			} else if (tex_width < 16) {
+				for (i = 0; i < tex->height; i++) {
+					if (DRM_COPY_FROM_USER(buffer, data, tex_width)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					buffer += 4;
+					data += tex_width;
+				}
+			} else if (tex_width == 32) {
+			/* TODO: make sure this works when not fitting in one buffer
+				(i.e. 32bytes x 2048...) */
+				for (i = 0; i < tex->height; i += 2) {
+					if (DRM_COPY_FROM_USER(buffer, data, 16)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					data += 16;
+					if (DRM_COPY_FROM_USER(buffer + 8, data, 16)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					data += 16;
+					if (DRM_COPY_FROM_USER(buffer + 4, data, 16)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					data += 16;
+					if (DRM_COPY_FROM_USER(buffer + 12, data, 16)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					data += 16;
+					buffer += 16;
+				}
 			}
-		} else {
-			/* Texture image width is less than the minimum, so we
-			 * need to pad out each image scanline to the minimum
-			 * width.
-			 */
-			for ( i = 0 ; i < tex->height ; i++ ) {
-				if ( DRM_COPY_FROM_USER( buffer, data, 
-							 tex_width ) ) {
-					DRM_ERROR( "EFAULT on pad, %d bytes\n",
-						   tex_width );
+		}
+		else {
+			if (tex_width >= 32) {
+				/* Texture image width is larger than the minimum, so we
+				 * can upload it directly.
+				 */
+				if (DRM_COPY_FROM_USER(buffer, data,
+						       dwords * sizeof(u32))) {
+					DRM_ERROR("EFAULT on data, %d dwords\n",
+						  dwords);
 					return DRM_ERR(EFAULT);
 				}
-				buffer += 8;
-				data += tex_width;
+			} else {
+				/* Texture image width is less than the minimum, so we
+				 * need to pad out each image scanline to the minimum
+				 * width.
+				 */
+				for (i = 0; i < tex->height; i++) {
+					if (DRM_COPY_FROM_USER(buffer, data, tex_width)) {
+						DRM_ERROR("EFAULT on pad, %d bytes\n",
+							  tex_width);
+						return DRM_ERR(EFAULT);
+					}
+					buffer += 8;
+					data += tex_width;
+				}
 			}
 		}
 
 		buf->filp = filp;
 		buf->used = (dwords + 8) * sizeof(u32);
-		radeon_cp_dispatch_indirect( dev, buf, 0, buf->used );
-		radeon_cp_discard_buffer( dev, buf );
+		radeon_cp_dispatch_indirect(dev, buf, 0, buf->used);
+		radeon_cp_discard_buffer(dev, buf);
 
 		/* Update the input parameters for next time */
 		image->y += height;
 		image->height -= height;
-		image->data = (const u8 *)image->data + size;
+		image->data = (const u8 __user *)image->data + size;
 	} while (image->height > 0);
 
 	/* Flush the pixel cache after the blit completes.  This ensures
 	 * the texture data is written out to memory before rendering
 	 * continues.
 	 */
-	BEGIN_RING( 4 );
+	BEGIN_RING(4);
 	RADEON_FLUSH_CACHE();
 	RADEON_WAIT_UNTIL_2D_IDLE();
 	ADVANCE_RING();
 	return 0;
 }
 
-
-static void radeon_cp_dispatch_stipple( drm_device_t *dev, u32 *stipple )
+static void radeon_cp_dispatch_stipple(drm_device_t * dev, u32 * stipple)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	int i;
 	RING_LOCALS;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	BEGIN_RING( 35 );
+	BEGIN_RING(35);
 
-	OUT_RING( CP_PACKET0( RADEON_RE_STIPPLE_ADDR, 0 ) );
-	OUT_RING( 0x00000000 );
+	OUT_RING(CP_PACKET0(RADEON_RE_STIPPLE_ADDR, 0));
+	OUT_RING(0x00000000);
 
-	OUT_RING( CP_PACKET0_TABLE( RADEON_RE_STIPPLE_DATA, 31 ) );
-	for ( i = 0 ; i < 32 ; i++ ) {
-		OUT_RING( stipple[i] );
+	OUT_RING(CP_PACKET0_TABLE(RADEON_RE_STIPPLE_DATA, 31));
+	for (i = 0; i < 32; i++) {
+		OUT_RING(stipple[i]);
 	}
 
 	ADVANCE_RING();
 }
 
+static void radeon_apply_surface_regs(int surf_index, drm_radeon_private_t *dev_priv)
+{
+	if (!dev_priv->mmio)
+		return;
+
+	radeon_do_cp_idle(dev_priv);
+
+	RADEON_WRITE(RADEON_SURFACE0_INFO + 16*surf_index,
+		dev_priv->surfaces[surf_index].flags);
+	RADEON_WRITE(RADEON_SURFACE0_LOWER_BOUND + 16*surf_index,
+		dev_priv->surfaces[surf_index].lower);
+	RADEON_WRITE(RADEON_SURFACE0_UPPER_BOUND + 16*surf_index,
+		dev_priv->surfaces[surf_index].upper);
+}
+
+/* Allocates a virtual surface
+ * doesn't always allocate a real surface, will stretch an existing 
+ * surface when possible.
+ *
+ * Note that refcount can be at most 2, since during a free refcount=3
+ * might mean we have to allocate a new surface which might not always
+ * be available.
+ * For example : we allocate three contigous surfaces ABC. If B is 
+ * freed, we suddenly need two surfaces to store A and C, which might
+ * not always be available.
+ */
+static int alloc_surface(drm_radeon_surface_alloc_t* new, drm_radeon_private_t *dev_priv, DRMFILE filp)
+{
+	struct radeon_virt_surface *s;
+	int i;
+	int virt_surface_index;
+	uint32_t new_upper, new_lower;
+
+	new_lower = new->address;
+	new_upper = new_lower + new->size - 1;
+
+	/* sanity check */
+	if ((new_lower >= new_upper) || (new->flags == 0) || (new->size == 0) ||
+		((new_upper & RADEON_SURF_ADDRESS_FIXED_MASK) != RADEON_SURF_ADDRESS_FIXED_MASK) ||
+		((new_lower & RADEON_SURF_ADDRESS_FIXED_MASK) != 0))
+		return -1;
+
+	/* make sure there is no overlap with existing surfaces */
+	for (i = 0; i < RADEON_MAX_SURFACES; i++) {
+		if ((dev_priv->surfaces[i].refcount != 0) &&
+		(( (new_lower >= dev_priv->surfaces[i].lower) &&
+			(new_lower < dev_priv->surfaces[i].upper) ) ||
+		 ( (new_lower < dev_priv->surfaces[i].lower) &&
+			(new_upper > dev_priv->surfaces[i].lower) )) ){
+		return -1;}
+	}
+
+	/* find a virtual surface */
+	for (i = 0; i < 2*RADEON_MAX_SURFACES; i++)
+		if (dev_priv->virt_surfaces[i].filp == 0)
+			break;
+	if (i == 2*RADEON_MAX_SURFACES) {
+		return -1;}
+	virt_surface_index = i;
+
+	/* try to reuse an existing surface */
+	for (i = 0; i < RADEON_MAX_SURFACES; i++) {
+		/* extend before */
+		if ((dev_priv->surfaces[i].refcount == 1) &&
+		  (new->flags == dev_priv->surfaces[i].flags) &&
+		  (new_upper + 1 == dev_priv->surfaces[i].lower)) {
+			s = &(dev_priv->virt_surfaces[virt_surface_index]);
+			s->surface_index = i;
+			s->lower = new_lower;
+			s->upper = new_upper;
+			s->flags = new->flags;
+			s->filp = filp;
+			dev_priv->surfaces[i].refcount++;
+			dev_priv->surfaces[i].lower = s->lower;
+			radeon_apply_surface_regs(s->surface_index, dev_priv);
+			return virt_surface_index;
+		}
+
+		/* extend after */
+		if ((dev_priv->surfaces[i].refcount == 1) &&
+		  (new->flags == dev_priv->surfaces[i].flags) &&
+		  (new_lower == dev_priv->surfaces[i].upper + 1)) {
+			s = &(dev_priv->virt_surfaces[virt_surface_index]);
+			s->surface_index = i;
+			s->lower = new_lower;
+			s->upper = new_upper;
+			s->flags = new->flags;
+			s->filp = filp;
+			dev_priv->surfaces[i].refcount++;
+			dev_priv->surfaces[i].upper = s->upper;
+			radeon_apply_surface_regs(s->surface_index, dev_priv);
+			return virt_surface_index;
+		}
+	}
+
+	/* okay, we need a new one */
+	for (i = 0; i < RADEON_MAX_SURFACES; i++) {
+		if (dev_priv->surfaces[i].refcount == 0) {
+			s = &(dev_priv->virt_surfaces[virt_surface_index]);
+			s->surface_index = i;
+			s->lower = new_lower;
+			s->upper = new_upper;
+			s->flags = new->flags;
+			s->filp = filp;
+			dev_priv->surfaces[i].refcount = 1;
+			dev_priv->surfaces[i].lower = s->lower;
+			dev_priv->surfaces[i].upper = s->upper;
+			dev_priv->surfaces[i].flags = s->flags;
+			radeon_apply_surface_regs(s->surface_index, dev_priv);
+			return virt_surface_index;
+		}
+	}
+
+	/* we didn't find anything */
+	return -1;
+}
+
+static int free_surface(DRMFILE filp, drm_radeon_private_t *dev_priv, int lower)
+{
+	struct radeon_virt_surface *s;
+	int i;
+	/* find the virtual surface */
+	for(i = 0; i < 2*RADEON_MAX_SURFACES; i++) {
+		s = &(dev_priv->virt_surfaces[i]);
+		if (s->filp) {
+			if ((lower == s->lower) && (filp == s->filp)) {
+				if (dev_priv->surfaces[s->surface_index].lower == s->lower)
+					dev_priv->surfaces[s->surface_index].lower = s->upper;
+
+				if (dev_priv->surfaces[s->surface_index].upper == s->upper)
+					dev_priv->surfaces[s->surface_index].upper = s->lower;
+
+				dev_priv->surfaces[s->surface_index].refcount--;
+				if (dev_priv->surfaces[s->surface_index].refcount == 0)
+					dev_priv->surfaces[s->surface_index].flags = 0;
+				s->filp = 0;
+				radeon_apply_surface_regs(s->surface_index, dev_priv);
+				return 0;
+			}
+		}
+	}
+	return 1;
+}
+
+static void radeon_surfaces_release(DRMFILE filp, drm_radeon_private_t *dev_priv)
+{
+	int i;
+	for( i = 0; i < 2*RADEON_MAX_SURFACES; i++)
+	{
+		if (dev_priv->virt_surfaces[i].filp == filp)
+			free_surface(filp, dev_priv, dev_priv->virt_surfaces[i].lower);
+	}
+}
 
 /* ================================================================
  * IOCTL functions
  */
 
-int radeon_cp_clear( DRM_IOCTL_ARGS )
+static int radeon_surface_alloc(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_surface_alloc_t alloc;
+
+	if (!dev_priv) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(alloc, (drm_radeon_surface_alloc_t __user *)data,
+				  sizeof(alloc));
+
+	if (alloc_surface(&alloc, dev_priv, filp) == -1)
+		return DRM_ERR(EINVAL);
+	else
+		return 0;
+}
+
+static int radeon_surface_free(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	drm_radeon_surface_free_t memfree;
+
+	if (!dev_priv) {
+		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+		return DRM_ERR(EINVAL);
+	}
+
+	DRM_COPY_FROM_USER_IOCTL(memfree, (drm_radeon_surface_free_t __user *)data,
+				  sizeof(memfree) );
+
+	if (free_surface(filp, dev_priv, memfree.address))
+		return DRM_ERR(EINVAL);
+	else
+		return 0;
+}
+
+static int radeon_cp_clear(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
 	drm_radeon_clear_t clear;
 	drm_radeon_clear_rect_t depth_boxes[RADEON_NR_SAREA_CLIPRECTS];
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( clear, (drm_radeon_clear_t *)data,
-			     sizeof(clear) );
+	DRM_COPY_FROM_USER_IOCTL(clear, (drm_radeon_clear_t __user *) data,
+				 sizeof(clear));
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
 
-	if ( DRM_COPY_FROM_USER( &depth_boxes, clear.depth_boxes,
-			     sarea_priv->nbox * sizeof(depth_boxes[0]) ) )
+	if (DRM_COPY_FROM_USER(&depth_boxes, clear.depth_boxes,
+			       sarea_priv->nbox * sizeof(depth_boxes[0])))
 		return DRM_ERR(EFAULT);
 
-	radeon_cp_dispatch_clear( dev, &clear, depth_boxes );
+	radeon_cp_dispatch_clear(dev, &clear, depth_boxes);
 
 	COMMIT_RING();
 	return 0;
 }
 
-
 /* Not sure why this isn't set all the time:
- */ 
-static int radeon_do_init_pageflip( drm_device_t *dev )
+ */
+static int radeon_do_init_pageflip(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	RING_LOCALS;
 
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	BEGIN_RING( 6 );
+	BEGIN_RING(6);
 	RADEON_WAIT_UNTIL_3D_IDLE();
-	OUT_RING( CP_PACKET0( RADEON_CRTC_OFFSET_CNTL, 0 ) );
-	OUT_RING( RADEON_READ( RADEON_CRTC_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL );
-	OUT_RING( CP_PACKET0( RADEON_CRTC2_OFFSET_CNTL, 0 ) );
-	OUT_RING( RADEON_READ( RADEON_CRTC2_OFFSET_CNTL ) | RADEON_CRTC_OFFSET_FLIP_CNTL );
+	OUT_RING(CP_PACKET0(RADEON_CRTC_OFFSET_CNTL, 0));
+	OUT_RING(RADEON_READ(RADEON_CRTC_OFFSET_CNTL) |
+		 RADEON_CRTC_OFFSET_FLIP_CNTL);
+	OUT_RING(CP_PACKET0(RADEON_CRTC2_OFFSET_CNTL, 0));
+	OUT_RING(RADEON_READ(RADEON_CRTC2_OFFSET_CNTL) |
+		 RADEON_CRTC_OFFSET_FLIP_CNTL);
 	ADVANCE_RING();
 
 	dev_priv->page_flipping = 1;
@@ -1595,65 +2024,65 @@ static int radeon_do_init_pageflip( drm_device_t *dev )
 	return 0;
 }
 
-/* Called whenever a client dies, from DRM(release).
+/* Called whenever a client dies, from drm_release.
  * NOTE:  Lock isn't necessarily held when this is called!
  */
-int radeon_do_cleanup_pageflip( drm_device_t *dev )
+static int radeon_do_cleanup_pageflip(drm_device_t * dev)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
 	if (dev_priv->current_page != 0)
-		radeon_cp_dispatch_flip( dev );
+		radeon_cp_dispatch_flip(dev);
 
 	dev_priv->page_flipping = 0;
 	return 0;
 }
 
 /* Swapping and flipping are different operations, need different ioctls.
- * They can & should be intermixed to support multiple 3d windows.  
+ * They can & should be intermixed to support multiple 3d windows.
  */
-int radeon_cp_flip( DRM_IOCTL_ARGS )
+static int radeon_cp_flip(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	if (!dev_priv->page_flipping) 
-		radeon_do_init_pageflip( dev );
-		
-	radeon_cp_dispatch_flip( dev );
+	if (!dev_priv->page_flipping)
+		radeon_do_init_pageflip(dev);
+
+	radeon_cp_dispatch_flip(dev);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int radeon_cp_swap( DRM_IOCTL_ARGS )
+static int radeon_cp_swap(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_sarea_t *sarea_priv = dev_priv->sarea_priv;
-	DRM_DEBUG( "\n" );
+	DRM_DEBUG("\n");
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	if ( sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS )
+	if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
 		sarea_priv->nbox = RADEON_NR_SAREA_CLIPRECTS;
 
-	radeon_cp_dispatch_swap( dev );
+	radeon_cp_dispatch_swap(dev);
 	dev_priv->sarea_priv->ctx_owner = 0;
 
 	COMMIT_RING();
 	return 0;
 }
 
-int radeon_cp_vertex( DRM_IOCTL_ARGS )
+static int radeon_cp_vertex(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1664,61 +2093,59 @@ int radeon_cp_vertex( DRM_IOCTL_ARGS )
 	drm_radeon_vertex_t vertex;
 	drm_radeon_tcl_prim_t prim;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 	sarea_priv = dev_priv->sarea_priv;
 
-	DRM_GET_PRIV_WITH_RETURN( filp_priv, filp );
+	DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex_t *)data,
-			     sizeof(vertex) );
+	DRM_COPY_FROM_USER_IOCTL(vertex, (drm_radeon_vertex_t __user *) data,
+				 sizeof(vertex));
 
-	DRM_DEBUG( "pid=%d index=%d count=%d discard=%d\n",
-		   DRM_CURRENTPID,
-		   vertex.idx, vertex.count, vertex.discard );
+	DRM_DEBUG("pid=%d index=%d count=%d discard=%d\n",
+		  DRM_CURRENTPID, vertex.idx, vertex.count, vertex.discard);
 
-	if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   vertex.idx, dma->buf_count - 1 );
+	if (vertex.idx < 0 || vertex.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  vertex.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
-	if ( vertex.prim < 0 ||
-	     vertex.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) {
-		DRM_ERROR( "buffer prim %d\n", vertex.prim );
+	if (vertex.prim < 0 || vertex.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST) {
+		DRM_ERROR("buffer prim %d\n", vertex.prim);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf = dma->buflist[vertex.idx];
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", vertex.idx);
 		return DRM_ERR(EINVAL);
 	}
 
 	/* Build up a prim_t record:
 	 */
 	if (vertex.count) {
-		buf->used = vertex.count; /* not used? */
-
-		if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) {
-			if ( radeon_emit_state( dev_priv, filp_priv,
-						&sarea_priv->context_state,
-						sarea_priv->tex_state,
-						sarea_priv->dirty ) ) {
-				DRM_ERROR( "radeon_emit_state failed\n" );
-				return DRM_ERR( EINVAL );
+		buf->used = vertex.count;	/* not used? */
+
+		if (sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS) {
+			if (radeon_emit_state(dev_priv, filp_priv,
+					      &sarea_priv->context_state,
+					      sarea_priv->tex_state,
+					      sarea_priv->dirty)) {
+				DRM_ERROR("radeon_emit_state failed\n");
+				return DRM_ERR(EINVAL);
 			}
 
 			sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES |
@@ -1728,23 +2155,23 @@ int radeon_cp_vertex( DRM_IOCTL_ARGS )
 		}
 
 		prim.start = 0;
-		prim.finish = vertex.count; /* unused */
+		prim.finish = vertex.count;	/* unused */
 		prim.prim = vertex.prim;
 		prim.numverts = vertex.count;
 		prim.vc_format = dev_priv->sarea_priv->vc_format;
-		
-		radeon_cp_dispatch_vertex( dev, buf, &prim );
+
+		radeon_cp_dispatch_vertex(dev, buf, &prim);
 	}
 
 	if (vertex.discard) {
-		radeon_cp_discard_buffer( dev, buf );
+		radeon_cp_discard_buffer(dev, buf);
 	}
 
 	COMMIT_RING();
 	return 0;
 }
 
-int radeon_cp_indices( DRM_IOCTL_ARGS )
+static int radeon_cp_indices(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1756,70 +2183,68 @@ int radeon_cp_indices( DRM_IOCTL_ARGS )
 	drm_radeon_tcl_prim_t prim;
 	int count;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 	sarea_priv = dev_priv->sarea_priv;
 
-	DRM_GET_PRIV_WITH_RETURN( filp_priv, filp );
+	DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( elts, (drm_radeon_indices_t *)data,
-			     sizeof(elts) );
+	DRM_COPY_FROM_USER_IOCTL(elts, (drm_radeon_indices_t __user *) data,
+				 sizeof(elts));
 
-	DRM_DEBUG( "pid=%d index=%d start=%d end=%d discard=%d\n",
-		   DRM_CURRENTPID,
-		   elts.idx, elts.start, elts.end, elts.discard );
+	DRM_DEBUG("pid=%d index=%d start=%d end=%d discard=%d\n",
+		  DRM_CURRENTPID, elts.idx, elts.start, elts.end, elts.discard);
 
-	if ( elts.idx < 0 || elts.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   elts.idx, dma->buf_count - 1 );
+	if (elts.idx < 0 || elts.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  elts.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
-	if ( elts.prim < 0 ||
-	     elts.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST ) {
-		DRM_ERROR( "buffer prim %d\n", elts.prim );
+	if (elts.prim < 0 || elts.prim > RADEON_PRIM_TYPE_3VRT_LINE_LIST) {
+		DRM_ERROR("buffer prim %d\n", elts.prim);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf = dma->buflist[elts.idx];
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", elts.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", elts.idx);
 		return DRM_ERR(EINVAL);
 	}
 
 	count = (elts.end - elts.start) / sizeof(u16);
 	elts.start -= RADEON_INDEX_PRIM_OFFSET;
 
-	if ( elts.start & 0x7 ) {
-		DRM_ERROR( "misaligned buffer 0x%x\n", elts.start );
+	if (elts.start & 0x7) {
+		DRM_ERROR("misaligned buffer 0x%x\n", elts.start);
 		return DRM_ERR(EINVAL);
 	}
-	if ( elts.start < buf->used ) {
-		DRM_ERROR( "no header 0x%x - 0x%x\n", elts.start, buf->used );
+	if (elts.start < buf->used) {
+		DRM_ERROR("no header 0x%x - 0x%x\n", elts.start, buf->used);
 		return DRM_ERR(EINVAL);
 	}
 
 	buf->used = elts.end;
 
-	if ( sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS ) {
-		if ( radeon_emit_state( dev_priv, filp_priv,
-					&sarea_priv->context_state,
-					sarea_priv->tex_state,
-					sarea_priv->dirty ) ) {
-			DRM_ERROR( "radeon_emit_state failed\n" );
-			return DRM_ERR( EINVAL );
+	if (sarea_priv->dirty & ~RADEON_UPLOAD_CLIPRECTS) {
+		if (radeon_emit_state(dev_priv, filp_priv,
+				      &sarea_priv->context_state,
+				      sarea_priv->tex_state,
+				      sarea_priv->dirty)) {
+			DRM_ERROR("radeon_emit_state failed\n");
+			return DRM_ERR(EINVAL);
 		}
 
 		sarea_priv->dirty &= ~(RADEON_UPLOAD_TEX0IMAGES |
@@ -1828,26 +2253,25 @@ int radeon_cp_indices( DRM_IOCTL_ARGS )
 				       RADEON_REQUIRE_QUIESCENCE);
 	}
 
-
 	/* Build up a prim_t record:
 	 */
 	prim.start = elts.start;
-	prim.finish = elts.end; 
+	prim.finish = elts.end;
 	prim.prim = elts.prim;
 	prim.offset = 0;	/* offset from start of dma buffers */
-	prim.numverts = RADEON_MAX_VB_VERTS; /* duh */
+	prim.numverts = RADEON_MAX_VB_VERTS;	/* duh */
 	prim.vc_format = dev_priv->sarea_priv->vc_format;
-	
-	radeon_cp_dispatch_indices( dev, buf, &prim );
+
+	radeon_cp_dispatch_indices(dev, buf, &prim);
 	if (elts.discard) {
-		radeon_cp_discard_buffer( dev, buf );
+		radeon_cp_discard_buffer(dev, buf);
 	}
 
 	COMMIT_RING();
 	return 0;
 }
 
-int radeon_cp_texture( DRM_IOCTL_ARGS )
+static int radeon_cp_texture(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1855,53 +2279,54 @@ int radeon_cp_texture( DRM_IOCTL_ARGS )
 	drm_radeon_tex_image_t image;
 	int ret;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( tex, (drm_radeon_texture_t *)data, sizeof(tex) );
+	DRM_COPY_FROM_USER_IOCTL(tex, (drm_radeon_texture_t __user *) data,
+				 sizeof(tex));
 
-	if ( tex.image == NULL ) {
-		DRM_ERROR( "null texture image!\n" );
+	if (tex.image == NULL) {
+		DRM_ERROR("null texture image!\n");
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( DRM_COPY_FROM_USER( &image,
-			     (drm_radeon_tex_image_t *)tex.image,
-			     sizeof(image) ) )
+	if (DRM_COPY_FROM_USER(&image,
+			       (drm_radeon_tex_image_t __user *) tex.image,
+			       sizeof(image)))
 		return DRM_ERR(EFAULT);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
-	ret = radeon_cp_dispatch_texture( filp, dev, &tex, &image );
+	ret = radeon_cp_dispatch_texture(filp, dev, &tex, &image);
 
 	COMMIT_RING();
 	return ret;
 }
 
-int radeon_cp_stipple( DRM_IOCTL_ARGS )
+static int radeon_cp_stipple(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_stipple_t stipple;
 	u32 mask[32];
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( stipple, (drm_radeon_stipple_t *)data,
-			     sizeof(stipple) );
+	DRM_COPY_FROM_USER_IOCTL(stipple, (drm_radeon_stipple_t __user *) data,
+				 sizeof(stipple));
 
-	if ( DRM_COPY_FROM_USER( &mask, stipple.mask, 32 * sizeof(u32) ) )
+	if (DRM_COPY_FROM_USER(&mask, stipple.mask, 32 * sizeof(u32)))
 		return DRM_ERR(EFAULT);
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
 
-	radeon_cp_dispatch_stipple( dev, mask );
+	radeon_cp_dispatch_stipple(dev, mask);
 
 	COMMIT_RING();
 	return 0;
 }
 
-int radeon_cp_indirect( DRM_IOCTL_ARGS )
+static int radeon_cp_indirect(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1910,53 +2335,53 @@ int radeon_cp_indirect( DRM_IOCTL_ARGS )
 	drm_radeon_indirect_t indirect;
 	RING_LOCALS;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( indirect, (drm_radeon_indirect_t *)data,
-			     sizeof(indirect) );
+	DRM_COPY_FROM_USER_IOCTL(indirect,
+				 (drm_radeon_indirect_t __user *) data,
+				 sizeof(indirect));
 
-	DRM_DEBUG( "indirect: idx=%d s=%d e=%d d=%d\n",
-		   indirect.idx, indirect.start,
-		   indirect.end, indirect.discard );
+	DRM_DEBUG("indirect: idx=%d s=%d e=%d d=%d\n",
+		  indirect.idx, indirect.start, indirect.end, indirect.discard);
 
-	if ( indirect.idx < 0 || indirect.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   indirect.idx, dma->buf_count - 1 );
+	if (indirect.idx < 0 || indirect.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  indirect.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
 
 	buf = dma->buflist[indirect.idx];
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", indirect.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", indirect.idx);
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( indirect.start < buf->used ) {
-		DRM_ERROR( "reusing indirect: start=0x%x actual=0x%x\n",
-			   indirect.start, buf->used );
+	if (indirect.start < buf->used) {
+		DRM_ERROR("reusing indirect: start=0x%x actual=0x%x\n",
+			  indirect.start, buf->used);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf->used = indirect.end;
 
 	/* Wait for the 3D stream to idle before the indirect buffer
 	 * containing 2D acceleration commands is processed.
 	 */
-	BEGIN_RING( 2 );
+	BEGIN_RING(2);
 
 	RADEON_WAIT_UNTIL_3D_IDLE();
 
@@ -1966,17 +2391,16 @@ int radeon_cp_indirect( DRM_IOCTL_ARGS )
 	 * X server.  This is insecure and is thus only available to
 	 * privileged clients.
 	 */
-	radeon_cp_dispatch_indirect( dev, buf, indirect.start, indirect.end );
+	radeon_cp_dispatch_indirect(dev, buf, indirect.start, indirect.end);
 	if (indirect.discard) {
-		radeon_cp_discard_buffer( dev, buf );
+		radeon_cp_discard_buffer(dev, buf);
 	}
 
-
 	COMMIT_RING();
 	return 0;
 }
 
-int radeon_cp_vertex2( DRM_IOCTL_ARGS )
+static int radeon_cp_vertex2(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
@@ -1988,66 +2412,65 @@ int radeon_cp_vertex2( DRM_IOCTL_ARGS )
 	int i;
 	unsigned char laststate;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 	sarea_priv = dev_priv->sarea_priv;
 
-	DRM_GET_PRIV_WITH_RETURN( filp_priv, filp );
+	DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( vertex, (drm_radeon_vertex2_t *)data,
-			     sizeof(vertex) );
+	DRM_COPY_FROM_USER_IOCTL(vertex, (drm_radeon_vertex2_t __user *) data,
+				 sizeof(vertex));
 
-	DRM_DEBUG( "pid=%d index=%d discard=%d\n",
-		   DRM_CURRENTPID,
-		   vertex.idx, vertex.discard );
+	DRM_DEBUG("pid=%d index=%d discard=%d\n",
+		  DRM_CURRENTPID, vertex.idx, vertex.discard);
 
-	if ( vertex.idx < 0 || vertex.idx >= dma->buf_count ) {
-		DRM_ERROR( "buffer index %d (of %d max)\n",
-			   vertex.idx, dma->buf_count - 1 );
+	if (vertex.idx < 0 || vertex.idx >= dma->buf_count) {
+		DRM_ERROR("buffer index %d (of %d max)\n",
+			  vertex.idx, dma->buf_count - 1);
 		return DRM_ERR(EINVAL);
 	}
 
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
 	buf = dma->buflist[vertex.idx];
 
-	if ( buf->filp != filp ) {
-		DRM_ERROR( "process %d using buffer owned by %p\n",
-			   DRM_CURRENTPID, buf->filp );
+	if (buf->filp != filp) {
+		DRM_ERROR("process %d using buffer owned by %p\n",
+			  DRM_CURRENTPID, buf->filp);
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( buf->pending ) {
-		DRM_ERROR( "sending pending buffer %d\n", vertex.idx );
+	if (buf->pending) {
+		DRM_ERROR("sending pending buffer %d\n", vertex.idx);
 		return DRM_ERR(EINVAL);
 	}
-	
+
 	if (sarea_priv->nbox > RADEON_NR_SAREA_CLIPRECTS)
 		return DRM_ERR(EINVAL);
 
-	for (laststate = 0xff, i = 0 ; i < vertex.nr_prims ; i++) {
+	for (laststate = 0xff, i = 0; i < vertex.nr_prims; i++) {
 		drm_radeon_prim_t prim;
 		drm_radeon_tcl_prim_t tclprim;
-		
-		if ( DRM_COPY_FROM_USER( &prim, &vertex.prim[i], sizeof(prim) ) )
+
+		if (DRM_COPY_FROM_USER(&prim, &vertex.prim[i], sizeof(prim)))
 			return DRM_ERR(EFAULT);
-		
-		if ( prim.stateidx != laststate ) {
-			drm_radeon_state_t state;			       
-				
-			if ( DRM_COPY_FROM_USER( &state, 
-					     &vertex.state[prim.stateidx], 
-					     sizeof(state) ) )
+
+		if (prim.stateidx != laststate) {
+			drm_radeon_state_t state;
+
+			if (DRM_COPY_FROM_USER(&state,
+					       &vertex.state[prim.stateidx],
+					       sizeof(state)))
 				return DRM_ERR(EFAULT);
 
-			if ( radeon_emit_state2( dev_priv, filp_priv, &state ) ) {
-				DRM_ERROR( "radeon_emit_state2 failed\n" );
-				return DRM_ERR( EINVAL );
+			if (radeon_emit_state2(dev_priv, filp_priv, &state)) {
+				DRM_ERROR("radeon_emit_state2 failed\n");
+				return DRM_ERR(EINVAL);
 			}
 
 			laststate = prim.stateidx;
@@ -2058,42 +2481,40 @@ int radeon_cp_vertex2( DRM_IOCTL_ARGS )
 		tclprim.prim = prim.prim;
 		tclprim.vc_format = prim.vc_format;
 
-		if ( prim.prim & RADEON_PRIM_WALK_IND ) {
+		if (prim.prim & RADEON_PRIM_WALK_IND) {
 			tclprim.offset = prim.numverts * 64;
-			tclprim.numverts = RADEON_MAX_VB_VERTS; /* duh */
+			tclprim.numverts = RADEON_MAX_VB_VERTS;	/* duh */
 
-			radeon_cp_dispatch_indices( dev, buf, &tclprim );
+			radeon_cp_dispatch_indices(dev, buf, &tclprim);
 		} else {
 			tclprim.numverts = prim.numverts;
-			tclprim.offset = 0; /* not used */
+			tclprim.offset = 0;	/* not used */
 
-			radeon_cp_dispatch_vertex( dev, buf, &tclprim );
+			radeon_cp_dispatch_vertex(dev, buf, &tclprim);
 		}
-		
+
 		if (sarea_priv->nbox == 1)
 			sarea_priv->nbox = 0;
 	}
 
-	if ( vertex.discard ) {
-		radeon_cp_discard_buffer( dev, buf );
+	if (vertex.discard) {
+		radeon_cp_discard_buffer(dev, buf);
 	}
 
 	COMMIT_RING();
 	return 0;
 }
 
-
-static int radeon_emit_packets( 
-	drm_radeon_private_t *dev_priv,
-	drm_file_t *filp_priv,
-	drm_radeon_cmd_header_t header,
-	drm_radeon_cmd_buffer_t *cmdbuf )
+static int radeon_emit_packets(drm_radeon_private_t * dev_priv,
+			       drm_file_t * filp_priv,
+			       drm_radeon_cmd_header_t header,
+			       drm_radeon_cmd_buffer_t * cmdbuf)
 {
 	int id = (int)header.packet.packet_id;
 	int sz, reg;
 	int *data = (int *)cmdbuf->buf;
 	RING_LOCALS;
-   
+
 	if (id >= RADEON_MAX_STATE_PACKETS)
 		return DRM_ERR(EINVAL);
 
@@ -2101,18 +2522,18 @@ static int radeon_emit_packets(
 	reg = packet[id].start;
 
 	if (sz * sizeof(int) > cmdbuf->bufsz) {
-		DRM_ERROR( "Packet size provided larger than data provided\n" );
+		DRM_ERROR("Packet size provided larger than data provided\n");
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( radeon_check_and_fixup_packets( dev_priv, filp_priv, id, data ) ) {
-		DRM_ERROR( "Packet verification failed\n" );
-		return DRM_ERR( EINVAL );
+	if (radeon_check_and_fixup_packets(dev_priv, filp_priv, id, data)) {
+		DRM_ERROR("Packet verification failed\n");
+		return DRM_ERR(EINVAL);
 	}
 
-	BEGIN_RING(sz+1);
-	OUT_RING( CP_PACKET0( reg, (sz-1) ) );
-	OUT_RING_USER_TABLE( data, sz );
+	BEGIN_RING(sz + 1);
+	OUT_RING(CP_PACKET0(reg, (sz - 1)));
+	OUT_RING_TABLE(data, sz);
 	ADVANCE_RING();
 
 	cmdbuf->buf += sz * sizeof(int);
@@ -2120,22 +2541,20 @@ static int radeon_emit_packets(
 	return 0;
 }
 
-static __inline__ int radeon_emit_scalars( 
-	drm_radeon_private_t *dev_priv,
-	drm_radeon_cmd_header_t header,
-	drm_radeon_cmd_buffer_t *cmdbuf )
+static __inline__ int radeon_emit_scalars(drm_radeon_private_t * dev_priv,
+					  drm_radeon_cmd_header_t header,
+					  drm_radeon_cmd_buffer_t * cmdbuf)
 {
 	int sz = header.scalars.count;
-	int *data = (int *)cmdbuf->buf;
 	int start = header.scalars.offset;
 	int stride = header.scalars.stride;
 	RING_LOCALS;
 
-	BEGIN_RING( 3+sz );
-	OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) );
-	OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
-	OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) );
-	OUT_RING_USER_TABLE( data, sz );
+	BEGIN_RING(3 + sz);
+	OUT_RING(CP_PACKET0(RADEON_SE_TCL_SCALAR_INDX_REG, 0));
+	OUT_RING(start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
+	OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_SCALAR_DATA_REG, sz - 1));
+	OUT_RING_TABLE(cmdbuf->buf, sz);
 	ADVANCE_RING();
 	cmdbuf->buf += sz * sizeof(int);
 	cmdbuf->bufsz -= sz * sizeof(int);
@@ -2144,44 +2563,40 @@ static __inline__ int radeon_emit_scalars(
 
 /* God this is ugly
  */
-static __inline__ int radeon_emit_scalars2( 
-	drm_radeon_private_t *dev_priv,
-	drm_radeon_cmd_header_t header,
-	drm_radeon_cmd_buffer_t *cmdbuf )
+static __inline__ int radeon_emit_scalars2(drm_radeon_private_t * dev_priv,
+					   drm_radeon_cmd_header_t header,
+					   drm_radeon_cmd_buffer_t * cmdbuf)
 {
 	int sz = header.scalars.count;
-	int *data = (int *)cmdbuf->buf;
 	int start = ((unsigned int)header.scalars.offset) + 0x100;
 	int stride = header.scalars.stride;
 	RING_LOCALS;
 
-	BEGIN_RING( 3+sz );
-	OUT_RING( CP_PACKET0( RADEON_SE_TCL_SCALAR_INDX_REG, 0 ) );
-	OUT_RING( start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
-	OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_SCALAR_DATA_REG, sz-1 ) );
-	OUT_RING_USER_TABLE( data, sz );
+	BEGIN_RING(3 + sz);
+	OUT_RING(CP_PACKET0(RADEON_SE_TCL_SCALAR_INDX_REG, 0));
+	OUT_RING(start | (stride << RADEON_SCAL_INDX_DWORD_STRIDE_SHIFT));
+	OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_SCALAR_DATA_REG, sz - 1));
+	OUT_RING_TABLE(cmdbuf->buf, sz);
 	ADVANCE_RING();
 	cmdbuf->buf += sz * sizeof(int);
 	cmdbuf->bufsz -= sz * sizeof(int);
 	return 0;
 }
 
-static __inline__ int radeon_emit_vectors( 
-	drm_radeon_private_t *dev_priv,
-	drm_radeon_cmd_header_t header,
-	drm_radeon_cmd_buffer_t *cmdbuf )
+static __inline__ int radeon_emit_vectors(drm_radeon_private_t * dev_priv,
+					  drm_radeon_cmd_header_t header,
+					  drm_radeon_cmd_buffer_t * cmdbuf)
 {
 	int sz = header.vectors.count;
-	int *data = (int *)cmdbuf->buf;
 	int start = header.vectors.offset;
 	int stride = header.vectors.stride;
 	RING_LOCALS;
 
-	BEGIN_RING( 3+sz );
-	OUT_RING( CP_PACKET0( RADEON_SE_TCL_VECTOR_INDX_REG, 0 ) );
-	OUT_RING( start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
-	OUT_RING( CP_PACKET0_TABLE( RADEON_SE_TCL_VECTOR_DATA_REG, (sz-1) ) );
-	OUT_RING_USER_TABLE( data, sz );
+	BEGIN_RING(3 + sz);
+	OUT_RING(CP_PACKET0(RADEON_SE_TCL_VECTOR_INDX_REG, 0));
+	OUT_RING(start | (stride << RADEON_VEC_INDX_OCTWORD_STRIDE_SHIFT));
+	OUT_RING(CP_PACKET0_TABLE(RADEON_SE_TCL_VECTOR_DATA_REG, (sz - 1)));
+	OUT_RING_TABLE(cmdbuf->buf, sz);
 	ADVANCE_RING();
 
 	cmdbuf->buf += sz * sizeof(int);
@@ -2189,26 +2604,25 @@ static __inline__ int radeon_emit_vectors(
 	return 0;
 }
 
-
-static int radeon_emit_packet3( drm_device_t *dev,
-				drm_file_t *filp_priv,
-				drm_radeon_cmd_buffer_t *cmdbuf )
+static int radeon_emit_packet3(drm_device_t * dev,
+			       drm_file_t * filp_priv,
+			       drm_radeon_cmd_buffer_t * cmdbuf)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	unsigned int cmdsz;
-	int *cmd = (int *)cmdbuf->buf, ret;
+	int ret;
 	RING_LOCALS;
 
 	DRM_DEBUG("\n");
 
-	if ( ( ret = radeon_check_and_fixup_packet3( dev_priv, filp_priv,
-						     cmdbuf, &cmdsz ) ) ) {
-		DRM_ERROR( "Packet verification failed\n" );
+	if ((ret = radeon_check_and_fixup_packet3(dev_priv, filp_priv,
+						  cmdbuf, &cmdsz))) {
+		DRM_ERROR("Packet verification failed\n");
 		return ret;
 	}
 
-	BEGIN_RING( cmdsz );
-	OUT_RING_USER_TABLE( cmd, cmdsz );
+	BEGIN_RING(cmdsz);
+	OUT_RING_TABLE(cmdbuf->buf, cmdsz);
 	ADVANCE_RING();
 
 	cmdbuf->buf += cmdsz * 4;
@@ -2216,25 +2630,24 @@ static int radeon_emit_packet3( drm_device_t *dev,
 	return 0;
 }
 
-
-static int radeon_emit_packet3_cliprect( drm_device_t *dev,
-					 drm_file_t *filp_priv,
-					 drm_radeon_cmd_buffer_t *cmdbuf,
-					 int orig_nbox )
+static int radeon_emit_packet3_cliprect(drm_device_t * dev,
+					drm_file_t * filp_priv,
+					drm_radeon_cmd_buffer_t * cmdbuf,
+					int orig_nbox)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_clip_rect_t box;
 	unsigned int cmdsz;
-	int *cmd = (int *)cmdbuf->buf, ret;
-	drm_clip_rect_t *boxes = cmdbuf->boxes;
+	int ret;
+	drm_clip_rect_t __user *boxes = cmdbuf->boxes;
 	int i = 0;
 	RING_LOCALS;
 
 	DRM_DEBUG("\n");
 
-	if ( ( ret = radeon_check_and_fixup_packet3( dev_priv, filp_priv,
-						     cmdbuf, &cmdsz ) ) ) {
-		DRM_ERROR( "Packet verification failed\n" );
+	if ((ret = radeon_check_and_fixup_packet3(dev_priv, filp_priv,
+						  cmdbuf, &cmdsz))) {
+		DRM_ERROR("Packet verification failed\n");
 		return ret;
 	}
 
@@ -2242,8 +2655,8 @@ static int radeon_emit_packet3_cliprect( drm_device_t *dev,
 		goto out;
 
 	do {
-		if ( i < cmdbuf->nbox ) {
-			if (DRM_COPY_FROM_USER_UNCHECKED( &box, &boxes[i], sizeof(box) ))
+		if (i < cmdbuf->nbox) {
+			if (DRM_COPY_FROM_USER(&box, &boxes[i], sizeof(box)))
 				return DRM_ERR(EFAULT);
 			/* FIXME The second and subsequent times round
 			 * this loop, send a WAIT_UNTIL_3D_IDLE before
@@ -2257,30 +2670,29 @@ static int radeon_emit_packet3_cliprect( drm_device_t *dev,
 			 * the correct place to fix it but this works
 			 * around it until I can figure that out - Tim
 			 * Smith */
-			if ( i ) {
-				BEGIN_RING( 2 );
+			if (i) {
+				BEGIN_RING(2);
 				RADEON_WAIT_UNTIL_3D_IDLE();
 				ADVANCE_RING();
 			}
-			radeon_emit_clip_rect( dev_priv, &box );
+			radeon_emit_clip_rect(dev_priv, &box);
 		}
-		
-		BEGIN_RING( cmdsz );
-		OUT_RING_USER_TABLE( cmd, cmdsz );
+
+		BEGIN_RING(cmdsz);
+		OUT_RING_TABLE(cmdbuf->buf, cmdsz);
 		ADVANCE_RING();
 
-	} while ( ++i < cmdbuf->nbox );
- 	if (cmdbuf->nbox == 1)
+	} while (++i < cmdbuf->nbox);
+	if (cmdbuf->nbox == 1)
 		cmdbuf->nbox = 0;
 
- out:
+      out:
 	cmdbuf->buf += cmdsz * 4;
 	cmdbuf->bufsz -= cmdsz * 4;
 	return 0;
 }
 
-
-static int radeon_emit_wait( drm_device_t *dev, int flags )
+static int radeon_emit_wait(drm_device_t * dev, int flags)
 {
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	RING_LOCALS;
@@ -2288,18 +2700,18 @@ static int radeon_emit_wait( drm_device_t *dev, int flags )
 	DRM_DEBUG("%s: %x\n", __FUNCTION__, flags);
 	switch (flags) {
 	case RADEON_WAIT_2D:
-		BEGIN_RING( 2 );
-		RADEON_WAIT_UNTIL_2D_IDLE(); 
+		BEGIN_RING(2);
+		RADEON_WAIT_UNTIL_2D_IDLE();
 		ADVANCE_RING();
 		break;
 	case RADEON_WAIT_3D:
-		BEGIN_RING( 2 );
-		RADEON_WAIT_UNTIL_3D_IDLE(); 
+		BEGIN_RING(2);
+		RADEON_WAIT_UNTIL_3D_IDLE();
 		ADVANCE_RING();
 		break;
-	case RADEON_WAIT_2D|RADEON_WAIT_3D:
-		BEGIN_RING( 2 );
-		RADEON_WAIT_UNTIL_IDLE(); 
+	case RADEON_WAIT_2D | RADEON_WAIT_3D:
+		BEGIN_RING(2);
+		RADEON_WAIT_UNTIL_IDLE();
 		ADVANCE_RING();
 		break;
 	default:
@@ -2309,176 +2721,190 @@ static int radeon_emit_wait( drm_device_t *dev, int flags )
 	return 0;
 }
 
-int radeon_cp_cmdbuf( DRM_IOCTL_ARGS )
+static int radeon_cp_cmdbuf(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_file_t *filp_priv;
 	drm_device_dma_t *dma = dev->dma;
-	drm_buf_t *buf = 0;
+	drm_buf_t *buf = NULL;
 	int idx;
 	drm_radeon_cmd_buffer_t cmdbuf;
 	drm_radeon_cmd_header_t header;
-	int orig_nbox;
+	int orig_nbox, orig_bufsz;
+	char *kbuf = NULL;
 
-	LOCK_TEST_WITH_RETURN( dev, filp );
+	LOCK_TEST_WITH_RETURN(dev, filp);
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_GET_PRIV_WITH_RETURN( filp_priv, filp );
-
-	DRM_COPY_FROM_USER_IOCTL( cmdbuf, (drm_radeon_cmd_buffer_t *)data,
-			     sizeof(cmdbuf) );
-
-	RING_SPACE_TEST_WITH_RETURN( dev_priv );
-	VB_AGE_TEST_WITH_RETURN( dev_priv );
+	DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
 
+	DRM_COPY_FROM_USER_IOCTL(cmdbuf,
+				 (drm_radeon_cmd_buffer_t __user *) data,
+				 sizeof(cmdbuf));
 
-	if (DRM_VERIFYAREA_READ( cmdbuf.buf, cmdbuf.bufsz ))
-		return DRM_ERR(EFAULT);
-
-	if (cmdbuf.nbox &&
-	    DRM_VERIFYAREA_READ(cmdbuf.boxes, 
-			 cmdbuf.nbox * sizeof(drm_clip_rect_t)))
-		return DRM_ERR(EFAULT);
+	RING_SPACE_TEST_WITH_RETURN(dev_priv);
+	VB_AGE_TEST_WITH_RETURN(dev_priv);
 
-	orig_nbox = cmdbuf.nbox;
+	if (cmdbuf.bufsz > 64 * 1024 || cmdbuf.bufsz < 0) {
+		return DRM_ERR(EINVAL);
+	}
 
-	while ( cmdbuf.bufsz >= sizeof(header) ) {
-		
-		if (DRM_GET_USER_UNCHECKED( header.i, (int *)cmdbuf.buf )) {
-			DRM_ERROR("__get_user %p\n", cmdbuf.buf);
+	/* Allocate an in-kernel area and copy in the cmdbuf.  Do this to avoid
+	 * races between checking values and using those values in other code,
+	 * and simply to avoid a lot of function calls to copy in data.
+	 */
+	orig_bufsz = cmdbuf.bufsz;
+	if (orig_bufsz != 0) {
+		kbuf = drm_alloc(cmdbuf.bufsz, DRM_MEM_DRIVER);
+		if (kbuf == NULL)
+			return DRM_ERR(ENOMEM);
+		if (DRM_COPY_FROM_USER(kbuf, cmdbuf.buf, cmdbuf.bufsz)) {
+			drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
 			return DRM_ERR(EFAULT);
 		}
+		cmdbuf.buf = kbuf;
+	}
+
+	orig_nbox = cmdbuf.nbox;
 
+	while (cmdbuf.bufsz >= sizeof(header)) {
+		header.i = *(int *)cmdbuf.buf;
 		cmdbuf.buf += sizeof(header);
 		cmdbuf.bufsz -= sizeof(header);
 
 		switch (header.header.cmd_type) {
-		case RADEON_CMD_PACKET: 
+		case RADEON_CMD_PACKET:
 			DRM_DEBUG("RADEON_CMD_PACKET\n");
-			if (radeon_emit_packets( dev_priv, filp_priv, header, &cmdbuf )) {
+			if (radeon_emit_packets
+			    (dev_priv, filp_priv, header, &cmdbuf)) {
 				DRM_ERROR("radeon_emit_packets failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 
 		case RADEON_CMD_SCALARS:
 			DRM_DEBUG("RADEON_CMD_SCALARS\n");
-			if (radeon_emit_scalars( dev_priv, header, &cmdbuf )) {
+			if (radeon_emit_scalars(dev_priv, header, &cmdbuf)) {
 				DRM_ERROR("radeon_emit_scalars failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 
 		case RADEON_CMD_VECTORS:
 			DRM_DEBUG("RADEON_CMD_VECTORS\n");
-			if (radeon_emit_vectors( dev_priv, header, &cmdbuf )) {
+			if (radeon_emit_vectors(dev_priv, header, &cmdbuf)) {
 				DRM_ERROR("radeon_emit_vectors failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 
 		case RADEON_CMD_DMA_DISCARD:
 			DRM_DEBUG("RADEON_CMD_DMA_DISCARD\n");
 			idx = header.dma.buf_idx;
-			if ( idx < 0 || idx >= dma->buf_count ) {
-				DRM_ERROR( "buffer index %d (of %d max)\n",
-					   idx, dma->buf_count - 1 );
-				return DRM_ERR(EINVAL);
+			if (idx < 0 || idx >= dma->buf_count) {
+				DRM_ERROR("buffer index %d (of %d max)\n",
+					  idx, dma->buf_count - 1);
+				goto err;
 			}
 
 			buf = dma->buflist[idx];
-			if ( buf->filp != filp || buf->pending ) {
-				DRM_ERROR( "bad buffer %p %p %d\n",
-					   buf->filp, filp, buf->pending);
-				return DRM_ERR(EINVAL);
+			if (buf->filp != filp || buf->pending) {
+				DRM_ERROR("bad buffer %p %p %d\n",
+					  buf->filp, filp, buf->pending);
+				goto err;
 			}
 
-			radeon_cp_discard_buffer( dev, buf );
+			radeon_cp_discard_buffer(dev, buf);
 			break;
 
 		case RADEON_CMD_PACKET3:
 			DRM_DEBUG("RADEON_CMD_PACKET3\n");
-			if (radeon_emit_packet3( dev, filp_priv, &cmdbuf )) {
+			if (radeon_emit_packet3(dev, filp_priv, &cmdbuf)) {
 				DRM_ERROR("radeon_emit_packet3 failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 
 		case RADEON_CMD_PACKET3_CLIP:
 			DRM_DEBUG("RADEON_CMD_PACKET3_CLIP\n");
-			if (radeon_emit_packet3_cliprect( dev, filp_priv, &cmdbuf, orig_nbox )) {
+			if (radeon_emit_packet3_cliprect
+			    (dev, filp_priv, &cmdbuf, orig_nbox)) {
 				DRM_ERROR("radeon_emit_packet3_clip failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 
 		case RADEON_CMD_SCALARS2:
 			DRM_DEBUG("RADEON_CMD_SCALARS2\n");
-			if (radeon_emit_scalars2( dev_priv, header, &cmdbuf )) {
+			if (radeon_emit_scalars2(dev_priv, header, &cmdbuf)) {
 				DRM_ERROR("radeon_emit_scalars2 failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 
 		case RADEON_CMD_WAIT:
 			DRM_DEBUG("RADEON_CMD_WAIT\n");
-			if (radeon_emit_wait( dev, header.wait.flags )) {
+			if (radeon_emit_wait(dev, header.wait.flags)) {
 				DRM_ERROR("radeon_emit_wait failed\n");
-				return DRM_ERR(EINVAL);
+				goto err;
 			}
 			break;
 		default:
-			DRM_ERROR("bad cmd_type %d at %p\n", 
+			DRM_ERROR("bad cmd_type %d at %p\n",
 				  header.header.cmd_type,
 				  cmdbuf.buf - sizeof(header));
-			return DRM_ERR(EINVAL);
+			goto err;
 		}
 	}
 
-
+	if (orig_bufsz != 0)
+		drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
 	DRM_DEBUG("DONE\n");
 	COMMIT_RING();
 	return 0;
-}
-
 
+err:
+	if (orig_bufsz != 0)
+		drm_free(kbuf, orig_bufsz, DRM_MEM_DRIVER);
+	return DRM_ERR(EINVAL);
+}
 
-int radeon_cp_getparam( DRM_IOCTL_ARGS )
+static int radeon_cp_getparam(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_radeon_getparam_t param;
 	int value;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
 		return DRM_ERR(EINVAL);
 	}
 
-	DRM_COPY_FROM_USER_IOCTL( param, (drm_radeon_getparam_t *)data,
-			     sizeof(param) );
+	DRM_COPY_FROM_USER_IOCTL(param, (drm_radeon_getparam_t __user *) data,
+				 sizeof(param));
 
-	DRM_DEBUG( "pid=%d\n", DRM_CURRENTPID );
+	DRM_DEBUG("pid=%d\n", DRM_CURRENTPID);
 
-	switch( param.param ) {
+	switch (param.param) {
 	case RADEON_PARAM_GART_BUFFER_OFFSET:
 		value = dev_priv->gart_buffers_offset;
 		break;
 	case RADEON_PARAM_LAST_FRAME:
 		dev_priv->stats.last_frame_reads++;
-		value = GET_SCRATCH( 0 );
+		value = GET_SCRATCH(0);
 		break;
 	case RADEON_PARAM_LAST_DISPATCH:
-		value = GET_SCRATCH( 1 );
+		value = GET_SCRATCH(1);
 		break;
 	case RADEON_PARAM_LAST_CLEAR:
 		dev_priv->stats.last_clear_reads++;
-		value = GET_SCRATCH( 2 );
+		value = GET_SCRATCH(2);
 		break;
 	case RADEON_PARAM_IRQ_NR:
 		value = dev->irq;
@@ -2493,19 +2919,19 @@ int radeon_cp_getparam( DRM_IOCTL_ARGS )
 		value = dev_priv->ring_rptr_offset;
 		break;
 #if BITS_PER_LONG == 32
-	/*
-	 * This ioctl() doesn't work on 64-bit platforms because hw_lock is a
-	 * pointer which can't fit into an int-sized variable.  According to
-	 * Michel Dänzer, the ioctl() is only used on embedded platforms, so
-	 * not supporting it shouldn't be a problem.  If the same functionality
-	 * is needed on 64-bit platforms, a new ioctl() would have to be added,
-	 * so backwards-compatibility for the embedded platforms can be
-	 * maintained.  --davidm 4-Feb-2004.
-	 */
+		/*
+		 * This ioctl() doesn't work on 64-bit platforms because hw_lock is a
+		 * pointer which can't fit into an int-sized variable.  According to
+		 * Michel Dänzer, the ioctl() is only used on embedded platforms, so
+		 * not supporting it shouldn't be a problem.  If the same functionality
+		 * is needed on 64-bit platforms, a new ioctl() would have to be added,
+		 * so backwards-compatibility for the embedded platforms can be
+		 * maintained.  --davidm 4-Feb-2004.
+		 */
 	case RADEON_PARAM_SAREA_HANDLE:
 		/* The lock is the first dword in the sarea. */
-		value = (long)dev->lock.hw_lock; 
-		break;	
+		value = (long)dev->lock.hw_lock;
+		break;
 #endif
 	case RADEON_PARAM_GART_TEX_HANDLE:
 		value = dev_priv->gart_textures_offset;
@@ -2514,38 +2940,142 @@ int radeon_cp_getparam( DRM_IOCTL_ARGS )
 		return DRM_ERR(EINVAL);
 	}
 
-	if ( DRM_COPY_TO_USER( param.value, &value, sizeof(&value) ) ) {
-		DRM_ERROR( "copy_to_user\n" );
+	if (DRM_COPY_TO_USER(param.value, &value, sizeof(int))) {
+		DRM_ERROR("copy_to_user\n");
 		return DRM_ERR(EFAULT);
 	}
-	
+
 	return 0;
 }
 
-int radeon_cp_setparam( DRM_IOCTL_ARGS ) {
+static int radeon_cp_setparam(DRM_IOCTL_ARGS)
+{
 	DRM_DEVICE;
 	drm_radeon_private_t *dev_priv = dev->dev_private;
 	drm_file_t *filp_priv;
 	drm_radeon_setparam_t sp;
+	struct drm_radeon_driver_file_fields *radeon_priv;
 
-	if ( !dev_priv ) {
-		DRM_ERROR( "%s called with no initialization\n", __FUNCTION__ );
-		return DRM_ERR( EINVAL );
+	if (!dev_priv) {
+		DRM_ERROR("%s called with no initialization\n", __FUNCTION__);
+		return DRM_ERR(EINVAL);
 	}
 
-	DRM_GET_PRIV_WITH_RETURN( filp_priv, filp );
+	DRM_GET_PRIV_WITH_RETURN(filp_priv, filp);
 
-	DRM_COPY_FROM_USER_IOCTL( sp, ( drm_radeon_setparam_t* )data,
-				  sizeof( sp ) );
+	DRM_COPY_FROM_USER_IOCTL(sp, (drm_radeon_setparam_t __user *) data,
+				 sizeof(sp));
 
-	switch( sp.param ) {
+	switch (sp.param) {
 	case RADEON_SETPARAM_FB_LOCATION:
-		filp_priv->radeon_fb_delta = dev_priv->fb_location - sp.value;
+		radeon_priv = filp_priv->driver_priv;
+		radeon_priv->radeon_fb_delta = dev_priv->fb_location - sp.value;
+		break;
+	case RADEON_SETPARAM_SWITCH_TILING:
+		if (sp.value == 0) {
+			DRM_DEBUG( "color tiling disabled\n" );
+			dev_priv->front_pitch_offset &= ~RADEON_DST_TILE_MACRO;
+			dev_priv->back_pitch_offset &= ~RADEON_DST_TILE_MACRO;
+			dev_priv->sarea_priv->tiling_enabled = 0;
+		}
+		else if (sp.value == 1) {
+			DRM_DEBUG( "color tiling enabled\n" );
+			dev_priv->front_pitch_offset |= RADEON_DST_TILE_MACRO;
+			dev_priv->back_pitch_offset |= RADEON_DST_TILE_MACRO;
+			dev_priv->sarea_priv->tiling_enabled = 1;
+		}
 		break;
 	default:
-		DRM_DEBUG( "Invalid parameter %d\n", sp.param );
-		return DRM_ERR( EINVAL );
+		DRM_DEBUG("Invalid parameter %d\n", sp.param);
+		return DRM_ERR(EINVAL);
+	}
+
+	return 0;
+}
+
+/* When a client dies:
+ *    - Check for and clean up flipped page state
+ *    - Free any alloced GART memory.
+ *    - Free any alloced radeon surfaces.
+ *
+ * DRM infrastructure takes care of reclaiming dma buffers.
+ */
+void radeon_driver_prerelease(drm_device_t * dev, DRMFILE filp)
+{
+	if (dev->dev_private) {
+		drm_radeon_private_t *dev_priv = dev->dev_private;
+		if (dev_priv->page_flipping) {
+			radeon_do_cleanup_pageflip(dev);
+		}
+		radeon_mem_release(filp, dev_priv->gart_heap);
+		radeon_mem_release(filp, dev_priv->fb_heap);
+		radeon_surfaces_release(filp, dev_priv);
 	}
+}
+
+void radeon_driver_pretakedown(drm_device_t * dev)
+{
+	radeon_do_release(dev);
+}
+
+int radeon_driver_open_helper(drm_device_t * dev, drm_file_t * filp_priv)
+{
+	drm_radeon_private_t *dev_priv = dev->dev_private;
+	struct drm_radeon_driver_file_fields *radeon_priv;
+
+	DRM_DEBUG("\n");
+	radeon_priv =
+	    (struct drm_radeon_driver_file_fields *)
+	    drm_alloc(sizeof(*radeon_priv), DRM_MEM_FILES);
+
+	if (!radeon_priv)
+		return -ENOMEM;
+
+	filp_priv->driver_priv = radeon_priv;
 
+	if (dev_priv)
+		radeon_priv->radeon_fb_delta = dev_priv->fb_location;
+	else
+		radeon_priv->radeon_fb_delta = 0;
 	return 0;
 }
+
+void radeon_driver_free_filp_priv(drm_device_t * dev, drm_file_t * filp_priv)
+{
+	struct drm_radeon_driver_file_fields *radeon_priv =
+	    filp_priv->driver_priv;
+
+	drm_free(radeon_priv, sizeof(*radeon_priv), DRM_MEM_FILES);
+}
+
+drm_ioctl_desc_t radeon_ioctls[] = {
+	[DRM_IOCTL_NR(DRM_RADEON_CP_INIT)] = {radeon_cp_init, 1, 1},
+	[DRM_IOCTL_NR(DRM_RADEON_CP_START)] = {radeon_cp_start, 1, 1},
+	[DRM_IOCTL_NR(DRM_RADEON_CP_STOP)] = {radeon_cp_stop, 1, 1},
+	[DRM_IOCTL_NR(DRM_RADEON_CP_RESET)] = {radeon_cp_reset, 1, 1},
+	[DRM_IOCTL_NR(DRM_RADEON_CP_IDLE)] = {radeon_cp_idle, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_CP_RESUME)] = {radeon_cp_resume, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_RESET)] = {radeon_engine_reset, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_FULLSCREEN)] = {radeon_fullscreen, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_SWAP)] = {radeon_cp_swap, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_CLEAR)] = {radeon_cp_clear, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_VERTEX)] = {radeon_cp_vertex, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_INDICES)] = {radeon_cp_indices, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_TEXTURE)] = {radeon_cp_texture, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_STIPPLE)] = {radeon_cp_stipple, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_INDIRECT)] = {radeon_cp_indirect, 1, 1},
+	[DRM_IOCTL_NR(DRM_RADEON_VERTEX2)] = {radeon_cp_vertex2, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_CMDBUF)] = {radeon_cp_cmdbuf, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_GETPARAM)] = {radeon_cp_getparam, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_FLIP)] = {radeon_cp_flip, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_ALLOC)] = {radeon_mem_alloc, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_FREE)] = {radeon_mem_free, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_INIT_HEAP)] = {radeon_mem_init_heap, 1, 1},
+	[DRM_IOCTL_NR(DRM_RADEON_IRQ_EMIT)] = {radeon_irq_emit, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_IRQ_WAIT)] = {radeon_irq_wait, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_SETPARAM)] = {radeon_cp_setparam, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_SURF_ALLOC)] = {radeon_surface_alloc, 1, 0},
+	[DRM_IOCTL_NR(DRM_RADEON_SURF_FREE)] = {radeon_surface_free, 1, 0}
+};
+
+int radeon_max_ioctl = DRM_ARRAY_SIZE(radeon_ioctls);
diff --git a/sys/dev/drm/savage_bci.c b/sys/dev/drm/savage_bci.c
new file mode 100644
index 0000000..f1a844a
--- /dev/null
+++ b/sys/dev/drm/savage_bci.c
@@ -0,0 +1,1089 @@
+/* savage_bci.c -- BCI support for Savage
+ *
+ * Copyright 2004  Felix Kuehling
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#include "drmP.h"
+#include "savage_drm.h"
+#include "savage_drv.h"
+
+/* Need a long timeout for shadow status updates can take a while
+ * and so can waiting for events when the queue is full. */
+#define SAVAGE_DEFAULT_USEC_TIMEOUT	1000000 /* 1s */
+#define SAVAGE_EVENT_USEC_TIMEOUT	5000000 /* 5s */
+#define SAVAGE_FREELIST_DEBUG		0
+
+static int
+savage_bci_wait_fifo_shadow(drm_savage_private_t *dev_priv, unsigned int n)
+{
+	uint32_t mask = dev_priv->status_used_mask;
+	uint32_t threshold = dev_priv->bci_threshold_hi;
+	uint32_t status;
+	int i;
+
+#if SAVAGE_BCI_DEBUG
+	if (n > dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - threshold)
+		DRM_ERROR("Trying to emit %d words "
+			  "(more than guaranteed space in COB)\n", n);
+#endif
+
+	for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
+		DRM_MEMORYBARRIER();
+		status = dev_priv->status_ptr[0];
+		if ((status & mask) < threshold)
+			return 0;
+		DRM_UDELAY(1);
+	}
+
+#if SAVAGE_BCI_DEBUG
+	DRM_ERROR("failed!\n");
+	DRM_INFO("   status=0x%08x, threshold=0x%08x\n", status, threshold);
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+static int
+savage_bci_wait_fifo_s3d(drm_savage_private_t *dev_priv, unsigned int n)
+{
+	uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
+	uint32_t status;
+	int i;
+
+	for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
+		status = SAVAGE_READ(SAVAGE_STATUS_WORD0);
+		if ((status & SAVAGE_FIFO_USED_MASK_S3D) <= maxUsed)
+			return 0;
+		DRM_UDELAY(1);
+	}
+
+#if SAVAGE_BCI_DEBUG
+	DRM_ERROR("failed!\n");
+	DRM_INFO("   status=0x%08x\n", status);
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+static int
+savage_bci_wait_fifo_s4(drm_savage_private_t *dev_priv, unsigned int n)
+{
+	uint32_t maxUsed = dev_priv->cob_size + SAVAGE_BCI_FIFO_SIZE - n;
+	uint32_t status;
+	int i;
+
+	for (i = 0; i < SAVAGE_DEFAULT_USEC_TIMEOUT; i++) {
+		status = SAVAGE_READ(SAVAGE_ALT_STATUS_WORD0);
+		if ((status & SAVAGE_FIFO_USED_MASK_S4) <= maxUsed)
+			return 0;
+		DRM_UDELAY(1);
+	}
+
+#if SAVAGE_BCI_DEBUG
+	DRM_ERROR("failed!\n");
+	DRM_INFO("   status=0x%08x\n", status);
+#endif
+	return DRM_ERR(EBUSY);
+}
+
+/*
+ * Waiting for events.
+ *
+ * The BIOSresets the event tag to 0 on mode changes. Therefore we
+ * never emit 0 to the event tag. If we find a 0 event tag we know the
+ * BIOS stomped on it and return success assuming that the BIOS waited
+ * for engine idle.
+ *
+ * Note: if the Xserver uses the event tag it has to follow the same
+ * rule. Otherwise there may be glitches every 2^16 events.
+ */
+static int
+savage_bci_wait_event_shadow(drm_savage_private_t *dev_priv, uint16_t e)
+{
+	uint32_t status;
+	int i;
+
+	for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) {
+		DRM_MEMORYBARRIER();
+		status = dev_priv->status_ptr[1];
+		if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff ||
+		    (status & 0xffff) == 0)
+			return 0;
+		DRM_UDELAY(1);
+	}
+
+#if SAVAGE_BCI_DEBUG
+	DRM_ERROR("failed!\n");
+	DRM_INFO("   status=0x%08x, e=0x%04x\n", status, e);
+#endif
+
+	return DRM_ERR(EBUSY);
+}
+
+static int
+savage_bci_wait_event_reg(drm_savage_private_t *dev_priv, uint16_t e)
+{
+	uint32_t status;
+	int i;
+
+	for (i = 0; i < SAVAGE_EVENT_USEC_TIMEOUT; i++) {
+		status = SAVAGE_READ(SAVAGE_STATUS_WORD1);
+		if ((((status & 0xffff) - e) & 0xffff) <= 0x7fff ||
+		    (status & 0xffff) == 0)
+			return 0;
+		DRM_UDELAY(1);
+	}
+
+#if SAVAGE_BCI_DEBUG
+	DRM_ERROR("failed!\n");
+	DRM_INFO("   status=0x%08x, e=0x%04x\n", status, e);
+#endif
+
+	return DRM_ERR(EBUSY);
+}
+
+uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv,
+			       unsigned int flags)
+{
+	BCI_LOCALS;
+	uint16_t count;
+
+	if (dev_priv->status_ptr) {
+		/* coordinate with Xserver */
+		count = dev_priv->status_ptr[1023];
+		if (count < dev_priv->event_counter)
+			dev_priv->event_wrap++;
+	} else {
+		count = dev_priv->event_counter;
+	}
+	count = (count + 1) & 0xffff;
+	if (count == 0) {
+		count++; /* See the comment above savage_wait_event_*. */
+		dev_priv->event_wrap++;
+	}
+	dev_priv->event_counter = count;
+	if (dev_priv->status_ptr)
+		dev_priv->status_ptr[1023] = (uint32_t)count;
+
+	if ((flags & (SAVAGE_WAIT_2D | SAVAGE_WAIT_3D))) {
+		unsigned int wait_cmd = BCI_CMD_WAIT;
+		if ((flags & SAVAGE_WAIT_2D))
+			wait_cmd |= BCI_CMD_WAIT_2D;
+		if ((flags & SAVAGE_WAIT_3D))
+			wait_cmd |= BCI_CMD_WAIT_3D;
+		BEGIN_BCI(2);
+		BCI_WRITE(wait_cmd);
+	} else {
+		BEGIN_BCI(1);
+	}
+	BCI_WRITE(BCI_CMD_UPDATE_EVENT_TAG | (uint32_t)count);
+
+	return count;
+}
+
+/*
+ * Freelist management
+ */
+static int savage_freelist_init(drm_device_t *dev)
+{
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *buf;
+	drm_savage_buf_priv_t *entry;
+	int i;
+	DRM_DEBUG("count=%d\n", dma->buf_count);
+
+	dev_priv->head.next = &dev_priv->tail;
+	dev_priv->head.prev = NULL;
+	dev_priv->head.buf = NULL;
+
+	dev_priv->tail.next = NULL;
+	dev_priv->tail.prev = &dev_priv->head;
+	dev_priv->tail.buf = NULL;
+
+	for (i = 0; i < dma->buf_count; i++) {
+		buf = dma->buflist[i];
+		entry = buf->dev_private;
+
+		SET_AGE(&entry->age, 0, 0);
+		entry->buf = buf;
+
+		entry->next = dev_priv->head.next;
+		entry->prev = &dev_priv->head;
+		dev_priv->head.next->prev = entry;
+		dev_priv->head.next = entry;
+	}
+
+	return 0;
+}
+
+static drm_buf_t *savage_freelist_get(drm_device_t *dev)
+{
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	drm_savage_buf_priv_t *tail = dev_priv->tail.prev;
+	uint16_t event;
+	unsigned int wrap;
+	DRM_DEBUG("\n");
+
+	UPDATE_EVENT_COUNTER();
+	if (dev_priv->status_ptr)
+		event = dev_priv->status_ptr[1] & 0xffff;
+	else
+		event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
+	wrap = dev_priv->event_wrap;
+	if (event > dev_priv->event_counter)
+		wrap--; /* hardware hasn't passed the last wrap yet */
+
+	DRM_DEBUG("   tail=0x%04x %d\n", tail->age.event, tail->age.wrap);
+	DRM_DEBUG("   head=0x%04x %d\n", event, wrap);
+
+	if (tail->buf && (TEST_AGE(&tail->age, event, wrap) || event == 0)) {
+		drm_savage_buf_priv_t *next = tail->next;
+		drm_savage_buf_priv_t *prev = tail->prev;
+		prev->next = next;
+		next->prev = prev;
+		tail->next = tail->prev = NULL;
+		return tail->buf;
+	}
+
+	DRM_DEBUG("returning NULL, tail->buf=%p!\n", tail->buf);
+	return NULL;
+}
+
+void savage_freelist_put(drm_device_t *dev, drm_buf_t *buf)
+{
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	drm_savage_buf_priv_t *entry = buf->dev_private, *prev, *next;
+
+	DRM_DEBUG("age=0x%04x wrap=%d\n", entry->age.event, entry->age.wrap);
+
+	if (entry->next != NULL || entry->prev != NULL) {
+		DRM_ERROR("entry already on freelist.\n");
+		return;
+	}
+
+	prev = &dev_priv->head;
+	next = prev->next;
+	prev->next = entry;
+	next->prev = entry;
+	entry->prev = prev;
+	entry->next = next;
+}
+
+/*
+ * Command DMA
+ */
+static int savage_dma_init(drm_savage_private_t *dev_priv)
+{
+	unsigned int i;
+
+	dev_priv->nr_dma_pages = dev_priv->cmd_dma->size /
+		(SAVAGE_DMA_PAGE_SIZE*4);
+	dev_priv->dma_pages = drm_alloc(sizeof(drm_savage_dma_page_t) *
+					dev_priv->nr_dma_pages,
+					DRM_MEM_DRIVER);
+	if (dev_priv->dma_pages == NULL)
+		return DRM_ERR(ENOMEM);
+
+	for (i = 0; i < dev_priv->nr_dma_pages; ++i) {
+		SET_AGE(&dev_priv->dma_pages[i].age, 0, 0);
+		dev_priv->dma_pages[i].used = 0;
+		dev_priv->dma_pages[i].flushed = 0;
+	}
+	SET_AGE(&dev_priv->last_dma_age, 0, 0);
+
+	dev_priv->first_dma_page = 0;
+	dev_priv->current_dma_page = 0;
+
+	return 0;
+}
+
+void savage_dma_reset(drm_savage_private_t *dev_priv)
+{
+	uint16_t event;
+	unsigned int wrap, i;
+	event = savage_bci_emit_event(dev_priv, 0);
+	wrap = dev_priv->event_wrap;
+	for (i = 0; i < dev_priv->nr_dma_pages; ++i) {
+		SET_AGE(&dev_priv->dma_pages[i].age, event, wrap);
+		dev_priv->dma_pages[i].used = 0;
+		dev_priv->dma_pages[i].flushed = 0;
+	}
+	SET_AGE(&dev_priv->last_dma_age, event, wrap);
+	dev_priv->first_dma_page = dev_priv->current_dma_page = 0;
+}
+
+void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page)
+{
+	uint16_t event;
+	unsigned int wrap;
+
+	/* Faked DMA buffer pages don't age. */
+	if (dev_priv->cmd_dma == &dev_priv->fake_dma)
+		return;
+
+	UPDATE_EVENT_COUNTER();
+	if (dev_priv->status_ptr)
+		event = dev_priv->status_ptr[1] & 0xffff;
+	else
+		event = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
+	wrap = dev_priv->event_wrap;
+	if (event > dev_priv->event_counter)
+		wrap--; /* hardware hasn't passed the last wrap yet */
+
+	if (dev_priv->dma_pages[page].age.wrap > wrap ||
+	    (dev_priv->dma_pages[page].age.wrap == wrap &&
+	     dev_priv->dma_pages[page].age.event > event)) {
+		if (dev_priv->wait_evnt(dev_priv,
+					dev_priv->dma_pages[page].age.event)
+		    < 0)
+			DRM_ERROR("wait_evnt failed!\n");
+	}
+}
+
+uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv, unsigned int n)
+{
+	unsigned int cur = dev_priv->current_dma_page;
+	unsigned int rest = SAVAGE_DMA_PAGE_SIZE -
+		dev_priv->dma_pages[cur].used;
+	unsigned int nr_pages = (n - rest + SAVAGE_DMA_PAGE_SIZE-1) /
+		SAVAGE_DMA_PAGE_SIZE;
+	uint32_t *dma_ptr;
+	unsigned int i;
+
+	DRM_DEBUG("cur=%u, cur->used=%u, n=%u, rest=%u, nr_pages=%u\n",
+		  cur, dev_priv->dma_pages[cur].used, n, rest, nr_pages);
+
+	if (cur + nr_pages < dev_priv->nr_dma_pages) {
+		dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
+			cur*SAVAGE_DMA_PAGE_SIZE +
+			dev_priv->dma_pages[cur].used;
+		if (n < rest)
+			rest = n;
+		dev_priv->dma_pages[cur].used += rest;
+		n -= rest;
+		cur++;
+	} else {
+		dev_priv->dma_flush(dev_priv);
+		nr_pages = (n + SAVAGE_DMA_PAGE_SIZE-1) / SAVAGE_DMA_PAGE_SIZE;
+		for (i = cur; i < dev_priv->nr_dma_pages; ++i) {
+			dev_priv->dma_pages[i].age = dev_priv->last_dma_age;
+			dev_priv->dma_pages[i].used = 0;
+			dev_priv->dma_pages[i].flushed = 0;
+		}
+		dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle;
+		dev_priv->first_dma_page = cur = 0;
+	}
+	for (i = cur; nr_pages > 0; ++i, --nr_pages) {
+#if SAVAGE_DMA_DEBUG
+		if (dev_priv->dma_pages[i].used) {
+			DRM_ERROR("unflushed page %u: used=%u\n",
+				  i, dev_priv->dma_pages[i].used);
+		}
+#endif
+		if (n > SAVAGE_DMA_PAGE_SIZE)
+			dev_priv->dma_pages[i].used = SAVAGE_DMA_PAGE_SIZE;
+		else
+			dev_priv->dma_pages[i].used = n;
+		n -= SAVAGE_DMA_PAGE_SIZE;
+	}
+	dev_priv->current_dma_page = --i;
+
+	DRM_DEBUG("cur=%u, cur->used=%u, n=%u\n",
+		  i, dev_priv->dma_pages[i].used, n);
+
+	savage_dma_wait(dev_priv, dev_priv->current_dma_page);
+
+	return dma_ptr;
+}
+
+static void savage_dma_flush(drm_savage_private_t *dev_priv)
+{
+	BCI_LOCALS;
+	unsigned int first = dev_priv->first_dma_page;
+	unsigned int cur = dev_priv->current_dma_page;
+	uint16_t event;
+	unsigned int wrap, pad, align, len, i;
+	unsigned long phys_addr;
+
+	if (first == cur &&
+	    dev_priv->dma_pages[cur].used == dev_priv->dma_pages[cur].flushed)
+		return;
+
+	/* pad length to multiples of 2 entries
+	 * align start of next DMA block to multiles of 8 entries */
+	pad = -dev_priv->dma_pages[cur].used & 1;
+	align = -(dev_priv->dma_pages[cur].used + pad) & 7;
+
+	DRM_DEBUG("first=%u, cur=%u, first->flushed=%u, cur->used=%u, "
+		  "pad=%u, align=%u\n",
+		  first, cur, dev_priv->dma_pages[first].flushed,
+		  dev_priv->dma_pages[cur].used, pad, align);
+
+	/* pad with noops */
+	if (pad) {
+		uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
+			cur * SAVAGE_DMA_PAGE_SIZE +
+			dev_priv->dma_pages[cur].used;
+		dev_priv->dma_pages[cur].used += pad;
+		while(pad != 0) {
+			*dma_ptr++ = BCI_CMD_WAIT;
+			pad--;
+		}
+	}
+
+	DRM_MEMORYBARRIER();
+
+	/* do flush ... */
+	phys_addr = dev_priv->cmd_dma->offset +
+		(first * SAVAGE_DMA_PAGE_SIZE +
+		 dev_priv->dma_pages[first].flushed) * 4;
+	len = (cur - first) * SAVAGE_DMA_PAGE_SIZE +
+		dev_priv->dma_pages[cur].used -
+		dev_priv->dma_pages[first].flushed;
+
+	DRM_DEBUG("phys_addr=%lx, len=%u\n",
+		  phys_addr | dev_priv->dma_type, len);
+
+	BEGIN_BCI(3);
+	BCI_SET_REGISTERS(SAVAGE_DMABUFADDR, 1);
+	BCI_WRITE(phys_addr | dev_priv->dma_type);
+	BCI_DMA(len);
+
+	/* fix alignment of the start of the next block */
+	dev_priv->dma_pages[cur].used += align;
+
+	/* age DMA pages */
+	event = savage_bci_emit_event(dev_priv, 0);
+	wrap = dev_priv->event_wrap;
+	for (i = first; i < cur; ++i) {
+		SET_AGE(&dev_priv->dma_pages[i].age, event, wrap);
+		dev_priv->dma_pages[i].used = 0;
+		dev_priv->dma_pages[i].flushed = 0;
+	}
+	/* age the current page only when it's full */
+	if (dev_priv->dma_pages[cur].used == SAVAGE_DMA_PAGE_SIZE) {
+		SET_AGE(&dev_priv->dma_pages[cur].age, event, wrap);
+		dev_priv->dma_pages[cur].used = 0;
+		dev_priv->dma_pages[cur].flushed = 0;
+		/* advance to next page */
+		cur++;
+		if (cur == dev_priv->nr_dma_pages)
+			cur = 0;
+		dev_priv->first_dma_page = dev_priv->current_dma_page = cur;
+	} else {
+		dev_priv->first_dma_page = cur;
+		dev_priv->dma_pages[cur].flushed = dev_priv->dma_pages[i].used;
+	}
+	SET_AGE(&dev_priv->last_dma_age, event, wrap);
+
+	DRM_DEBUG("first=cur=%u, cur->used=%u, cur->flushed=%u\n", cur,
+		  dev_priv->dma_pages[cur].used,
+		  dev_priv->dma_pages[cur].flushed);
+}
+
+static void savage_fake_dma_flush(drm_savage_private_t *dev_priv)
+{
+	BCI_LOCALS;
+	unsigned int i, j;
+	if (dev_priv->first_dma_page == dev_priv->current_dma_page &&
+	    dev_priv->dma_pages[dev_priv->current_dma_page].used == 0)
+		return;
+
+	DRM_DEBUG("first=%u, cur=%u, cur->used=%u\n",
+		  dev_priv->first_dma_page, dev_priv->current_dma_page,
+		  dev_priv->dma_pages[dev_priv->current_dma_page].used);
+
+	for (i = dev_priv->first_dma_page;
+	     i <= dev_priv->current_dma_page && dev_priv->dma_pages[i].used;
+	     ++i) {
+		uint32_t *dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +
+			i * SAVAGE_DMA_PAGE_SIZE;
+#if SAVAGE_DMA_DEBUG
+		/* Sanity check: all pages except the last one must be full. */
+		if (i < dev_priv->current_dma_page &&
+		    dev_priv->dma_pages[i].used != SAVAGE_DMA_PAGE_SIZE) {
+			DRM_ERROR("partial DMA page %u: used=%u",
+				  i, dev_priv->dma_pages[i].used);
+		}
+#endif
+		BEGIN_BCI(dev_priv->dma_pages[i].used);
+		for (j = 0; j < dev_priv->dma_pages[i].used; ++j) {
+			BCI_WRITE(dma_ptr[j]);
+		}
+		dev_priv->dma_pages[i].used = 0;
+	}
+
+	/* reset to first page */
+	dev_priv->first_dma_page = dev_priv->current_dma_page = 0;
+}
+
+/*
+ * Initalize permanent mappings. On Savage4 and SavageIX the alignment
+ * and size of the aperture is not suitable for automatic MTRR setup
+ * in drm_initmap. Therefore we do it manually before the maps are
+ * initialized. We also need to take care of deleting the MTRRs in
+ * postcleanup.
+ *
+ * FIXME: this is linux-specific
+ */
+int savage_preinit(drm_device_t *dev, unsigned long chipset)
+{
+	drm_savage_private_t *dev_priv;
+	unsigned long mmio_base, fb_base, fb_size, aperture_base;
+	unsigned int fb_rsrc, aper_rsrc;
+	int ret = 0;
+
+	dev_priv = drm_alloc(sizeof(drm_savage_private_t), DRM_MEM_DRIVER);
+	if (dev_priv == NULL)
+		return DRM_ERR(ENOMEM);
+
+	memset(dev_priv, 0, sizeof(drm_savage_private_t));
+	dev->dev_private = (void *)dev_priv;
+	dev_priv->chipset = (enum savage_family)chipset;
+
+	dev_priv->mtrr[0].handle = -1;
+	dev_priv->mtrr[1].handle = -1;
+	dev_priv->mtrr[2].handle = -1;
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		fb_rsrc = 0;
+		fb_base = drm_get_resource_start(dev, 0);
+		fb_size = SAVAGE_FB_SIZE_S3;
+		mmio_base = fb_base + SAVAGE_FB_SIZE_S3;
+		aper_rsrc = 0;
+		aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
+		/* this should always be true */
+		if (drm_get_resource_len(dev, 0) == 0x08000000) {
+			/* Don't make MMIO write-cobining! We need 3
+			 * MTRRs. */
+			dev_priv->mtrr[0].base = fb_base;
+			dev_priv->mtrr[0].size = 0x01000000;
+			dev_priv->mtrr[0].handle = mtrr_add(
+				dev_priv->mtrr[0].base, dev_priv->mtrr[0].size,
+				MTRR_TYPE_WRCOMB, 1);
+			dev_priv->mtrr[1].base = fb_base+0x02000000;
+			dev_priv->mtrr[1].size = 0x02000000;
+			dev_priv->mtrr[1].handle = mtrr_add(
+				dev_priv->mtrr[1].base, dev_priv->mtrr[1].size,
+				MTRR_TYPE_WRCOMB, 1);
+			dev_priv->mtrr[2].base = fb_base+0x04000000;
+			dev_priv->mtrr[2].size = 0x04000000;
+			dev_priv->mtrr[2].handle = mtrr_add(
+				dev_priv->mtrr[2].base, dev_priv->mtrr[2].size,
+				MTRR_TYPE_WRCOMB, 1);
+		} else {
+			DRM_ERROR("strange pci_resource_len %08lx\n",
+				  drm_get_resource_len(dev, 0));
+		}
+	} else if (chipset != S3_SUPERSAVAGE && chipset != S3_SAVAGE2000) {
+		mmio_base = drm_get_resource_start(dev, 0);
+		fb_rsrc = 1;
+		fb_base = drm_get_resource_start(dev, 1);
+		fb_size = SAVAGE_FB_SIZE_S4;
+		aper_rsrc = 1;
+		aperture_base = fb_base + SAVAGE_APERTURE_OFFSET;
+		/* this should always be true */
+		if (drm_get_resource_len(dev, 1) == 0x08000000) {
+			/* Can use one MTRR to cover both fb and
+			 * aperture. */
+			dev_priv->mtrr[0].base = fb_base;
+			dev_priv->mtrr[0].size = 0x08000000;
+			dev_priv->mtrr[0].handle = mtrr_add(
+				dev_priv->mtrr[0].base, dev_priv->mtrr[0].size,
+				MTRR_TYPE_WRCOMB, 1);
+		} else {
+			DRM_ERROR("strange pci_resource_len %08lx\n",
+				  drm_get_resource_len(dev, 1));
+		}
+	} else {
+		mmio_base = drm_get_resource_start(dev, 0);
+		fb_rsrc = 1;
+		fb_base = drm_get_resource_start(dev, 1);
+		fb_size = drm_get_resource_len(dev, 1);
+		aper_rsrc = 2;
+		aperture_base = drm_get_resource_start(dev, 2);
+		/* Automatic MTRR setup will do the right thing. */
+	}
+
+	if ((ret = drm_initmap(dev, mmio_base, SAVAGE_MMIO_SIZE, 0,
+			       _DRM_REGISTERS, 0)))
+		return ret;
+	if (!(dev_priv->mmio = drm_core_findmap (dev, mmio_base)))
+		return DRM_ERR(ENOMEM);
+
+	if ((ret = drm_initmap(dev, fb_base, fb_size, fb_rsrc,
+			       _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING)))
+		return ret;
+	if (!(dev_priv->fb = drm_core_findmap (dev, fb_base)))
+		return DRM_ERR(ENOMEM);
+
+	if ((ret = drm_initmap(dev, aperture_base, SAVAGE_APERTURE_SIZE,
+			       aper_rsrc,
+			       _DRM_FRAME_BUFFER, _DRM_WRITE_COMBINING)))
+		return ret;
+	if (!(dev_priv->aperture = drm_core_findmap (dev, aperture_base)))
+		return DRM_ERR(ENOMEM);
+
+	return ret;
+}
+
+/*
+ * Delete MTRRs and free device-private data.
+ */
+int savage_postcleanup(drm_device_t *dev)
+{
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	int i;
+
+	for (i = 0; i < 3; ++i)
+		if (dev_priv->mtrr[i].handle >= 0)
+			mtrr_del(dev_priv->mtrr[i].handle,
+				 dev_priv->mtrr[i].base,
+				 dev_priv->mtrr[i].size);
+
+	drm_free(dev_priv, sizeof(drm_savage_private_t), DRM_MEM_DRIVER);
+
+	return 0;
+}
+
+static int savage_do_init_bci(drm_device_t *dev, drm_savage_init_t *init)
+{
+	drm_savage_private_t *dev_priv = dev->dev_private;
+
+	if (init->fb_bpp != 16 && init->fb_bpp != 32) {
+		DRM_ERROR("invalid frame buffer bpp %d!\n", init->fb_bpp);
+		return DRM_ERR(EINVAL);
+	}
+	if (init->depth_bpp != 16 && init->depth_bpp != 32) {
+		DRM_ERROR("invalid depth buffer bpp %d!\n", init->fb_bpp);
+		return DRM_ERR(EINVAL);
+	}
+	if (init->dma_type != SAVAGE_DMA_AGP &&
+	    init->dma_type != SAVAGE_DMA_PCI) {
+		DRM_ERROR("invalid dma memory type %d!\n", init->dma_type);
+		return DRM_ERR(EINVAL);
+	}
+
+	dev_priv->cob_size = init->cob_size;
+	dev_priv->bci_threshold_lo = init->bci_threshold_lo;
+	dev_priv->bci_threshold_hi = init->bci_threshold_hi;
+	dev_priv->dma_type = init->dma_type;
+
+	dev_priv->fb_bpp = init->fb_bpp;
+	dev_priv->front_offset = init->front_offset;
+	dev_priv->front_pitch = init->front_pitch;
+	dev_priv->back_offset = init->back_offset;
+	dev_priv->back_pitch = init->back_pitch;
+	dev_priv->depth_bpp = init->depth_bpp;
+	dev_priv->depth_offset = init->depth_offset;
+	dev_priv->depth_pitch = init->depth_pitch;
+
+	dev_priv->texture_offset = init->texture_offset;
+	dev_priv->texture_size = init->texture_size;
+
+	DRM_GETSAREA();
+	if (!dev_priv->sarea) {
+		DRM_ERROR("could not find sarea!\n");
+		savage_do_cleanup_bci(dev);
+		return DRM_ERR(EINVAL);
+	}
+	if (init->status_offset != 0) {
+		dev_priv->status = drm_core_findmap(dev, init->status_offset);
+		if (!dev_priv->status) {
+			DRM_ERROR("could not find shadow status region!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+	} else {
+		dev_priv->status = NULL;
+	}
+	if (dev_priv->dma_type == SAVAGE_DMA_AGP && init->buffers_offset) {
+		dev->agp_buffer_map = drm_core_findmap(dev,
+						       init->buffers_offset);
+		if (!dev->agp_buffer_map) {
+			DRM_ERROR("could not find DMA buffer region!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+		drm_core_ioremap(dev->agp_buffer_map, dev);
+		if (!dev->agp_buffer_map) {
+			DRM_ERROR("failed to ioremap DMA buffer region!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(ENOMEM);
+		}
+	}
+	if (init->agp_textures_offset) {
+		dev_priv->agp_textures =
+			drm_core_findmap(dev, init->agp_textures_offset);
+		if (!dev_priv->agp_textures) {
+			DRM_ERROR("could not find agp texture region!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+	} else {
+		dev_priv->agp_textures = NULL;
+	}
+
+	if (init->cmd_dma_offset) {
+		if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+			DRM_ERROR("command DMA not supported on "
+				  "Savage3D/MX/IX.\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+		if (dev->dma && dev->dma->buflist) {
+			DRM_ERROR("command and vertex DMA not supported "
+				  "at the same time.\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+		dev_priv->cmd_dma = drm_core_findmap(dev, init->cmd_dma_offset);
+		if (!dev_priv->cmd_dma) {
+			DRM_ERROR("could not find command DMA region!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+		if (dev_priv->dma_type == SAVAGE_DMA_AGP) {
+			if (dev_priv->cmd_dma->type != _DRM_AGP) {
+				DRM_ERROR("AGP command DMA region is not a "
+					  "_DRM_AGP map!\n");
+				savage_do_cleanup_bci(dev);
+				return DRM_ERR(EINVAL);
+			}
+			drm_core_ioremap(dev_priv->cmd_dma, dev);
+			if (!dev_priv->cmd_dma->handle) {
+				DRM_ERROR("failed to ioremap command "
+					  "DMA region!\n");
+				savage_do_cleanup_bci(dev);
+				return DRM_ERR(ENOMEM);
+			}
+		} else if (dev_priv->cmd_dma->type != _DRM_CONSISTENT) {
+			DRM_ERROR("PCI command DMA region is not a "
+				  "_DRM_CONSISTENT map!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(EINVAL);
+		}
+	} else {
+		dev_priv->cmd_dma = NULL;
+	}
+
+	dev_priv->dma_flush = savage_dma_flush;
+	if (!dev_priv->cmd_dma) {
+		DRM_DEBUG("falling back to faked command DMA.\n");
+		dev_priv->fake_dma.offset = 0;
+		dev_priv->fake_dma.size = SAVAGE_FAKE_DMA_SIZE;
+		dev_priv->fake_dma.type = _DRM_SHM;
+		dev_priv->fake_dma.handle = drm_alloc(SAVAGE_FAKE_DMA_SIZE,
+						      DRM_MEM_DRIVER);
+		if (!dev_priv->fake_dma.handle) {
+			DRM_ERROR("could not allocate faked DMA buffer!\n");
+			savage_do_cleanup_bci(dev);
+			return DRM_ERR(ENOMEM);
+		}
+		dev_priv->cmd_dma = &dev_priv->fake_dma;
+		dev_priv->dma_flush = savage_fake_dma_flush;
+	}
+
+	dev_priv->sarea_priv =
+		(drm_savage_sarea_t *)((uint8_t *)dev_priv->sarea->handle +
+				       init->sarea_priv_offset);
+
+	/* setup bitmap descriptors */
+	{
+		unsigned int color_tile_format;
+		unsigned int depth_tile_format;
+		unsigned int front_stride, back_stride, depth_stride;
+		if (dev_priv->chipset <= S3_SAVAGE4) {
+			color_tile_format = dev_priv->fb_bpp == 16 ?
+				SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP;
+			depth_tile_format = dev_priv->depth_bpp == 16 ?
+				SAVAGE_BD_TILE_16BPP : SAVAGE_BD_TILE_32BPP;
+		} else {
+			color_tile_format = SAVAGE_BD_TILE_DEST;
+			depth_tile_format = SAVAGE_BD_TILE_DEST;
+		}
+		front_stride = dev_priv->front_pitch / (dev_priv->fb_bpp/8);
+		back_stride  = dev_priv-> back_pitch / (dev_priv->fb_bpp/8);
+		depth_stride = dev_priv->depth_pitch / (dev_priv->depth_bpp/8);
+
+		dev_priv->front_bd = front_stride | SAVAGE_BD_BW_DISABLE |
+			(dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) |
+			(color_tile_format << SAVAGE_BD_TILE_SHIFT);
+
+		dev_priv-> back_bd =  back_stride | SAVAGE_BD_BW_DISABLE |
+			(dev_priv->fb_bpp << SAVAGE_BD_BPP_SHIFT) |
+			(color_tile_format << SAVAGE_BD_TILE_SHIFT);
+
+		dev_priv->depth_bd = depth_stride | SAVAGE_BD_BW_DISABLE |
+			(dev_priv->depth_bpp << SAVAGE_BD_BPP_SHIFT) |
+			(depth_tile_format << SAVAGE_BD_TILE_SHIFT);
+	}
+
+	/* setup status and bci ptr */
+	dev_priv->event_counter = 0;
+	dev_priv->event_wrap = 0;
+	dev_priv->bci_ptr = (volatile uint32_t *)
+	    ((uint8_t *)dev_priv->mmio->handle + SAVAGE_BCI_OFFSET);
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S3D;
+	} else {
+		dev_priv->status_used_mask = SAVAGE_FIFO_USED_MASK_S4;
+	}
+	if (dev_priv->status != NULL) {
+		dev_priv->status_ptr =
+			(volatile uint32_t *)dev_priv->status->handle;
+		dev_priv->wait_fifo = savage_bci_wait_fifo_shadow;
+		dev_priv->wait_evnt = savage_bci_wait_event_shadow;
+		dev_priv->status_ptr[1023] = dev_priv->event_counter;
+	} else {
+		dev_priv->status_ptr = NULL;
+		if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+			dev_priv->wait_fifo = savage_bci_wait_fifo_s3d;
+		} else {
+			dev_priv->wait_fifo = savage_bci_wait_fifo_s4;
+		}
+		dev_priv->wait_evnt = savage_bci_wait_event_reg;
+	}
+
+	/* cliprect functions */
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset))
+		dev_priv->emit_clip_rect = savage_emit_clip_rect_s3d;
+	else
+		dev_priv->emit_clip_rect = savage_emit_clip_rect_s4;
+
+	if (savage_freelist_init(dev) < 0) {
+		DRM_ERROR("could not initialize freelist\n");
+		savage_do_cleanup_bci(dev);
+		return DRM_ERR(ENOMEM);
+	}
+
+	if (savage_dma_init(dev_priv) <  0) {
+		DRM_ERROR("could not initialize command DMA\n");
+		savage_do_cleanup_bci(dev);
+		return DRM_ERR(ENOMEM);
+	}
+
+	return 0;
+}
+
+int savage_do_cleanup_bci(drm_device_t *dev)
+{
+	drm_savage_private_t *dev_priv = dev->dev_private;
+
+	if (dev_priv->cmd_dma == &dev_priv->fake_dma) {
+		if (dev_priv->fake_dma.handle)
+			drm_free(dev_priv->fake_dma.handle,
+				 SAVAGE_FAKE_DMA_SIZE, DRM_MEM_DRIVER);
+	} else if (dev_priv->cmd_dma && dev_priv->cmd_dma->handle &&
+		   dev_priv->cmd_dma->type == _DRM_AGP &&
+		   dev_priv->dma_type == SAVAGE_DMA_AGP)
+		drm_core_ioremapfree(dev_priv->cmd_dma, dev);
+
+	if (dev_priv->dma_type == SAVAGE_DMA_AGP &&
+	    dev->agp_buffer_map && dev->agp_buffer_map->handle) {
+		drm_core_ioremapfree(dev->agp_buffer_map, dev);
+		/* make sure the next instance (which may be running
+		 * in PCI mode) doesn't try to use an old
+		 * agp_buffer_map. */
+		dev->agp_buffer_map = NULL;
+	}
+
+	if (dev_priv->dma_pages)
+		drm_free(dev_priv->dma_pages,
+			 sizeof(drm_savage_dma_page_t)*dev_priv->nr_dma_pages,
+			 DRM_MEM_DRIVER);
+
+	return 0;
+}
+
+int savage_bci_init(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_savage_init_t init;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(init, (drm_savage_init_t __user *)data,
+				 sizeof(init));
+
+	switch (init.func) {
+	case SAVAGE_INIT_BCI:
+		return savage_do_init_bci(dev, &init);
+	case SAVAGE_CLEANUP_BCI:
+		return savage_do_cleanup_bci(dev);
+	}
+
+	return DRM_ERR(EINVAL);
+}
+
+int savage_bci_event_emit(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	drm_savage_event_emit_t event;
+
+	DRM_DEBUG("\n");
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(event, (drm_savage_event_emit_t __user *)data,
+				 sizeof(event));
+
+	event.count = savage_bci_emit_event(dev_priv, event.flags);
+	event.count |= dev_priv->event_wrap << 16;
+	DRM_COPY_TO_USER_IOCTL(&((drm_savage_event_emit_t __user *)data)->count,
+			       event.count, sizeof(event.count));
+	return 0;
+}
+
+int savage_bci_event_wait(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	drm_savage_event_wait_t event;
+	unsigned int event_e, hw_e;
+	unsigned int event_w, hw_w;
+
+	DRM_DEBUG("\n");
+
+	DRM_COPY_FROM_USER_IOCTL(event, (drm_savage_event_wait_t __user *)data,
+				 sizeof(event));
+
+	UPDATE_EVENT_COUNTER();
+	if (dev_priv->status_ptr)
+		hw_e = dev_priv->status_ptr[1] & 0xffff;
+	else
+		hw_e = SAVAGE_READ(SAVAGE_STATUS_WORD1) & 0xffff;
+	hw_w = dev_priv->event_wrap;
+	if (hw_e > dev_priv->event_counter)
+		hw_w--; /* hardware hasn't passed the last wrap yet */
+
+	event_e = event.count & 0xffff;
+	event_w = event.count >> 16;
+
+	/* Don't need to wait if
+	 * - event counter wrapped since the event was emitted or
+	 * - the hardware has advanced up to or over the event to wait for.
+	 */
+	if (event_w < hw_w || (event_w == hw_w && event_e <= hw_e) )
+		return 0;
+	else
+		return dev_priv->wait_evnt(dev_priv, event_e);
+}
+
+/*
+ * DMA buffer management
+ */
+
+static int savage_bci_get_buffers(DRMFILE filp, drm_device_t *dev, drm_dma_t *d)
+{
+	drm_buf_t *buf;
+	int i;
+
+	for (i = d->granted_count; i < d->request_count; i++) {
+		buf = savage_freelist_get(dev);
+		if (!buf)
+			return DRM_ERR(EAGAIN);
+
+		buf->filp = filp;
+
+		if (DRM_COPY_TO_USER(&d->request_indices[i],
+				     &buf->idx, sizeof(buf->idx)))
+			return DRM_ERR(EFAULT);
+		if (DRM_COPY_TO_USER(&d->request_sizes[i],
+				     &buf->total, sizeof(buf->total)))
+			return DRM_ERR(EFAULT);
+
+		d->granted_count++;
+	}
+	return 0;
+}
+
+int savage_bci_buffers(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_device_dma_t *dma = dev->dma;
+	drm_dma_t d;
+	int ret = 0;
+
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(d, (drm_dma_t __user *)data, sizeof(d));
+
+	/* Please don't send us buffers.
+	 */
+	if (d.send_count != 0) {
+		DRM_ERROR("Process %d trying to send %d buffers via drmDMA\n",
+			  DRM_CURRENTPID, d.send_count);
+		return DRM_ERR(EINVAL);
+	}
+
+	/* We'll send you buffers.
+	 */
+	if (d.request_count < 0 || d.request_count > dma->buf_count) {
+		DRM_ERROR("Process %d trying to get %d buffers (of %d max)\n",
+			  DRM_CURRENTPID, d.request_count, dma->buf_count);
+		return DRM_ERR(EINVAL);
+	}
+
+	d.granted_count = 0;
+
+	if (d.request_count) {
+		ret = savage_bci_get_buffers(filp, dev, &d);
+	}
+
+	DRM_COPY_TO_USER_IOCTL((drm_dma_t __user *)data, d, sizeof(d));
+
+	return ret;
+}
+
+void savage_reclaim_buffers(drm_device_t *dev, DRMFILE filp) {
+	drm_device_dma_t *dma = dev->dma;
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	int i;
+
+	if (!dma)
+		return;
+	if (!dev_priv)
+		return;
+	if (!dma->buflist)
+		return;
+
+	/*i830_flush_queue(dev);*/
+
+	for (i = 0; i < dma->buf_count; i++) {
+		drm_buf_t *buf = dma->buflist[i];
+		drm_savage_buf_priv_t *buf_priv = buf->dev_private;
+
+		if (buf->filp == filp && buf_priv &&
+		    buf_priv->next == NULL && buf_priv->prev == NULL) {
+			uint16_t event;
+			DRM_DEBUG("reclaimed from client\n");
+			event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D);
+			SET_AGE(&buf_priv->age, event, dev_priv->event_wrap);
+			savage_freelist_put(dev, buf);
+		}
+	}
+
+	drm_core_reclaim_buffers(dev, filp);
+}
diff --git a/sys/dev/drm/savage_drm.h b/sys/dev/drm/savage_drm.h
new file mode 100644
index 0000000..b6a9fde
--- /dev/null
+++ b/sys/dev/drm/savage_drm.h
@@ -0,0 +1,211 @@
+/* savage_drm.h -- Public header for the savage driver
+ *
+ * Copyright 2004  Felix Kuehling
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef __SAVAGE_DRM_H__
+#define __SAVAGE_DRM_H__
+
+#ifndef __SAVAGE_SAREA_DEFINES__
+#define __SAVAGE_SAREA_DEFINES__
+
+/* 2 heaps (1 for card, 1 for agp), each divided into upto 128
+ * regions, subject to a minimum region size of (1<<16) == 64k.
+ *
+ * Clients may subdivide regions internally, but when sharing between
+ * clients, the region size is the minimum granularity.
+ */
+
+#define SAVAGE_CARD_HEAP		0
+#define SAVAGE_AGP_HEAP			1
+#define SAVAGE_NR_TEX_HEAPS		2
+#define SAVAGE_NR_TEX_REGIONS		16
+#define SAVAGE_LOG_MIN_TEX_REGION_SIZE	16
+
+#endif /* __SAVAGE_SAREA_DEFINES__ */
+
+typedef struct _drm_savage_sarea {
+	/* LRU lists for texture memory in agp space and on the card.
+	 */
+	drm_tex_region_t texList[SAVAGE_NR_TEX_HEAPS][SAVAGE_NR_TEX_REGIONS+1];
+	unsigned int texAge[SAVAGE_NR_TEX_HEAPS];
+
+	/* Mechanism to validate card state.
+	 */
+	int ctxOwner;
+} drm_savage_sarea_t, *drm_savage_sarea_ptr;
+
+/* Savage-specific ioctls
+ */
+#define DRM_SAVAGE_BCI_INIT		0x00
+#define DRM_SAVAGE_BCI_CMDBUF           0x01
+#define DRM_SAVAGE_BCI_EVENT_EMIT	0x02
+#define DRM_SAVAGE_BCI_EVENT_WAIT	0x03
+
+#define DRM_IOCTL_SAVAGE_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_INIT, drm_savage_init_t)
+#define DRM_IOCTL_SAVAGE_CMDBUF		DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_CMDBUF, drm_savage_cmdbuf_t)
+#define DRM_IOCTL_SAVAGE_EVENT_EMIT	DRM_IOWR(DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_EMIT, drm_savage_event_emit_t)
+#define DRM_IOCTL_SAVAGE_EVENT_WAIT	DRM_IOW( DRM_COMMAND_BASE + DRM_SAVAGE_BCI_EVENT_WAIT, drm_savage_event_wait_t)
+
+#define SAVAGE_DMA_PCI	1
+#define SAVAGE_DMA_AGP	3
+typedef struct drm_savage_init {
+	enum {
+		SAVAGE_INIT_BCI = 1,
+		SAVAGE_CLEANUP_BCI = 2
+	} func;
+	unsigned int sarea_priv_offset;
+
+	/* some parameters */
+	unsigned int cob_size;
+	unsigned int bci_threshold_lo, bci_threshold_hi;
+	unsigned int dma_type;
+
+	/* frame buffer layout */
+	unsigned int fb_bpp;
+	unsigned int front_offset, front_pitch;
+	unsigned int back_offset, back_pitch;
+	unsigned int depth_bpp;
+	unsigned int depth_offset, depth_pitch;
+
+	/* local textures */
+	unsigned int texture_offset;
+	unsigned int texture_size;
+
+	/* physical locations of non-permanent maps */
+	unsigned long status_offset;
+	unsigned long buffers_offset;
+	unsigned long agp_textures_offset;
+	unsigned long cmd_dma_offset;
+} drm_savage_init_t;
+
+typedef union drm_savage_cmd_header drm_savage_cmd_header_t;
+typedef struct drm_savage_cmdbuf {
+				/* command buffer in client's address space */
+	drm_savage_cmd_header_t __user *cmd_addr;
+	unsigned int size;	/* size of the command buffer in 64bit units */
+
+	unsigned int dma_idx;	/* DMA buffer index to use */
+	int discard;		/* discard DMA buffer when done */
+				/* vertex buffer in client's address space */
+	unsigned int __user *vb_addr;
+	unsigned int vb_size;	/* size of client vertex buffer in bytes */
+	unsigned int vb_stride;	/* stride of vertices in 32bit words */
+				/* boxes in client's address space */
+	drm_clip_rect_t __user *box_addr;
+	unsigned int nbox;	/* number of clipping boxes */
+} drm_savage_cmdbuf_t;
+
+#define SAVAGE_WAIT_2D  0x1 /* wait for 2D idle before updating event tag */
+#define SAVAGE_WAIT_3D  0x2 /* wait for 3D idle before updating event tag */
+#define SAVAGE_WAIT_IRQ 0x4 /* emit or wait for IRQ, not implemented yet */
+typedef struct drm_savage_event {
+	unsigned int count;
+	unsigned int flags;
+} drm_savage_event_emit_t, drm_savage_event_wait_t;
+
+/* Commands for the cmdbuf ioctl
+ */
+#define SAVAGE_CMD_STATE	0  /* a range of state registers */
+#define SAVAGE_CMD_DMA_PRIM	1  /* vertices from DMA buffer */
+#define SAVAGE_CMD_VB_PRIM	2  /* vertices from client vertex buffer */
+#define SAVAGE_CMD_DMA_IDX	3  /* indexed vertices from DMA buffer */
+#define SAVAGE_CMD_VB_IDX	4  /* indexed vertices client vertex buffer */
+#define SAVAGE_CMD_CLEAR	5  /* clear buffers */
+#define SAVAGE_CMD_SWAP		6  /* swap buffers */
+
+/* Primitive types
+*/
+#define SAVAGE_PRIM_TRILIST	0  /* triangle list */
+#define SAVAGE_PRIM_TRISTRIP	1  /* triangle strip */
+#define SAVAGE_PRIM_TRIFAN	2  /* triangle fan */
+#define SAVAGE_PRIM_TRILIST_201	3  /* reorder verts for correct flat
+				    * shading on s3d */
+
+/* Skip flags (vertex format)
+ */
+#define SAVAGE_SKIP_Z		0x01
+#define SAVAGE_SKIP_W		0x02
+#define SAVAGE_SKIP_C0		0x04
+#define SAVAGE_SKIP_C1		0x08
+#define SAVAGE_SKIP_S0		0x10
+#define SAVAGE_SKIP_T0		0x20
+#define SAVAGE_SKIP_ST0		0x30
+#define SAVAGE_SKIP_S1		0x40
+#define SAVAGE_SKIP_T1		0x80
+#define SAVAGE_SKIP_ST1		0xc0
+#define SAVAGE_SKIP_ALL_S3D	0x3f
+#define SAVAGE_SKIP_ALL_S4	0xff
+
+/* Buffer names for clear command
+ */
+#define SAVAGE_FRONT		0x1
+#define SAVAGE_BACK		0x2
+#define SAVAGE_DEPTH		0x4
+
+/* 64-bit command header
+ */
+union drm_savage_cmd_header {
+	struct {
+		unsigned char cmd;	/* command */
+		unsigned char pad0;
+		unsigned short pad1;
+		unsigned short pad2;
+		unsigned short pad3;
+	} cmd; /* generic */
+	struct {
+		unsigned char cmd;
+		unsigned char global;	/* need idle engine? */
+		unsigned short count;	/* number of consecutive registers */
+		unsigned short start;	/* first register */
+		unsigned short pad3;
+	} state; /* SAVAGE_CMD_STATE */
+	struct {
+		unsigned char cmd;
+		unsigned char prim;	/* primitive type */
+		unsigned short skip;	/* vertex format (skip flags) */
+		unsigned short count;	/* number of vertices */
+		unsigned short start;	/* first vertex in DMA/vertex buffer */
+	} prim; /* SAVAGE_CMD_DMA_PRIM, SAVAGE_CMD_VB_PRIM */
+	struct {
+		unsigned char cmd;
+		unsigned char prim;
+		unsigned short skip;
+		unsigned short count;	/* number of indices that follow */
+		unsigned short pad3;
+	} idx; /* SAVAGE_CMD_DMA_IDX, SAVAGE_CMD_VB_IDX */
+	struct {
+		unsigned char cmd;
+		unsigned char pad0;
+		unsigned short pad1;
+		unsigned int flags;
+	} clear0; /* SAVAGE_CMD_CLEAR */
+	struct {
+		unsigned int mask;
+		unsigned int value;
+	} clear1; /* SAVAGE_CMD_CLEAR data */
+};
+
+#endif
diff --git a/sys/dev/drm/savage_drv.c b/sys/dev/drm/savage_drv.c
new file mode 100644
index 0000000..4d02e8d
--- /dev/null
+++ b/sys/dev/drm/savage_drv.c
@@ -0,0 +1,107 @@
+/* savage_drv.c -- Savage DRI driver
+ */
+/*-
+ * Copyright 2005 Eric Anholt
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sublicense,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the next
+ * paragraph) shall be included in all copies or substantial portions of the
+ * Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
+ * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
+ * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
+ * ERIC ANHOLT BE LIABLE FOR ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER
+ * IN AN ACTION OF CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN
+ * CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * Authors:
+ *    Eric Anholt <anholt@FreeBSD.org>
+ *
+ * $FreeBSD$
+ */
+
+#include "drmP.h"
+#include "drm.h"
+#include "savage_drm.h"
+#include "savage_drv.h"
+#include "drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t savage_pciidlist[] = {
+	savage_PCI_IDS
+};
+
+extern drm_ioctl_desc_t savage_ioctls[];
+extern int savage_max_ioctl;
+
+static void savage_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = sizeof(drm_savage_buf_priv_t);
+	dev->preinit = savage_preinit;
+	dev->postcleanup = savage_postcleanup;
+	dev->reclaim_buffers = savage_reclaim_buffers;
+	dev->dma_ioctl = savage_bci_buffers;
+
+	dev->driver_ioctls = savage_ioctls;
+	dev->max_driver_ioctl = savage_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->use_mtrr = 1;
+	dev->use_pci_dma = 1;
+	dev->use_dma = 1;
+}
+
+#ifdef __FreeBSD__
+static int
+savage_probe(device_t dev)
+{
+	return drm_probe(dev, savage_pciidlist);
+}
+
+static int
+savage_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	savage_configure(dev);
+	return drm_attach(nbdev, savage_pciidlist);
+}
+
+static device_method_t savage_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		savage_probe),
+	DEVMETHOD(device_attach,	savage_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t savage_driver = {
+	"drm",
+	savage_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(savage, pci, savage_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(savage, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
+CFDRIVER_DECL(savage, DV_TTY, NULL);
+#endif
diff --git a/sys/dev/drm/savage_drv.h b/sys/dev/drm/savage_drv.h
new file mode 100644
index 0000000..d3d43a9
--- /dev/null
+++ b/sys/dev/drm/savage_drv.h
@@ -0,0 +1,584 @@
+/* savage_drv.h -- Private header for the savage driver
+ *
+ * Copyright 2004  Felix Kuehling
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#ifndef __SAVAGE_DRV_H__
+#define __SAVAGE_DRV_H__
+
+#define DRIVER_AUTHOR	"Felix Kuehling"
+
+#define DRIVER_NAME	"savage"
+#define DRIVER_DESC	"Savage3D/MX/IX, Savage4, SuperSavage, Twister, ProSavage[DDR]"
+#define DRIVER_DATE	"20050313"
+
+#define DRIVER_MAJOR		2
+#define DRIVER_MINOR		4
+#define DRIVER_PATCHLEVEL	1
+/* Interface history:
+ *
+ * 1.x   The DRM driver from the VIA/S3 code drop, basically a dummy
+ * 2.0   The first real DRM
+ * 2.1   Scissors registers managed by the DRM, 3D operations clipped by
+ *       cliprects of the cmdbuf ioctl
+ * 2.2   Implemented SAVAGE_CMD_DMA_IDX and SAVAGE_CMD_VB_IDX
+ * 2.3   Event counters used by BCI_EVENT_EMIT/WAIT ioctls are now 32 bits
+ *       wide and thus very long lived (unlikely to ever wrap). The size
+ *       in the struct was 32 bits before, but only 16 bits were used
+ * 2.4   Implemented command DMA. Now drm_savage_init_t.cmd_dma_offset is
+ *       actually used
+ */
+
+typedef struct drm_savage_age {
+	uint16_t event;
+	unsigned int wrap;
+} drm_savage_age_t;
+
+typedef struct drm_savage_buf_priv {
+	struct drm_savage_buf_priv *next;
+	struct drm_savage_buf_priv *prev;
+	drm_savage_age_t age;
+	drm_buf_t *buf;
+} drm_savage_buf_priv_t;
+
+typedef struct drm_savage_dma_page {
+	drm_savage_age_t age;
+	unsigned int used, flushed;
+} drm_savage_dma_page_t;
+#define SAVAGE_DMA_PAGE_SIZE 1024 /* in dwords */
+/* Fake DMA buffer size in bytes. 4 pages. Allows a maximum command
+ * size of 16kbytes or 4k entries. Minimum requirement would be
+ * 10kbytes for 255 40-byte vertices in one drawing command. */
+#define SAVAGE_FAKE_DMA_SIZE (SAVAGE_DMA_PAGE_SIZE*4*4)
+
+/* interesting bits of hardware state that are saved in dev_priv */
+typedef union {
+	struct drm_savage_common_state {
+		uint32_t vbaddr;
+	} common;
+	struct {
+		unsigned char pad[sizeof(struct drm_savage_common_state)];
+		uint32_t texctrl, texaddr;
+		uint32_t scstart, new_scstart;
+		uint32_t scend, new_scend;
+	} s3d;
+	struct {
+		unsigned char pad[sizeof(struct drm_savage_common_state)];
+		uint32_t texdescr, texaddr0, texaddr1;
+		uint32_t drawctrl0, new_drawctrl0;
+		uint32_t drawctrl1, new_drawctrl1;
+	} s4;
+} drm_savage_state_t;
+
+/* these chip tags should match the ones in the 2D driver in savage_regs.h. */
+enum savage_family {
+	S3_UNKNOWN = 0,
+	S3_SAVAGE3D,
+	S3_SAVAGE_MX,
+	S3_SAVAGE4,
+	S3_PROSAVAGE,
+	S3_TWISTER,
+	S3_PROSAVAGEDDR,
+	S3_SUPERSAVAGE,
+	S3_SAVAGE2000,
+	S3_LAST
+};
+
+#define S3_SAVAGE3D_SERIES(chip)  ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE_MX))
+
+#define S3_SAVAGE4_SERIES(chip)  ((chip==S3_SAVAGE4)            \
+                                  || (chip==S3_PROSAVAGE)       \
+                                  || (chip==S3_TWISTER)         \
+                                  || (chip==S3_PROSAVAGEDDR))
+
+#define	S3_SAVAGE_MOBILE_SERIES(chip)	((chip==S3_SAVAGE_MX) || (chip==S3_SUPERSAVAGE))
+
+#define S3_SAVAGE_SERIES(chip)    ((chip>=S3_SAVAGE3D) && (chip<=S3_SAVAGE2000))
+
+#define S3_MOBILE_TWISTER_SERIES(chip)   ((chip==S3_TWISTER)    \
+                                          ||(chip==S3_PROSAVAGEDDR))
+
+/* flags */
+#define SAVAGE_IS_AGP 1
+
+typedef struct drm_savage_private {
+	drm_savage_sarea_t *sarea_priv;
+
+	drm_savage_buf_priv_t head, tail;
+
+	/* who am I? */
+	enum savage_family chipset;
+
+	unsigned int cob_size;
+	unsigned int bci_threshold_lo, bci_threshold_hi;
+	unsigned int dma_type;
+
+	/* frame buffer layout */
+	unsigned int fb_bpp;
+	unsigned int front_offset, front_pitch;
+	unsigned int back_offset, back_pitch;
+	unsigned int depth_bpp;
+	unsigned int depth_offset, depth_pitch;
+
+	/* bitmap descriptors for swap and clear */
+	unsigned int front_bd, back_bd, depth_bd;
+
+	/* local textures */
+	unsigned int texture_offset;
+	unsigned int texture_size;
+
+	/* memory regions in physical memory */
+	drm_local_map_t *sarea;
+	drm_local_map_t *mmio;
+	drm_local_map_t *fb;
+	drm_local_map_t *aperture;
+	drm_local_map_t *status;
+	drm_local_map_t *agp_textures;
+	drm_local_map_t *cmd_dma;
+	drm_local_map_t fake_dma;
+
+	struct {
+		int handle;
+		unsigned long base, size;
+	} mtrr[3];
+
+	/* BCI and status-related stuff */
+	volatile uint32_t *status_ptr, *bci_ptr;
+	uint32_t status_used_mask;
+	uint16_t event_counter;
+	unsigned int event_wrap;
+
+	/* Savage4 command DMA */
+	drm_savage_dma_page_t *dma_pages;
+	unsigned int nr_dma_pages, first_dma_page, current_dma_page;
+	drm_savage_age_t last_dma_age;
+
+	/* saved hw state for global/local check on S3D */
+	uint32_t hw_draw_ctrl, hw_zbuf_ctrl;
+	/* and for scissors (global, so don't emit if not changed) */
+	uint32_t hw_scissors_start, hw_scissors_end;
+
+	drm_savage_state_t state;
+
+	/* after emitting a wait cmd Savage3D needs 63 nops before next DMA */
+	unsigned int waiting;
+
+	/* config/hardware-dependent function pointers */
+	int (*wait_fifo)(struct drm_savage_private *dev_priv, unsigned int n);
+	int (*wait_evnt)(struct drm_savage_private *dev_priv, uint16_t e);
+	/* Err, there is a macro wait_event in include/linux/wait.h.
+	 * Avoid unwanted macro expansion. */
+	void (*emit_clip_rect)(struct drm_savage_private *dev_priv,
+			       drm_clip_rect_t *pbox);
+	void (*dma_flush)(struct drm_savage_private *dev_priv);
+} drm_savage_private_t;
+
+/* ioctls */
+extern int savage_bci_init(DRM_IOCTL_ARGS);
+extern int savage_bci_cmdbuf(DRM_IOCTL_ARGS);
+extern int savage_bci_event_emit(DRM_IOCTL_ARGS);
+extern int savage_bci_event_wait(DRM_IOCTL_ARGS);
+extern int savage_bci_buffers(DRM_IOCTL_ARGS);
+
+/* BCI functions */
+extern uint16_t savage_bci_emit_event(drm_savage_private_t *dev_priv,
+				      unsigned int flags);
+extern void savage_freelist_put(drm_device_t *dev, drm_buf_t *buf);
+extern void savage_dma_reset(drm_savage_private_t *dev_priv);
+extern void savage_dma_wait(drm_savage_private_t *dev_priv, unsigned int page);
+extern uint32_t *savage_dma_alloc(drm_savage_private_t *dev_priv,
+				  unsigned int n);
+extern int savage_preinit(drm_device_t *dev, unsigned long chipset);
+extern int savage_postcleanup(drm_device_t *dev);
+extern int savage_do_cleanup_bci(drm_device_t *dev);
+extern void savage_reclaim_buffers(drm_device_t *dev, DRMFILE filp);
+
+/* state functions */
+extern void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
+				      drm_clip_rect_t *pbox);
+extern void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
+				     drm_clip_rect_t *pbox);
+
+#define SAVAGE_FB_SIZE_S3	0x01000000	/*  16MB */
+#define SAVAGE_FB_SIZE_S4	0x02000000	/*  32MB */
+#define SAVAGE_MMIO_SIZE        0x00080000	/* 512kB */
+#define SAVAGE_APERTURE_OFFSET  0x02000000	/*  32MB */
+#define SAVAGE_APERTURE_SIZE    0x05000000	/* 5 tiled surfaces, 16MB each */
+
+#define SAVAGE_BCI_OFFSET       0x00010000      /* offset of the BCI region
+						 * inside the MMIO region */
+#define SAVAGE_BCI_FIFO_SIZE	32		/* number of entries in on-chip
+						 * BCI FIFO */
+
+/*
+ * MMIO registers
+ */
+#define SAVAGE_STATUS_WORD0		0x48C00
+#define SAVAGE_STATUS_WORD1		0x48C04
+#define SAVAGE_ALT_STATUS_WORD0 	0x48C60
+
+#define SAVAGE_FIFO_USED_MASK_S3D	0x0001ffff
+#define SAVAGE_FIFO_USED_MASK_S4	0x001fffff
+
+/* Copied from savage_bci.h in the 2D driver with some renaming. */
+
+/* Bitmap descriptors */
+#define SAVAGE_BD_STRIDE_SHIFT 0
+#define SAVAGE_BD_BPP_SHIFT   16
+#define SAVAGE_BD_TILE_SHIFT  24
+#define SAVAGE_BD_BW_DISABLE  (1<<28)
+/* common: */
+#define	SAVAGE_BD_TILE_LINEAR		0
+/* savage4, MX, IX, 3D */
+#define	SAVAGE_BD_TILE_16BPP		2
+#define	SAVAGE_BD_TILE_32BPP		3
+/* twister, prosavage, DDR, supersavage, 2000 */
+#define	SAVAGE_BD_TILE_DEST		1
+#define	SAVAGE_BD_TILE_TEXTURE		2
+/* GBD - BCI enable */
+/* savage4, MX, IX, 3D */
+#define SAVAGE_GBD_BCI_ENABLE                    8
+/* twister, prosavage, DDR, supersavage, 2000 */
+#define SAVAGE_GBD_BCI_ENABLE_TWISTER            0
+
+#define SAVAGE_GBD_BIG_ENDIAN                    4
+#define SAVAGE_GBD_LITTLE_ENDIAN                 0
+#define SAVAGE_GBD_64                            1
+
+/*  Global Bitmap Descriptor */
+#define SAVAGE_BCI_GLB_BD_LOW             0x8168
+#define SAVAGE_BCI_GLB_BD_HIGH            0x816C
+
+/*
+ * BCI registers
+ */
+/* Savage4/Twister/ProSavage 3D registers */
+#define SAVAGE_DRAWLOCALCTRL_S4		0x1e
+#define SAVAGE_TEXPALADDR_S4		0x1f
+#define SAVAGE_TEXCTRL0_S4		0x20
+#define SAVAGE_TEXCTRL1_S4		0x21
+#define SAVAGE_TEXADDR0_S4		0x22
+#define SAVAGE_TEXADDR1_S4		0x23
+#define SAVAGE_TEXBLEND0_S4		0x24
+#define SAVAGE_TEXBLEND1_S4		0x25
+#define SAVAGE_TEXXPRCLR_S4		0x26 /* never used */
+#define SAVAGE_TEXDESCR_S4		0x27
+#define SAVAGE_FOGTABLE_S4		0x28
+#define SAVAGE_FOGCTRL_S4		0x30
+#define SAVAGE_STENCILCTRL_S4		0x31
+#define SAVAGE_ZBUFCTRL_S4		0x32
+#define SAVAGE_ZBUFOFF_S4		0x33
+#define SAVAGE_DESTCTRL_S4		0x34
+#define SAVAGE_DRAWCTRL0_S4		0x35
+#define SAVAGE_DRAWCTRL1_S4		0x36
+#define SAVAGE_ZWATERMARK_S4		0x37
+#define SAVAGE_DESTTEXRWWATERMARK_S4	0x38
+#define SAVAGE_TEXBLENDCOLOR_S4		0x39
+/* Savage3D/MX/IX 3D registers */
+#define SAVAGE_TEXPALADDR_S3D		0x18
+#define SAVAGE_TEXXPRCLR_S3D		0x19 /* never used */
+#define SAVAGE_TEXADDR_S3D		0x1A
+#define SAVAGE_TEXDESCR_S3D		0x1B
+#define SAVAGE_TEXCTRL_S3D		0x1C
+#define SAVAGE_FOGTABLE_S3D		0x20
+#define SAVAGE_FOGCTRL_S3D		0x30
+#define SAVAGE_DRAWCTRL_S3D		0x31
+#define SAVAGE_ZBUFCTRL_S3D		0x32
+#define SAVAGE_ZBUFOFF_S3D		0x33
+#define SAVAGE_DESTCTRL_S3D		0x34
+#define SAVAGE_SCSTART_S3D		0x35
+#define SAVAGE_SCEND_S3D		0x36
+#define SAVAGE_ZWATERMARK_S3D		0x37 
+#define SAVAGE_DESTTEXRWWATERMARK_S3D	0x38
+/* common stuff */
+#define SAVAGE_VERTBUFADDR		0x3e
+#define SAVAGE_BITPLANEWTMASK		0xd7
+#define SAVAGE_DMABUFADDR		0x51
+
+/* texture enable bits (needed for tex addr checking) */
+#define SAVAGE_TEXCTRL_TEXEN_MASK	0x00010000 /* S3D */
+#define SAVAGE_TEXDESCR_TEX0EN_MASK	0x02000000 /* S4 */
+#define SAVAGE_TEXDESCR_TEX1EN_MASK	0x04000000 /* S4 */
+
+/* Global fields in Savage4/Twister/ProSavage 3D registers:
+ *
+ * All texture registers and DrawLocalCtrl are local. All other
+ * registers are global. */
+
+/* Global fields in Savage3D/MX/IX 3D registers:
+ *
+ * All texture registers are local. DrawCtrl and ZBufCtrl are
+ * partially local. All other registers are global.
+ *
+ * DrawCtrl global fields: cullMode, alphaTestCmpFunc, alphaTestEn, alphaRefVal
+ * ZBufCtrl global fields: zCmpFunc, zBufEn
+ */
+#define SAVAGE_DRAWCTRL_S3D_GLOBAL	0x03f3c00c
+#define SAVAGE_ZBUFCTRL_S3D_GLOBAL	0x00000027
+
+/* Masks for scissor bits (drawCtrl[01] on s4, scissorStart/End on s3d)
+ */
+#define SAVAGE_SCISSOR_MASK_S4		0x00fff7ff
+#define SAVAGE_SCISSOR_MASK_S3D		0x07ff07ff
+
+/*
+ * BCI commands
+ */
+#define BCI_CMD_NOP                  0x40000000
+#define BCI_CMD_RECT                 0x48000000
+#define BCI_CMD_RECT_XP              0x01000000
+#define BCI_CMD_RECT_YP              0x02000000
+#define BCI_CMD_SCANLINE             0x50000000
+#define BCI_CMD_LINE                 0x5C000000
+#define BCI_CMD_LINE_LAST_PIXEL      0x58000000
+#define BCI_CMD_BYTE_TEXT            0x63000000
+#define BCI_CMD_NT_BYTE_TEXT         0x67000000
+#define BCI_CMD_BIT_TEXT             0x6C000000
+#define BCI_CMD_GET_ROP(cmd)         (((cmd) >> 16) & 0xFF)
+#define BCI_CMD_SET_ROP(cmd, rop)    ((cmd) |= ((rop & 0xFF) << 16))
+#define BCI_CMD_SEND_COLOR           0x00008000
+
+#define BCI_CMD_CLIP_NONE            0x00000000
+#define BCI_CMD_CLIP_CURRENT         0x00002000
+#define BCI_CMD_CLIP_LR              0x00004000
+#define BCI_CMD_CLIP_NEW             0x00006000
+
+#define BCI_CMD_DEST_GBD             0x00000000
+#define BCI_CMD_DEST_PBD             0x00000800
+#define BCI_CMD_DEST_PBD_NEW         0x00000C00
+#define BCI_CMD_DEST_SBD             0x00001000
+#define BCI_CMD_DEST_SBD_NEW         0x00001400
+
+#define BCI_CMD_SRC_TRANSPARENT      0x00000200
+#define BCI_CMD_SRC_SOLID            0x00000000
+#define BCI_CMD_SRC_GBD              0x00000020
+#define BCI_CMD_SRC_COLOR            0x00000040
+#define BCI_CMD_SRC_MONO             0x00000060
+#define BCI_CMD_SRC_PBD_COLOR        0x00000080
+#define BCI_CMD_SRC_PBD_MONO         0x000000A0
+#define BCI_CMD_SRC_PBD_COLOR_NEW    0x000000C0
+#define BCI_CMD_SRC_PBD_MONO_NEW     0x000000E0
+#define BCI_CMD_SRC_SBD_COLOR        0x00000100
+#define BCI_CMD_SRC_SBD_MONO         0x00000120
+#define BCI_CMD_SRC_SBD_COLOR_NEW    0x00000140
+#define BCI_CMD_SRC_SBD_MONO_NEW     0x00000160
+
+#define BCI_CMD_PAT_TRANSPARENT      0x00000010
+#define BCI_CMD_PAT_NONE             0x00000000
+#define BCI_CMD_PAT_COLOR            0x00000002
+#define BCI_CMD_PAT_MONO             0x00000003
+#define BCI_CMD_PAT_PBD_COLOR        0x00000004
+#define BCI_CMD_PAT_PBD_MONO         0x00000005
+#define BCI_CMD_PAT_PBD_COLOR_NEW    0x00000006
+#define BCI_CMD_PAT_PBD_MONO_NEW     0x00000007
+#define BCI_CMD_PAT_SBD_COLOR        0x00000008
+#define BCI_CMD_PAT_SBD_MONO         0x00000009
+#define BCI_CMD_PAT_SBD_COLOR_NEW    0x0000000A
+#define BCI_CMD_PAT_SBD_MONO_NEW     0x0000000B
+
+#define BCI_BD_BW_DISABLE            0x10000000
+#define BCI_BD_TILE_MASK             0x03000000
+#define BCI_BD_TILE_NONE             0x00000000
+#define BCI_BD_TILE_16               0x02000000
+#define BCI_BD_TILE_32               0x03000000
+#define BCI_BD_GET_BPP(bd)           (((bd) >> 16) & 0xFF)
+#define BCI_BD_SET_BPP(bd, bpp)      ((bd) |= (((bpp) & 0xFF) << 16))
+#define BCI_BD_GET_STRIDE(bd)        ((bd) & 0xFFFF)
+#define BCI_BD_SET_STRIDE(bd, st)    ((bd) |= ((st) & 0xFFFF))
+
+#define BCI_CMD_SET_REGISTER            0x96000000
+
+#define BCI_CMD_WAIT                    0xC0000000
+#define BCI_CMD_WAIT_3D                 0x00010000
+#define BCI_CMD_WAIT_2D                 0x00020000
+
+#define BCI_CMD_UPDATE_EVENT_TAG        0x98000000
+
+#define BCI_CMD_DRAW_PRIM               0x80000000
+#define BCI_CMD_DRAW_INDEXED_PRIM       0x88000000
+#define BCI_CMD_DRAW_CONT               0x01000000
+#define BCI_CMD_DRAW_TRILIST            0x00000000
+#define BCI_CMD_DRAW_TRISTRIP           0x02000000
+#define BCI_CMD_DRAW_TRIFAN             0x04000000
+#define BCI_CMD_DRAW_SKIPFLAGS          0x000000ff
+#define BCI_CMD_DRAW_NO_Z		0x00000001
+#define BCI_CMD_DRAW_NO_W		0x00000002
+#define BCI_CMD_DRAW_NO_CD		0x00000004
+#define BCI_CMD_DRAW_NO_CS		0x00000008
+#define BCI_CMD_DRAW_NO_U0		0x00000010
+#define BCI_CMD_DRAW_NO_V0		0x00000020
+#define BCI_CMD_DRAW_NO_UV0		0x00000030
+#define BCI_CMD_DRAW_NO_U1		0x00000040
+#define BCI_CMD_DRAW_NO_V1		0x00000080
+#define BCI_CMD_DRAW_NO_UV1		0x000000c0
+
+#define BCI_CMD_DMA			0xa8000000
+
+#define BCI_W_H(w, h)                ((((h) << 16) | (w)) & 0x0FFF0FFF)
+#define BCI_X_Y(x, y)                ((((y) << 16) | (x)) & 0x0FFF0FFF)
+#define BCI_X_W(x, y)                ((((w) << 16) | (x)) & 0x0FFF0FFF)
+#define BCI_CLIP_LR(l, r)            ((((r) << 16) | (l)) & 0x0FFF0FFF)
+#define BCI_CLIP_TL(t, l)            ((((t) << 16) | (l)) & 0x0FFF0FFF)
+#define BCI_CLIP_BR(b, r)            ((((b) << 16) | (r)) & 0x0FFF0FFF)
+
+#define BCI_LINE_X_Y(x, y)           (((y) << 16) | ((x) & 0xFFFF))
+#define BCI_LINE_STEPS(diag, axi)    (((axi) << 16) | ((diag) & 0xFFFF))
+#define BCI_LINE_MISC(maj, ym, xp, yp, err) \
+	(((maj) & 0x1FFF) | \
+	((ym) ? 1<<13 : 0) | \
+	((xp) ? 1<<14 : 0) | \
+	((yp) ? 1<<15 : 0) | \
+	((err) << 16))
+
+/*
+ * common commands
+ */
+#define BCI_SET_REGISTERS( first, n )			\
+	BCI_WRITE(BCI_CMD_SET_REGISTER |		\
+		  ((uint32_t)(n) & 0xff) << 16 |	\
+		  ((uint32_t)(first) & 0xffff))
+#define DMA_SET_REGISTERS( first, n )			\
+	DMA_WRITE(BCI_CMD_SET_REGISTER |		\
+		  ((uint32_t)(n) & 0xff) << 16 |	\
+		  ((uint32_t)(first) & 0xffff))
+
+#define BCI_DRAW_PRIMITIVE(n, type, skip)         \
+        BCI_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \
+		  ((n) << 16))
+#define DMA_DRAW_PRIMITIVE(n, type, skip)         \
+        DMA_WRITE(BCI_CMD_DRAW_PRIM | (type) | (skip) | \
+		  ((n) << 16))
+
+#define BCI_DRAW_INDICES_S3D(n, type, i0)         \
+        BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) |  \
+		  ((n) << 16) | (i0))
+
+#define BCI_DRAW_INDICES_S4(n, type, skip)        \
+        BCI_WRITE(BCI_CMD_DRAW_INDEXED_PRIM | (type) |  \
+                  (skip) | ((n) << 16))
+
+#define BCI_DMA(n)	\
+	BCI_WRITE(BCI_CMD_DMA | (((n) >> 1) - 1))
+
+/*
+ * access to MMIO
+ */
+#define SAVAGE_READ(reg)	DRM_READ32(  dev_priv->mmio, (reg) )
+#define SAVAGE_WRITE(reg)	DRM_WRITE32( dev_priv->mmio, (reg) )
+
+/*
+ * access to the burst command interface (BCI)
+ */
+#define SAVAGE_BCI_DEBUG 1
+
+#define BCI_LOCALS    volatile uint32_t *bci_ptr;
+
+#define BEGIN_BCI( n ) do {			\
+	dev_priv->wait_fifo(dev_priv, (n));	\
+	bci_ptr = dev_priv->bci_ptr;		\
+} while(0)
+
+#define BCI_WRITE( val ) *bci_ptr++ = (uint32_t)(val)
+
+#define BCI_COPY_FROM_USER(src,n) do {				\
+    unsigned int i;						\
+    for (i = 0; i < n; ++i) {					\
+	uint32_t val;						\
+	DRM_GET_USER_UNCHECKED(val, &((uint32_t*)(src))[i]);	\
+	BCI_WRITE(val);						\
+    }								\
+} while(0)
+
+/*
+ * command DMA support
+ */
+#define SAVAGE_DMA_DEBUG 1
+
+#define DMA_LOCALS   uint32_t *dma_ptr;
+
+#define BEGIN_DMA( n ) do {						\
+	unsigned int cur = dev_priv->current_dma_page;			\
+	unsigned int rest = SAVAGE_DMA_PAGE_SIZE -			\
+		dev_priv->dma_pages[cur].used;				\
+	if ((n) > rest) {						\
+		dma_ptr = savage_dma_alloc(dev_priv, (n));		\
+	} else { /* fast path for small allocations */			\
+		dma_ptr = (uint32_t *)dev_priv->cmd_dma->handle +	\
+			cur * SAVAGE_DMA_PAGE_SIZE +			\
+			dev_priv->dma_pages[cur].used;			\
+		if (dev_priv->dma_pages[cur].used == 0)			\
+			savage_dma_wait(dev_priv, cur);			\
+		dev_priv->dma_pages[cur].used += (n);			\
+	}								\
+} while(0)
+
+#define DMA_WRITE( val ) *dma_ptr++ = (uint32_t)(val)
+
+#define DMA_COPY_FROM_USER(src,n) do {				\
+	DRM_COPY_FROM_USER_UNCHECKED(dma_ptr, (src), (n)*4);	\
+	dma_ptr += n;						\
+} while(0)
+
+#if SAVAGE_DMA_DEBUG
+#define DMA_COMMIT() do {						\
+	unsigned int cur = dev_priv->current_dma_page;			\
+	uint32_t *expected = (uint32_t *)dev_priv->cmd_dma->handle +	\
+			cur * SAVAGE_DMA_PAGE_SIZE +			\
+			dev_priv->dma_pages[cur].used;			\
+	if (dma_ptr != expected) {					\
+		DRM_ERROR("DMA allocation and use don't match: "	\
+			  "%p != %p\n", expected, dma_ptr);		\
+		savage_dma_reset(dev_priv);				\
+	}								\
+} while(0)
+#else
+#define DMA_COMMIT() do {/* nothing */} while(0)
+#endif
+
+#define DMA_FLUSH() dev_priv->dma_flush(dev_priv)
+
+/* Buffer aging via event tag
+ */
+
+#define UPDATE_EVENT_COUNTER( ) do {			\
+	if (dev_priv->status_ptr) {			\
+		uint16_t count;				\
+		/* coordinate with Xserver */		\
+		count = dev_priv->status_ptr[1023];	\
+		if (count < dev_priv->event_counter)	\
+			dev_priv->event_wrap++;		\
+		dev_priv->event_counter = count;	\
+	}						\
+} while(0)
+
+#define SET_AGE( age, e, w ) do {	\
+	(age)->event = e;		\
+	(age)->wrap = w;		\
+} while(0)
+
+#define TEST_AGE( age, e, w )				\
+	( (age)->wrap < (w) || ( (age)->wrap == (w) && (age)->event <= (e) ) )
+
+#endif /* __SAVAGE_DRV_H__ */
diff --git a/sys/dev/drm/savage_state.c b/sys/dev/drm/savage_state.c
new file mode 100644
index 0000000..5181cbd
--- /dev/null
+++ b/sys/dev/drm/savage_state.c
@@ -0,0 +1,1149 @@
+/* savage_state.c -- State and drawing support for Savage
+ *
+ * Copyright 2004  Felix Kuehling
+ * All Rights Reserved.
+ *
+ * Permission is hereby granted, free of charge, to any person obtaining a
+ * copy of this software and associated documentation files (the "Software"),
+ * to deal in the Software without restriction, including without limitation
+ * the rights to use, copy, modify, merge, publish, distribute, sub license,
+ * and/or sell copies of the Software, and to permit persons to whom the
+ * Software is furnished to do so, subject to the following conditions:
+ *
+ * The above copyright notice and this permission notice (including the
+ * next paragraph) shall be included in all copies or substantial portions
+ * of the Software.
+ *
+ * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND,
+ * EXPRESS OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF
+ * MERCHANTABILITY, FITNESS FOR A PARTICULAR PURPOSE AND
+ * NON-INFRINGEMENT. IN NO EVENT SHALL FELIX KUEHLING BE LIABLE FOR
+ * ANY CLAIM, DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF
+ * CONTRACT, TORT OR OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION
+ * WITH THE SOFTWARE OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
+ *
+ * $FreeBSD$
+ */
+
+#include "drmP.h"
+#include "savage_drm.h"
+#include "savage_drv.h"
+
+void savage_emit_clip_rect_s3d(drm_savage_private_t *dev_priv,
+			       drm_clip_rect_t *pbox)
+{
+	uint32_t scstart = dev_priv->state.s3d.new_scstart;
+	uint32_t scend   = dev_priv->state.s3d.new_scend;
+	scstart = (scstart & ~SAVAGE_SCISSOR_MASK_S3D) |
+		((uint32_t)pbox->x1 & 0x000007ff) | 
+		(((uint32_t)pbox->y1 << 16) & 0x07ff0000);
+	scend   = (scend   & ~SAVAGE_SCISSOR_MASK_S3D) |
+		(((uint32_t)pbox->x2-1) & 0x000007ff) |
+		((((uint32_t)pbox->y2-1) << 16) & 0x07ff0000);
+	if (scstart != dev_priv->state.s3d.scstart ||
+	    scend   != dev_priv->state.s3d.scend) {
+		DMA_LOCALS;
+		BEGIN_DMA(4);
+		DMA_WRITE(BCI_CMD_WAIT|BCI_CMD_WAIT_3D);
+		DMA_SET_REGISTERS(SAVAGE_SCSTART_S3D, 2);
+		DMA_WRITE(scstart);
+		DMA_WRITE(scend);
+		dev_priv->state.s3d.scstart = scstart;
+		dev_priv->state.s3d.scend   = scend;
+		dev_priv->waiting = 1;
+		DMA_COMMIT();
+	}
+}
+
+void savage_emit_clip_rect_s4(drm_savage_private_t *dev_priv,
+			      drm_clip_rect_t *pbox)
+{
+	uint32_t drawctrl0 = dev_priv->state.s4.new_drawctrl0;
+	uint32_t drawctrl1 = dev_priv->state.s4.new_drawctrl1;
+	drawctrl0 = (drawctrl0 & ~SAVAGE_SCISSOR_MASK_S4) |
+		((uint32_t)pbox->x1 & 0x000007ff) |
+		(((uint32_t)pbox->y1 << 12) & 0x00fff000);
+	drawctrl1 = (drawctrl1 & ~SAVAGE_SCISSOR_MASK_S4) |
+		(((uint32_t)pbox->x2-1) & 0x000007ff) |
+		((((uint32_t)pbox->y2-1) << 12) & 0x00fff000);
+	if (drawctrl0 != dev_priv->state.s4.drawctrl0 ||
+	    drawctrl1 != dev_priv->state.s4.drawctrl1) {
+		DMA_LOCALS;
+		BEGIN_DMA(4);
+		DMA_WRITE(BCI_CMD_WAIT|BCI_CMD_WAIT_3D);
+		DMA_SET_REGISTERS(SAVAGE_DRAWCTRL0_S4, 2);
+		DMA_WRITE(drawctrl0);
+		DMA_WRITE(drawctrl1);
+		dev_priv->state.s4.drawctrl0 = drawctrl0;
+		dev_priv->state.s4.drawctrl1 = drawctrl1;
+		dev_priv->waiting = 1;
+		DMA_COMMIT();
+	}
+}
+
+static int savage_verify_texaddr(drm_savage_private_t *dev_priv, int unit,
+				 uint32_t addr)
+{
+	if ((addr & 6) != 2) { /* reserved bits */
+		DRM_ERROR("bad texAddr%d %08x (reserved bits)\n", unit, addr);
+		return DRM_ERR(EINVAL);
+	}
+	if (!(addr & 1)) { /* local */
+		addr &= ~7;
+		if (addr <  dev_priv->texture_offset ||
+		    addr >= dev_priv->texture_offset+dev_priv->texture_size) {
+			DRM_ERROR("bad texAddr%d %08x (local addr out of range)\n",
+				  unit, addr);
+			return DRM_ERR(EINVAL);
+		}
+	} else { /* AGP */
+		if (!dev_priv->agp_textures) {
+			DRM_ERROR("bad texAddr%d %08x (AGP not available)\n",
+				  unit, addr);
+			return DRM_ERR(EINVAL);
+		}
+		addr &= ~7;
+		if (addr < dev_priv->agp_textures->offset ||
+		    addr >= (dev_priv->agp_textures->offset +
+			     dev_priv->agp_textures->size)) {
+			DRM_ERROR("bad texAddr%d %08x (AGP addr out of range)\n",
+				  unit, addr);
+			return DRM_ERR(EINVAL);
+		}
+	}
+	return 0;
+}
+
+#define SAVE_STATE(reg,where)			\
+	if(start <= reg && start+count > reg)	\
+		DRM_GET_USER_UNCHECKED(dev_priv->state.where, &regs[reg-start])
+#define SAVE_STATE_MASK(reg,where,mask) do {			\
+	if(start <= reg && start+count > reg) {			\
+		uint32_t tmp;					\
+		DRM_GET_USER_UNCHECKED(tmp, &regs[reg-start]);	\
+		dev_priv->state.where = (tmp & (mask)) |	\
+			(dev_priv->state.where & ~(mask));	\
+	}							\
+} while (0)
+static int savage_verify_state_s3d(drm_savage_private_t *dev_priv,
+				   unsigned int start, unsigned int count,
+				   const uint32_t __user *regs)
+{
+	if (start < SAVAGE_TEXPALADDR_S3D ||
+	    start+count-1 > SAVAGE_DESTTEXRWWATERMARK_S3D) {
+		DRM_ERROR("invalid register range (0x%04x-0x%04x)\n",
+			  start, start+count-1);
+		return DRM_ERR(EINVAL);
+	}
+
+	SAVE_STATE_MASK(SAVAGE_SCSTART_S3D, s3d.new_scstart,
+			~SAVAGE_SCISSOR_MASK_S3D);
+	SAVE_STATE_MASK(SAVAGE_SCEND_S3D, s3d.new_scend,
+			~SAVAGE_SCISSOR_MASK_S3D);
+
+	/* if any texture regs were changed ... */
+	if (start <= SAVAGE_TEXCTRL_S3D &&
+	    start+count > SAVAGE_TEXPALADDR_S3D) {
+		/* ... check texture state */
+		SAVE_STATE(SAVAGE_TEXCTRL_S3D, s3d.texctrl);
+		SAVE_STATE(SAVAGE_TEXADDR_S3D, s3d.texaddr);
+		if (dev_priv->state.s3d.texctrl & SAVAGE_TEXCTRL_TEXEN_MASK)
+			return savage_verify_texaddr(
+				dev_priv, 0, dev_priv->state.s3d.texaddr);
+	}
+
+	return 0;
+}
+
+static int savage_verify_state_s4(drm_savage_private_t *dev_priv,
+				  unsigned int start, unsigned int count,
+				  const uint32_t __user *regs)
+{
+	int ret = 0;
+
+	if (start < SAVAGE_DRAWLOCALCTRL_S4 ||
+	    start+count-1 > SAVAGE_TEXBLENDCOLOR_S4) {
+		DRM_ERROR("invalid register range (0x%04x-0x%04x)\n",
+			  start, start+count-1);
+		return DRM_ERR(EINVAL);
+	}
+
+	SAVE_STATE_MASK(SAVAGE_DRAWCTRL0_S4, s4.new_drawctrl0,
+			~SAVAGE_SCISSOR_MASK_S4);
+	SAVE_STATE_MASK(SAVAGE_DRAWCTRL1_S4, s4.new_drawctrl1,
+			~SAVAGE_SCISSOR_MASK_S4);
+
+	/* if any texture regs were changed ... */
+	if (start <= SAVAGE_TEXDESCR_S4 &&
+	    start+count > SAVAGE_TEXPALADDR_S4) {
+		/* ... check texture state */
+		SAVE_STATE(SAVAGE_TEXDESCR_S4, s4.texdescr);
+		SAVE_STATE(SAVAGE_TEXADDR0_S4, s4.texaddr0);
+		SAVE_STATE(SAVAGE_TEXADDR1_S4, s4.texaddr1);
+		if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX0EN_MASK)
+			ret |= savage_verify_texaddr(
+				dev_priv, 0, dev_priv->state.s4.texaddr0);
+		if (dev_priv->state.s4.texdescr & SAVAGE_TEXDESCR_TEX1EN_MASK)
+			ret |= savage_verify_texaddr(
+				dev_priv, 1, dev_priv->state.s4.texaddr1);
+	}
+
+	return ret;
+}
+#undef SAVE_STATE
+#undef SAVE_STATE_MASK
+
+static int savage_dispatch_state(drm_savage_private_t *dev_priv,
+				 const drm_savage_cmd_header_t *cmd_header,
+				 const uint32_t __user *regs)
+{
+	DMA_LOCALS;
+	unsigned int count = cmd_header->state.count;
+	unsigned int start = cmd_header->state.start;
+	unsigned int count2 = 0;
+	unsigned int bci_size;
+	int ret;
+
+	if (!count)
+		return 0;
+
+	if (DRM_VERIFYAREA_READ(regs, count*4))
+		return DRM_ERR(EFAULT);
+
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		ret = savage_verify_state_s3d(dev_priv, start, count, regs);
+		if (ret != 0)
+			return ret;
+		/* scissor regs are emitted in savage_dispatch_draw */
+		if (start < SAVAGE_SCSTART_S3D) {
+			if (start+count > SAVAGE_SCEND_S3D+1)
+				count2 = count - (SAVAGE_SCEND_S3D+1 - start);
+			if (start+count > SAVAGE_SCSTART_S3D)
+				count = SAVAGE_SCSTART_S3D - start;
+		} else if (start <= SAVAGE_SCEND_S3D) {
+			if (start+count > SAVAGE_SCEND_S3D+1) {
+				count -= SAVAGE_SCEND_S3D+1 - start;
+				start = SAVAGE_SCEND_S3D+1;
+			} else
+				return 0;
+		}
+	} else {
+		ret = savage_verify_state_s4(dev_priv, start, count, regs);
+		if (ret != 0)
+			return ret;
+		/* scissor regs are emitted in savage_dispatch_draw */
+		if (start < SAVAGE_DRAWCTRL0_S4) {
+			if (start+count > SAVAGE_DRAWCTRL1_S4+1)
+				count2 = count - (SAVAGE_DRAWCTRL1_S4+1 - start);
+			if (start+count > SAVAGE_DRAWCTRL0_S4)
+				count = SAVAGE_DRAWCTRL0_S4 - start;
+		} else if (start <= SAVAGE_DRAWCTRL1_S4) {
+			if (start+count > SAVAGE_DRAWCTRL1_S4+1) {
+				count -= SAVAGE_DRAWCTRL1_S4+1 - start;
+				start = SAVAGE_DRAWCTRL1_S4+1;
+			} else
+				return 0;
+		}
+	}
+
+	bci_size = count + (count+254)/255 + count2 + (count2+254)/255;
+
+	if (cmd_header->state.global) {
+		BEGIN_DMA(bci_size+1);
+		DMA_WRITE(BCI_CMD_WAIT | BCI_CMD_WAIT_3D);
+		dev_priv->waiting = 1;
+	} else {
+		BEGIN_DMA(bci_size);
+	}
+
+	do {
+		while (count > 0) {
+			unsigned int n = count < 255 ? count : 255;
+			DMA_SET_REGISTERS(start, n);
+			DMA_COPY_FROM_USER(regs, n);
+			count -= n;
+			start += n;
+			regs += n;
+		}
+		start += 2;
+		regs += 2;
+		count = count2;
+		count2 = 0;
+	} while (count);
+
+	DMA_COMMIT();
+
+	return 0;
+}
+
+static int savage_dispatch_dma_prim(drm_savage_private_t *dev_priv,
+				    const drm_savage_cmd_header_t *cmd_header,
+				    const drm_buf_t *dmabuf)
+{
+	BCI_LOCALS;
+	unsigned char reorder = 0;
+	unsigned int prim = cmd_header->prim.prim;
+	unsigned int skip = cmd_header->prim.skip;
+	unsigned int n = cmd_header->prim.count;
+	unsigned int start = cmd_header->prim.start;
+	unsigned int i;
+
+	if (!dmabuf) {
+	    DRM_ERROR("called without dma buffers!\n");
+	    return DRM_ERR(EINVAL);
+	}
+
+	if (!n)
+		return 0;
+
+	switch (prim) {
+	case SAVAGE_PRIM_TRILIST_201:
+		reorder = 1;
+		prim = SAVAGE_PRIM_TRILIST;
+	case SAVAGE_PRIM_TRILIST:
+		if (n % 3 != 0) {
+			DRM_ERROR("wrong number of vertices %u in TRILIST\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	case SAVAGE_PRIM_TRISTRIP:
+	case SAVAGE_PRIM_TRIFAN:
+		if (n < 3) {
+			DRM_ERROR("wrong number of vertices %u in TRIFAN/STRIP\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	default:
+		DRM_ERROR("invalid primitive type %u\n", prim);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		if (skip != 0) {
+			DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
+				  skip);
+			return DRM_ERR(EINVAL);
+		}
+	} else {
+		unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) -
+			(skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) -
+			(skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1);
+		if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) {
+			DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
+				  skip);
+			return DRM_ERR(EINVAL);
+		}
+		if (reorder) {
+			DRM_ERROR("TRILIST_201 used on Savage4 hardware\n");
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+	if (start + n > dmabuf->total/32) {
+		DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n",
+			  start, start + n - 1, dmabuf->total/32);
+		return DRM_ERR(EINVAL);
+	}
+
+	/* Vertex DMA doesn't work with command DMA at the same time,
+	 * so we use BCI_... to submit commands here. Flush buffered
+	 * faked DMA first. */
+	DMA_FLUSH();
+
+	if (dmabuf->bus_address != dev_priv->state.common.vbaddr) {
+		BEGIN_BCI(2);
+		BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1);
+		BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type);
+		dev_priv->state.common.vbaddr = dmabuf->bus_address;
+	}
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) {
+		/* Workaround for what looks like a hardware bug. If a
+		 * WAIT_3D_IDLE was emitted some time before the
+		 * indexed drawing command then the engine will lock
+		 * up. There are two known workarounds:
+		 * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */
+		BEGIN_BCI(63);
+		for (i = 0; i < 63; ++i)
+			BCI_WRITE(BCI_CMD_WAIT);
+		dev_priv->waiting = 0;
+	}
+
+	prim <<= 25;
+	while (n != 0) {
+		/* Can emit up to 255 indices (85 triangles) at once. */
+		unsigned int count = n > 255 ? 255 : n;
+		if (reorder) {
+			/* Need to reorder indices for correct flat
+			 * shading while preserving the clock sense
+			 * for correct culling. Only on Savage3D. */
+			int reorder[3] = {-1, -1, -1};
+			reorder[start%3] = 2;
+
+			BEGIN_BCI((count+1+1)/2);
+			BCI_DRAW_INDICES_S3D(count, prim, start+2);
+
+			for (i = start+1; i+1 < start+count; i += 2)
+				BCI_WRITE((i + reorder[i % 3]) |
+					  ((i+1 + reorder[(i+1) % 3]) << 16));
+			if (i < start+count)
+				BCI_WRITE(i + reorder[i%3]);
+		} else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+			BEGIN_BCI((count+1+1)/2);
+			BCI_DRAW_INDICES_S3D(count, prim, start);
+
+			for (i = start+1; i+1 < start+count; i += 2)
+				BCI_WRITE(i | ((i+1) << 16));
+			if (i < start+count)
+				BCI_WRITE(i);
+		} else {
+			BEGIN_BCI((count+2+1)/2);
+			BCI_DRAW_INDICES_S4(count, prim, skip);
+
+			for (i = start; i+1 < start+count; i += 2)
+				BCI_WRITE(i | ((i+1) << 16));
+			if (i < start+count)
+				BCI_WRITE(i);
+		}
+
+		start += count;
+		n -= count;
+
+		prim |= BCI_CMD_DRAW_CONT;
+	}
+
+	return 0;
+}
+
+static int savage_dispatch_vb_prim(drm_savage_private_t *dev_priv,
+				   const drm_savage_cmd_header_t *cmd_header,
+				   const uint32_t __user *vtxbuf,
+				   unsigned int vb_size,
+				   unsigned int vb_stride)
+{
+	DMA_LOCALS;
+	unsigned char reorder = 0;
+	unsigned int prim = cmd_header->prim.prim;
+	unsigned int skip = cmd_header->prim.skip;
+	unsigned int n = cmd_header->prim.count;
+	unsigned int start = cmd_header->prim.start;
+	unsigned int vtx_size;
+	unsigned int i;
+
+	if (!n)
+		return 0;
+
+	switch (prim) {
+	case SAVAGE_PRIM_TRILIST_201:
+		reorder = 1;
+		prim = SAVAGE_PRIM_TRILIST;
+	case SAVAGE_PRIM_TRILIST:
+		if (n % 3 != 0) {
+			DRM_ERROR("wrong number of vertices %u in TRILIST\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	case SAVAGE_PRIM_TRISTRIP:
+	case SAVAGE_PRIM_TRIFAN:
+		if (n < 3) {
+			DRM_ERROR("wrong number of vertices %u in TRIFAN/STRIP\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	default:
+		DRM_ERROR("invalid primitive type %u\n", prim);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		if (skip > SAVAGE_SKIP_ALL_S3D) {
+			DRM_ERROR("invalid skip flags 0x%04x\n", skip);
+			return DRM_ERR(EINVAL);
+		}
+		vtx_size = 8; /* full vertex */
+	} else {
+		if (skip > SAVAGE_SKIP_ALL_S4) {
+			DRM_ERROR("invalid skip flags 0x%04x\n", skip);
+			return DRM_ERR(EINVAL);
+		}
+		vtx_size = 10; /* full vertex */
+	}
+
+	vtx_size -= (skip & 1) + (skip >> 1 & 1) +
+		(skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) +
+		(skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1);
+
+	if (vtx_size > vb_stride) {
+		DRM_ERROR("vertex size greater than vb stride (%u > %u)\n",
+			  vtx_size, vb_stride);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (start + n > vb_size / (vb_stride*4)) {
+		DRM_ERROR("vertex indices (%u-%u) out of range (0-%u)\n",
+			  start, start + n - 1, vb_size / (vb_stride*4));
+		return DRM_ERR(EINVAL);
+	}
+
+	prim <<= 25;
+	while (n != 0) {
+		/* Can emit up to 255 vertices (85 triangles) at once. */
+		unsigned int count = n > 255 ? 255 : n;
+		if (reorder) {
+			/* Need to reorder vertices for correct flat
+			 * shading while preserving the clock sense
+			 * for correct culling. Only on Savage3D. */
+			int reorder[3] = {-1, -1, -1};
+			reorder[start%3] = 2;
+
+			BEGIN_DMA(count*vtx_size+1);
+			DMA_DRAW_PRIMITIVE(count, prim, skip);
+
+			for (i = start; i < start+count; ++i) {
+				unsigned int j = i + reorder[i % 3];
+				DMA_COPY_FROM_USER(&vtxbuf[vb_stride*j],
+						   vtx_size);
+			}
+
+			DMA_COMMIT();
+		} else {
+			BEGIN_DMA(count*vtx_size+1);
+			DMA_DRAW_PRIMITIVE(count, prim, skip);
+
+			if (vb_stride == vtx_size) {
+				DMA_COPY_FROM_USER(&vtxbuf[vb_stride*start],
+						   vtx_size*count);
+			} else {
+				for (i = start; i < start+count; ++i) {
+					DMA_COPY_FROM_USER(
+						&vtxbuf[vb_stride*i],
+						vtx_size);
+				}
+			}
+
+			DMA_COMMIT();
+		}
+
+		start += count;
+		n -= count;
+
+		prim |= BCI_CMD_DRAW_CONT;
+	}
+
+	return 0;
+}
+
+static int savage_dispatch_dma_idx(drm_savage_private_t *dev_priv,
+				   const drm_savage_cmd_header_t *cmd_header,
+				   const uint16_t __user *usr_idx,
+				   const drm_buf_t *dmabuf)
+{
+	BCI_LOCALS;
+	unsigned char reorder = 0;
+	unsigned int prim = cmd_header->idx.prim;
+	unsigned int skip = cmd_header->idx.skip;
+	unsigned int n = cmd_header->idx.count;
+	unsigned int i;
+
+	if (!dmabuf) {
+	    DRM_ERROR("called without dma buffers!\n");
+	    return DRM_ERR(EINVAL);
+	}
+
+	if (!n)
+		return 0;
+
+	switch (prim) {
+	case SAVAGE_PRIM_TRILIST_201:
+		reorder = 1;
+		prim = SAVAGE_PRIM_TRILIST;
+	case SAVAGE_PRIM_TRILIST:
+		if (n % 3 != 0) {
+			DRM_ERROR("wrong number of indices %u in TRILIST\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	case SAVAGE_PRIM_TRISTRIP:
+	case SAVAGE_PRIM_TRIFAN:
+		if (n < 3) {
+			DRM_ERROR("wrong number of indices %u in TRIFAN/STRIP\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	default:
+		DRM_ERROR("invalid primitive type %u\n", prim);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		if (skip != 0) {
+			DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
+				  skip);
+			return DRM_ERR(EINVAL);
+		}
+	} else {
+		unsigned int size = 10 - (skip & 1) - (skip >> 1 & 1) -
+			(skip >> 2 & 1) - (skip >> 3 & 1) - (skip >> 4 & 1) -
+			(skip >> 5 & 1) - (skip >> 6 & 1) - (skip >> 7 & 1);
+		if (skip > SAVAGE_SKIP_ALL_S4 || size != 8) {
+			DRM_ERROR("invalid skip flags 0x%04x for DMA\n",
+				  skip);
+			return DRM_ERR(EINVAL);
+		}
+		if (reorder) {
+			DRM_ERROR("TRILIST_201 used on Savage4 hardware\n");
+			return DRM_ERR(EINVAL);
+		}
+	}
+
+	/* Vertex DMA doesn't work with command DMA at the same time,
+	 * so we use BCI_... to submit commands here. Flush buffered
+	 * faked DMA first. */
+	DMA_FLUSH();
+
+	if (dmabuf->bus_address != dev_priv->state.common.vbaddr) {
+		BEGIN_BCI(2);
+		BCI_SET_REGISTERS(SAVAGE_VERTBUFADDR, 1);
+		BCI_WRITE(dmabuf->bus_address | dev_priv->dma_type);
+		dev_priv->state.common.vbaddr = dmabuf->bus_address;
+	}
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset) && dev_priv->waiting) {
+		/* Workaround for what looks like a hardware bug. If a
+		 * WAIT_3D_IDLE was emitted some time before the
+		 * indexed drawing command then the engine will lock
+		 * up. There are two known workarounds:
+		 * WAIT_IDLE_EMPTY or emit at least 63 NOPs. */
+		BEGIN_BCI(63);
+		for (i = 0; i < 63; ++i)
+			BCI_WRITE(BCI_CMD_WAIT);
+		dev_priv->waiting = 0;
+	}
+
+	prim <<= 25;
+	while (n != 0) {
+		/* Can emit up to 255 indices (85 triangles) at once. */
+		unsigned int count = n > 255 ? 255 : n;
+		/* Is it ok to allocate 510 bytes on the stack in an ioctl? */
+		uint16_t idx[255];
+
+		/* Copy and check indices */
+		DRM_COPY_FROM_USER_UNCHECKED(idx, usr_idx, count*2);
+		for (i = 0; i < count; ++i) {
+			if (idx[i] > dmabuf->total/32) {
+				DRM_ERROR("idx[%u]=%u out of range (0-%u)\n",
+					  i, idx[i], dmabuf->total/32);
+				return DRM_ERR(EINVAL);
+			}
+		}
+
+		if (reorder) {
+			/* Need to reorder indices for correct flat
+			 * shading while preserving the clock sense
+			 * for correct culling. Only on Savage3D. */
+			int reorder[3] = {2, -1, -1};
+
+			BEGIN_BCI((count+1+1)/2);
+			BCI_DRAW_INDICES_S3D(count, prim, idx[2]);
+
+			for (i = 1; i+1 < count; i += 2)
+				BCI_WRITE(idx[i + reorder[i % 3]] |
+					  (idx[i+1 + reorder[(i+1) % 3]] << 16));
+			if (i < count)
+				BCI_WRITE(idx[i + reorder[i%3]]);
+		} else if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+			BEGIN_BCI((count+1+1)/2);
+			BCI_DRAW_INDICES_S3D(count, prim, idx[0]);
+
+			for (i = 1; i+1 < count; i += 2)
+				BCI_WRITE(idx[i] | (idx[i+1] << 16));
+			if (i < count)
+				BCI_WRITE(idx[i]);
+		} else {
+			BEGIN_BCI((count+2+1)/2);
+			BCI_DRAW_INDICES_S4(count, prim, skip);
+
+			for (i = 0; i+1 < count; i += 2)
+				BCI_WRITE(idx[i] | (idx[i+1] << 16));
+			if (i < count)
+				BCI_WRITE(idx[i]);
+		}
+
+		usr_idx += count;
+		n -= count;
+
+		prim |= BCI_CMD_DRAW_CONT;
+	}
+
+	return 0;
+}
+
+static int savage_dispatch_vb_idx(drm_savage_private_t *dev_priv,
+				  const drm_savage_cmd_header_t *cmd_header,
+				  const uint16_t __user *usr_idx,
+				  const uint32_t __user *vtxbuf,
+				  unsigned int vb_size,
+				  unsigned int vb_stride)
+{
+	DMA_LOCALS;
+	unsigned char reorder = 0;
+	unsigned int prim = cmd_header->idx.prim;
+	unsigned int skip = cmd_header->idx.skip;
+	unsigned int n = cmd_header->idx.count;
+	unsigned int vtx_size;
+	unsigned int i;
+
+	if (!n)
+		return 0;
+
+	switch (prim) {
+	case SAVAGE_PRIM_TRILIST_201:
+		reorder = 1;
+		prim = SAVAGE_PRIM_TRILIST;
+	case SAVAGE_PRIM_TRILIST:
+		if (n % 3 != 0) {
+			DRM_ERROR("wrong number of indices %u in TRILIST\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	case SAVAGE_PRIM_TRISTRIP:
+	case SAVAGE_PRIM_TRIFAN:
+		if (n < 3) {
+			DRM_ERROR("wrong number of indices %u in TRIFAN/STRIP\n",
+				  n);
+			return DRM_ERR(EINVAL);
+		}
+		break;
+	default:
+		DRM_ERROR("invalid primitive type %u\n", prim);
+		return DRM_ERR(EINVAL);
+	}
+
+	if (S3_SAVAGE3D_SERIES(dev_priv->chipset)) {
+		if (skip > SAVAGE_SKIP_ALL_S3D) {
+			DRM_ERROR("invalid skip flags 0x%04x\n", skip);
+			return DRM_ERR(EINVAL);
+		}
+		vtx_size = 8; /* full vertex */
+	} else {
+		if (skip > SAVAGE_SKIP_ALL_S4) {
+			DRM_ERROR("invalid skip flags 0x%04x\n", skip);
+			return DRM_ERR(EINVAL);
+		}
+		vtx_size = 10; /* full vertex */
+	}
+
+	vtx_size -= (skip & 1) + (skip >> 1 & 1) +
+		(skip >> 2 & 1) + (skip >> 3 & 1) + (skip >> 4 & 1) +
+		(skip >> 5 & 1) + (skip >> 6 & 1) + (skip >> 7 & 1);
+
+	if (vtx_size > vb_stride) {
+		DRM_ERROR("vertex size greater than vb stride (%u > %u)\n",
+			  vtx_size, vb_stride);
+		return DRM_ERR(EINVAL);
+	}
+
+	prim <<= 25;
+	while (n != 0) {
+		/* Can emit up to 255 vertices (85 triangles) at once. */
+		unsigned int count = n > 255 ? 255 : n;
+		/* Is it ok to allocate 510 bytes on the stack in an ioctl? */
+		uint16_t idx[255];
+
+		/* Copy and check indices */
+		DRM_COPY_FROM_USER_UNCHECKED(idx, usr_idx, count*2);
+		for (i = 0; i < count; ++i) {
+			if (idx[i] > vb_size / (vb_stride*4)) {
+				DRM_ERROR("idx[%u]=%u out of range (0-%u)\n",
+					  i, idx[i],  vb_size / (vb_stride*4));
+				return DRM_ERR(EINVAL);
+			}
+		}
+
+		if (reorder) {
+			/* Need to reorder vertices for correct flat
+			 * shading while preserving the clock sense
+			 * for correct culling. Only on Savage3D. */
+			int reorder[3] = {2, -1, -1};
+
+			BEGIN_DMA(count*vtx_size+1);
+			DMA_DRAW_PRIMITIVE(count, prim, skip);
+
+			for (i = 0; i < count; ++i) {
+				unsigned int j = idx[i + reorder[i % 3]];
+				DMA_COPY_FROM_USER(&vtxbuf[vb_stride*j],
+						   vtx_size);
+			}
+
+			DMA_COMMIT();
+		} else {
+			BEGIN_DMA(count*vtx_size+1);
+			DMA_DRAW_PRIMITIVE(count, prim, skip);
+
+			for (i = 0; i < count; ++i) {
+				unsigned int j = idx[i];
+				DMA_COPY_FROM_USER(&vtxbuf[vb_stride*j],
+						   vtx_size);
+			}
+
+			DMA_COMMIT();
+		}
+
+		usr_idx += count;
+		n -= count;
+
+		prim |= BCI_CMD_DRAW_CONT;
+	}
+
+	return 0;
+}
+
+static int savage_dispatch_clear(drm_savage_private_t *dev_priv,
+				 const drm_savage_cmd_header_t *cmd_header,
+				 const drm_savage_cmd_header_t __user *data,
+				 unsigned int nbox,
+				 const drm_clip_rect_t __user *usr_boxes)
+{
+	DMA_LOCALS;
+	unsigned int flags = cmd_header->clear0.flags, mask, value;
+	unsigned int clear_cmd;
+	unsigned int i, nbufs;
+
+	if (nbox == 0)
+		return 0;
+
+	DRM_GET_USER_UNCHECKED(mask, &((drm_savage_cmd_header_t*)data)
+			       ->clear1.mask);
+	DRM_GET_USER_UNCHECKED(value, &((drm_savage_cmd_header_t*)data)
+			       ->clear1.value);
+
+	clear_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
+		BCI_CMD_SEND_COLOR | BCI_CMD_DEST_PBD_NEW;
+	BCI_CMD_SET_ROP(clear_cmd,0xCC);
+
+	nbufs = ((flags & SAVAGE_FRONT) ? 1 : 0) +
+		((flags & SAVAGE_BACK) ? 1 : 0) +
+		((flags & SAVAGE_DEPTH) ? 1 : 0);
+	if (nbufs == 0)
+		return 0;
+
+	if (mask != 0xffffffff) {
+		/* set mask */
+		BEGIN_DMA(2);
+		DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);
+		DMA_WRITE(mask);
+		DMA_COMMIT();
+	}
+	for (i = 0; i < nbox; ++i) {
+		drm_clip_rect_t box;
+		unsigned int x, y, w, h;
+		unsigned int buf;
+		DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));
+		x = box.x1, y = box.y1;
+		w = box.x2 - box.x1;
+		h = box.y2 - box.y1;
+		BEGIN_DMA(nbufs*6);
+		for (buf = SAVAGE_FRONT; buf <= SAVAGE_DEPTH; buf <<= 1) {
+			if (!(flags & buf))
+				continue;
+			DMA_WRITE(clear_cmd);
+			switch(buf) {
+			case SAVAGE_FRONT:
+				DMA_WRITE(dev_priv->front_offset);
+				DMA_WRITE(dev_priv->front_bd);
+				break;
+			case SAVAGE_BACK:
+				DMA_WRITE(dev_priv->back_offset);
+				DMA_WRITE(dev_priv->back_bd);
+				break;
+			case SAVAGE_DEPTH:
+				DMA_WRITE(dev_priv->depth_offset);
+				DMA_WRITE(dev_priv->depth_bd);
+				break;
+			}
+			DMA_WRITE(value);
+			DMA_WRITE(BCI_X_Y(x, y));
+			DMA_WRITE(BCI_W_H(w, h));
+		}
+		DMA_COMMIT();
+	}
+	if (mask != 0xffffffff) {
+		/* reset mask */
+		BEGIN_DMA(2);
+		DMA_SET_REGISTERS(SAVAGE_BITPLANEWTMASK, 1);
+		DMA_WRITE(0xffffffff);
+		DMA_COMMIT();
+	}
+
+	return 0;
+}
+
+static int savage_dispatch_swap(drm_savage_private_t *dev_priv,
+				unsigned int nbox,
+				const drm_clip_rect_t __user *usr_boxes)
+{
+	DMA_LOCALS;
+	unsigned int swap_cmd;
+	unsigned int i;
+
+	if (nbox == 0)
+		return 0;
+
+	swap_cmd = BCI_CMD_RECT | BCI_CMD_RECT_XP | BCI_CMD_RECT_YP |
+		BCI_CMD_SRC_PBD_COLOR_NEW | BCI_CMD_DEST_GBD;
+	BCI_CMD_SET_ROP(swap_cmd,0xCC);
+
+	for (i = 0; i < nbox; ++i) {
+		drm_clip_rect_t box;
+		DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));
+
+		BEGIN_DMA(6);
+		DMA_WRITE(swap_cmd);
+		DMA_WRITE(dev_priv->back_offset);
+		DMA_WRITE(dev_priv->back_bd);
+		DMA_WRITE(BCI_X_Y(box.x1, box.y1));
+		DMA_WRITE(BCI_X_Y(box.x1, box.y1));
+		DMA_WRITE(BCI_W_H(box.x2-box.x1, box.y2-box.y1));
+		DMA_COMMIT();
+	}
+
+	return 0;
+}
+
+static int savage_dispatch_draw(drm_savage_private_t *dev_priv,
+				const drm_savage_cmd_header_t __user *start,
+				const drm_savage_cmd_header_t __user *end,
+				const drm_buf_t *dmabuf,
+				const unsigned int __user *usr_vtxbuf,
+				unsigned int vb_size, unsigned int vb_stride,
+				unsigned int nbox,
+				const drm_clip_rect_t __user *usr_boxes)
+{
+	unsigned int i, j;
+	int ret;
+
+	for (i = 0; i < nbox; ++i) {
+		drm_clip_rect_t box;
+		const drm_savage_cmd_header_t __user *usr_cmdbuf;
+		DRM_COPY_FROM_USER_UNCHECKED(&box, &usr_boxes[i], sizeof(box));
+		dev_priv->emit_clip_rect(dev_priv, &box);
+
+		usr_cmdbuf = start;
+		while (usr_cmdbuf < end) {
+			drm_savage_cmd_header_t cmd_header;
+			DRM_COPY_FROM_USER_UNCHECKED(&cmd_header, usr_cmdbuf,
+						     sizeof(cmd_header));
+			usr_cmdbuf++;
+			switch (cmd_header.cmd.cmd) {
+			case SAVAGE_CMD_DMA_PRIM:
+				ret = savage_dispatch_dma_prim(
+					dev_priv, &cmd_header, dmabuf);
+				break;
+			case SAVAGE_CMD_VB_PRIM:
+				ret = savage_dispatch_vb_prim(
+					dev_priv, &cmd_header,
+					(uint32_t __user *)usr_vtxbuf,
+					vb_size, vb_stride);
+				break;
+			case SAVAGE_CMD_DMA_IDX:
+				j = (cmd_header.idx.count + 3) / 4;
+				/* j was check in savage_bci_cmdbuf */
+				ret = savage_dispatch_dma_idx(
+					dev_priv, &cmd_header,
+					(uint16_t __user *)usr_cmdbuf,
+					dmabuf);
+				usr_cmdbuf += j;
+				break;
+			case SAVAGE_CMD_VB_IDX:
+				j = (cmd_header.idx.count + 3) / 4;
+				/* j was check in savage_bci_cmdbuf */
+				ret = savage_dispatch_vb_idx(
+					dev_priv, &cmd_header,
+					(uint16_t __user *)usr_cmdbuf,
+					(uint32_t __user *)usr_vtxbuf,
+					vb_size, vb_stride);
+				usr_cmdbuf += j;
+				break;
+			default:
+				/* What's the best return code? EFAULT? */
+				DRM_ERROR("IMPLEMENTATION ERROR: "
+					  "non-drawing-command %d\n",
+					  cmd_header.cmd.cmd);
+				return DRM_ERR(EINVAL);
+			}
+
+			if (ret != 0)
+				return ret;
+		}
+	}
+
+	return 0;
+}
+
+int savage_bci_cmdbuf(DRM_IOCTL_ARGS)
+{
+	DRM_DEVICE;
+	drm_savage_private_t *dev_priv = dev->dev_private;
+	drm_device_dma_t *dma = dev->dma;
+	drm_buf_t *dmabuf;
+	drm_savage_cmdbuf_t cmdbuf;
+	drm_savage_cmd_header_t __user *usr_cmdbuf;
+	drm_savage_cmd_header_t __user *first_draw_cmd;
+	unsigned int __user *usr_vtxbuf;
+	drm_clip_rect_t __user *usr_boxes;
+	unsigned int i, j;
+	int ret = 0;
+
+	DRM_DEBUG("\n");
+	
+	LOCK_TEST_WITH_RETURN(dev, filp);
+
+	DRM_COPY_FROM_USER_IOCTL(cmdbuf, (drm_savage_cmdbuf_t __user *)data,
+				 sizeof(cmdbuf));
+
+	if (dma && dma->buflist) {
+		if (cmdbuf.dma_idx > dma->buf_count) {
+			DRM_ERROR("vertex buffer index %u out of range (0-%u)\n",
+				  cmdbuf.dma_idx, dma->buf_count-1);
+			return DRM_ERR(EINVAL);
+		}
+		dmabuf = dma->buflist[cmdbuf.dma_idx];
+	} else {
+		dmabuf = NULL;
+	}
+
+	usr_cmdbuf = (drm_savage_cmd_header_t __user *)cmdbuf.cmd_addr;
+	usr_vtxbuf = (unsigned int __user *)cmdbuf.vb_addr;
+	usr_boxes = (drm_clip_rect_t __user *)cmdbuf.box_addr;
+	if ((cmdbuf.size && DRM_VERIFYAREA_READ(usr_cmdbuf, cmdbuf.size*8)) ||
+	    (cmdbuf.vb_size && DRM_VERIFYAREA_READ(
+		    usr_vtxbuf, cmdbuf.vb_size)) ||
+	    (cmdbuf.nbox && DRM_VERIFYAREA_READ(
+		    usr_boxes, cmdbuf.nbox*sizeof(drm_clip_rect_t))))
+		return DRM_ERR(EFAULT);
+
+	/* Make sure writes to DMA buffers are finished before sending
+	 * DMA commands to the graphics hardware. */
+	DRM_MEMORYBARRIER();
+
+	/* Coming from user space. Don't know if the Xserver has
+	 * emitted wait commands. Assuming the worst. */
+	dev_priv->waiting = 1;
+
+	i = 0;
+	first_draw_cmd = NULL;
+	while (i < cmdbuf.size) {
+		drm_savage_cmd_header_t cmd_header;
+		DRM_COPY_FROM_USER_UNCHECKED(&cmd_header, usr_cmdbuf,
+					     sizeof(cmd_header));
+		usr_cmdbuf++;
+		i++;
+
+		/* Group drawing commands with same state to minimize
+		 * iterations over clip rects. */
+		j = 0;
+		switch (cmd_header.cmd.cmd) {
+		case SAVAGE_CMD_DMA_IDX:
+		case SAVAGE_CMD_VB_IDX:
+			j = (cmd_header.idx.count + 3) / 4;
+			if (i + j > cmdbuf.size) {
+				DRM_ERROR("indexed drawing command extends "
+					  "beyond end of command buffer\n");
+				DMA_FLUSH();
+				return DRM_ERR(EINVAL);
+			}
+			/* fall through */
+		case SAVAGE_CMD_DMA_PRIM:
+		case SAVAGE_CMD_VB_PRIM:
+			if (!first_draw_cmd)
+				first_draw_cmd = usr_cmdbuf-1;
+			usr_cmdbuf += j;
+			i += j;
+			break;
+		default:
+			if (first_draw_cmd) {
+				ret = savage_dispatch_draw (
+					dev_priv, first_draw_cmd, usr_cmdbuf-1,
+					dmabuf, usr_vtxbuf, cmdbuf.vb_size,
+					cmdbuf.vb_stride,
+					cmdbuf.nbox, usr_boxes);
+				if (ret != 0)
+					return ret;
+				first_draw_cmd = NULL;
+			}
+		}
+		if (first_draw_cmd)
+			continue;
+
+		switch (cmd_header.cmd.cmd) {
+		case SAVAGE_CMD_STATE:
+			j = (cmd_header.state.count + 1) / 2;
+			if (i + j > cmdbuf.size) {
+				DRM_ERROR("command SAVAGE_CMD_STATE extends "
+					  "beyond end of command buffer\n");
+				DMA_FLUSH();
+				return DRM_ERR(EINVAL);
+			}
+			ret = savage_dispatch_state(
+				dev_priv, &cmd_header,
+				(uint32_t __user *)usr_cmdbuf);
+			usr_cmdbuf += j;
+			i += j;
+			break;
+		case SAVAGE_CMD_CLEAR:
+			if (i + 1 > cmdbuf.size) {
+				DRM_ERROR("command SAVAGE_CMD_CLEAR extends "
+					  "beyond end of command buffer\n");
+				DMA_FLUSH();
+				return DRM_ERR(EINVAL);
+			}
+			ret = savage_dispatch_clear(dev_priv, &cmd_header,
+						    usr_cmdbuf,
+						    cmdbuf.nbox, usr_boxes);
+			usr_cmdbuf++;
+			i++;
+			break;
+		case SAVAGE_CMD_SWAP:
+			ret = savage_dispatch_swap(dev_priv,
+						   cmdbuf.nbox, usr_boxes);
+			break;
+		default:
+			DRM_ERROR("invalid command 0x%x\n", cmd_header.cmd.cmd);
+			DMA_FLUSH();
+			return DRM_ERR(EINVAL);
+		}
+
+		if (ret != 0) {
+			DMA_FLUSH();
+			return ret;
+		}
+	}
+
+	if (first_draw_cmd) {
+		ret = savage_dispatch_draw (
+			dev_priv, first_draw_cmd, usr_cmdbuf, dmabuf,
+			usr_vtxbuf, cmdbuf.vb_size, cmdbuf.vb_stride,
+			cmdbuf.nbox, usr_boxes);
+		if (ret != 0) {
+			DMA_FLUSH();
+			return ret;
+		}
+	}
+
+	DMA_FLUSH();
+
+	if (dmabuf && cmdbuf.discard) {
+		drm_savage_buf_priv_t *buf_priv = dmabuf->dev_private;
+		uint16_t event;
+		event = savage_bci_emit_event(dev_priv, SAVAGE_WAIT_3D);
+		SET_AGE(&buf_priv->age, event, dev_priv->event_wrap);
+		savage_freelist_put(dev, dmabuf);
+	}
+
+	return 0;
+}
diff --git a/sys/dev/drm/sis.h b/sys/dev/drm/sis.h
deleted file mode 100644
index dde5d95..0000000
--- a/sys/dev/drm/sis.h
+++ /dev/null
@@ -1,75 +0,0 @@
-/* sis_drv.h -- Private header for sis driver -*- linux-c -*- */
-/*-
- * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
- * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
- * All rights reserved.
- *
- * Permission is hereby granted, free of charge, to any person obtaining a
- * copy of this software and associated documentation files (the "Software"),
- * to deal in the Software without restriction, including without limitation
- * the rights to use, copy, modify, merge, publish, distribute, sublicense,
- * and/or sell copies of the Software, and to permit persons to whom the
- * Software is furnished to do so, subject to the following conditions:
- * 
- * The above copyright notice and this permission notice (including the next
- * paragraph) shall be included in all copies or substantial portions of the
- * Software.
- * 
- * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
- * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
- * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * PRECISION INSIGHT AND/OR ITS SUPPLIERS BE LIABLE FOR ANY CLAIM, DAMAGES OR
- * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
- * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
- * DEALINGS IN THE SOFTWARE.
- * 
- * $FreeBSD$
- */
-/* $XFree86: xc/programs/Xserver/hw/xfree86/os-support/linux/drm/kernel/sis.h,v 1.3 2002/10/30 12:52:38 alanh Exp $ */
-
-#ifndef __SIS_H__
-#define __SIS_H__
-
-/* This remains constant for all DRM template files.
- * Name it sisdrv_##x as there's a conflict with sis_free/malloc in the kernel
- * that's used for fb devices 
- */
-#define DRM(x) sisdrv_##x
-
-/* General customization:
- */
-#define __HAVE_AGP		1
-#define __MUST_HAVE_AGP		0
-#define __HAVE_MTRR		1
-#define __HAVE_CTX_BITMAP	1
-
-#define DRIVER_AUTHOR		"SIS"
-#define DRIVER_NAME		"sis"
-#define DRIVER_DESC		"SIS 300/630/540"
-#define DRIVER_DATE		"20030826"
-#define DRIVER_MAJOR		1
-#define DRIVER_MINOR		1
-#define DRIVER_PATCHLEVEL	0
-
-#define DRIVER_IOCTLS \
-	[DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_ALLOC)]  = { sis_fb_alloc,	1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_FREE)]   = { sis_fb_free,	1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_INIT)]  = { sis_ioctl_agp_init,	1, 1 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_ALLOC)] = { sis_ioctl_agp_alloc, 1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_SIS_AGP_FREE)]	= { sis_ioctl_agp_free,	1, 0 }, \
-	[DRM_IOCTL_NR(DRM_IOCTL_SIS_FB_INIT)]	= { sis_fb_init,	1, 1 }
-
-#define __HAVE_COUNTERS		5
-
-/* Buffer customization:
- */
-#define DRIVER_AGP_BUFFERS_MAP( dev )					\
-	((drm_sis_private_t *)((dev)->dev_private))->buffers
-
-extern int sis_init_context(int context);
-extern int sis_final_context(int context);
-
-#define DRIVER_CTX_CTOR sis_init_context
-#define DRIVER_CTX_DTOR sis_final_context
-
-#endif
diff --git a/sys/dev/drm/sis_drm.h b/sys/dev/drm/sis_drm.h
index 18711a5..3c6fb02 100644
--- a/sys/dev/drm/sis_drm.h
+++ b/sys/dev/drm/sis_drm.h
@@ -6,12 +6,21 @@
 #define __SIS_DRM_H__
 
 /* SiS specific ioctls */
-#define DRM_IOCTL_SIS_FB_ALLOC		DRM_IOWR(0x44, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_FB_FREE		DRM_IOW( 0x45, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_AGP_INIT		DRM_IOWR(0x53, drm_sis_agp_t)
-#define DRM_IOCTL_SIS_AGP_ALLOC		DRM_IOWR(0x54, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_AGP_FREE		DRM_IOW( 0x55, drm_sis_mem_t)
-#define DRM_IOCTL_SIS_FB_INIT		DRM_IOW( 0x56, drm_sis_fb_t)
+#define NOT_USED_0_3
+#define DRM_SIS_FB_ALLOC	0x04
+#define DRM_SIS_FB_FREE	        0x05
+#define NOT_USED_6_12
+#define DRM_SIS_AGP_INIT	0x13
+#define DRM_SIS_AGP_ALLOC	0x14
+#define DRM_SIS_AGP_FREE	0x15
+#define DRM_SIS_FB_INIT	        0x16
+
+#define DRM_IOCTL_SIS_FB_ALLOC		DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_FB_ALLOC, drm_sis_mem_t)
+#define DRM_IOCTL_SIS_FB_FREE		DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_FREE, drm_sis_mem_t)
+#define DRM_IOCTL_SIS_AGP_INIT		DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_INIT, drm_sis_agp_t)
+#define DRM_IOCTL_SIS_AGP_ALLOC		DRM_IOWR(DRM_COMMAND_BASE + DRM_SIS_AGP_ALLOC, drm_sis_mem_t)
+#define DRM_IOCTL_SIS_AGP_FREE		DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_AGP_FREE, drm_sis_mem_t)
+#define DRM_IOCTL_SIS_FB_INIT		DRM_IOW( DRM_COMMAND_BASE + DRM_SIS_FB_INIT, drm_sis_fb_t)
 /*
 #define DRM_IOCTL_SIS_FLIP		DRM_IOW( 0x48, drm_sis_flip_t)
 #define DRM_IOCTL_SIS_FLIP_INIT		DRM_IO(  0x49)
@@ -33,4 +42,4 @@ typedef struct {
 	unsigned int offset, size;
 } drm_sis_fb_t;
 
-#endif /* __SIS_DRM_H__ */
+#endif				/* __SIS_DRM_H__ */
diff --git a/sys/dev/drm/sis_drv.c b/sys/dev/drm/sis_drv.c
index 5009f9d..954d34b 100644
--- a/sys/dev/drm/sis_drv.c
+++ b/sys/dev/drm/sis_drv.c
@@ -1,4 +1,5 @@
-/* sis.c -- sis driver -*- linux-c -*- */
+/* sis.c -- sis driver -*- linux-c -*-
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -26,28 +27,75 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/sis.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/sis_drm.h"
 #include "dev/drm/sis_drv.h"
+#include "dev/drm/drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t sis_pciidlist[] = {
+	sis_PCI_IDS
+};
+
+extern drm_ioctl_desc_t sis_ioctls[];
+extern int sis_max_ioctl;
+
+static void sis_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = 1; /* No dev_priv */
+	dev->context_ctor = sis_init_context;
+	dev->context_dtor = sis_final_context;
 
-#include "dev/drm/drm_auth.h"
-#include "dev/drm/drm_agpsupport.h"
-#include "dev/drm/drm_bufs.h"
-#include "dev/drm/drm_context.h"
-#include "dev/drm/drm_dma.h"
-#include "dev/drm/drm_drawable.h"
-#include "dev/drm/drm_drv.h"
-#include "dev/drm/drm_fops.h"
-#include "dev/drm/drm_ioctl.h"
-#include "dev/drm/drm_lock.h"
-#include "dev/drm/drm_memory.h"
-#include "dev/drm/drm_vm.h"
-#include "dev/drm/drm_sysctl.h"
+	dev->driver_ioctls = sis_ioctls;
+	dev->max_driver_ioctl = sis_max_ioctl;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_agp = 1;
+	dev->use_mtrr = 1;
+}
 
 #ifdef __FreeBSD__
-/* Avoid clash with sis ethernet */
-DRIVER_MODULE(sisdrm, pci, sisdrv_driver, sisdrv_devclass, 0, 0);
-#elif defined(__NetBSD__)
+static int
+sis_probe(device_t dev)
+{
+	return drm_probe(dev, sis_pciidlist);
+}
+
+static int
+sis_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	sis_configure(dev);
+	return drm_attach(nbdev, sis_pciidlist);
+}
+
+static device_method_t sis_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		sis_probe),
+	DEVMETHOD(device_attach,	sis_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t sis_driver = {
+	"drm",
+	sis_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(sisdrm, pci, sis_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(sisdrm, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 CFDRIVER_DECL(sis, DV_TTY, NULL);
-#endif /* __FreeBSD__ */
+#endif
diff --git a/sys/dev/drm/sis_drv.h b/sys/dev/drm/sis_drv.h
index 156e2b2..4e06e00 100644
--- a/sys/dev/drm/sis_drv.h
+++ b/sys/dev/drm/sis_drv.h
@@ -10,11 +10,11 @@
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
  * Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
@@ -22,27 +22,32 @@
  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
- * 
+ *
  * $FreeBSD$
  */
 
 #ifndef _SIS_DRV_H_
 #define _SIS_DRV_H_
 
+/* General customization:
+ */
+
+#define DRIVER_AUTHOR		"SIS"
+#define DRIVER_NAME		"sis"
+#define DRIVER_DESC		"SIS 300/630/540"
+#define DRIVER_DATE		"20030826"
+#define DRIVER_MAJOR		1
+#define DRIVER_MINOR		1
+#define DRIVER_PATCHLEVEL	0
+
 #include "dev/drm/sis_ds.h"
 
 typedef struct drm_sis_private {
-	drm_map_t *buffers;
-
 	memHeap_t *AGPHeap;
 	memHeap_t *FBHeap;
 } drm_sis_private_t;
 
-extern int sis_fb_alloc( DRM_IOCTL_ARGS );
-extern int sis_fb_free( DRM_IOCTL_ARGS );
-extern int sis_ioctl_agp_init( DRM_IOCTL_ARGS );
-extern int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS );
-extern int sis_ioctl_agp_free( DRM_IOCTL_ARGS );
-extern int sis_fb_init( DRM_IOCTL_ARGS );
+extern int sis_init_context(drm_device_t * dev, int context);
+extern int sis_final_context(drm_device_t * dev, int context);
 
 #endif
diff --git a/sys/dev/drm/sis_ds.c b/sys/dev/drm/sis_ds.c
index cf837a7..3f3a4b6 100644
--- a/sys/dev/drm/sis_ds.c
+++ b/sys/dev/drm/sis_ds.c
@@ -10,11 +10,11 @@
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
  * Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
@@ -22,14 +22,13 @@
  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
- * 
+ *
  * Authors:
  *    Sung-Ching Lin <sclin@sis.com.tw>
- * 
+ *
  * $FreeBSD$
  */
 
-#include "dev/drm/sis.h"
 #include "dev/drm/drmP.h"
 #include "dev/drm/drm.h"
 #include "dev/drm/sis_ds.h"
@@ -43,13 +42,13 @@ set_t *setInit(void)
 	int i;
 	set_t *set;
 
-	set = (set_t *)DRM(alloc)(sizeof(set_t), DRM_MEM_DRIVER);
+	set = (set_t *) drm_alloc(sizeof(set_t), DRM_MEM_DRIVER);
 	if (set != NULL) {
 		for (i = 0; i < SET_SIZE; i++) {
-			set->list[i].free_next = i + 1;    
+			set->list[i].free_next = i + 1;
 			set->list[i].alloc_next = -1;
 		}
-		set->list[SET_SIZE-1].free_next = -1;
+		set->list[SET_SIZE - 1].free_next = -1;
 		set->free = 0;
 		set->alloc = -1;
 		set->trace = -1;
@@ -57,10 +56,10 @@ set_t *setInit(void)
 	return set;
 }
 
-int setAdd(set_t *set, ITEM_TYPE item)
+int setAdd(set_t * set, ITEM_TYPE item)
 {
 	int free = set->free;
-  
+
 	if (free != -1) {
 		set->list[free].val = item;
 		set->free = set->list[free].free_next;
@@ -69,16 +68,16 @@ int setAdd(set_t *set, ITEM_TYPE item)
 	}
 
 	set->list[free].alloc_next = set->alloc;
-	set->alloc = free;  
-	set->list[free].free_next = -1;    
+	set->alloc = free;
+	set->list[free].free_next = -1;
 
 	return 1;
 }
 
-int setDel(set_t *set, ITEM_TYPE item)
+int setDel(set_t * set, ITEM_TYPE item)
 {
 	int alloc = set->alloc;
-	int prev = -1;  
+	int prev = -1;
 
 	while (alloc != -1) {
 		if (set->list[alloc].val == item) {
@@ -105,7 +104,7 @@ int setDel(set_t *set, ITEM_TYPE item)
 
 /* setFirst -> setAdd -> setNext is wrong */
 
-int setFirst(set_t *set, ITEM_TYPE *item)
+int setFirst(set_t * set, ITEM_TYPE * item)
 {
 	if (set->alloc == -1)
 		return 0;
@@ -116,7 +115,7 @@ int setFirst(set_t *set, ITEM_TYPE *item)
 	return 1;
 }
 
-int setNext(set_t *set, ITEM_TYPE *item)
+int setNext(set_t * set, ITEM_TYPE * item)
 {
 	if (set->trace == -1)
 		return 0;
@@ -127,16 +126,16 @@ int setNext(set_t *set, ITEM_TYPE *item)
 	return 1;
 }
 
-int setDestroy(set_t *set)
+int setDestroy(set_t * set)
 {
-	DRM(free)(set, sizeof(set_t), DRM_MEM_DRIVER);
+	drm_free(set, sizeof(set_t), DRM_MEM_DRIVER);
 
 	return 1;
 }
 
 /*
  * GLX Hardware Device Driver common code
- * Copyright (C) 1999 Keith Whitwell
+ * Copyright (C) 1999 Wittawat Yamwong
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -151,35 +150,34 @@ int setDestroy(set_t *set)
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 
+ * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
 
 #define ISFREE(bptr) ((bptr)->free)
 
-memHeap_t *mmInit(int ofs,
-		  int size)
+memHeap_t *mmInit(int ofs, int size)
 {
 	PMemBlock blocks;
 
 	if (size <= 0)
-		return 0;
+		return NULL;
 
-	blocks = (TMemBlock *)DRM(calloc)(1, sizeof(TMemBlock), DRM_MEM_DRIVER);
+	blocks = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock), DRM_MEM_DRIVER);
 	if (blocks != NULL) {
 		blocks->ofs = ofs;
 		blocks->size = size;
 		blocks->free = 1;
-		return (memHeap_t *)blocks;
+		return (memHeap_t *) blocks;
 	} else
-		return 0;
+		return NULL;
 }
 
 /* Checks if a pointer 'b' is part of the heap 'heap' */
-int mmBlockInHeap(memHeap_t *heap, PMemBlock b)
+int mmBlockInHeap(memHeap_t * heap, PMemBlock b)
 {
 	TMemBlock *p;
 
@@ -196,42 +194,16 @@ int mmBlockInHeap(memHeap_t *heap, PMemBlock b)
 		return 0;
 }
 
-/* Kludgey workaround for existing i810 server.  Remove soon.
- */
-memHeap_t *mmAddRange( memHeap_t *heap,
-		       int ofs,
-		       int size )
-{
-	PMemBlock blocks;
-	blocks = (TMemBlock *)DRM(calloc)(2, sizeof(TMemBlock), DRM_MEM_DRIVER);
-	if (blocks != NULL) {
-		blocks[0].size = size;
-		blocks[0].free = 1;
-		blocks[0].ofs = ofs;
-		blocks[0].next = &blocks[1];
-
-		/* Discontinuity - stops JoinBlock from trying to join
-		 * non-adjacent ranges.
-		 */
-		blocks[1].size = 0;
-		blocks[1].free = 0;
-		blocks[1].ofs = ofs+size;
-		blocks[1].next = (PMemBlock)heap;
-		return (memHeap_t *)blocks;
-	} else
-		return heap;
-}
-
-static TMemBlock* SliceBlock(TMemBlock *p, 
-			     int startofs, int size, 
+static TMemBlock *SliceBlock(TMemBlock * p,
+			     int startofs, int size,
 			     int reserved, int alignment)
 {
 	TMemBlock *newblock;
 
 	/* break left */
 	if (startofs > p->ofs) {
-		newblock = (TMemBlock*) DRM(calloc)(1, sizeof(TMemBlock),
-		    DRM_MEM_DRIVER);
+		newblock = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
+						    DRM_MEM_DRIVER);
 		newblock->ofs = startofs;
 		newblock->size = p->size - (startofs - p->ofs);
 		newblock->free = 1;
@@ -243,8 +215,8 @@ static TMemBlock* SliceBlock(TMemBlock *p,
 
 	/* break right */
 	if (size < p->size) {
-		newblock = (TMemBlock*) DRM(calloc)(1, sizeof(TMemBlock),
-		    DRM_MEM_DRIVER);
+		newblock = (TMemBlock *) drm_calloc(1, sizeof(TMemBlock),
+						    DRM_MEM_DRIVER);
 		newblock->ofs = startofs + size;
 		newblock->size = p->size - size;
 		newblock->free = 1;
@@ -260,43 +232,43 @@ static TMemBlock* SliceBlock(TMemBlock *p,
 	return p;
 }
 
-PMemBlock mmAllocMem( memHeap_t *heap, int size, int align2, int startSearch)
+PMemBlock mmAllocMem(memHeap_t * heap, int size, int align2, int startSearch)
 {
-	int mask,startofs, endofs;
+	int mask, startofs, endofs;
 	TMemBlock *p;
-	
+
 	if (heap == NULL || align2 < 0 || size <= 0)
 		return NULL;
 
-	mask = (1 << align2)-1;
+	mask = (1 << align2) - 1;
 	startofs = 0;
-	p = (TMemBlock *)heap;
+	p = (TMemBlock *) heap;
 	while (p != NULL) {
 		if (ISFREE(p)) {
 			startofs = (p->ofs + mask) & ~mask;
-			if ( startofs < startSearch ) {
+			if (startofs < startSearch) {
 				startofs = startSearch;
 			}
-			endofs = startofs+size;
-			if (endofs <= (p->ofs+p->size))
+			endofs = startofs + size;
+			if (endofs <= (p->ofs + p->size))
 				break;
 		}
 		p = p->next;
 	}
 	if (p == NULL)
 		return NULL;
-	p = SliceBlock(p,startofs,size,0,mask+1);
+	p = SliceBlock(p, startofs, size, 0, mask + 1);
 	p->heap = heap;
 	return p;
 }
 
-static __inline__ int Join2Blocks(TMemBlock *p)
+static __inline__ int Join2Blocks(TMemBlock * p)
 {
 	if (p->free && p->next && p->next->free) {
 		TMemBlock *q = p->next;
 		p->size += q->size;
 		p->next = q->next;
-		DRM(free)(q, sizeof(TMemBlock), DRM_MEM_DRIVER);
+		drm_free(q, sizeof(TMemBlock), DRM_MEM_DRIVER);
 		return 1;
 	}
 	return 0;
@@ -323,65 +295,6 @@ int mmFreeMem(PMemBlock b)
 	p->free = 1;
 	Join2Blocks(p);
 	if (prev)
-	Join2Blocks(prev);
-	return 0;
-}
-
-int mmReserveMem(memHeap_t *heap, int offset,int size)
-{
-	int endofs;
-	TMemBlock *p;
-
-	if (heap == NULL || size <= 0)
-		return -1;
-
-	endofs = offset + size;
-	p = (TMemBlock *)heap;
-	while (p && p->ofs <= offset) {
-		if (ISFREE(p) && endofs <= (p->ofs+p->size)) {
-			SliceBlock(p,offset,size,1,1);
-			return 0;
-		}
-		p = p->next;
-	}
-	return -1;
-}
-
-int mmFreeReserved(memHeap_t *heap, int offset)
-{
-	TMemBlock *p,*prev;
-
-	if (heap == NULL)
-		return -1;
-
-	p = (TMemBlock *)heap;
-	prev = NULL;
-	while (p != NULL && p->ofs != offset) {
-		prev = p;
-		p = p->next;
-	}
-	if (p == NULL || !p->reserved)
-		return -1;
-
-	p->free = 1;
-	p->reserved = 0;
-	Join2Blocks(p);
-	if (prev != NULL)
 		Join2Blocks(prev);
 	return 0;
 }
-
-void mmDestroy(memHeap_t *heap)
-{
-	TMemBlock *p,*q;
-
-	if (heap == NULL)
-		return;
-
-	p = (TMemBlock *)heap;
-	while (p != NULL) {
-		q = p->next;
-		DRM(free)(p, sizeof(TMemBlock), DRM_MEM_DRIVER);
-		p = q;
-	}
-}
diff --git a/sys/dev/drm/sis_ds.h b/sys/dev/drm/sis_ds.h
index ce9535b..d5b0faa 100644
--- a/sys/dev/drm/sis_ds.h
+++ b/sys/dev/drm/sis_ds.h
@@ -10,11 +10,11 @@
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
  * Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
@@ -22,10 +22,10 @@
  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
- * 
+ *
  * Authors:
  *    Sung-Ching Lin <sclin@sis.com.tw>
- * 
+ *
  * $FreeBSD$
  */
 
@@ -51,15 +51,15 @@ typedef struct {
 } set_t;
 
 set_t *setInit(void);
-int setAdd(set_t *set, ITEM_TYPE item);
-int setDel(set_t *set, ITEM_TYPE item);
-int setFirst(set_t *set, ITEM_TYPE *item);
-int setNext(set_t *set, ITEM_TYPE *item);
-int setDestroy(set_t *set);
+int setAdd(set_t * set, ITEM_TYPE item);
+int setDel(set_t * set, ITEM_TYPE item);
+int setFirst(set_t * set, ITEM_TYPE * item);
+int setNext(set_t * set, ITEM_TYPE * item);
+int setDestroy(set_t * set);
 
 /*
  * GLX Hardware Device Driver common code
- * Copyright (C) 1999 Keith Whitwell
+ * Copyright (C) 1999 Wittawat Yamwong
  *
  * Permission is hereby granted, free of charge, to any person obtaining a
  * copy of this software and associated documentation files (the "Software"),
@@ -74,9 +74,9 @@ int setDestroy(set_t *set);
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS
  * OR IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
- * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM, 
- * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR 
- * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE 
+ * KEITH WHITWELL, OR ANY OTHER CONTRIBUTORS BE LIABLE FOR ANY CLAIM,
+ * DAMAGES OR OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR
+ * OTHERWISE, ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE
  * OR THE USE OR OTHER DEALINGS IN THE SOFTWARE.
  *
  */
@@ -84,10 +84,10 @@ int setDestroy(set_t *set);
 struct mem_block_t {
 	struct mem_block_t *next;
 	struct mem_block_t *heap;
-	int ofs,size;
+	int ofs, size;
 	int align;
-	int free:1;
-	int reserved:1;
+	unsigned int free:1;
+	unsigned int reserved:1;
 };
 typedef struct mem_block_t TMemBlock;
 typedef struct mem_block_t *PMemBlock;
@@ -110,15 +110,11 @@ static __inline__ void mmMarkReserved(PMemBlock b)
 	b->reserved = 1;
 }
 
-/* 
+/*
  * input: total size in bytes
  * return: a heap pointer if OK, NULL if error
  */
-memHeap_t *mmInit( int ofs, int size );
-
-memHeap_t *mmAddRange( memHeap_t *heap,
-		       int ofs,
-		       int size );
+memHeap_t *mmInit(int ofs, int size);
 
 /*
  * Allocate 'size' bytes with 2^align2 bytes alignment,
@@ -130,36 +126,21 @@ memHeap_t *mmAddRange( memHeap_t *heap,
  *		startSearch = linear offset from start of heap to begin search
  * return: pointer to the allocated block, 0 if error
  */
-PMemBlock mmAllocMem( memHeap_t *heap, int size, int align2, int startSearch );
+PMemBlock mmAllocMem(memHeap_t * heap, int size, int align2, int startSearch);
 
 /*
  * Returns 1 if the block 'b' is part of the heap 'heap'
  */
-int mmBlockInHeap( PMemBlock heap, PMemBlock b );
+int mmBlockInHeap(PMemBlock heap, PMemBlock b);
 
 /*
  * Free block starts at offset
  * input: pointer to a block
  * return: 0 if OK, -1 if error
  */
-int mmFreeMem( PMemBlock b );
-
-/*
- * Reserve 'size' bytes block start at offset
- * This is used to prevent allocation of memory already used
- * by the X server for the front buffer, pixmaps, and cursor
- * input: size, offset
- * output: 0 if OK, -1 if error
- */
-int mmReserveMem( memHeap_t *heap, int offset,int size );
-int mmFreeReserved( memHeap_t *heap, int offset );
-
-/*
- * destroy MM
- */
-void mmDestroy( memHeap_t *mmInit );
+int mmFreeMem(PMemBlock b);
 
 /* For debuging purpose. */
-void mmDumpMemInfo( memHeap_t *mmInit );
+void mmDumpMemInfo(memHeap_t * mmInit);
 
-#endif /* __SIS_DS_H__ */
+#endif				/* __SIS_DS_H__ */
diff --git a/sys/dev/drm/sis_mm.c b/sys/dev/drm/sis_mm.c
index 6464c4c..8f4bc7c 100644
--- a/sys/dev/drm/sis_mm.c
+++ b/sys/dev/drm/sis_mm.c
@@ -1,6 +1,5 @@
 /* sis_mm.c -- Private header for Direct Rendering Manager -*- linux-c -*-
- * Created: Mon Jan  4 10:05:05 1999 by sclin@sis.com.tw *
- */
+ * Created: Mon Jan  4 10:05:05 1999 by sclin@sis.com.tw */
 /*-
  * Copyright 2000 Silicon Integrated Systems Corp, Inc., HsinChu, Taiwan.
  * All rights reserved.
@@ -11,11 +10,11 @@
  * the rights to use, copy, modify, merge, publish, distribute, sublicense,
  * and/or sell copies of the Software, and to permit persons to whom the
  * Software is furnished to do so, subject to the following conditions:
- * 
+ *
  * The above copyright notice and this permission notice (including the next
  * paragraph) shall be included in all copies or substantial portions of the
  * Software.
- * 
+ *
  * THE SOFTWARE IS PROVIDED "AS IS", WITHOUT WARRANTY OF ANY KIND, EXPRESS OR
  * IMPLIED, INCLUDING BUT NOT LIMITED TO THE WARRANTIES OF MERCHANTABILITY,
  * FITNESS FOR A PARTICULAR PURPOSE AND NONINFRINGEMENT.  IN NO EVENT SHALL
@@ -23,18 +22,13 @@
  * OTHER LIABILITY, WHETHER IN AN ACTION OF CONTRACT, TORT OR OTHERWISE,
  * ARISING FROM, OUT OF OR IN CONNECTION WITH THE SOFTWARE OR THE USE OR OTHER
  * DEALINGS IN THE SOFTWARE.
- * 
+ *
  * Authors:
  *    Sung-Ching Lin <sclin@sis.com.tw>
- * 
+ *
  * $FreeBSD$
  */
 
-#include "dev/drm/sis.h"
-#include "dev/drm/drmP.h"
-#include "dev/drm/sis_drm.h"
-#include "dev/drm/sis_drv.h"
-#include "dev/drm/sis_ds.h"
 #if defined(__linux__) && defined(CONFIG_FB_SIS)
 #if LINUX_VERSION_CODE >= KERNEL_VERSION(2,6,0)
 #include <video/sisfb.h>
@@ -42,27 +36,29 @@
 #include <linux/sisfb.h>
 #endif
 #endif
+#include "dev/drm/drmP.h"
+#include "dev/drm/sis_drm.h"
+#include "dev/drm/sis_drv.h"
+#include "dev/drm/sis_ds.h"
 
 #define MAX_CONTEXT 100
-#define VIDEO_TYPE 0 
+#define VIDEO_TYPE 0
 #define AGP_TYPE 1
 
 typedef struct {
 	int used;
 	int context;
-	set_t *sets[2]; /* 0 for video, 1 for AGP */
+	set_t *sets[2];		/* 0 for video, 1 for AGP */
 } sis_context_t;
 
 static sis_context_t global_ppriv[MAX_CONTEXT];
 
-
 static int add_alloc_set(int context, int type, unsigned int val)
 {
 	int i, retval = 0;
-	
+
 	for (i = 0; i < MAX_CONTEXT; i++) {
-		if (global_ppriv[i].used && global_ppriv[i].context == context)
-		{
+		if (global_ppriv[i].used && global_ppriv[i].context == context) {
 			retval = setAdd(global_ppriv[i].sets[type], val);
 			break;
 		}
@@ -71,12 +67,11 @@ static int add_alloc_set(int context, int type, unsigned int val)
 }
 
 static int del_alloc_set(int context, int type, unsigned int val)
-{  
+{
 	int i, retval = 0;
 
 	for (i = 0; i < MAX_CONTEXT; i++) {
-		if (global_ppriv[i].used && global_ppriv[i].context == context)
-		{
+		if (global_ppriv[i].used && global_ppriv[i].context == context) {
 			retval = setDel(global_ppriv[i].sets[type], val);
 			break;
 		}
@@ -84,21 +79,22 @@ static int del_alloc_set(int context, int type, unsigned int val)
 	return retval;
 }
 
-/* fb management via fb device */ 
+/* fb management via fb device */
 #if defined(__linux__) && defined(CONFIG_FB_SIS)
 
-int sis_fb_init( DRM_IOCTL_ARGS )
+static int sis_fb_init(DRM_IOCTL_ARGS)
 {
 	return 0;
 }
 
-int sis_fb_alloc( DRM_IOCTL_ARGS )
+static int sis_fb_alloc(DRM_IOCTL_ARGS)
 {
 	drm_sis_mem_t fb;
 	struct sis_memreq req;
+	drm_sis_mem_t __user *argp = (void __user *)data;
 	int retval = 0;
 
-	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t *)data, sizeof(fb));
+	DRM_COPY_FROM_USER_IOCTL(fb, argp, sizeof(fb));
 
 	req.size = fb.size;
 	sis_malloc(&req);
@@ -111,25 +107,25 @@ int sis_fb_alloc( DRM_IOCTL_ARGS )
 			sis_free(req.offset);
 			retval = DRM_ERR(EINVAL);
 		}
-	} else {  
+	} else {
 		fb.offset = 0;
 		fb.size = 0;
 		fb.free = 0;
 	}
 
-	DRM_COPY_TO_USER_IOCTL((drm_sis_mem_t *)data, fb, sizeof(fb));
+	DRM_COPY_TO_USER_IOCTL(argp, fb, sizeof(fb));
 
 	DRM_DEBUG("alloc fb, size = %d, offset = %ld\n", fb.size, req.offset);
 
 	return retval;
 }
 
-int sis_fb_free( DRM_IOCTL_ARGS )
+static int sis_fb_free(DRM_IOCTL_ARGS)
 {
 	drm_sis_mem_t fb;
 	int retval = 0;
 
-	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t *)data, sizeof(fb));
+	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t __user *) data, sizeof(fb));
 
 	if (!fb.free)
 		return DRM_ERR(EINVAL);
@@ -155,17 +151,17 @@ int sis_fb_free( DRM_IOCTL_ARGS )
  *    X driver/sisfb                                  HW-   Command-
  *  framebuffer memory           DRI heap           Cursor   queue
  */
-int sis_fb_init( DRM_IOCTL_ARGS )
+static int sis_fb_init(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_sis_private_t *dev_priv = dev->dev_private;
 	drm_sis_fb_t fb;
 
-	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_fb_t *)data, sizeof(fb));
+	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_fb_t __user *) data, sizeof(fb));
 
 	if (dev_priv == NULL) {
-		dev->dev_private = DRM(calloc)(1, sizeof(drm_sis_private_t),
-		    DRM_MEM_DRIVER);
+		dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t),
+					      DRM_MEM_DRIVER);
 		dev_priv = dev->dev_private;
 		if (dev_priv == NULL)
 			return ENOMEM;
@@ -181,19 +177,20 @@ int sis_fb_init( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int sis_fb_alloc( DRM_IOCTL_ARGS )
+static int sis_fb_alloc(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_sis_private_t *dev_priv = dev->dev_private;
+	drm_sis_mem_t __user *argp = (void __user *)data;
 	drm_sis_mem_t fb;
 	PMemBlock block;
 	int retval = 0;
 
 	if (dev_priv == NULL || dev_priv->FBHeap == NULL)
 		return DRM_ERR(EINVAL);
-  
-	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t *)data, sizeof(fb));
-  
+
+	DRM_COPY_FROM_USER_IOCTL(fb, argp, sizeof(fb));
+
 	block = mmAllocMem(dev_priv->FBHeap, fb.size, 0, 0);
 	if (block) {
 		/* TODO */
@@ -201,7 +198,7 @@ int sis_fb_alloc( DRM_IOCTL_ARGS )
 		fb.free = (unsigned long)block;
 		if (!add_alloc_set(fb.context, VIDEO_TYPE, fb.free)) {
 			DRM_DEBUG("adding to allocation set fails\n");
-			mmFreeMem((PMemBlock)fb.free);
+			mmFreeMem((PMemBlock) fb.free);
 			retval = DRM_ERR(EINVAL);
 		}
 	} else {
@@ -210,14 +207,14 @@ int sis_fb_alloc( DRM_IOCTL_ARGS )
 		fb.free = 0;
 	}
 
-	DRM_COPY_TO_USER_IOCTL((drm_sis_mem_t *)data, fb, sizeof(fb));
+	DRM_COPY_TO_USER_IOCTL(argp, fb, sizeof(fb));
 
 	DRM_DEBUG("alloc fb, size = %d, offset = %d\n", fb.size, fb.offset);
 
 	return retval;
 }
 
-int sis_fb_free( DRM_IOCTL_ARGS )
+static int sis_fb_free(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_sis_private_t *dev_priv = dev->dev_private;
@@ -226,14 +223,14 @@ int sis_fb_free( DRM_IOCTL_ARGS )
 	if (dev_priv == NULL || dev_priv->FBHeap == NULL)
 		return DRM_ERR(EINVAL);
 
-	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t *)data, sizeof(fb));
+	DRM_COPY_FROM_USER_IOCTL(fb, (drm_sis_mem_t __user *) data, sizeof(fb));
 
-	if (!mmBlockInHeap(dev_priv->FBHeap, (PMemBlock)fb.free))
+	if (!mmBlockInHeap(dev_priv->FBHeap, (PMemBlock) fb.free))
 		return DRM_ERR(EINVAL);
 
 	if (!del_alloc_set(fb.context, VIDEO_TYPE, fb.free))
 		return DRM_ERR(EINVAL);
-	mmFreeMem((PMemBlock)fb.free);
+	mmFreeMem((PMemBlock) fb.free);
 
 	DRM_DEBUG("free fb, free = 0x%lx\n", fb.free);
 
@@ -242,17 +239,17 @@ int sis_fb_free( DRM_IOCTL_ARGS )
 
 #endif
 
-/* agp memory management */ 
+/* agp memory management */
 
-int sis_ioctl_agp_init( DRM_IOCTL_ARGS )
+static int sis_ioctl_agp_init(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_sis_private_t *dev_priv = dev->dev_private;
 	drm_sis_agp_t agp;
 
 	if (dev_priv == NULL) {
-		dev->dev_private = DRM(calloc)(1, sizeof(drm_sis_private_t),
-		    DRM_MEM_DRIVER);
+		dev->dev_private = drm_calloc(1, sizeof(drm_sis_private_t),
+					      DRM_MEM_DRIVER);
 		dev_priv = dev->dev_private;
 		if (dev_priv == NULL)
 			return ENOMEM;
@@ -261,28 +258,30 @@ int sis_ioctl_agp_init( DRM_IOCTL_ARGS )
 	if (dev_priv->AGPHeap != NULL)
 		return DRM_ERR(EINVAL);
 
-	DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_agp_t *)data, sizeof(agp));
+	DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_agp_t __user *) data,
+				 sizeof(agp));
 
 	dev_priv->AGPHeap = mmInit(agp.offset, agp.size);
 
 	DRM_DEBUG("offset = %u, size = %u", agp.offset, agp.size);
-  
+
 	return 0;
 }
 
-int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS )
+static int sis_ioctl_agp_alloc(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_sis_private_t *dev_priv = dev->dev_private;
+	drm_sis_mem_t __user *argp = (drm_sis_mem_t __user *)data;
 	drm_sis_mem_t agp;
 	PMemBlock block;
 	int retval = 0;
-   
+
 	if (dev_priv == NULL || dev_priv->AGPHeap == NULL)
 		return DRM_ERR(EINVAL);
-  
-	DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_mem_t *)data, sizeof(agp));
-  
+
+	DRM_COPY_FROM_USER_IOCTL(agp, argp, sizeof(agp));
+
 	block = mmAllocMem(dev_priv->AGPHeap, agp.size, 0, 0);
 	if (block) {
 		/* TODO */
@@ -290,23 +289,23 @@ int sis_ioctl_agp_alloc( DRM_IOCTL_ARGS )
 		agp.free = (unsigned long)block;
 		if (!add_alloc_set(agp.context, AGP_TYPE, agp.free)) {
 			DRM_DEBUG("adding to allocation set fails\n");
-			mmFreeMem((PMemBlock)agp.free);
+			mmFreeMem((PMemBlock) agp.free);
 			retval = -1;
 		}
-	} else {  
+	} else {
 		agp.offset = 0;
 		agp.size = 0;
 		agp.free = 0;
 	}
 
-	DRM_COPY_TO_USER_IOCTL((drm_sis_mem_t *)data, agp, sizeof(agp));
+	DRM_COPY_TO_USER_IOCTL(argp, agp, sizeof(agp));
 
 	DRM_DEBUG("alloc agp, size = %d, offset = %d\n", agp.size, agp.offset);
 
 	return retval;
 }
 
-int sis_ioctl_agp_free( DRM_IOCTL_ARGS )
+static int sis_ioctl_agp_free(DRM_IOCTL_ARGS)
 {
 	DRM_DEVICE;
 	drm_sis_private_t *dev_priv = dev->dev_private;
@@ -315,12 +314,13 @@ int sis_ioctl_agp_free( DRM_IOCTL_ARGS )
 	if (dev_priv == NULL || dev_priv->AGPHeap == NULL)
 		return DRM_ERR(EINVAL);
 
-	DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_mem_t *)data, sizeof(agp));
+	DRM_COPY_FROM_USER_IOCTL(agp, (drm_sis_mem_t __user *) data,
+				 sizeof(agp));
 
-	if (!mmBlockInHeap(dev_priv->AGPHeap, (PMemBlock)agp.free))
+	if (!mmBlockInHeap(dev_priv->AGPHeap, (PMemBlock) agp.free))
 		return DRM_ERR(EINVAL);
 
-	mmFreeMem((PMemBlock)agp.free);
+	mmFreeMem((PMemBlock) agp.free);
 	if (!del_alloc_set(agp.context, AGP_TYPE, agp.free))
 		return DRM_ERR(EINVAL);
 
@@ -329,43 +329,42 @@ int sis_ioctl_agp_free( DRM_IOCTL_ARGS )
 	return 0;
 }
 
-int sis_init_context(int context)
+int sis_init_context(struct drm_device *dev, int context)
 {
 	int i;
 
-	for (i = 0; i < MAX_CONTEXT ; i++) {
+	for (i = 0; i < MAX_CONTEXT; i++) {
 		if (global_ppriv[i].used &&
 		    (global_ppriv[i].context == context))
 			break;
 	}
 
 	if (i >= MAX_CONTEXT) {
-		for (i = 0; i < MAX_CONTEXT ; i++) {
+		for (i = 0; i < MAX_CONTEXT; i++) {
 			if (!global_ppriv[i].used) {
 				global_ppriv[i].context = context;
 				global_ppriv[i].used = 1;
 				global_ppriv[i].sets[0] = setInit();
 				global_ppriv[i].sets[1] = setInit();
 				DRM_DEBUG("init allocation set, socket=%d, "
-				    "context = %d\n", i, context);
+					  "context = %d\n", i, context);
 				break;
 			}
 		}
 		if ((i >= MAX_CONTEXT) || (global_ppriv[i].sets[0] == NULL) ||
-		    (global_ppriv[i].sets[1] == NULL))
-		{
+		    (global_ppriv[i].sets[1] == NULL)) {
 			return 0;
 		}
 	}
-	
+
 	return 1;
 }
 
-int sis_final_context(int context)
+int sis_final_context(struct drm_device *dev, int context)
 {
 	int i;
 
-	for (i=0; i<MAX_CONTEXT; i++) {
+	for (i = 0; i < MAX_CONTEXT; i++) {
 		if (global_ppriv[i].used &&
 		    (global_ppriv[i].context == context))
 			break;
@@ -386,7 +385,7 @@ int sis_final_context(int context)
 #if defined(__linux__) && defined(CONFIG_FB_SIS)
 			sis_free(item);
 #else
-			mmFreeMem((PMemBlock)item);
+			mmFreeMem((PMemBlock) item);
 #endif
 			retval = setNext(set, &item);
 		}
@@ -397,13 +396,24 @@ int sis_final_context(int context)
 		retval = setFirst(set, &item);
 		while (retval) {
 			DRM_DEBUG("free agp memory 0x%lx\n", item);
-			mmFreeMem((PMemBlock)item);
+			mmFreeMem((PMemBlock) item);
 			retval = setNext(set, &item);
 		}
 		setDestroy(set);
 
-		global_ppriv[i].used = 0;	  
-        }
-	
+		global_ppriv[i].used = 0;
+	}
+
 	return 1;
 }
+
+drm_ioctl_desc_t sis_ioctls[] = {
+	[DRM_IOCTL_NR(DRM_SIS_FB_ALLOC)] = {sis_fb_alloc, 1, 0},
+	[DRM_IOCTL_NR(DRM_SIS_FB_FREE)] = {sis_fb_free, 1, 0},
+	[DRM_IOCTL_NR(DRM_SIS_AGP_INIT)] = {sis_ioctl_agp_init, 1, 1},
+	[DRM_IOCTL_NR(DRM_SIS_AGP_ALLOC)] = {sis_ioctl_agp_alloc, 1, 0},
+	[DRM_IOCTL_NR(DRM_SIS_AGP_FREE)] = {sis_ioctl_agp_free, 1, 0},
+	[DRM_IOCTL_NR(DRM_SIS_FB_INIT)] = {sis_fb_init, 1, 1}
+};
+
+int sis_max_ioctl = DRM_ARRAY_SIZE(sis_ioctls);
diff --git a/sys/dev/drm/tdfx_drv.c b/sys/dev/drm/tdfx_drv.c
index 4985ee0..e99bb32 100644
--- a/sys/dev/drm/tdfx_drv.c
+++ b/sys/dev/drm/tdfx_drv.c
@@ -1,5 +1,6 @@
 /* tdfx_drv.c -- tdfx driver -*- linux-c -*-
- * Created: Thu Oct  7 10:38:32 1999 by faith@precisioninsight.com */
+ * Created: Thu Oct  7 10:38:32 1999 by faith@precisioninsight.com
+ */
 /*-
  * Copyright 1999 Precision Insight, Inc., Cedar Park, Texas.
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
@@ -32,24 +33,70 @@
  * $FreeBSD$
  */
 
-#include "dev/drm/tdfx.h"
+#include "dev/drm/tdfx_drv.h"
 #include "dev/drm/drmP.h"
+#include "dev/drm/drm_pciids.h"
+
+/* drv_PCI_IDs comes from drm_pciids.h, generated from drm_pciids.txt. */
+static drm_pci_id_list_t tdfx_pciidlist[] = {
+	tdfx_PCI_IDS
+};
+
+extern drm_ioctl_desc_t tdfx_ioctls[];
+extern int tdfx_max_ioctl;
+
+static void tdfx_configure(drm_device_t *dev)
+{
+	dev->dev_priv_size = 1; /* No dev_priv */
 
-#include "dev/drm/drm_auth.h"
-#include "dev/drm/drm_bufs.h"
-#include "dev/drm/drm_context.h"
-#include "dev/drm/drm_dma.h"
-#include "dev/drm/drm_drawable.h"
-#include "dev/drm/drm_drv.h"
-#include "dev/drm/drm_fops.h"
-#include "dev/drm/drm_ioctl.h"
-#include "dev/drm/drm_lock.h"
-#include "dev/drm/drm_memory.h"
-#include "dev/drm/drm_vm.h"
-#include "dev/drm/drm_sysctl.h"
+	dev->max_driver_ioctl = 0;
+
+	dev->driver_name = DRIVER_NAME;
+	dev->driver_desc = DRIVER_DESC;
+	dev->driver_date = DRIVER_DATE;
+	dev->driver_major = DRIVER_MAJOR;
+	dev->driver_minor = DRIVER_MINOR;
+	dev->driver_patchlevel = DRIVER_PATCHLEVEL;
+
+	dev->use_mtrr = 1;
+}
 
 #ifdef __FreeBSD__
-DRIVER_MODULE(tdfx, pci, tdfx_driver, tdfx_devclass, 0, 0);
-#elif defined(__NetBSD__)
+static int
+tdfx_probe(device_t dev)
+{
+	return drm_probe(dev, tdfx_pciidlist);
+}
+
+static int
+tdfx_attach(device_t nbdev)
+{
+	drm_device_t *dev = device_get_softc(nbdev);
+
+	bzero(dev, sizeof(drm_device_t));
+	tdfx_configure(dev);
+	return drm_attach(nbdev, tdfx_pciidlist);
+}
+
+static device_method_t tdfx_methods[] = {
+	/* Device interface */
+	DEVMETHOD(device_probe,		tdfx_probe),
+	DEVMETHOD(device_attach,	tdfx_attach),
+	DEVMETHOD(device_detach,	drm_detach),
+
+	{ 0, 0 }
+};
+
+static driver_t tdfx_driver = {
+	"drm",
+	tdfx_methods,
+	sizeof(drm_device_t)
+};
+
+extern devclass_t drm_devclass;
+DRIVER_MODULE(tdfx, pci, tdfx_driver, drm_devclass, 0, 0);
+MODULE_DEPEND(tdfx, drm, 1, 1, 1);
+
+#elif defined(__NetBSD__) || defined(__OpenBSD__)
 CFDRIVER_DECL(tdfx, DV_TTY, NULL);
-#endif /* __FreeBSD__ */
+#endif
diff --git a/sys/dev/drm/tdfx.h b/sys/dev/drm/tdfx_drv.h
index 9a8cf72..05c1f7f 100644
--- a/sys/dev/drm/tdfx.h
+++ b/sys/dev/drm/tdfx_drv.h
@@ -1,6 +1,6 @@
 /* tdfx.h -- 3dfx DRM template customization -*- linux-c -*-
- * Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com */
-/*-
+ * Created: Wed Feb 14 12:32:32 2001 by gareth@valinux.com
+ *
  * Copyright 2000 VA Linux Systems, Inc., Sunnyvale, California.
  * All Rights Reserved.
  *
@@ -32,14 +32,8 @@
 #ifndef __TDFX_H__
 #define __TDFX_H__
 
-/* This remains constant for all DRM template files.
- */
-#define DRM(x) tdfx_##x
-
 /* General customization:
  */
-#define __HAVE_MTRR		1
-#define __HAVE_CTX_BITMAP	1
 
 #define DRIVER_AUTHOR		"VA Linux Systems Inc."