diff options
author | dumbbell <dumbbell@FreeBSD.org> | 2013-04-03 08:27:35 +0000 |
---|---|---|
committer | dumbbell <dumbbell@FreeBSD.org> | 2013-04-03 08:27:35 +0000 |
commit | fe05bc19f7752d5f01d725a1089ef0bfeb6fba00 (patch) | |
tree | 0d462e38914ac65d316e8bd7ce217698485d8168 /sys/dev/drm2 | |
parent | b01bfe0b5bb5fc66825914cc3f41bae486f7ae0e (diff) | |
download | FreeBSD-src-fe05bc19f7752d5f01d725a1089ef0bfeb6fba00.zip FreeBSD-src-fe05bc19f7752d5f01d725a1089ef0bfeb6fba00.tar.gz |
drm and i915: Left-shift iic_msg.slave at creation time
This is required because, in the radeon driver, we can't left-shift in a
central place, like it was done in the i915 driver.
Reviewed by: kib@, kan@, avg@
Tested by: kib@, avg@
Diffstat (limited to 'sys/dev/drm2')
-rw-r--r-- | sys/dev/drm2/drm_edid.c | 4 | ||||
-rw-r--r-- | sys/dev/drm2/i915/intel_iic.c | 14 | ||||
-rw-r--r-- | sys/dev/drm2/i915/intel_modes.c | 4 | ||||
-rw-r--r-- | sys/dev/drm2/i915/intel_sdvo.c | 12 |
4 files changed, 14 insertions, 20 deletions
diff --git a/sys/dev/drm2/drm_edid.c b/sys/dev/drm2/drm_edid.c index edd33b0..827677d 100644 --- a/sys/dev/drm2/drm_edid.c +++ b/sys/dev/drm2/drm_edid.c @@ -264,12 +264,12 @@ drm_do_probe_ddc_edid(device_t adapter, unsigned char *buf, do { struct iic_msg msgs[] = { { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_WR, .len = 1, .buf = &start, }, { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_RD, .len = len, .buf = buf, diff --git a/sys/dev/drm2/i915/intel_iic.c b/sys/dev/drm2/i915/intel_iic.c index 40e6eca..412349c 100644 --- a/sys/dev/drm2/i915/intel_iic.c +++ b/sys/dev/drm2/i915/intel_iic.c @@ -256,7 +256,7 @@ intel_gmbus_transfer(device_t idev, struct iic_msg *msgs, uint32_t nmsgs) I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_WAIT | (i + 1 == nmsgs ? GMBUS_CYCLE_STOP : 0) | (len << GMBUS_BYTE_COUNT_SHIFT) | - (msgs[i].slave << GMBUS_SLAVE_ADDR_SHIFT) | + (msgs[i].slave << (GMBUS_SLAVE_ADDR_SHIFT - 1)) | GMBUS_SLAVE_READ | GMBUS_SW_RDY); POSTING_READ(GMBUS2 + reg_offset); do { @@ -287,7 +287,7 @@ intel_gmbus_transfer(device_t idev, struct iic_msg *msgs, uint32_t nmsgs) I915_WRITE(GMBUS1 + reg_offset, GMBUS_CYCLE_WAIT | (i + 1 == nmsgs ? GMBUS_CYCLE_STOP : 0) | (msgs[i].len << GMBUS_BYTE_COUNT_SHIFT) | - (msgs[i].slave << GMBUS_SLAVE_ADDR_SHIFT) | + (msgs[i].slave << (GMBUS_SLAVE_ADDR_SHIFT - 1)) | GMBUS_SLAVE_WRITE | GMBUS_SW_RDY); POSTING_READ(GMBUS2+reg_offset); @@ -397,17 +397,11 @@ intel_iic_quirk_xfer(device_t idev, struct iic_msg *msgs, int nmsgs) IICBB_SETSCL(bridge_dev, 1); DELAY(I2C_RISEFALL_TIME); - /* convert slave addresses to format expected by iicbb */ - for (i = 0; i < nmsgs; i++) { - msgs[i].slave <<= 1; + for (i = 0; i < nmsgs - 1; i++) { /* force use of repeated start instead of default stop+start */ - if (i != (nmsgs - 1)) - msgs[i].flags |= IIC_M_NOSTOP; + msgs[i].flags |= IIC_M_NOSTOP; } ret = iicbus_transfer(idev, msgs, nmsgs); - /* restore the addresses */ - for (i = 0; i < nmsgs; i++) - msgs[i].slave >>= 1; IICBB_SETSDA(bridge_dev, 1); IICBB_SETSCL(bridge_dev, 1); intel_iic_quirk_set(dev_priv, false); diff --git a/sys/dev/drm2/i915/intel_modes.c b/sys/dev/drm2/i915/intel_modes.c index 8bf1d59..22969d3 100644 --- a/sys/dev/drm2/i915/intel_modes.c +++ b/sys/dev/drm2/i915/intel_modes.c @@ -45,13 +45,13 @@ bool intel_ddc_probe(struct intel_encoder *intel_encoder, int ddc_bus) u8 buf[2]; struct iic_msg msgs[] = { { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_WR, .len = 1, .buf = out_buf, }, { - .slave = DDC_ADDR, + .slave = DDC_ADDR << 1, .flags = IIC_M_RD, .len = 1, .buf = buf, diff --git a/sys/dev/drm2/i915/intel_sdvo.c b/sys/dev/drm2/i915/intel_sdvo.c index 0800d38..601990b 100644 --- a/sys/dev/drm2/i915/intel_sdvo.c +++ b/sys/dev/drm2/i915/intel_sdvo.c @@ -266,13 +266,13 @@ static bool intel_sdvo_read_byte(struct intel_sdvo *intel_sdvo, u8 addr, u8 *ch) { struct iic_msg msgs[] = { { - .slave = intel_sdvo->slave_addr, + .slave = intel_sdvo->slave_addr << 1, .flags = 0, .len = 1, .buf = &addr, }, { - .slave = intel_sdvo->slave_addr, + .slave = intel_sdvo->slave_addr << 1, .flags = IIC_M_RD, .len = 1, .buf = ch, @@ -454,14 +454,14 @@ intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args, intel_sdvo_debug_write(intel_sdvo, cmd, args, args_len); for (i = 0; i < args_len; i++) { - msgs[i].slave = intel_sdvo->slave_addr; + msgs[i].slave = intel_sdvo->slave_addr << 1; msgs[i].flags = 0; msgs[i].len = 2; msgs[i].buf = buf + 2 *i; buf[2*i + 0] = SDVO_I2C_ARG_0 - i; buf[2*i + 1] = ((const u8*)args)[i]; } - msgs[i].slave = intel_sdvo->slave_addr; + msgs[i].slave = intel_sdvo->slave_addr << 1; msgs[i].flags = 0; msgs[i].len = 2; msgs[i].buf = buf + 2*i; @@ -470,12 +470,12 @@ intel_sdvo_write_cmd(struct intel_sdvo *intel_sdvo, u8 cmd, const void *args, /* the following two are to read the response */ status = SDVO_I2C_CMD_STATUS; - msgs[i+1].slave = intel_sdvo->slave_addr; + msgs[i+1].slave = intel_sdvo->slave_addr << 1; msgs[i+1].flags = 0; msgs[i+1].len = 1; msgs[i+1].buf = &status; - msgs[i+2].slave = intel_sdvo->slave_addr; + msgs[i+2].slave = intel_sdvo->slave_addr << 1; msgs[i+2].flags = IIC_M_RD; msgs[i+2].len = 1; msgs[i+2].buf = &status; |