diff options
| author | anholt <anholt@FreeBSD.org> | 2003-08-19 02:57:31 +0000 |
|---|---|---|
| committer | anholt <anholt@FreeBSD.org> | 2003-08-19 02:57:31 +0000 |
| commit | 55fc74037ce1fed2313813918c5380b1c642828e (patch) | |
| tree | e45c260fa868be8644bf3d316e3c7cc3cdc5a0eb /sys/dev/drm/radeon_irq.c | |
| parent | f9627255eea8f589c728f37d9a3a6e0040a24291 (diff) | |
| download | FreeBSD-src-55fc74037ce1fed2313813918c5380b1c642828e.zip FreeBSD-src-55fc74037ce1fed2313813918c5380b1c642828e.tar.gz | |
Update DRM from DRI CVS as of today. Notable changes include Radeon
suspend/resume support and Rage 128 pageflipping support (both of which require
XFree86 from CVS), along with miscellaneous cleanups.
Diffstat (limited to 'sys/dev/drm/radeon_irq.c')
| -rw-r--r-- | sys/dev/drm/radeon_irq.c | 14 |
1 files changed, 8 insertions, 6 deletions
diff --git a/sys/dev/drm/radeon_irq.c b/sys/dev/drm/radeon_irq.c index 51e0edb..bd35bf4 100644 --- a/sys/dev/drm/radeon_irq.c +++ b/sys/dev/drm/radeon_irq.c @@ -56,7 +56,7 @@ * tied to dma at all, this is just a hangover from dri prehistory. */ -void DRM(dma_service)( DRM_IRQ_ARGS ) +irqreturn_t DRM(dma_service)( DRM_IRQ_ARGS ) { drm_device_t *dev = (drm_device_t *) arg; drm_radeon_private_t *dev_priv = @@ -69,7 +69,7 @@ void DRM(dma_service)( DRM_IRQ_ARGS ) stat = RADEON_READ(RADEON_GEN_INT_STATUS) & (RADEON_SW_INT_TEST | RADEON_CRTC_VBLANK_STAT); if (!stat) - return; + return IRQ_NONE; /* SW interrupt */ if (stat & RADEON_SW_INT_TEST) { @@ -85,6 +85,7 @@ void DRM(dma_service)( DRM_IRQ_ARGS ) /* Acknowledge interrupts we handle */ RADEON_WRITE(RADEON_GEN_INT_STATUS, stat); + return IRQ_HANDLED; } static __inline__ void radeon_acknowledge_irqs(drm_radeon_private_t *dev_priv) @@ -251,8 +252,9 @@ void DRM(driver_irq_postinstall)( drm_device_t *dev ) { void DRM(driver_irq_uninstall)( drm_device_t *dev ) { drm_radeon_private_t *dev_priv = (drm_radeon_private_t *)dev->dev_private; - if ( dev_priv ) { - /* Disable *all* interrupts */ - RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); - } + if (!dev_priv) + return; + + /* Disable *all* interrupts */ + RADEON_WRITE( RADEON_GEN_INT_CNTL, 0 ); } |
