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author | rnoland <rnoland@FreeBSD.org> | 2008-10-13 17:38:04 +0000 |
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committer | rnoland <rnoland@FreeBSD.org> | 2008-10-13 17:38:04 +0000 |
commit | d9c126db9b34863296dd208a1cd5282e8cd58c4c (patch) | |
tree | 5974cb074fb8ba5d9191baf498cd62df96e03400 /sys/dev/drm/radeon_cp.c | |
parent | 2077c8c84518d3de09d60a724f2b27cf0b846fa8 (diff) | |
download | FreeBSD-src-d9c126db9b34863296dd208a1cd5282e8cd58c4c.zip FreeBSD-src-d9c126db9b34863296dd208a1cd5282e8cd58c4c.tar.gz |
Add support for Radeon rs740 (HD 2100)
Approved by: jhb (mentor)
Obtained from: drm git master
Diffstat (limited to 'sys/dev/drm/radeon_cp.c')
-rw-r--r-- | sys/dev/drm/radeon_cp.c | 24 |
1 files changed, 16 insertions, 8 deletions
diff --git a/sys/dev/drm/radeon_cp.c b/sys/dev/drm/radeon_cp.c index e1570c9..cee924b 100644 --- a/sys/dev/drm/radeon_cp.c +++ b/sys/dev/drm/radeon_cp.c @@ -73,7 +73,8 @@ static u32 RS690_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) static u32 IGP_READ_MCIND(drm_radeon_private_t *dev_priv, int addr) { - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) return RS690_READ_MCIND(dev_priv, addr); else return RS480_READ_MCIND(dev_priv, addr); @@ -84,7 +85,8 @@ u32 radeon_read_fb_location(drm_radeon_private_t *dev_priv) if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) return R500_READ_MCIND(dev_priv, RV515_MC_FB_LOCATION); - else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) return RS690_READ_MCIND(dev_priv, RS690_MC_FB_LOCATION); else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) return R500_READ_MCIND(dev_priv, R520_MC_FB_LOCATION); @@ -96,7 +98,8 @@ static void radeon_write_fb_location(drm_radeon_private_t *dev_priv, u32 fb_loc) { if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) R500_WRITE_MCIND(RV515_MC_FB_LOCATION, fb_loc); - else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) RS690_WRITE_MCIND(RS690_MC_FB_LOCATION, fb_loc); else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) R500_WRITE_MCIND(R520_MC_FB_LOCATION, fb_loc); @@ -108,7 +111,8 @@ static void radeon_write_agp_location(drm_radeon_private_t *dev_priv, u32 agp_lo { if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) R500_WRITE_MCIND(RV515_MC_AGP_LOCATION, agp_loc); - else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) RS690_WRITE_MCIND(RS690_MC_AGP_LOCATION, agp_loc); else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) R500_WRITE_MCIND(R520_MC_AGP_LOCATION, agp_loc); @@ -124,7 +128,8 @@ static void radeon_write_agp_base(drm_radeon_private_t *dev_priv, u64 agp_base) if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RV515) { R500_WRITE_MCIND(RV515_MC_AGP_BASE, agp_base_lo); R500_WRITE_MCIND(RV515_MC_AGP_BASE_2, agp_base_hi); - } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) { + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { RS690_WRITE_MCIND(RS690_MC_AGP_BASE, agp_base_lo); RS690_WRITE_MCIND(RS690_MC_AGP_BASE_2, agp_base_hi); } else if ((dev_priv->flags & RADEON_FAMILY_MASK) > CHIP_RV515) { @@ -369,8 +374,9 @@ static void radeon_cp_load_microcode(drm_radeon_private_t * dev_priv) RADEON_WRITE(RADEON_CP_ME_RAM_DATAL, R420_cp_microcode[i][0]); } - } else if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) { - DRM_INFO("Loading RS690 Microcode\n"); + } else if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) { + DRM_INFO("Loading RS690/RS740 Microcode\n"); for (i = 0; i < 256; i++) { RADEON_WRITE(RADEON_CP_ME_RAM_DATAH, RS690_cp_microcode[i][1]); @@ -721,7 +727,8 @@ static void radeon_set_igpgart(drm_radeon_private_t * dev_priv, int on) temp = IGP_READ_MCIND(dev_priv, RS480_MC_MISC_CNTL); - if ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) + if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740)) IGP_WRITE_MCIND(RS480_MC_MISC_CNTL, (RS480_GART_INDEX_REG_EN | RS690_BLOCK_GFX_D3_EN)); else @@ -814,6 +821,7 @@ static void radeon_set_pcigart(drm_radeon_private_t * dev_priv, int on) u32 tmp; if (((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS690) || + ((dev_priv->flags & RADEON_FAMILY_MASK) == CHIP_RS740) || (dev_priv->flags & RADEON_IS_IGPGART)) { radeon_set_igpgart(dev_priv, on); return; |