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authorrnoland <rnoland@FreeBSD.org>2010-04-22 18:21:25 +0000
committerrnoland <rnoland@FreeBSD.org>2010-04-22 18:21:25 +0000
commitb733ebaa1ccc608f662359519c4712cf384b1360 (patch)
tree4cbae1e0936ed160e9fca32b44038b3450bb6072 /sys/dev/drm/r600_blit.c
parentc0d6a78ddcc9bdcf4f9ee2858efab1abf0db5bdf (diff)
downloadFreeBSD-src-b733ebaa1ccc608f662359519c4712cf384b1360.zip
FreeBSD-src-b733ebaa1ccc608f662359519c4712cf384b1360.tar.gz
Rework how drm maps are handled.
* On 32 bit platforms we steal the upper 4 bits of the map handle to store a unique map id. * On 64 bit platforms we steal the upper 24 bits. Resolves issues where the offsets that are handed to mmap may overlap the VRAM on some cards. Tested on: radeon, intel, mga, and via. This will break nouveau. I will spin new patches shortly.
Diffstat (limited to 'sys/dev/drm/r600_blit.c')
-rw-r--r--sys/dev/drm/r600_blit.c17
1 files changed, 8 insertions, 9 deletions
diff --git a/sys/dev/drm/r600_blit.c b/sys/dev/drm/r600_blit.c
index a26f2c4..d3c41ae 100644
--- a/sys/dev/drm/r600_blit.c
+++ b/sys/dev/drm/r600_blit.c
@@ -1290,8 +1290,8 @@ set_shaders(struct drm_device *dev)
DRM_DEBUG("\n");
/* load shaders */
- vs = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset);
- ps = (u32 *) ((char *)dev->agp_buffer_map->handle + dev_priv->blit_vb->offset + 256);
+ vs = (u32 *) ((char *)dev->agp_buffer_map->virtual + dev_priv->blit_vb->offset);
+ ps = (u32 *) ((char *)dev->agp_buffer_map->virtual + dev_priv->blit_vb->offset + 256);
shader_size = sizeof(r6xx_vs) / 4;
for (i= 0; i < shader_size; i++)
@@ -1718,11 +1718,10 @@ r600_blit_copy(struct drm_device *dev,
u64 vb_addr;
u32 *vb;
- vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
+ vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
- DRM_DEBUG("src=0x%016llx, dst=0x%016llx, size=%d\n",
- (unsigned long long)src_gpu_addr,
- (unsigned long long)dst_gpu_addr, size_bytes);
+ DRM_DEBUG("src=0x%016jx, dst=0x%016jx, size=%d\n",
+ src_gpu_addr, dst_gpu_addr, size_bytes);
if ((size_bytes & 3) || (src_gpu_addr & 3) || (dst_gpu_addr & 3)) {
max_bytes = 8192;
@@ -1759,7 +1758,7 @@ r600_blit_copy(struct drm_device *dev,
if (!dev_priv->blit_vb)
return;
set_shaders(dev);
- vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
+ vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
}
@@ -1849,7 +1848,7 @@ r600_blit_copy(struct drm_device *dev,
if (!dev_priv->blit_vb)
return;
set_shaders(dev);
- vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
+ vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
}
@@ -1928,7 +1927,7 @@ r600_blit_swap(struct drm_device *dev,
return;
set_shaders(dev);
}
- vb = (u32 *) ((char *)dev->agp_buffer_map->handle +
+ vb = (u32 *) ((char *)dev->agp_buffer_map->virtual +
dev_priv->blit_vb->offset + dev_priv->blit_vb->used);
sx2 = sx + w;
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