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author | rnoland <rnoland@FreeBSD.org> | 2009-06-20 16:45:14 +0000 |
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committer | rnoland <rnoland@FreeBSD.org> | 2009-06-20 16:45:14 +0000 |
commit | 4f053b746068039dffb792ad21ebb9873a095484 (patch) | |
tree | 8cc110213abb93223d0459a173133d65c5cfa8cf /sys/dev/drm/i915_irq.c | |
parent | 36023fcd0281ea8e5b75983968d2738a6e73204f (diff) | |
download | FreeBSD-src-4f053b746068039dffb792ad21ebb9873a095484.zip FreeBSD-src-4f053b746068039dffb792ad21ebb9873a095484.tar.gz |
The G45 docs indicate that all G4X chips use the new framecount register.
Intel agrees with my reading of the docs, make it so for all G4X chips.
The new register also has a 32 bit width as opposed to 24 bits. Fix
things up so that the counters roll over properly.
MFC after: 3 days
Diffstat (limited to 'sys/dev/drm/i915_irq.c')
-rw-r--r-- | sys/dev/drm/i915_irq.c | 4 |
1 files changed, 1 insertions, 3 deletions
diff --git a/sys/dev/drm/i915_irq.c b/sys/dev/drm/i915_irq.c index 7583031..dac1058 100644 --- a/sys/dev/drm/i915_irq.c +++ b/sys/dev/drm/i915_irq.c @@ -177,7 +177,7 @@ u32 i915_get_vblank_counter(struct drm_device *dev, int pipe) return count; } -u32 gm45_get_vblank_counter(struct drm_device *dev, int pipe) +u32 g45_get_vblank_counter(struct drm_device *dev, int pipe) { drm_i915_private_t *dev_priv = (drm_i915_private_t *) dev->dev_private; int reg = pipe ? PIPEB_FRMCOUNT_GM45 : PIPEA_FRMCOUNT_GM45; @@ -516,8 +516,6 @@ int i915_driver_irq_postinstall(struct drm_device *dev) dev_priv->vblank_pipe = DRM_I915_VBLANK_PIPE_A | DRM_I915_VBLANK_PIPE_B; - dev->max_vblank_count = 0xffffff; /* only 24 bits of frame count */ - /* Unmask the interrupts that we always want on. */ dev_priv->irq_mask_reg = ~I915_INTERRUPT_ENABLE_FIX; |