cxgb(4) updates, including:

- support for the new Gen-2, BT, and LP-CR cards.
- T3 firmware 7.7.0
- shared "common code" updates.

Approved by:	gnn (mentor)
Obtained from:	Chelsio
MFC after:	1 month

1 files changed, 29 insertions, 13 deletions

diff --git a/sys/dev/cxgb/common/cxgb_common.h b/sys/dev/cxgb/common/cxgb_common.h
index 09e7840..1aa3642 100644
--- a/sys/dev/cxgb/common/cxgb_common.h
+++ b/sys/dev/cxgb/common/cxgb_common.h
@@ -56,7 +56,11 @@ enum {
 };
 
 enum {
-	SUPPORTED_IRQ      = 1 << 24
+	SUPPORTED_LINK_IRQ = 1 << 24,
+	/* skip 25 */
+	SUPPORTED_MISC_IRQ = 1 << 26,
+	SUPPORTED_IRQ      = (SUPPORTED_LINK_IRQ | SUPPORTED_MISC_IRQ),
+	POLL_LINK_1ST_TIME = 1 << 27
 };
 
 enum {                            /* adapter interrupt-maintained statistics */
@@ -93,7 +97,7 @@ enum {
 
 enum {
 	FW_VERSION_MAJOR = 7,
-	FW_VERSION_MINOR = 1,
+	FW_VERSION_MINOR = 7,
 	FW_VERSION_MICRO = 0
 };
 
@@ -484,6 +488,7 @@ struct cmac {
 	u64 rx_mcnt;
 	unsigned int toggle_cnt;
 	unsigned int txen;
+	unsigned int was_reset;
 	u64 rx_pause;
 	struct mac_stats stats;
 };
@@ -526,6 +531,7 @@ enum {
 	cphy_cause_link_change = 1,
 	cphy_cause_fifo_error = 2,
 	cphy_cause_module_change = 4,
+	cphy_cause_alarm = 8,
 };
 
 /* PHY module types */
@@ -563,9 +569,10 @@ struct cphy_ops {
 struct cphy {
 	u8 addr;                             /* PHY address */
 	u8 modtype;                          /* PHY module type */
-	short priv;                          /* scratch pad */
+	unsigned int priv;                   /* scratch pad */
 	unsigned int caps;                   /* PHY capabilities */
 	adapter_t *adapter;                  /* associated adapter */
+	pinfo_t *pinfo;                      /* associated port */
 	const char *desc;                    /* PHY description */
 	unsigned long fifo_errors;           /* FIFO over/under-flows */
 	const struct cphy_ops *ops;          /* PHY operations */
@@ -589,7 +596,7 @@ static inline int mdio_write(struct cphy *phy, int mmd, int reg,
 }
 
 /* Convenience initializer */
-static inline void cphy_init(struct cphy *phy, adapter_t *adapter,
+static inline void cphy_init(struct cphy *phy, adapter_t *adapter, pinfo_t *pinfo,
 			     int phy_addr, struct cphy_ops *phy_ops,
 			     const struct mdio_ops *mdio_ops, unsigned int caps,
 			     const char *desc)
@@ -597,6 +604,7 @@ static inline void cphy_init(struct cphy *phy, adapter_t *adapter,
 	phy->addr    = (u8)phy_addr;
 	phy->caps    = caps;
 	phy->adapter = adapter;
+	phy->pinfo   = pinfo;
 	phy->desc    = desc;
 	phy->ops     = phy_ops;
 	if (mdio_ops) {
@@ -742,7 +750,7 @@ int t3_cim_ctl_blk_read(adapter_t *adap, unsigned int addr, unsigned int n,
 int t3_mc7_bd_read(struct mc7 *mc7, unsigned int start, unsigned int n,
 		   u64 *buf);
 
-int t3_mac_reset(struct cmac *mac);
+int t3_mac_init(struct cmac *mac);
 void t3b_pcs_reset(struct cmac *mac);
 void t3_mac_disable_exact_filters(struct cmac *mac);
 void t3_mac_enable_exact_filters(struct cmac *mac);
@@ -827,25 +835,33 @@ int t3_vsc7323_enable(adapter_t *adap, int port, int which);
 int t3_vsc7323_disable(adapter_t *adap, int port, int which);
 const struct mac_stats *t3_vsc7323_update_stats(struct cmac *mac);
 
+int t3_i2c_read8(adapter_t *adapter, int chained, u8 *valp);
+int t3_i2c_write8(adapter_t *adapter, int chained, u8 val);
+
 int t3_mi1_read(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
 		unsigned int *valp);
 int t3_mi1_write(adapter_t *adapter, int phy_addr, int mmd_addr, int reg_addr,
 		 unsigned int val);
 
-int t3_mv88e1xxx_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_mv88e1xxx_phy_prep(pinfo_t *pinfo, int phy_addr,
 			  const struct mdio_ops *mdio_ops);
-int t3_vsc8211_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_vsc8211_phy_prep(pinfo_t *pinfo, int phy_addr,
+			const struct mdio_ops *mdio_ops);
+int t3_vsc8211_fifo_depth(adapter_t *adap, unsigned int mtu, int port);
+int t3_ael1002_phy_prep(pinfo_t *pinfo, int phy_addr,
 			const struct mdio_ops *mdio_ops);
-int t3_ael1002_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_ael1006_phy_prep(pinfo_t *pinfo, int phy_addr,
 			const struct mdio_ops *mdio_ops);
-int t3_ael1006_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_ael2005_phy_prep(pinfo_t *pinfo, int phy_addr,
 			const struct mdio_ops *mdio_ops);
-int t3_ael2005_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_ael2020_phy_prep(pinfo_t *pinfo, int phy_addr,
 			const struct mdio_ops *mdio_ops);
-int t3_qt2045_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_qt2045_phy_prep(pinfo_t *pinfo, int phy_addr,
 		       const struct mdio_ops *mdio_ops);
-int t3_tn1010_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_tn1010_phy_prep(pinfo_t *pinfo, int phy_addr,
 		       const struct mdio_ops *mdio_ops);
-int t3_xaui_direct_phy_prep(struct cphy *phy, adapter_t *adapter, int phy_addr,
+int t3_xaui_direct_phy_prep(pinfo_t *pinfo, int phy_addr,
 			    const struct mdio_ops *mdio_ops);
+int t3_aq100x_phy_prep(pinfo_t *pinfo, int phy_addr,
+		       const struct mdio_ops *mdio_ops);
 #endif /* __CHELSIO_COMMON_H */