[bhnd] Normalize bhnd(4) device matching API

This unifies handling of core, chip, and board-level device
matching, and adds support for matching device drivers
against the bus attach type (e.g. SoC vs WiFi adapter).

Core-level quirks on Broadcom's chipsets generally are specific
to some combination of chip model, core revision, chip
package (e.g. 12x9 SMT package), SROM revision, etc.

Unifying the match APIs for all three attribute types (core, chip,
board/srom) allows defining a single device quirk table that
matches across all of those attributes.

Submitted by:	Landon Fuller <landonf@landonf.org>
Differential Revision:	 https://reviews.freebsd.org/D6515

5 files changed, 93 insertions, 122 deletions

diff --git a/sys/dev/bhnd/cores/chipc/chipc.c b/sys/dev/bhnd/cores/chipc/chipc.c
index f95b871..b6713b6 100644
--- a/sys/dev/bhnd/cores/chipc/chipc.c
+++ b/sys/dev/bhnd/cores/chipc/chipc.c
@@ -64,62 +64,40 @@ __FBSDID("$FreeBSD$");
 devclass_t bhnd_chipc_devclass;	/**< bhnd(4) chipcommon device class */
 
 static struct bhnd_device_quirk chipc_quirks[];
-static struct bhnd_chip_quirk chipc_chip_quirks[];
 
 /* Supported device identifiers */
 static const struct bhnd_device chipc_devices[] = {
-	BHND_DEVICE(CC, "CC", chipc_quirks, chipc_chip_quirks),
+	BHND_DEVICE(CC,	NULL,	chipc_quirks),
 	BHND_DEVICE_END
 };
 
 
 /* Device quirks table */
 static struct bhnd_device_quirk chipc_quirks[] = {
-	{ BHND_HWREV_GTE	(32),	CHIPC_QUIRK_SUPPORTS_SPROM },
-	{ BHND_HWREV_GTE	(35),	CHIPC_QUIRK_SUPPORTS_CAP_EXT },
-	{ BHND_HWREV_EQ		(38),	CHIPC_QUIRK_4706_NFLASH }, /*BCM5357 ?*/
-	{ BHND_HWREV_GTE	(49),	CHIPC_QUIRK_IPX_OTPLAYOUT_SIZE },
+	/* core revision quirks */
+	BHND_CORE_QUIRK	(HWREV_GTE(32),		CHIPC_QUIRK_SUPPORTS_SPROM),
+	BHND_CORE_QUIRK	(HWREV_GTE(35),		CHIPC_QUIRK_SUPPORTS_CAP_EXT),
+	BHND_CORE_QUIRK	(HWREV_GTE(49),		CHIPC_QUIRK_IPX_OTPLAYOUT_SIZE),
+
+	/* 4706 variant quirks */
+	BHND_CORE_QUIRK	(HWREV_EQ (38),		CHIPC_QUIRK_4706_NFLASH), /* BCM5357? */
+	BHND_CHIP_QUIRK	(4706,	HWREV_ANY,	CHIPC_QUIRK_4706_NFLASH),
+
+	/* 4331 quirks*/
+	BHND_CHIP_QUIRK	(4331,	HWREV_ANY,	CHIPC_QUIRK_4331_EXTPA_MUX_SPROM),
+	BHND_PKG_QUIRK	(4331,	TN,		CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM),
+	BHND_PKG_QUIRK	(4331,	TNA0,		CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM),
+	BHND_PKG_QUIRK	(4331,	TT,		CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM),
+
+	/* 4360 quirks */
+	BHND_CHIP_QUIRK	(4352,	HWREV_LTE(2),	CHIPC_QUIRK_4360_FEM_MUX_SPROM),
+	BHND_CHIP_QUIRK	(43460,	HWREV_LTE(2),	CHIPC_QUIRK_4360_FEM_MUX_SPROM),
+	BHND_CHIP_QUIRK	(43462,	HWREV_LTE(2),	CHIPC_QUIRK_4360_FEM_MUX_SPROM),
+	BHND_CHIP_QUIRK	(43602,	HWREV_LTE(2),	CHIPC_QUIRK_4360_FEM_MUX_SPROM),
 
 	BHND_DEVICE_QUIRK_END
 };
 
-/* Chip-specific quirks table */
-static struct bhnd_chip_quirk chipc_chip_quirks[] = {
-	/* 4331 12x9 packages */
-	{{ BHND_CHIP_IP(4331, 4331TN) },
-		CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM
-	},
-	{{ BHND_CHIP_IP(4331, 4331TNA0) },
-		CHIPC_QUIRK_4331_GPIO2_5_MUX_SPROM
-	},
-
-	/* 4331 12x12 packages */
-	{{ BHND_CHIP_IPR(4331, 4331TT, HWREV_GTE(1)) },
-		CHIPC_QUIRK_4331_EXTPA2_MUX_SPROM
-	},
-
-	/* 4331 (all packages/revisions) */
-	{{ BHND_CHIP_ID(4331) },
-		CHIPC_QUIRK_4331_EXTPA_MUX_SPROM
-	},
-
-	/* 4360 family (all revs <= 2) */
-	{{ BHND_CHIP_IR(4352, HWREV_LTE(2)) },
-		CHIPC_QUIRK_4360_FEM_MUX_SPROM },
-	{{ BHND_CHIP_IR(43460, HWREV_LTE(2)) },
-		CHIPC_QUIRK_4360_FEM_MUX_SPROM },
-	{{ BHND_CHIP_IR(43462, HWREV_LTE(2)) },
-		CHIPC_QUIRK_4360_FEM_MUX_SPROM },
-	{{ BHND_CHIP_IR(43602, HWREV_LTE(2)) },
-		CHIPC_QUIRK_4360_FEM_MUX_SPROM },
-
-	/* BCM4706 */
-	{{ BHND_CHIP_ID(4306) },
-		CHIPC_QUIRK_4706_NFLASH },
-
-	BHND_CHIP_QUIRK_END
-};
-
 static int			 chipc_try_activate_resource(
 				    struct chipc_softc *sc, device_t child,
 				    int type, int rid, struct resource *r,
@@ -316,7 +294,7 @@ chipc_read_caps(struct chipc_softc *sc, struct chipc_caps *caps)
 		caps->otp_size = CHIPC_GET_BITS(regval, CHIPC_OTPL_SIZE);
 	}
 
-	/* Determine flash type and paramters */
+	/* Determine flash type and parameters */
 	caps->cfi_width = 0;
 
 	switch (CHIPC_GET_BITS(cap_reg, CHIPC_CAP_FLASH)) {
diff --git a/sys/dev/bhnd/cores/pci/bhnd_pci.c b/sys/dev/bhnd/cores/pci/bhnd_pci.c
index f9adad2..2445e65 100644
--- a/sys/dev/bhnd/cores/pci/bhnd_pci.c
+++ b/sys/dev/bhnd/cores/pci/bhnd_pci.c
@@ -68,8 +68,8 @@ static struct bhnd_device_quirk bhnd_pcie_quirks[];
 
 #define	BHND_PCI_QUIRKS		bhnd_pci_quirks
 #define	BHND_PCIE_QUIRKS	bhnd_pcie_quirks
-#define	BHND_PCI_DEV(_core, _desc, ...)					\
-	{ BHND_DEVICE(_core, _desc, BHND_ ## _core ## _QUIRKS, NULL,	\
+#define	BHND_PCI_DEV(_core, _desc, ...)				\
+	{ BHND_DEVICE(_core, _desc, BHND_ ## _core ## _QUIRKS,	\
 	    ## __VA_ARGS__), BHND_PCI_REGFMT_ ## _core }
 
 static const struct bhnd_pci_device {
@@ -77,9 +77,9 @@ static const struct bhnd_pci_device {
 	bhnd_pci_regfmt_t	regfmt;	/**< register format */
 } bhnd_pci_devs[] = {
 	BHND_PCI_DEV(PCI,	"Host-PCI bridge",		BHND_DF_HOSTB),	     
-	BHND_PCI_DEV(PCI,	"PCI-BHND bridge"),
+	BHND_PCI_DEV(PCI,	"PCI-BHND bridge",		BHND_DF_SOC),
 	BHND_PCI_DEV(PCIE,	"PCIe-G1 Host-PCI bridge",	BHND_DF_HOSTB),
-	BHND_PCI_DEV(PCIE,	"PCIe-G1 PCI-BHND bridge"),
+	BHND_PCI_DEV(PCIE,	"PCIe-G1 PCI-BHND bridge",	BHND_DF_SOC),
 
 	{ BHND_DEVICE_END, 0 }
 };
@@ -87,7 +87,8 @@ static const struct bhnd_pci_device {
 /* Device quirks tables */
 static struct bhnd_device_quirk bhnd_pci_quirks[] = { BHND_DEVICE_QUIRK_END };
 static struct bhnd_device_quirk bhnd_pcie_quirks[] = {
-	{ BHND_HWREV_GTE	(10),	BHND_PCI_QUIRK_SD_C22_EXTADDR },
+	BHND_CORE_QUIRK(HWREV_GTE(10),	BHND_PCI_QUIRK_SD_C22_EXTADDR),
+
 	BHND_DEVICE_QUIRK_END
 };
 
diff --git a/sys/dev/bhnd/cores/pci/bhnd_pci_hostb.c b/sys/dev/bhnd/cores/pci/bhnd_pci_hostb.c
index 119ab8a..4ba7289 100644
--- a/sys/dev/bhnd/cores/pci/bhnd_pci_hostb.c
+++ b/sys/dev/bhnd/cores/pci/bhnd_pci_hostb.c
@@ -67,8 +67,6 @@ __FBSDID("$FreeBSD$");
 
 static const struct bhnd_device_quirk bhnd_pci_quirks[];
 static const struct bhnd_device_quirk bhnd_pcie_quirks[];
-static const struct bhnd_chip_quirk bhnd_pci_chip_quirks[];
-static const struct bhnd_chip_quirk bhnd_pcie_chip_quirks[];
 
 /* Device driver work-around variations */
 typedef enum {
@@ -88,89 +86,88 @@ static int	bhnd_pci_wars_hwdown(struct bhnd_pcihb_softc *sc,
  * device/quirk tables
  */
 
-#define	BHND_PCI_DEV(_core, _quirks, _chip_quirks)		\
-	BHND_DEVICE(_core, "", _quirks, _chip_quirks, BHND_DF_HOSTB)
+#define	BHND_PCI_DEV(_core, _quirks)		\
+	BHND_DEVICE(_core, NULL, _quirks, BHND_DF_HOSTB)
 
 static const struct bhnd_device bhnd_pci_devs[] = {
-	BHND_PCI_DEV(PCI,	bhnd_pci_quirks,	bhnd_pci_chip_quirks),
-	BHND_PCI_DEV(PCIE,	bhnd_pcie_quirks,	bhnd_pcie_chip_quirks),
+	BHND_PCI_DEV(PCI,	bhnd_pci_quirks),
+	BHND_PCI_DEV(PCIE,	bhnd_pcie_quirks),
 	BHND_DEVICE_END
 };
 
 static const struct bhnd_device_quirk bhnd_pci_quirks[] = {
-	{ BHND_HWREV_ANY,	BHND_PCI_QUIRK_SBTOPCI2_PREF_BURST },
-	{ BHND_HWREV_GTE(11),	BHND_PCI_QUIRK_SBTOPCI2_READMULTI |
-				BHND_PCI_QUIRK_CLKRUN_DSBL },
-	BHND_DEVICE_QUIRK_END
-};
+	/* core revision quirks */
+	BHND_CORE_QUIRK	(HWREV_ANY,	BHND_PCI_QUIRK_SBTOPCI2_PREF_BURST),
+	BHND_CORE_QUIRK	(HWREV_GTE(11),	BHND_PCI_QUIRK_SBTOPCI2_READMULTI |
+					BHND_PCI_QUIRK_CLKRUN_DSBL),
 
-static const struct bhnd_chip_quirk bhnd_pci_chip_quirks[] = {
 	/* BCM4321CB2 boards that require 960ns latency timer override */
-	{{ BHND_CHIP_BTYPE(BCM4321CB2) },
-		BHND_PCI_QUIRK_960NS_LATTIM_OVR },
-	{{ BHND_CHIP_BTYPE(BCM4321CB2_AG) },
-		BHND_PCI_QUIRK_960NS_LATTIM_OVR },
+	BHND_BOARD_QUIRK(BCM4321CB2,	BHND_PCI_QUIRK_960NS_LATTIM_OVR),
+	BHND_BOARD_QUIRK(BCM4321CB2_AG,	BHND_PCI_QUIRK_960NS_LATTIM_OVR),
 
-	BHND_CHIP_QUIRK_END
+	BHND_DEVICE_QUIRK_END
 };
 
 static const struct bhnd_device_quirk bhnd_pcie_quirks[] = {
-	{ BHND_HWREV_EQ		(0),	BHND_PCIE_QUIRK_SDR9_L0s_HANG },
-	{ BHND_HWREV_RANGE	(0,1),	BHND_PCIE_QUIRK_UR_STATUS_FIX },
-	{ BHND_HWREV_EQ		(1),	BHND_PCIE_QUIRK_PCIPM_REQEN },
+	/* core revision quirks */
+	BHND_CORE_QUIRK	(HWREV_EQ (0),	BHND_PCIE_QUIRK_SDR9_L0s_HANG),
+	BHND_CORE_QUIRK	(HWREV_RANGE(0,1),
+	    BHND_PCIE_QUIRK_UR_STATUS_FIX),
 
-	{ BHND_HWREV_RANGE	(3,5),	BHND_PCIE_QUIRK_ASPM_OVR |
-					BHND_PCIE_QUIRK_SDR9_POLARITY |
-					BHND_PCIE_QUIRK_SDR9_NO_FREQRETRY },
+	BHND_CORE_QUIRK	(HWREV_EQ (1),	BHND_PCIE_QUIRK_PCIPM_REQEN),
 
-	{ BHND_HWREV_LTE	(6),	BHND_PCIE_QUIRK_L1_IDLE_THRESH },
-	{ BHND_HWREV_GTE	(6),	BHND_PCIE_QUIRK_SPROM_L23_PCI_RESET },
-	{ BHND_HWREV_EQ		(7),	BHND_PCIE_QUIRK_SERDES_NOPLLDOWN },
-	{ BHND_HWREV_GTE	(8),	BHND_PCIE_QUIRK_L1_TIMER_PERF },
+	BHND_CORE_QUIRK	(HWREV_RANGE(3,5),
+	    BHND_PCIE_QUIRK_ASPM_OVR | BHND_PCIE_QUIRK_SDR9_POLARITY |
+	    BHND_PCIE_QUIRK_SDR9_NO_FREQRETRY),
 
-	{ BHND_HWREV_LTE	(17),	BHND_PCIE_QUIRK_MAX_MRRS_128 },
+	BHND_CORE_QUIRK	(HWREV_LTE(6),	BHND_PCIE_QUIRK_L1_IDLE_THRESH),
+	BHND_CORE_QUIRK	(HWREV_GTE(6),	BHND_PCIE_QUIRK_SPROM_L23_PCI_RESET),
+	BHND_CORE_QUIRK	(HWREV_EQ (7),	BHND_PCIE_QUIRK_SERDES_NOPLLDOWN),
+	BHND_CORE_QUIRK	(HWREV_GTE(8),	BHND_PCIE_QUIRK_L1_TIMER_PERF),
 
-	BHND_DEVICE_QUIRK_END
-};
+	BHND_CORE_QUIRK	(HWREV_LTE(17),	BHND_PCIE_QUIRK_MAX_MRRS_128),
 
-static const struct bhnd_chip_quirk bhnd_pcie_chip_quirks[] = {
 	/* Apple boards on which BHND_BFL2_PCIEWAR_OVR should be assumed
 	 * to be set. */
-	{{ BHND_CHIP_BVENDOR	(PCI_VENDOR_APPLE),
-	   BHND_CHIP_SROMREV	(HWREV_EQ(4)),
-	   BHND_CHIP_BREV	(HWREV_LTE(0x71)) },
-		BHND_PCIE_QUIRK_BFL2_PCIEWAR_EN		},
+	{{ BHND_MATCH_BOARD_VENDOR	(PCI_VENDOR_APPLE),
+	   BHND_MATCH_BOARD_REV		(HWREV_LTE(0x71)),
+	   BHND_MATCH_SROMREV		(EQ(4)) },
+		BHND_PCIE_QUIRK_BFL2_PCIEWAR_EN },
 
 	/* Apple BCM4322 boards that require 700mV SerDes TX drive strength. */
-	{{ BHND_CHIP_BVT	(PCI_VENDOR_APPLE,	BCM94322X9)	},
-		BHND_PCIE_QUIRK_SERDES_TXDRV_700MV	},
+	{{ BHND_CHIP_ID(BCM4322),
+	   BHND_MATCH_BOARD(PCI_VENDOR_APPLE, BCM94322X9), },
+		BHND_PCIE_QUIRK_SERDES_TXDRV_700MV },
 
 	/* Apple BCM4331 board-specific quirks */
-#define	BHND_APPLE_4331_QUIRK(_board, ...)				\
-	{{ BHND_CHIP_ID		(4331),					\
-	   BHND_CHIP_BVT	(PCI_VENDOR_APPLE,	_board), },	\
-		__VA_ARGS__ }
-
-	BHND_APPLE_4331_QUIRK(BCM94331X19,
-	    BHND_PCIE_QUIRK_SERDES_TXDRV_MAX|BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
-
-	BHND_APPLE_4331_QUIRK(BCM94331X28,
-	    BHND_PCIE_QUIRK_SERDES_TXDRV_MAX|BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
-	BHND_APPLE_4331_QUIRK(BCM94331X28B, BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
-	  
-	BHND_APPLE_4331_QUIRK(BCM94331X29B,
-	    BHND_PCIE_QUIRK_SERDES_TXDRV_MAX|BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
-
-	BHND_APPLE_4331_QUIRK(BCM94331X19C,
-	    BHND_PCIE_QUIRK_SERDES_TXDRV_MAX|BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
+#define	BHND_A4331_QUIRK(_board, ...)	\
+	{{ BHND_CHIP_ID(BCM4331),		\
+	    BHND_MATCH_BOARD(PCI_VENDOR_APPLE, _board) }, __VA_ARGS__ }
+
+	BHND_A4331_QUIRK(BCM94331X19,	BHND_PCIE_QUIRK_SERDES_TXDRV_MAX |
+					BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
+
+	BHND_A4331_QUIRK(BCM94331X28,	BHND_PCIE_QUIRK_SERDES_TXDRV_MAX | 
+					BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
+
+	BHND_A4331_QUIRK(BCM94331X28B,	BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
+
+	BHND_A4331_QUIRK(BCM94331X29B,	BHND_PCIE_QUIRK_SERDES_TXDRV_MAX | 
+					BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
+
+	BHND_A4331_QUIRK(BCM94331X19C,	BHND_PCIE_QUIRK_SERDES_TXDRV_MAX |
+					BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
 	    
-	BHND_APPLE_4331_QUIRK(BCM94331X29D, BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
-	BHND_APPLE_4331_QUIRK(BCM94331X33, BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
-#undef BHND_APPLE_4331_QUIRK
+	BHND_A4331_QUIRK(BCM94331X29D,	BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
 
-	BHND_CHIP_QUIRK_END
+	BHND_A4331_QUIRK(BCM94331X33,	BHND_PCIE_QUIRK_DEFAULT_MRRS_512),
+			 
+#undef BHND_A4331_QUIRK
+
+	BHND_DEVICE_QUIRK_END
 };
 
+
 #define	BHND_PCI_SOFTC(_sc)	(&((_sc)->common))
 
 #define	BHND_PCI_READ_2(_sc, _reg)		\
diff --git a/sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c b/sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c
index 1dc3005..8641fcc 100644
--- a/sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c
+++ b/sys/dev/bhnd/cores/pcie2/bhnd_pcie2.c
@@ -57,11 +57,11 @@ __FBSDID("$FreeBSD$");
 static struct bhnd_device_quirk bhnd_pcie2_quirks[];
 
 #define	BHND_PCIE_DEV(_core, _desc, ...)				\
-	BHND_DEVICE(_core, _desc, bhnd_pcie2_quirks, NULL, ## __VA_ARGS__)
+	BHND_DEVICE(_core, _desc, bhnd_pcie2_quirks, ## __VA_ARGS__)
 
 static const struct bhnd_device bhnd_pcie2_devs[] = {
 	BHND_PCIE_DEV(PCIE2,	"PCIe-G2 Host-PCI bridge",	BHND_DF_HOSTB),
-	BHND_PCIE_DEV(PCIE2,	"PCIe-G2 PCI-BHND bridge"),
+	BHND_PCIE_DEV(PCIE2,	"PCIe-G2 PCI-BHND bridge",	BHND_DF_SOC),
 
 	BHND_DEVICE_END
 };
diff --git a/sys/dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c b/sys/dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c
index aa5b86b..f20de8e 100644
--- a/sys/dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c
+++ b/sys/dev/bhnd/cores/pcie2/bhnd_pcie2_hostb.c
@@ -72,7 +72,6 @@ __FBSDID("$FreeBSD$");
 #include "bhnd_pcie2_hostbvar.h"
 
 static const struct bhnd_device_quirk bhnd_pcie2_quirks[];
-static const struct bhnd_chip_quirk bhnd_pcie2_chip_quirks[];
 
 
 static int	bhnd_pcie2_wars_early_once(struct bhnd_pcie2hb_softc *sc);
@@ -83,27 +82,23 @@ static int	bhnd_pcie2_wars_hwdown(struct bhnd_pcie2hb_softc *sc);
  * device/quirk tables
  */
 
-#define	BHND_PCI_DEV(_core, _quirks, _chip_quirks)		\
-	BHND_DEVICE(_core, "", _quirks, _chip_quirks, BHND_DF_HOSTB)
+#define	BHND_PCI_DEV(_core, _quirks)		\
+	BHND_DEVICE(_core, NULL, _quirks, BHND_DF_HOSTB)
 
 static const struct bhnd_device bhnd_pcie2_devs[] = {
-	BHND_PCI_DEV(PCIE2,	bhnd_pcie2_quirks,	bhnd_pcie2_chip_quirks),
+	BHND_PCI_DEV(PCIE2,	bhnd_pcie2_quirks),
 	BHND_DEVICE_END
 };
 
 static const struct bhnd_device_quirk bhnd_pcie2_quirks[] = {
-	BHND_DEVICE_QUIRK_END
-};
-
-static const struct bhnd_chip_quirk bhnd_pcie2_chip_quirks[] = {
 	/* Apple BCM4360 boards that require adjusting TX amplitude and
 	 * differential output de-emphasis of the PCIe SerDes */
-	{{ BHND_CHIP_BVT	(PCI_VENDOR_APPLE,	BCM94360X51P2)	},
-		BHND_PCIE2_QUIRK_SERDES_TXDRV_DEEMPH	},
-	{{ BHND_CHIP_BVT	(PCI_VENDOR_APPLE,	BCM94360X51A)	},
-		BHND_PCIE2_QUIRK_SERDES_TXDRV_DEEMPH	},
+	{{ BHND_MATCH_BOARD(PCI_VENDOR_APPLE, BCM94360X51P2), },
+		BHND_PCIE2_QUIRK_SERDES_TXDRV_DEEMPH },
+	{{ BHND_MATCH_BOARD(PCI_VENDOR_APPLE, BCM94360X51A), },
+		BHND_PCIE2_QUIRK_SERDES_TXDRV_DEEMPH },
 
-	BHND_CHIP_QUIRK_END
+	BHND_DEVICE_QUIRK_END
 };
 
 static int