diff options
| author | adrian <adrian@FreeBSD.org> | 2016-05-17 06:52:53 +0000 |
|---|---|---|
| committer | adrian <adrian@FreeBSD.org> | 2016-05-17 06:52:53 +0000 |
| commit | 1fac3534f1fb4cf525ce487b292974919be958d6 (patch) | |
| tree | a6f48be495b4c02010bf9f75e3fc2ef4743cd5d6 /sys/dev/bhnd/cores/chipc/chipc.c | |
| parent | 2ba8b0863768ea4eb8681ab0c754c7b9d4cbc06a (diff) | |
| download | FreeBSD-src-1fac3534f1fb4cf525ce487b292974919be958d6.zip FreeBSD-src-1fac3534f1fb4cf525ce487b292974919be958d6.tar.gz | |
[bhnd] Finish bhnd(4) PCI/PCIe-G1 hostb support.
Now that we've got access to SPROM and can access board identification,
this implements all known remaining hardware work-arounds for the bhnd(4)
PCI and PCIe-G1 cores operating endpoint mode.
Additionally, this adds an initial set of skeleton PCIe-G2 hostb and pcib
drivers, required by fullmac and newer softmac devices.
Submitted by: Landon Fuller <landonf@landonf.org>
Differential Revision: https://reviews.freebsd.org/D6377
Diffstat (limited to 'sys/dev/bhnd/cores/chipc/chipc.c')
| -rw-r--r-- | sys/dev/bhnd/cores/chipc/chipc.c | 34 |
1 files changed, 26 insertions, 8 deletions
diff --git a/sys/dev/bhnd/cores/chipc/chipc.c b/sys/dev/bhnd/cores/chipc/chipc.c index 0a21d58..ea1d7c2 100644 --- a/sys/dev/bhnd/cores/chipc/chipc.c +++ b/sys/dev/bhnd/cores/chipc/chipc.c @@ -489,20 +489,38 @@ chipc_nvram_setvar(device_t dev, const char *name, const void *buf, return (ENODEV); } +static void +chipc_write_chipctrl(device_t dev, uint32_t value, uint32_t mask) +{ + struct chipc_softc *sc; + uint32_t cctrl; + + sc = device_get_softc(dev); + + CHIPC_LOCK(sc); + + cctrl = bhnd_bus_read_4(sc->core, CHIPC_CHIPCTRL); + cctrl = (cctrl & ~mask) | (value | mask); + bhnd_bus_write_4(sc->core, CHIPC_CHIPCTRL, cctrl); + + CHIPC_UNLOCK(sc); +} + static device_method_t chipc_methods[] = { /* Device interface */ - DEVMETHOD(device_probe, chipc_probe), - DEVMETHOD(device_attach, chipc_attach), - DEVMETHOD(device_detach, chipc_detach), - DEVMETHOD(device_suspend, chipc_suspend), - DEVMETHOD(device_resume, chipc_resume), + DEVMETHOD(device_probe, chipc_probe), + DEVMETHOD(device_attach, chipc_attach), + DEVMETHOD(device_detach, chipc_detach), + DEVMETHOD(device_suspend, chipc_suspend), + DEVMETHOD(device_resume, chipc_resume), /* ChipCommon interface */ - DEVMETHOD(bhnd_chipc_nvram_src, chipc_nvram_src), + DEVMETHOD(bhnd_chipc_nvram_src, chipc_nvram_src), + DEVMETHOD(bhnd_chipc_write_chipctrl, chipc_write_chipctrl), /* NVRAM interface */ - DEVMETHOD(bhnd_nvram_getvar, chipc_nvram_getvar), - DEVMETHOD(bhnd_nvram_setvar, chipc_nvram_setvar), + DEVMETHOD(bhnd_nvram_getvar, chipc_nvram_getvar), + DEVMETHOD(bhnd_nvram_setvar, chipc_nvram_setvar), DEVMETHOD_END }; |
