Switch to ath hal source code. Note this removes the ath_hal

module; the ath module now brings in the hal support.  Kernel
config files are almost backwards compatible; supplying

device ath_hal

gives you the same chip support that the binary hal did but you
must also include

options AH_SUPPORT_AR5416

to enable the extended format descriptors used by 11n parts.
It is now possible to control the chip support included in a
build by specifying exactly which chips are to be supported
in the config file; consult ath_hal(4) for information.

8 files changed, 29 insertions, 54 deletions

diff --git a/sys/dev/ath/ah_osdep.c b/sys/dev/ath/ah_osdep.c
index 8ddb425..c124772 100644
--- a/sys/dev/ath/ah_osdep.c
+++ b/sys/dev/ath/ah_osdep.c
@@ -43,7 +43,7 @@
 
 #include <net/ethernet.h>		/* XXX for ether_sprintf */
 
-#include <contrib/dev/ath/ah.h>
+#include <dev/ath/ath_hal/ah.h>
 
 /*
  * WiSoC boards overload the bus tag with information about the
@@ -56,7 +56,7 @@
 #define	BUSTAG(ah) \
 	((bus_space_tag_t) ((struct ar531x_config *)((ah)->ah_st))->tag)
 #else
-#define	BUSTAG(ah)	((bus_space_tag_t) (ah)->ah_st)
+#define	BUSTAG(ah)	((ah)->ah_st)
 #endif
 
 extern	void ath_hal_printf(struct ath_hal *, const char*, ...)
@@ -90,9 +90,6 @@ SYSCTL_INT(_hw_ath_hal, OID_AUTO, debug, CTLFLAG_RW, &ath_hal_debug,
 TUNABLE_INT("hw.ath.hal.debug", &ath_hal_debug);
 #endif /* AH_DEBUG */
 
-SYSCTL_STRING(_hw_ath_hal, OID_AUTO, version, CTLFLAG_RD, ath_hal_version, 0,
-	"Atheros HAL version");
-
 /* NB: these are deprecated; they exist for now for compatibility */
 int	ath_hal_dma_beacon_response_time = 2;	/* in TU's */
 SYSCTL_INT(_hw_ath_hal, OID_AUTO, dma_brt, CTLFLAG_RW,
@@ -195,7 +192,7 @@ HALDEBUGn(struct ath_hal *ah, u_int level, const char* fmt, ...)
  */
 #include <sys/alq.h>
 #include <sys/pcpu.h>
-#include <contrib/dev/ath/ah_decode.h>
+#include <dev/ath/ath_hal/ah_decode.h>
 
 static	struct alq *ath_hal_alq;
 static	int ath_hal_alq_emitdev;	/* need to emit DEVICE record */
@@ -273,7 +270,7 @@ void
 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
 {
 	bus_space_tag_t tag = BUSTAG(ah);
-	bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
+	bus_space_handle_t h = ah->ah_sh;
 
 	if (ath_hal_alq) {
 		struct ale *ale = ath_hal_alq_get(ah);
@@ -297,7 +294,7 @@ u_int32_t
 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
 {
 	bus_space_tag_t tag = BUSTAG(ah);
-	bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
+	bus_space_handle_t h = ah->ah_sh;
 	u_int32_t val;
 
 #if _BYTE_ORDER == _BIG_ENDIAN
@@ -349,7 +346,7 @@ void
 ath_hal_reg_write(struct ath_hal *ah, u_int32_t reg, u_int32_t val)
 {
 	bus_space_tag_t tag = BUSTAG(ah);
-	bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
+	bus_space_handle_t h = ah->ah_sh;
 
 #if _BYTE_ORDER == _BIG_ENDIAN
 	if (reg >= 0x4000 && reg < 0x5000)
@@ -363,7 +360,7 @@ u_int32_t
 ath_hal_reg_read(struct ath_hal *ah, u_int32_t reg)
 {
 	bus_space_tag_t tag = BUSTAG(ah);
-	bus_space_handle_t h = (bus_space_handle_t) ah->ah_sh;
+	bus_space_handle_t h = ah->ah_sh;
 	u_int32_t val;
 
 #if _BYTE_ORDER == _BIG_ENDIAN
@@ -415,37 +412,3 @@ ath_hal_memcpy(void *dst, const void *src, size_t n)
 {
 	return memcpy(dst, src, n);
 }
-
-/*
- * Module glue.
- */
-
-static int
-ath_hal_modevent(module_t mod, int type, void *unused)
-{
-	const char *sep;
-	int i;
-
-	switch (type) {
-	case MOD_LOAD:
-		printf("ath_hal: %s (", ath_hal_version);
-		sep = "";
-		for (i = 0; ath_hal_buildopts[i] != NULL; i++) {
-			printf("%s%s", sep, ath_hal_buildopts[i]);
-			sep = ", ";
-		}
-		printf(")\n");
-		return 0;
-	case MOD_UNLOAD:
-		return 0;
-	}
-	return EINVAL;
-}
-
-static moduledata_t ath_hal_mod = {
-	"ath_hal",
-	ath_hal_modevent,
-	0
-};
-DECLARE_MODULE(ath_hal, ath_hal_mod, SI_SUB_DRIVERS, SI_ORDER_ANY);
-MODULE_VERSION(ath_hal, 1);
diff --git a/sys/dev/ath/ah_osdep.h b/sys/dev/ath/ah_osdep.h
index 85e8752..32f2796 100644
--- a/sys/dev/ath/ah_osdep.h
+++ b/sys/dev/ath/ah_osdep.h
@@ -33,13 +33,29 @@
 /*
  * Atheros Hardware Access Layer (HAL) OS Dependent Definitions.
  */
+#include <sys/cdefs.h>
 #include <sys/param.h>
 #include <sys/systm.h>
 #include <sys/endian.h>
+#include <sys/linker_set.h>
 
 #include <machine/bus.h>
 
 /*
+ * Bus i/o type definitions.
+ */
+typedef void *HAL_SOFTC;
+typedef bus_space_tag_t HAL_BUS_TAG;
+typedef bus_space_handle_t HAL_BUS_HANDLE;
+
+/*
+ * Linker set writearounds for chip and RF backend registration.
+ */
+#define	OS_DATA_SET(set, item)	DATA_SET(set, item)
+#define	OS_SET_DECLARE(set, ptype)	SET_DECLARE(set, ptype)
+#define	OS_SET_FOREACH(pvar, set)	SET_FOREACH(pvar, set)
+
+/*
  * Delay n microseconds.
  */
 extern	void ath_hal_delay(int);
diff --git a/sys/dev/ath/ath_rate/amrr/amrr.c b/sys/dev/ath/ath_rate/amrr/amrr.c
index ff51b61..ba99177 100644
--- a/sys/dev/ath/ath_rate/amrr/amrr.c
+++ b/sys/dev/ath/ath_rate/amrr/amrr.c
@@ -78,7 +78,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/ath/if_athvar.h>
 #include <dev/ath/ath_rate/amrr/amrr.h>
-#include <contrib/dev/ath/ah_desc.h>
+#include <dev/ath/ath_hal/ah_desc.h>
 
 static	int ath_rateinterval = 1000;		/* rate ctl interval (ms)  */
 static	int ath_rate_max_success_threshold = 10;
diff --git a/sys/dev/ath/ath_rate/onoe/onoe.c b/sys/dev/ath/ath_rate/onoe/onoe.c
index df2f450..96f8db9 100644
--- a/sys/dev/ath/ath_rate/onoe/onoe.c
+++ b/sys/dev/ath/ath_rate/onoe/onoe.c
@@ -67,7 +67,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/ath/if_athvar.h>
 #include <dev/ath/ath_rate/onoe/onoe.h>
-#include <contrib/dev/ath/ah_desc.h>
+#include <dev/ath/ath_hal/ah_desc.h>
 
 /*
  * Default parameters for the rate control algorithm.  These are
diff --git a/sys/dev/ath/ath_rate/sample/sample.c b/sys/dev/ath/ath_rate/sample/sample.c
index 15c88db..48aedf5 100644
--- a/sys/dev/ath/ath_rate/sample/sample.c
+++ b/sys/dev/ath/ath_rate/sample/sample.c
@@ -75,7 +75,7 @@ __FBSDID("$FreeBSD$");
 
 #include <dev/ath/if_athvar.h>
 #include <dev/ath/ath_rate/sample/sample.h>
-#include <contrib/dev/ath/ah_desc.h>
+#include <dev/ath/ath_hal/ah_desc.h>
 
 /*
  * This file is an implementation of the SampleRate algorithm
@@ -1018,5 +1018,4 @@ static moduledata_t sample_mod = {
 };
 DECLARE_MODULE(ath_rate, sample_mod, SI_SUB_DRIVERS, SI_ORDER_FIRST);
 MODULE_VERSION(ath_rate, 1);
-MODULE_DEPEND(ath_rate, ath_hal, 1, 1, 1);	/* Atheros HAL */
 MODULE_DEPEND(ath_rate, wlan, 1, 1, 1);
diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c
index 84bafd8..4cd1001 100644
--- a/sys/dev/ath/if_ath.c
+++ b/sys/dev/ath/if_ath.c
@@ -77,8 +77,7 @@ __FBSDID("$FreeBSD$");
 #endif
 
 #include <dev/ath/if_athvar.h>
-#include <contrib/dev/ath/ah_desc.h>
-#include <contrib/dev/ath/ah_devid.h>		/* XXX for softled */
+#include <dev/ath/ath_hal/ah_devid.h>		/* XXX for softled */
 
 #ifdef ATH_TX99_DIAG
 #include <dev/ath/ath_tx99/ath_tx99.h>
diff --git a/sys/dev/ath/if_ath_pci.c b/sys/dev/ath/if_ath_pci.c
index ed35447..34808a1 100644
--- a/sys/dev/ath/if_ath_pci.c
+++ b/sys/dev/ath/if_ath_pci.c
@@ -56,7 +56,6 @@ __FBSDID("$FreeBSD$");
 #include <net80211/ieee80211_var.h>
 
 #include <dev/ath/if_athvar.h>
-#include <contrib/dev/ath/ah.h>
 
 #include <dev/pci/pcivar.h>
 #include <dev/pci/pcireg.h>
@@ -254,6 +253,5 @@ static	devclass_t ath_devclass;
 DRIVER_MODULE(if_ath, pci, ath_pci_driver, ath_devclass, 0, 0);
 DRIVER_MODULE(if_ath, cardbus, ath_pci_driver, ath_devclass, 0, 0);
 MODULE_VERSION(if_ath, 1);
-MODULE_DEPEND(if_ath, ath_hal, 1, 1, 1);	/* Atheros HAL */
 MODULE_DEPEND(if_ath, wlan, 1, 1, 1);		/* 802.11 media layer */
 MODULE_DEPEND(if_ath, ath_rate, 1, 1, 1);	/* rate control algorithm */
diff --git a/sys/dev/ath/if_athvar.h b/sys/dev/ath/if_athvar.h
index 982a4ef..87ebb5d 100644
--- a/sys/dev/ath/if_athvar.h
+++ b/sys/dev/ath/if_athvar.h
@@ -35,8 +35,8 @@
 #ifndef _DEV_ATH_ATHVAR_H
 #define _DEV_ATH_ATHVAR_H
 
-#include <contrib/dev/ath/ah.h>
-#include <contrib/dev/ath/ah_desc.h>
+#include <dev/ath/ath_hal/ah.h>
+#include <dev/ath/ath_hal/ah_desc.h>
 #include <net80211/ieee80211_radiotap.h>
 #include <dev/ath/if_athioctl.h>
 #include <dev/ath/if_athrate.h>