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author | adrian <adrian@FreeBSD.org> | 2012-07-10 07:43:31 +0000 |
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committer | adrian <adrian@FreeBSD.org> | 2012-07-10 07:43:31 +0000 |
commit | f0a77e77dfdfafb486c33d05f7ced04b11517079 (patch) | |
tree | 47cfdcc001737d50a4cf1dd78ee7b86cbaa0a590 /sys/dev/ath/if_ath.c | |
parent | 83b8fb1a63af225e8ae3e243a8693ce7c5f41698 (diff) | |
download | FreeBSD-src-f0a77e77dfdfafb486c33d05f7ced04b11517079.zip FreeBSD-src-f0a77e77dfdfafb486c33d05f7ced04b11517079.tar.gz |
Flip on EDMA RX of both HP and LP queue frames.
Yes, this is in the legacy interrupt path. The NIC does support
MSI but I haven't yet sat down and written that code.
Diffstat (limited to 'sys/dev/ath/if_ath.c')
-rw-r--r-- | sys/dev/ath/if_ath.c | 14 |
1 files changed, 13 insertions, 1 deletions
diff --git a/sys/dev/ath/if_ath.c b/sys/dev/ath/if_ath.c index c60473a..965a1fd 100644 --- a/sys/dev/ath/if_ath.c +++ b/sys/dev/ath/if_ath.c @@ -1621,7 +1621,11 @@ ath_intr(void *arg) /* bump tx trigger level */ ath_hal_updatetxtriglevel(ah, AH_TRUE); } - if (status & HAL_INT_RX) { + /* + * Handle both the legacy and RX EDMA interrupt bits. + * Note that HAL_INT_RXLP is also HAL_INT_RXDESC. + */ + if (status & (HAL_INT_RX | HAL_INT_RXHP | HAL_INT_RXLP)) { sc->sc_stats.ast_rx_intr++; taskqueue_enqueue(sc->sc_tq, &sc->sc_rxtask); } @@ -1867,6 +1871,14 @@ ath_init(void *arg) sc->sc_imask = HAL_INT_RX | HAL_INT_TX | HAL_INT_RXEOL | HAL_INT_RXORN | HAL_INT_FATAL | HAL_INT_GLOBAL; + + /* + * Enable RX EDMA bits. Note these overlap with + * HAL_INT_RX and HAL_INT_RXDESC respectively. + */ + if (sc->sc_isedma) + sc->sc_imask |= (HAL_INT_RXHP | HAL_INT_RXLP); + /* * Enable MIB interrupts when there are hardware phy counters. * Note we only do this (at the moment) for station mode. |