Add PCIE power control api:

o add ah_configPCIE and ah_disablePCIE for drivers to configure PCIE
  power save operation (modeled after ath9k, may need changes)
o add private state flag to indicate if device is PCIE (replaces private
  hack in 5212 code)
o add serdes programming ini bits for 5416 and later parts and setup
  for each part (5416 and 9160 logic hand-crafted from existing routines);
  5212 remains open-coded but is now hooked in via ah_configPCIE
o add PCIE workaround gunk
o add ar5416AttachPCIE for iodomatic code used by 5416 and later parts

6 files changed, 76 insertions, 3 deletions

diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416.h b/sys/dev/ath/ath_hal/ar5416/ar5416.h
index 1465238..27aa9e8 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416.h
@@ -57,6 +57,7 @@ struct ath_hal_5416 {
 	HAL_INI_ARRAY	ah_ini_bank6;
 	HAL_INI_ARRAY	ah_ini_bank7;
 	HAL_INI_ARRAY	ah_ini_addac;
+	HAL_INI_ARRAY	ah_ini_pcieserdes;
 
 	u_int       	ah_globaltxtimeout;	/* global tx timeout */
 	u_int		ah_gpioMask;
@@ -89,6 +90,7 @@ extern	void ar5416InitState(struct ath_hal_5416 *, uint16_t devid,
 		HAL_SOFTC sc, HAL_BUS_TAG st, HAL_BUS_HANDLE sh,
 		HAL_STATUS *status);
 extern	void ar5416Detach(struct ath_hal *ah);
+extern	void ar5416AttachPCIE(struct ath_hal *ah);
 extern	HAL_BOOL ar5416FillCapabilityInfo(struct ath_hal *ah);
 
 #define	IS_5GHZ_FAST_CLOCK_EN(_ah, _c) \
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416.ini b/sys/dev/ath/ath_hal/ar5416/ar5416.ini
index 6e96f68..eee859e 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416.ini
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416.ini
@@ -14,7 +14,7 @@
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
- * $Id: ar5416.ini,v 1.3 2008/11/10 04:08:04 sam Exp $
+ * $FreeBSD$
  */
 /* Auto Generated PCI Register Writes.  Created: 09/20/06 */
 
@@ -686,3 +686,17 @@ static const uint32_t ar5416Addac[][2] = {
     {0x0989c,  0x00000000 },
     {0x098c4,  0x00000000 },
 };
+
+/* hand-crafted from code that does explicit register writes */
+static const uint32_t ar5416PciePhy[][2] = {
+    { AR_PCIE_SERDES,  0x9248fc00 },
+    { AR_PCIE_SERDES,  0x24924924 },
+    { AR_PCIE_SERDES,  0x28000039 },
+    { AR_PCIE_SERDES,  0x53160824 },
+    { AR_PCIE_SERDES,  0xe5980579 },
+    { AR_PCIE_SERDES,  0x001defff },
+    { AR_PCIE_SERDES,  0x1aaabe40 },
+    { AR_PCIE_SERDES,  0xbe105554 },
+    { AR_PCIE_SERDES,  0x000e3007 },
+    { AR_PCIE_SERDES2, 0x00000000 },
+};
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
index 233b0da..0eb9e22 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416_attach.c
@@ -28,6 +28,8 @@
 
 #include "ar5416/ar5416.ini"
 
+static void ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore);
+
 static void
 ar5416AniSetup(struct ath_hal *ah)
 {
@@ -76,6 +78,7 @@ ar5416InitState(struct ath_hal_5416 *ahp5416, uint16_t devid, HAL_SOFTC sc,
 	ah->ah_reset			= ar5416Reset;
 	ah->ah_phyDisable		= ar5416PhyDisable;
 	ah->ah_disable			= ar5416Disable;
+	ah->ah_configPCIE		= ar5416ConfigPCIE;
 	ah->ah_perCalibration		= ar5416PerCalibration;
 	ah->ah_perCalibrationN		= ar5416PerCalibrationN,
 	ah->ah_resetCalValid		= ar5416ResetCalValid,
@@ -219,6 +222,7 @@ ar5416Attach(uint16_t devid, HAL_SOFTC sc,
 	val = OS_REG_READ(ah, AR_SREV) & AR_SREV_ID;
 	AH_PRIVATE(ah)->ah_macVersion = val >> AR_SREV_ID_S;
 	AH_PRIVATE(ah)->ah_macRev = val & AR_SREV_REVISION;
+	AH_PRIVATE(ah)->ah_ispcie = (devid == AR5416_DEVID_PCIE);
 
 	/* setup common ini data; rf backends handle remainder */
 	HAL_INI_INIT(&ahp->ah_ini_modes, ar5416Modes, 6);
@@ -244,6 +248,9 @@ ar5416Attach(uint16_t devid, HAL_SOFTC sc,
 		HAL_INI_VAL((struct ini *)&AH5416(ah)->ah_ini_addac, 31, 1) = 0;
 	}
 
+	HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar5416PciePhy, 2);
+	ar5416AttachPCIE(ah);
+
 	ecode = ath_hal_v14EepromAttach(ah);
 	if (ecode != HAL_OK)
 		goto bad;
@@ -368,6 +375,26 @@ ar5416Detach(struct ath_hal *ah)
 	ath_hal_free(ah);
 }
 
+void
+ar5416AttachPCIE(struct ath_hal *ah)
+{
+	if (AH_PRIVATE(ah)->ah_ispcie)
+		ath_hal_configPCIE(ah, AH_FALSE);
+	else
+		ath_hal_disablePCIE(ah);
+}
+
+static void
+ar5416ConfigPCIE(struct ath_hal *ah, HAL_BOOL restore)
+{
+	if (AH_PRIVATE(ah)->ah_ispcie && !restore) {
+		ath_hal_ini_write(ah, &AH5416(ah)->ah_ini_pcieserdes, 1, 0);
+		OS_DELAY(1000);
+		OS_REG_SET_BIT(ah, AR_PCIE_PM_CTRL, AR_PCIE_PM_CTRL_ENA);
+		OS_REG_WRITE(ah, AR_WA, AR_WA_DEFAULT);
+	}
+}
+
 /*
  * Fill all software cached or static hardware state information.
  * Return failure if capabilities are to come from EEPROM and
diff --git a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
index ac96799..3afb163 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
+++ b/sys/dev/ath/ath_hal/ar5416/ar5416reg.h
@@ -31,6 +31,8 @@
 #define	AR_GTTM			0x0068	/* global transmit timeout mode */
 #define	AR_CST			0x006C	/* carrier sense timeout */
 #define	AR_MAC_LED		0x1f04	/* LED control */
+#define	AR_WA			0x4004	/* PCIE work-arounds */
+#define	AR_PCIE_PM_CTRL		0x4014
 #define	AR_AHB_MODE		0x4024	/* AHB mode for dma */
 #define	AR_INTR_SYNC_CAUSE_CLR	0x4028	/* clear interrupt */
 #define	AR_INTR_SYNC_CAUSE	0x4028	/* check pending interrupts */
@@ -185,6 +187,17 @@
 #define	AR_MAC_LED_ASSOC_PEND	0x00000800 /* STA is trying to associate */
 #define	AR_MAC_LED_ASSOC_S	10
 
+#define	AR_WA_UNTIE_RESET_EN	0x00008000	/* ena PCI reset to POR */
+#define	AR_WA_RESET_EN		0x00040000	/* ena AR_WA_UNTIE_RESET_EN */
+#define	AR_WA_ANALOG_SHIFT	0x00100000
+#define	AR_WA_POR_SHORT		0x00200000	/* PCIE phy reset control */
+
+#define	AR_WA_DEFAULT		0x0000073f
+#define	AR9280_WA_DEFAULT	0x0040073f
+#define	AR9285_WA_DEFAULT	0x004a05cb
+
+#define	AR_PCIE_PM_CTRL_ENA	0x00080000
+
 #define	AR_AHB_EXACT_WR_EN	0x00000000	/* write exact bytes */
 #define	AR_AHB_BUF_WR_EN	0x00000001	/* buffer write upto cacheline*/
 #define	AR_AHB_EXACT_RD_EN	0x00000000	/* read exact bytes */
diff --git a/sys/dev/ath/ath_hal/ar5416/ar9160.ini b/sys/dev/ath/ath_hal/ar5416/ar9160.ini
index 85f09a3..275aa48 100755
--- a/sys/dev/ath/ath_hal/ar5416/ar9160.ini
+++ b/sys/dev/ath/ath_hal/ar5416/ar9160.ini
@@ -14,7 +14,7 @@
  * ACTION OF CONTRACT, NEGLIGENCE OR OTHER TORTIOUS ACTION, ARISING OUT OF
  * OR IN CONNECTION WITH THE USE OR PERFORMANCE OF THIS SOFTWARE.
  *
- * $Id: ar9160.ini,v 1.5 2008/11/10 04:08:05 sam Exp $
+ * $FreeBSD$
  */
 /* Auto Generated PCI Register Writes.  Created: 05/22/08 */
 
@@ -697,3 +697,17 @@ static const uint32_t ar9160Addac_1_1[][2] = {
     {0x0000989c,  0x00000000 },
     {0x000098cc,  0x00000000 },
 };
+
+/* hand-crafted from code that does explicit register writes */
+static const uint32_t ar9160PciePhy[][2] = {
+    { AR_PCIE_SERDES,  0x9248fc00 },
+    { AR_PCIE_SERDES,  0x24924924 },
+    { AR_PCIE_SERDES,  0x28000039 },
+    { AR_PCIE_SERDES,  0x53160824 },
+    { AR_PCIE_SERDES,  0xe5980579 },
+    { AR_PCIE_SERDES,  0x001defff },
+    { AR_PCIE_SERDES,  0x1aaabe40 },
+    { AR_PCIE_SERDES,  0xbe105554 },
+    { AR_PCIE_SERDES,  0x000e3007 },
+    { AR_PCIE_SERDES2, 0x00000000 },
+};
diff --git a/sys/dev/ath/ath_hal/ar5416/ar9160_attach.c b/sys/dev/ath/ath_hal/ar5416/ar9160_attach.c
index 14e8d56..4e4d679 100644
--- a/sys/dev/ath/ath_hal/ar5416/ar9160_attach.c
+++ b/sys/dev/ath/ath_hal/ar5416/ar9160_attach.c
@@ -148,7 +148,7 @@ ar9160Attach(uint16_t devid, HAL_SOFTC sc,
 	AH_PRIVATE(ah)->ah_macVersion =
 	    (val & AR_XSREV_VERSION) >> AR_XSREV_TYPE_S;
 	AH_PRIVATE(ah)->ah_macRev = MS(val, AR_XSREV_REVISION);
-	/* XXX extract pcie info */
+	AH_PRIVATE(ah)->ah_ispcie = (val & AR_XSREV_TYPE_HOST_MODE) == 0;
 
 	/* setup common ini data; rf backends handle remainder */
 	HAL_INI_INIT(&ahp->ah_ini_modes, ar9160Modes, 6);
@@ -170,6 +170,9 @@ ar9160Attach(uint16_t devid, HAL_SOFTC sc,
 	if (ecode != HAL_OK)
 		goto bad;
 
+	HAL_INI_INIT(&AH5416(ah)->ah_ini_pcieserdes, ar9160PciePhy, 2);
+	ar5416AttachPCIE(ah);
+
 	if (!ar5416ChipReset(ah, AH_NULL)) {	/* reset chip */
 		HALDEBUG(ah, HAL_DEBUG_ANY, "%s: chip reset failed\n", __func__);
 		ecode = HAL_EIO;