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| author | sam <sam@FreeBSD.org> | 2009-05-19 17:53:53 +0000 |
|---|---|---|
| committer | sam <sam@FreeBSD.org> | 2009-05-19 17:53:53 +0000 |
| commit | 74ad0d13c4278506577442c7d516b6d9f49c7c8a (patch) | |
| tree | 314680fde4f657f27c46cfd9ede29cbde780d7c7 /sys/dev/ath/ath_hal/ar5212 | |
| parent | d0d8d4716c24049c9e1757028ab3c62c0a0830bb (diff) | |
| download | FreeBSD-src-74ad0d13c4278506577442c7d516b6d9f49c7c8a.zip FreeBSD-src-74ad0d13c4278506577442c7d516b6d9f49c7c8a.tar.gz | |
add TBTT interrupt support; this was added in Griffin so consumers should
check HAL_CAP_INTRMASK before using it
NB: didn't test 11n parts yet so supported only for 5212-class parts
Diffstat (limited to 'sys/dev/ath/ath_hal/ar5212')
| -rw-r--r-- | sys/dev/ath/ath_hal/ar5212/ar5212_attach.c | 2 | ||||
| -rw-r--r-- | sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c | 4 | ||||
| -rw-r--r-- | sys/dev/ath/ath_hal/ar5212/ar5212reg.h | 10 |
3 files changed, 12 insertions, 4 deletions
diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c index 63856a4..60e1521 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_attach.c @@ -847,6 +847,8 @@ ar5212FillCapabilityInfo(struct ath_hal *ah) | HAL_INT_BNR | HAL_INT_BMISC ; + if (AH_PRIVATE(ah)->ah_macVersion < AR_SREV_VERSION_GRIFFIN) + pCap->halIntrMask &= ~HAL_INT_TBTT; return AH_TRUE; #undef IS_COBRA diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c b/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c index 112bbeb..b9cee9a 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c +++ b/sys/dev/ath/ath_hal/ar5212/ar5212_interrupts.c @@ -70,6 +70,8 @@ ar5212GetPendingInterrupts(struct ath_hal *ah, HAL_INT *masked) mask2 |= HAL_INT_DTIMSYNC; if (isr2 & AR_ISR_S2_CABEND) mask2 |= HAL_INT_CABEND; + if (isr2 & AR_ISR_S2_TBTT) + mask2 |= HAL_INT_TBTT; } isr = OS_REG_READ(ah, AR_ISR_RAC); if (isr == 0xffffffff) { @@ -172,6 +174,8 @@ ar5212SetInterrupts(struct ath_hal *ah, HAL_INT ints) mask2 |= AR_IMR_S2_DTIMSYNC; if (ints & HAL_INT_CABEND) mask2 |= AR_IMR_S2_CABEND; + if (ints & HAL_INT_TBTT) + mask2 |= AR_IMR_S2_TBTT; } if (ints & HAL_INT_FATAL) { /* diff --git a/sys/dev/ath/ath_hal/ar5212/ar5212reg.h b/sys/dev/ath/ath_hal/ar5212/ar5212reg.h index f4e255f..ef6d600 100644 --- a/sys/dev/ath/ath_hal/ar5212/ar5212reg.h +++ b/sys/dev/ath/ath_hal/ar5212/ar5212reg.h @@ -463,7 +463,8 @@ #define AR_ISR_S2_BCNTO 0x08000000 /* BCNTO */ #define AR_ISR_S2_CABTO 0x10000000 /* CABTO */ #define AR_ISR_S2_DTIM 0x20000000 /* DTIM */ -#define AR_ISR_S2_RESV0 0xE0F8FC00 /* Reserved */ +#define AR_ISR_S2_TSFOOR 0x40000000 /* TSF OOR */ +#define AR_ISR_S2_TBTT 0x80000000 /* TBTT timer */ #define AR_ISR_S3_QCU_QCBROVF 0x000003FF /* Mask for QCBROVF (QCU 0-9) */ #define AR_ISR_S3_QCU_QCBRURN 0x03FF0000 /* Mask for QCBRURN (QCU 0-9) */ @@ -531,13 +532,14 @@ #define AR_IMR_S2_BCNTO 0x08000000 /* BCNTO */ #define AR_IMR_S2_CABTO 0x10000000 /* CABTO */ #define AR_IMR_S2_DTIM 0x20000000 /* DTIM */ -#define AR_IMR_S2_TSFOOR 0x80000000 /* TSF OOR */ -#define AR_IMR_S2_RESV0 0xE0F8FC00 /* Reserved */ +#define AR_IMR_S2_TSFOOR 0x40000000 /* TSF OOR */ +#define AR_IMR_S2_TBTT 0x80000000 /* TBTT timer */ /* AR_IMR_SR2 bits that correspond to AR_IMR_BCNMISC */ #define AR_IMR_SR2_BCNMISC \ (AR_IMR_S2_TIM | AR_IMR_S2_DTIM | AR_IMR_S2_DTIMSYNC | \ - AR_IMR_S2_CABEND | AR_IMR_S2_CABTO | AR_IMR_S2_TSFOOR) + AR_IMR_S2_CABEND | AR_IMR_S2_CABTO | AR_IMR_S2_TSFOOR | \ + AR_IMR_S2_TBTT) #define AR_IMR_S3_QCU_QCBROVF 0x000003FF /* Mask for QCBROVF (QCU 0-9) */ #define AR_IMR_S3_QCU_QCBRURN 0x03FF0000 /* Mask for QCBRURN (QCU 0-9) */ |
