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authormav <mav@FreeBSD.org>2009-03-01 22:50:14 +0000
committermav <mav@FreeBSD.org>2009-03-01 22:50:14 +0000
commit64431531f8e339a176d0a9e504bad6cce136e1a7 (patch)
tree187e271eda4c3c7116b874b3a8c74c5bc1acb18a /sys/dev/ata
parent55bb705621151a27205467d724b9b4d77eff22c0 (diff)
downloadFreeBSD-src-64431531f8e339a176d0a9e504bad6cce136e1a7.zip
FreeBSD-src-64431531f8e339a176d0a9e504bad6cce136e1a7.tar.gz
Give controller a chance to issue Soft Reset clear command before checking
ready status. Most of controllers managed to issue coommand and set BUSY bit almost simultaneously, before we will read it, but at least JMicron JMB363 don't. Ignore timeout errors to keep old behavior when error there was impossible. For me this fixes timeout errors on the first command after channel attach or reinit. Boot in my case is not affected, as there is much time passing between reset and next command giving reset time to complete.
Diffstat (limited to 'sys/dev/ata')
-rw-r--r--sys/dev/ata/chipsets/ata-ahci.c3
1 files changed, 1 insertions, 2 deletions
diff --git a/sys/dev/ata/chipsets/ata-ahci.c b/sys/dev/ata/chipsets/ata-ahci.c
index 956a85d..2dc3837 100644
--- a/sys/dev/ata/chipsets/ata-ahci.c
+++ b/sys/dev/ata/chipsets/ata-ahci.c
@@ -683,8 +683,7 @@ ata_ahci_softreset(device_t dev, int port)
ctp->cfis[1] = port & 0x0f;
//ctp->cfis[7] = ATA_D_LBA | ATA_D_IBM;
ctp->cfis[15] = ATA_A_4BIT;
- if (ata_ahci_issue_cmd(dev, 0, 0))
- return -1;
+ ata_ahci_issue_cmd(dev, 0, 1000);
if (ata_ahci_wait_ready(dev, 1000)) {
device_printf(dev, "software reset clear timeout\n");
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