diff options
author | sos <sos@FreeBSD.org> | 2002-02-04 19:23:40 +0000 |
---|---|---|
committer | sos <sos@FreeBSD.org> | 2002-02-04 19:23:40 +0000 |
commit | f0704f5ca18f3a7991726b05a2bf9eeea477567a (patch) | |
tree | 5e4cc6717e35748abaad55907c0de3f487461cd0 /sys/dev/ata/ata-dma.c | |
parent | 2ceaebc7d8f7c823715cc793b8557152e5c3392e (diff) | |
download | FreeBSD-src-f0704f5ca18f3a7991726b05a2bf9eeea477567a.zip FreeBSD-src-f0704f5ca18f3a7991726b05a2bf9eeea477567a.tar.gz |
Major update of the ATA RAID code, part 1:
Overhaul of the attach/detach code and structures, there were some nasty
bugs in the old implementation. This made it possible to collapse the
ATA/ATAPI device control structures into one generic structure.
A note here, the kernel is NOT ready for detach of active devices,
it fails all over in random places, but for inactive devices it works.
However for ATA RAID this works, since the RAID abstration layer
insulates the buggy^H^H^H^H^H^Hfragile device subsystem from the
physical disks.
Proberly detect the RAID's from the BIOS, and mark critical RAID1
arrays as such, but continue if there is enough of the mirror left
to do so.
Properly fail arrays on a live system. For RAID0 that means return EIO,
and for RAID1 it means continue on the still working part of the mirror
if possible, else return EIO.
If the state changes, log this to the console.
Allow for Promise & Highpoint controllers/arrays to coexist on the
same machine. It is not possible to distribute arrays over different
makes of controllers though.
If Promise SuperSwap enclosures are used, signal disk state on the
status LED on the front.
Misc fixes that I had lying around for various minor bugs.
Sponsored by: Advanis Inc.
Diffstat (limited to 'sys/dev/ata/ata-dma.c')
-rw-r--r-- | sys/dev/ata/ata-dma.c | 648 |
1 files changed, 322 insertions, 326 deletions
diff --git a/sys/dev/ata/ata-dma.c b/sys/dev/ata/ata-dma.c index f634053..a64d40a 100644 --- a/sys/dev/ata/ata-dma.c +++ b/sys/dev/ata/ata-dma.c @@ -45,29 +45,28 @@ #include <dev/ata/ata-all.h> /* prototypes */ -static void cyrix_timing(struct ata_softc *, int, int); -static void promise_timing(struct ata_softc *, int, int); -static void hpt_timing(struct ata_softc *, int, int); +static void cyrix_timing(struct ata_channel *, int, int); +static void promise_timing(struct ata_channel *, int, int); +static void hpt_timing(struct ata_channel *, int, int); /* misc defines */ #ifdef __alpha__ #undef vtophys #define vtophys(va) alpha_XXX_dmamap((vm_offset_t)va) #endif -#define ATAPI_DEVICE(scp, device) \ - ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || \ - (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) - +#define ATAPI_DEVICE(ch, device) \ + ((device == ATA_MASTER && ch->devices & ATA_ATAPI_MASTER) || \ + (device == ATA_SLAVE && ch->devices & ATA_ATAPI_SLAVE)) void * -ata_dmaalloc(struct ata_softc *scp, int device) +ata_dmaalloc(struct ata_channel *ch, int device) { void *dmatab; if ((dmatab = malloc(PAGE_SIZE, M_DEVBUF, M_NOWAIT))) { if (((uintptr_t)dmatab >> PAGE_SHIFT) ^ (((uintptr_t)dmatab + PAGE_SIZE - 1) >> PAGE_SHIFT)) { - ata_printf(scp, device, "dmatab crosses page boundary, no DMA\n"); + ata_printf(ch, device, "dmatab crosses page boundary, no DMA\n"); free(dmatab, M_DEVBUF); dmatab = NULL; } @@ -76,41 +75,41 @@ ata_dmaalloc(struct ata_softc *scp, int device) } void -ata_dmainit(struct ata_softc *scp, int device, +ata_dmainit(struct ata_channel *ch, int device, int apiomode, int wdmamode, int udmamode) { - device_t parent = device_get_parent(scp->dev); - int devno = (scp->channel << 1) + ATA_DEV(device); + struct ata_device *atadev = &ch->device[ATA_DEV(device)]; + device_t parent = device_get_parent(ch->dev); + int devno = (ch->unit << 1) + ATA_DEV(device); int error; /* set our most pessimistic default mode */ - scp->mode[ATA_DEV(device)] = ATA_PIO; + atadev->mode = ATA_PIO; - if (!scp->r_bmio) + if (!ch->r_bmio) return; /* if simplex controller, only allow DMA on primary channel */ - if (scp->channel == 1) { - ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, - ATA_INB(scp->r_bmio, ATA_BMSTAT_PORT) & + if (ch->unit == 1) { + ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT, + ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) & (ATA_BMSTAT_DMA_MASTER | ATA_BMSTAT_DMA_SLAVE)); - if (ATA_INB(scp->r_bmio, ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { - ata_printf(scp, device, "simplex device, DMA on primary only\n"); + if (ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) & ATA_BMSTAT_DMA_SIMPLEX) { + ata_prtdev(atadev, "simplex device, DMA on primary only\n"); return; } } /* DMA engine address alignment is usually 1 word (2 bytes) */ - scp->alignment = 0x1; + ch->alignment = 0x1; #if 1 - if (udmamode > 2 && !ATA_PARAM(scp, device)->hwres_cblid) { - ata_printf(scp, device, - "DMA limited to UDMA33, non-ATA66 compliant cable\n"); + if (udmamode > 2 && !ch->device[ATA_DEV(device)].param->hwres_cblid) { + ata_prtdev(atadev,"DMA limited to UDMA33, non-ATA66 cable or device\n"); udmamode = 2; } #endif - switch (scp->chiptype) { + switch (ch->chiptype) { case 0x248a8086: /* Intel ICH3 mobile */ case 0x248b8086: /* Intel ICH3 */ @@ -122,10 +121,10 @@ ata_dmainit(struct ata_softc *scp, int device, word54 = pci_read_config(parent, 0x54, 2); if (word54 & (0x10 << devno)) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, - ATA_UDMA5, ATA_C_F_SETXFER,ATA_WAIT_READY); - if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on Intel chip\n", + error = ata_command(atadev, ATA_C_SETFEATURES, 0, + ATA_UDMA5, ATA_C_F_SETXFER,ATA_WAIT_READY); + if (bootverbose) + ata_prtdev(atadev, "%s setting UDMA5 on Intel chip\n", (error) ? "failed" : "success"); if (!error) { mask48 = (1 << devno) + (3 << (16 + (devno << 2))); @@ -133,8 +132,8 @@ ata_dmainit(struct ata_softc *scp, int device, pci_write_config(parent, 0x48, (pci_read_config(parent, 0x48, 4) & ~mask48) | new48, 4); - pci_write_config(parent, 0x54, word54 | (0x1000<<devno), 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + pci_write_config(parent, 0x54, word54 | (0x1000<<devno), 2); + atadev->mode = ATA_UDMA5; return; } } @@ -144,18 +143,18 @@ ata_dmainit(struct ata_softc *scp, int device, pci_read_config(parent, 0x54, 2) & ~(0x1000<<devno),2); /* FALLTHROUGH */ - case 0x24118086: /* Intel ICH */ - case 0x76018086: /* Intel ICH */ + case 0x24118086: /* Intel ICH */ + case 0x76018086: /* Intel ICH */ if (udmamode >= 4) { int32_t mask48, new48; int16_t word54; word54 = pci_read_config(parent, 0x54, 2); if (word54 & (0x10 << devno)) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, - ATA_UDMA4, ATA_C_F_SETXFER,ATA_WAIT_READY); - if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on Intel chip\n", + error = ata_command(atadev, ATA_C_SETFEATURES, 0, + ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); + if (bootverbose) + ata_prtdev(atadev, "%s setting UDMA4 on Intel chip\n", (error) ? "failed" : "success"); if (!error) { mask48 = (1 << devno) + (3 << (16 + (devno << 2))); @@ -164,11 +163,11 @@ ata_dmainit(struct ata_softc *scp, int device, (pci_read_config(parent, 0x48, 4) & ~mask48) | new48, 4); pci_write_config(parent, 0x54, word54 | (1 << devno), 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + atadev->mode = ATA_UDMA4; return; } } - } + } /* make sure eventual ATA66 mode from the BIOS is disabled */ pci_write_config(parent, 0x54, pci_read_config(parent, 0x54, 2) & ~(1 << devno), 2); @@ -181,10 +180,10 @@ ata_dmainit(struct ata_softc *scp, int device, if (udmamode >= 2) { int32_t mask48, new48; - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on Intel chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on Intel chip\n", (error) ? "failed" : "success"); if (!error) { mask48 = (1 << devno) + (3 << (16 + (devno << 2))); @@ -192,7 +191,7 @@ ata_dmainit(struct ata_softc *scp, int device, pci_write_config(parent, 0x48, (pci_read_config(parent, 0x48, 4) & ~mask48) | new48, 4); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } @@ -206,7 +205,7 @@ ata_dmainit(struct ata_softc *scp, int device, int32_t mask40, new40, mask44, new44; /* if SITRE not set doit for both channels */ - if (!((pci_read_config(parent,0x40,4)>>(scp->channel<<8))&0x4000)) { + if (!((pci_read_config(parent,0x40,4)>>(ch->unit<<8))&0x4000)) { new40 = pci_read_config(parent, 0x40, 4); new44 = pci_read_config(parent, 0x44, 4); if (!(new40 & 0x00004000)) { @@ -221,10 +220,10 @@ ata_dmainit(struct ata_softc *scp, int device, pci_write_config(parent, 0x40, new40, 4); pci_write_config(parent, 0x44, new44, 4); } - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on Intel chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on Intel chip\n", (error) ? "failed" : "success"); if (!error) { if (device == ATA_MASTER) { @@ -239,7 +238,7 @@ ata_dmainit(struct ata_softc *scp, int device, mask44 = 0x0000000f; new44 = 0x0000000b; } - if (scp->channel) { + if (ch->unit) { mask40 <<= 16; new40 <<= 16; mask44 <<= 4; @@ -247,11 +246,11 @@ ata_dmainit(struct ata_softc *scp, int device, } pci_write_config(parent, 0x40, (pci_read_config(parent, 0x40, 4) & ~mask40)| - new40, 4); + new40, 4); pci_write_config(parent, 0x44, (pci_read_config(parent, 0x44, 4) & ~mask44)| - new44, 4); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + new44, 4); + atadev->mode = ATA_WDMA2; return; } } @@ -263,20 +262,20 @@ ata_dmainit(struct ata_softc *scp, int device, int32_t word40; word40 = pci_read_config(parent, 0x40, 4); - word40 >>= scp->channel * 16; + word40 >>= ch->unit * 16; /* Check for timing config usable for DMA on controller */ if (!((word40 & 0x3300) == 0x2300 && ((word40 >> (device == ATA_MASTER ? 0 : 4)) & 1) == 1)) break; - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on Intel chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on Intel chip\n", (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + atadev->mode = ATA_WDMA2; return; } } @@ -285,16 +284,15 @@ ata_dmainit(struct ata_softc *scp, int device, case 0x522910b9: /* AcerLabs Aladdin IV/V */ /* the older Aladdin doesn't support ATAPI DMA on both master & slave */ if (pci_get_revid(parent) < 0xc2 && - scp->devices & ATA_ATAPI_MASTER && scp->devices & ATA_ATAPI_SLAVE) { - ata_printf(scp, device, - "Aladdin: two atapi devices on this channel, no DMA\n"); + ch->devices & ATA_ATAPI_MASTER && ch->devices & ATA_ATAPI_SLAVE) { + ata_prtdev(atadev, "two atapi devices on this channel, no DMA\n"); break; } if (udmamode >= 5 && pci_get_revid(parent) >= 0xc4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on Acer chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on Acer chip\n", (error) ? "failed" : "success"); if (!error) { int32_t word54 = pci_read_config(parent, 0x54, 4); @@ -306,15 +304,15 @@ ata_dmainit(struct ata_softc *scp, int device, pci_write_config(parent, 0x54, word54, 4); pci_write_config(parent, 0x53, pci_read_config(parent, 0x53, 1) | 0x03, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + atadev->mode = ATA_UDMA5; return; } } if (udmamode >= 4 && pci_get_revid(parent) >= 0xc2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on Acer chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on Acer chip\n", (error) ? "failed" : "success"); if (!error) { int32_t word54 = pci_read_config(parent, 0x54, 4); @@ -326,15 +324,15 @@ ata_dmainit(struct ata_softc *scp, int device, pci_write_config(parent, 0x54, word54, 4); pci_write_config(parent, 0x53, pci_read_config(parent, 0x53, 1) | 0x03, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + atadev->mode = ATA_UDMA4; return; } } if (udmamode >= 2 && pci_get_revid(parent) >= 0x20) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on Acer chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on Acer chip\n", (error) ? "failed" : "success"); if (!error) { int32_t word54 = pci_read_config(parent, 0x54, 4); @@ -344,8 +342,8 @@ ata_dmainit(struct ata_softc *scp, int device, pci_write_config(parent, 0x54, word54, 4); pci_write_config(parent, 0x53, pci_read_config(parent, 0x53, 1) | 0x03, 1); - scp->flags |= ATA_ATAPI_DMA_RO; - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + ch->flags |= ATA_ATAPI_DMA_RO; + atadev->mode = ATA_UDMA2; return; } } @@ -355,16 +353,16 @@ ata_dmainit(struct ata_softc *scp, int device, ~(0x0008 << (devno << 2)), 2); if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on Acer chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on Acer chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x53, pci_read_config(parent, 0x53, 1) | 0x03, 1); - scp->flags |= ATA_ATAPI_DMA_RO; - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + ch->flags |= ATA_ATAPI_DMA_RO; + atadev->mode = ATA_WDMA2; return; } } @@ -375,14 +373,14 @@ ata_dmainit(struct ata_softc *scp, int device, case 0x74111022: /* AMD 766 */ if (udmamode >= 5) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on AMD chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on AMD chip\n", (error) ? "failed" : "success"); if (!error) { - pci_write_config(parent, 0x53 - devno, 0xc6, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + pci_write_config(parent, 0x53 - devno, 0xc6, 1); + atadev->mode = ATA_UDMA5; return; } } @@ -390,14 +388,14 @@ ata_dmainit(struct ata_softc *scp, int device, case 0x74091022: /* AMD 756 */ if (udmamode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on AMD chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on AMD chip\n", (error) ? "failed" : "success"); if (!error) { - pci_write_config(parent, 0x53 - devno, 0xc5, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + pci_write_config(parent, 0x53 - devno, 0xc5, 1); + atadev->mode = ATA_UDMA4; return; } } @@ -442,66 +440,66 @@ via_82c586: udmamode = 0; if (udmamode >= 6) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA6 on VIA chip\n", + ata_prtdev(atadev, "%s setting UDMA6 on VIA chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x53 - devno, reg_val[6], 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA6; + atadev->mode = ATA_UDMA6; return; } } if (udmamode >= 5) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on VIA chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on VIA chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x53 - devno, reg_val[5], 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + atadev->mode = ATA_UDMA5; return; } } if (udmamode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on VIA chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on VIA chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x53 - devno, reg_val[4], 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + atadev->mode = ATA_UDMA4; return; } } if (udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on VIA chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on VIA chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x53 - devno, reg_val[2], 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } } if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on %s chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on %s chip\n", (error) ? "failed" : "success", - (scp->chiptype == 0x74091022) ? "AMD" : "VIA"); + (ch->chiptype == 0x74091022) ? "AMD" : "VIA"); if (!error) { - pci_write_config(parent, 0x53 - devno, 0x0b, 1); - pci_write_config(parent, 0x4b - devno, 0x31, 1); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + pci_write_config(parent, 0x53 - devno, 0x0b, 1); + pci_write_config(parent, 0x4b - devno, 0x31, 1); + atadev->mode = ATA_WDMA2; return; } } @@ -509,54 +507,54 @@ via_82c586: break; case 0x55131039: /* SiS 5591 */ - if (ata_find_dev(parent, 0x06301039, 0x30) || /* SiS 630 */ - ata_find_dev(parent, 0x06331039, 0x00) || /* SiS 633 */ - ata_find_dev(parent, 0x06351039, 0x00) || /* SiS 635 */ - ata_find_dev(parent, 0x06401039, 0x00) || /* SiS 640 */ - ata_find_dev(parent, 0x06451039, 0x00) || /* SiS 645 */ - ata_find_dev(parent, 0x06501039, 0x00) || /* SiS 650 */ - ata_find_dev(parent, 0x07301039, 0x00) || /* SiS 730 */ - ata_find_dev(parent, 0x07331039, 0x00) || /* SiS 733 */ - ata_find_dev(parent, 0x07351039, 0x00) || /* SiS 735 */ - ata_find_dev(parent, 0x07401039, 0x00) || /* SiS 740 */ - ata_find_dev(parent, 0x07451039, 0x00) || /* SiS 745 */ - ata_find_dev(parent, 0x07501039, 0x00)) { /* SiS 750 */ + if (ata_find_dev(parent, 0x06301039, 0x30) || /* SiS 630 */ + ata_find_dev(parent, 0x06331039, 0x00) || /* SiS 633 */ + ata_find_dev(parent, 0x06351039, 0x00) || /* SiS 635 */ + ata_find_dev(parent, 0x06401039, 0x00) || /* SiS 640 */ + ata_find_dev(parent, 0x06451039, 0x00) || /* SiS 645 */ + ata_find_dev(parent, 0x06501039, 0x00) || /* SiS 650 */ + ata_find_dev(parent, 0x07301039, 0x00) || /* SiS 730 */ + ata_find_dev(parent, 0x07331039, 0x00) || /* SiS 733 */ + ata_find_dev(parent, 0x07351039, 0x00) || /* SiS 735 */ + ata_find_dev(parent, 0x07401039, 0x00) || /* SiS 740 */ + ata_find_dev(parent, 0x07451039, 0x00) || /* SiS 745 */ + ata_find_dev(parent, 0x07501039, 0x00)) { /* SiS 750 */ int8_t reg = 0x40 + (devno << 1); int16_t val = pci_read_config(parent, reg, 2) & 0x0fff; if (udmamode >= 5) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on SiS chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, reg, val | 0x8000, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + atadev->mode = ATA_UDMA5; return; } } if (udmamode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on SiS chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, reg, val | 0x9000, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + atadev->mode = ATA_UDMA4; return; } } if (udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on SiS chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, reg, val | 0xb000, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } @@ -568,50 +566,50 @@ via_82c586: int16_t val = pci_read_config(parent, reg, 2) & 0x0fff; if (udmamode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on SiS chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, reg, val | 0x9000, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + atadev->mode = ATA_UDMA4; return; } } if (udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on SiS chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, reg, val | 0xa000, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } } else if (udmamode >= 2 && pci_get_revid(parent) > 0xc1) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on SiS chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x40 + (devno << 1), 0xa301, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } if (wdmamode >=2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on SiS chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on SiS chip\n", (error) ? "failed" : "success"); if (!error) { pci_write_config(parent, 0x40 + (devno << 1), 0x0301, 2); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + atadev->mode = ATA_WDMA2; return; } } @@ -622,17 +620,17 @@ via_82c586: if (udmamode >= 5) { u_int8_t umode; - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on CMD chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on CMD chip\n", (error) ? "failed" : "success"); if (!error) { - umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1); + umode = pci_read_config(parent, ch->unit ? 0x7b : 0x73, 1); umode &= ~(device == ATA_MASTER ? 0x35 : 0xca); umode |= (device == ATA_MASTER ? 0x05 : 0x0a); - pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + pci_write_config(parent, ch->unit ? 0x7b : 0x73, umode, 1); + atadev->mode = ATA_UDMA5; return; } } @@ -642,55 +640,55 @@ via_82c586: if (udmamode >= 4) { u_int8_t umode; - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on CMD chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on CMD chip\n", (error) ? "failed" : "success"); if (!error) { - umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1); + umode = pci_read_config(parent, ch->unit ? 0x7b : 0x73, 1); umode &= ~(device == ATA_MASTER ? 0x35 : 0xca); umode |= (device == ATA_MASTER ? 0x15 : 0x4a); - pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + pci_write_config(parent, ch->unit ? 0x7b : 0x73, umode, 1); + atadev->mode = ATA_UDMA4; return; } } if (udmamode >= 2) { u_int8_t umode; - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on CMD chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on CMD chip\n", (error) ? "failed" : "success"); if (!error) { - umode = pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1); + umode = pci_read_config(parent, ch->unit ? 0x7b : 0x73, 1); umode &= ~(device == ATA_MASTER ? 0x35 : 0xca); umode |= (device == ATA_MASTER ? 0x11 : 0x42); - pci_write_config(parent, scp->channel ? 0x7b : 0x73, umode, 1); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + pci_write_config(parent, ch->unit ? 0x7b : 0x73, umode, 1); + atadev->mode = ATA_UDMA2; return; } } /* make sure eventual UDMA mode from the BIOS is disabled */ - pci_write_config(parent, scp->channel ? 0x7b : 0x73, - pci_read_config(parent, scp->channel ? 0x7b : 0x73, 1)& + pci_write_config(parent, ch->unit ? 0x7b : 0x73, + pci_read_config(parent, ch->unit ? 0x7b : 0x73, 1)& ~(device == ATA_MASTER ? 0x35 : 0xca), 1); /* FALLTHROUGH */ case 0x06461095: /* CMD 646 ATA controller */ if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on CMD chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on CMD chip\n", error ? "failed" : "success"); if (!error) { int32_t offset = (devno < 3) ? (devno << 1) : 7; pci_write_config(parent, 0x54 + offset, 0x3f, 1); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + atadev->mode = ATA_WDMA2; return; } } @@ -699,14 +697,14 @@ via_82c586: case 0xc6931080: /* Cypress 82c693 ATA controller */ if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on Cypress chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on Cypress chip\n", error ? "failed" : "success"); if (!error) { - pci_write_config(scp->dev, scp->channel ? 0x4e:0x4c, 0x2020, 2); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + pci_write_config(ch->dev, ch->unit ? 0x4e:0x4c, 0x2020, 2); + atadev->mode = ATA_WDMA2; return; } } @@ -714,49 +712,48 @@ via_82c586: break; case 0x01021078: /* Cyrix 5530 ATA33 controller */ - scp->alignment = 0xf; /* DMA engine requires 16 byte alignment */ + ch->alignment = 0xf; /* DMA engine requires 16 byte alignment */ if (udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on Cyrix chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on Cyrix chip\n", (error) ? "failed" : "success"); if (!error) { - cyrix_timing(scp, devno, ATA_UDMA2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + cyrix_timing(ch, devno, ATA_UDMA2); + atadev->mode = ATA_UDMA2; return; } } if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on Cyrix chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on Cyrix chip\n", (error) ? "failed" : "success"); if (!error) { - cyrix_timing(scp, devno, ATA_WDMA2); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + cyrix_timing(ch, devno, ATA_WDMA2); + atadev->mode = ATA_WDMA2; return; } } - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting %s on Cyrix chip\n", + ata_prtdev(atadev, "%s setting %s on Cyrix chip\n", (error) ? "failed" : "success", ata_mode2str(ATA_PIO0 + apiomode)); - cyrix_timing(scp, devno, ATA_PIO0 + apiomode); - scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode; + cyrix_timing(ch, devno, ATA_PIO0 + apiomode); + atadev->mode = ATA_PIO0 + apiomode; return; case 0x02111166: /* ServerWorks ROSB4 ATA33 controller */ if (udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, - "%s setting UDMA2 on ServerWorks chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on ServerWorks chip\n", (error) ? "failed" : "success"); if (!error) { u_int16_t reg56; @@ -768,19 +765,18 @@ via_82c586: reg56 &= ~(0xf << (devno * 4)); reg56 |= (0x2 << (devno * 4)); pci_write_config(parent, 0x56, reg56, 2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, - "%s setting WDMA2 on ServerWorks chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on ServerWorks chip\n", (error) ? "failed" : "success"); if (!error) { - int offset = (scp->channel * 2) + (device == ATA_MASTER); + int offset = (ch->unit * 2) + (device == ATA_MASTER); int word44 = pci_read_config(parent, 0x44, 4); pci_write_config(parent, 0x54, @@ -789,7 +785,7 @@ via_82c586: word44 &= ~(0xff << (offset << 8)); word44 |= (0x20 << (offset << 8)); pci_write_config(parent, 0x44, 0x20, 4); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + atadev->mode = ATA_WDMA2; return; } } @@ -797,15 +793,15 @@ via_82c586: break; case 0x4d69105a: /* Promise TX2 ATA133 controllers */ - ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); - if (udmamode >= 6 && !(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + ATA_OUTB(ch->r_bmio, ATA_BMDEVSPEC_0, 0x0b); + if (udmamode >= 6 && !(ATA_INB(ch->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA6 on Promise chip\n", + ata_prtdev(atadev, "%s setting UDMA6 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_UDMA6; + atadev->mode = ATA_UDMA6; return; } } @@ -813,49 +809,49 @@ via_82c586: case 0x4d68105a: /* Promise TX2 ATA100 controllers */ case 0x6268105a: /* Promise TX2 ATA100 controllers */ - ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); - if (udmamode >= 5 && !(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + ATA_OUTB(ch->r_bmio, ATA_BMDEVSPEC_0, 0x0b); + if (udmamode >= 5 && !(ATA_INB(ch->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on Promise chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + atadev->mode = ATA_UDMA5; return; } } - ATA_OUTB(scp->r_bmio, ATA_BMDEVSPEC_0, 0x0b); - if (udmamode >= 4 && !(ATA_INB(scp->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + ATA_OUTB(ch->r_bmio, ATA_BMDEVSPEC_0, 0x0b); + if (udmamode >= 4 && !(ATA_INB(ch->r_bmio, ATA_BMDEVSPEC_1) & 0x04)) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on Promise chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + atadev->mode = ATA_UDMA4; return; } } if (udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting %s on Promise chip\n", - (error) ? "failed" : "success", "UDMA2"); + ata_prtdev(atadev, "%s setting UDMA on Promise chip\n", + (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + atadev->mode = ATA_UDMA2; return; } } if (wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting %s on Promise chip\n", - (error) ? "failed" : "success", "WDMA2"); + ata_prtdev(atadev, "%s setting WDMA2 on Promise chip\n", + (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + atadev->mode = ATA_WDMA2; return; } } @@ -863,207 +859,207 @@ via_82c586: case 0x4d30105a: /* Promise Ultra/FastTrak 100 controllers */ case 0x0d30105a: /* Promise OEM ATA100 controllers */ - if (!ATAPI_DEVICE(scp, device) && udmamode >= 5 && - !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){ - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && udmamode >= 5 && + !(pci_read_config(parent, 0x50, 2)&(ch->unit ? 1<<11 : 1<<10))){ + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on Promise chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - promise_timing(scp, devno, ATA_UDMA5); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + promise_timing(ch, devno, ATA_UDMA5); + atadev->mode = ATA_UDMA5; return; } } /* FALLTHROUGH */ case 0x4d38105a: /* Promise Ultra/FastTrak 66 controllers */ - if (!ATAPI_DEVICE(scp, device) && udmamode >= 4 && - !(pci_read_config(parent, 0x50, 2)&(scp->channel ? 1<<11 : 1<<10))){ - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && udmamode >= 4 && + !(pci_read_config(parent, 0x50, 2)&(ch->unit ? 1<<11 : 1<<10))){ + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on Promise chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - promise_timing(scp, devno, ATA_UDMA4); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + promise_timing(ch, devno, ATA_UDMA4); + atadev->mode = ATA_UDMA4; return; } } /* FALLTHROUGH */ case 0x4d33105a: /* Promise Ultra/FastTrak 33 controllers */ - if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && udmamode >= 2) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on Promise chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - promise_timing(scp, devno, ATA_UDMA2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + promise_timing(ch, devno, ATA_UDMA2); + atadev->mode = ATA_UDMA2; return; } } - if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && wdmamode >= 2 && apiomode >= 4) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on Promise chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on Promise chip\n", (error) ? "failed" : "success"); if (!error) { - promise_timing(scp, devno, ATA_WDMA2); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + promise_timing(ch, devno, ATA_WDMA2); + atadev->mode = ATA_WDMA2; return; } } - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting PIO%d on Promise chip\n", + ata_prtdev(atadev, "%s setting PIO%d on Promise chip\n", (error) ? "failed" : "success", (apiomode >= 0) ? apiomode : 0); - promise_timing(scp, devno, ATA_PIO0 + apiomode); - scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode; + promise_timing(ch, devno, ATA_PIO0 + apiomode); + atadev->mode = ATA_PIO0 + apiomode; return; case 0x00041103: /* HighPoint HPT366/368/370/372 controllers */ - if (!ATAPI_DEVICE(scp, device) && + if (!ATAPI_DEVICE(ch, device) && udmamode >= 6 && pci_get_revid(parent) >= 0x05 && - !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + !(pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x01:0x02))) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA6, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA6 on HighPoint chip\n", + ata_prtdev(atadev, "%s setting UDMA6 on HighPoint chip\n", (error) ? "failed" : "success"); if (!error) { - hpt_timing(scp, devno, ATA_UDMA6); - scp->mode[ATA_DEV(device)] = ATA_UDMA6; + hpt_timing(ch, devno, ATA_UDMA6); + atadev->mode = ATA_UDMA6; return; } } - if (!ATAPI_DEVICE(scp, device) && + if (!ATAPI_DEVICE(ch, device) && udmamode >= 5 && pci_get_revid(parent) >= 0x03 && - !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + !(pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x01:0x02))) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA5, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA5 on HighPoint chip\n", + ata_prtdev(atadev, "%s setting UDMA5 on HighPoint chip\n", (error) ? "failed" : "success"); if (!error) { - hpt_timing(scp, devno, ATA_UDMA5); - scp->mode[ATA_DEV(device)] = ATA_UDMA5; + hpt_timing(ch, devno, ATA_UDMA5); + atadev->mode = ATA_UDMA5; return; } } - if (!ATAPI_DEVICE(scp, device) && udmamode >= 4 && - !(pci_read_config(parent, 0x5a, 1) & (scp->channel ? 0x01:0x02))) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && udmamode >= 4 && + !(pci_read_config(parent, 0x5a, 1) & (ch->unit ? 0x01:0x02))) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA4, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA4 on HighPoint chip\n", + ata_prtdev(atadev, "%s setting UDMA4 on HighPoint chip\n", (error) ? "failed" : "success"); if (!error) { - hpt_timing(scp, devno, ATA_UDMA4); - scp->mode[ATA_DEV(device)] = ATA_UDMA4; + hpt_timing(ch, devno, ATA_UDMA4); + atadev->mode = ATA_UDMA4; return; } } - if (!ATAPI_DEVICE(scp, device) && udmamode >= 2) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && udmamode >= 2) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_UDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting UDMA2 on HighPoint chip\n", + ata_prtdev(atadev, "%s setting UDMA2 on HighPoint chip\n", (error) ? "failed" : "success"); if (!error) { - hpt_timing(scp, devno, ATA_UDMA2); - scp->mode[ATA_DEV(device)] = ATA_UDMA2; + hpt_timing(ch, devno, ATA_UDMA2); + atadev->mode = ATA_UDMA2; return; } } - if (!ATAPI_DEVICE(scp, device) && wdmamode >= 2 && apiomode >= 4) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if (!ATAPI_DEVICE(ch, device) && wdmamode >= 2 && apiomode >= 4) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on HighPoint chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on HighPoint chip\n", (error) ? "failed" : "success"); if (!error) { - hpt_timing(scp, devno, ATA_WDMA2); - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + hpt_timing(ch, devno, ATA_WDMA2); + atadev->mode = ATA_WDMA2; return; } } - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting PIO%d on HighPoint chip\n", + ata_prtdev(atadev, "%s setting PIO%d on HighPoint chip\n", (error) ? "failed" : "success", (apiomode >= 0) ? apiomode : 0); - hpt_timing(scp, devno, ATA_PIO0 + apiomode); - scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode; + hpt_timing(ch, devno, ATA_PIO0 + apiomode); + atadev->mode = ATA_PIO0 + apiomode; return; default: /* unknown controller chip */ /* better not try generic DMA on ATAPI devices it almost never works */ - if ((device == ATA_MASTER && scp->devices & ATA_ATAPI_MASTER) || - (device == ATA_SLAVE && scp->devices & ATA_ATAPI_SLAVE)) + if ((device == ATA_MASTER && ch->devices & ATA_ATAPI_MASTER) || + (device == ATA_SLAVE && ch->devices & ATA_ATAPI_SLAVE)) break; /* if controller says its setup for DMA take the easy way out */ /* the downside is we dont know what DMA mode we are in */ if ((udmamode >= 0 || wdmamode > 1) && - (ATA_INB(scp->r_bmio, ATA_BMSTAT_PORT) & + (ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) & ((device==ATA_MASTER) ? ATA_BMSTAT_DMA_MASTER : ATA_BMSTAT_DMA_SLAVE))) { - scp->mode[ATA_DEV(device)] = ATA_DMA; + atadev->mode = ATA_DMA; return; } /* well, we have no support for this, but try anyways */ - if ((wdmamode >= 2 && apiomode >= 4) && scp->r_bmio) { - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, + if ((wdmamode >= 2 && apiomode >= 4) && ch->r_bmio) { + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_WDMA2, ATA_C_F_SETXFER, ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting WDMA2 on generic chip\n", + ata_prtdev(atadev, "%s setting WDMA2 on generic chip\n", (error) ? "failed" : "success"); if (!error) { - scp->mode[ATA_DEV(device)] = ATA_WDMA2; + atadev->mode = ATA_WDMA2; return; } } } - error = ata_command(scp, device, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode, + error = ata_command(atadev, ATA_C_SETFEATURES, 0, ATA_PIO0 + apiomode, ATA_C_F_SETXFER,ATA_WAIT_READY); if (bootverbose) - ata_printf(scp, device, "%s setting PIO%d on generic chip\n", + ata_prtdev(atadev, "%s setting PIO%d on generic chip\n", (error) ? "failed" : "success", apiomode < 0 ? 0 : apiomode); if (!error) - scp->mode[ATA_DEV(device)] = ATA_PIO0 + apiomode; + atadev->mode = ATA_PIO0 + apiomode; else { if (bootverbose) - ata_printf(scp, device, "using PIO mode set by BIOS\n"); - scp->mode[ATA_DEV(device)] = ATA_PIO; + ata_prtdev(atadev, "using PIO mode set by BIOS\n"); + atadev->mode = ATA_PIO; } } int -ata_dmasetup(struct ata_softc *scp, int device, struct ata_dmaentry *dmatab, +ata_dmasetup(struct ata_channel *ch, int device, struct ata_dmaentry *dmatab, caddr_t data, int32_t count) { u_int32_t dma_count, dma_base; int i = 0; - if (((uintptr_t)data & scp->alignment) || (count & scp->alignment)) { - ata_printf(scp, device, "non aligned DMA transfer attempted\n"); + if (((uintptr_t)data & ch->alignment) || (count & ch->alignment)) { + ata_printf(ch, device, "non aligned DMA transfer attempted\n"); return -1; } if (!count) { - ata_printf(scp, device, "zero length DMA transfer attempted\n"); + ata_printf(ch, device, "zero length DMA transfer attempted\n"); return -1; } @@ -1077,7 +1073,7 @@ ata_dmasetup(struct ata_softc *scp, int device, struct ata_dmaentry *dmatab, dmatab[i].count = (dma_count & 0xffff); i++; if (i >= ATA_DMA_ENTRIES) { - ata_printf(scp, device, "too many segments in DMA table\n"); + ata_printf(ch, device, "too many segments in DMA table\n"); return -1; } dma_base = vtophys(data); @@ -1091,41 +1087,41 @@ ata_dmasetup(struct ata_softc *scp, int device, struct ata_dmaentry *dmatab, } void -ata_dmastart(struct ata_softc *scp, int device, +ata_dmastart(struct ata_channel *ch, int device, struct ata_dmaentry *dmatab, int dir) { - scp->flags |= ATA_DMA_ACTIVE; - ATA_OUTL(scp->r_bmio, ATA_BMDTP_PORT, vtophys(dmatab)); - ATA_OUTB(scp->r_bmio, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0); - ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, - (ATA_INB(scp->r_bmio, ATA_BMSTAT_PORT) | + ch->flags |= ATA_DMA_ACTIVE; + ATA_OUTL(ch->r_bmio, ATA_BMDTP_PORT, vtophys(dmatab)); + ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, dir ? ATA_BMCMD_WRITE_READ : 0); + ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT, + (ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) | (ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR))); - ATA_OUTB(scp->r_bmio, ATA_BMCMD_PORT, - ATA_INB(scp->r_bmio, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); + ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, + ATA_INB(ch->r_bmio, ATA_BMCMD_PORT) | ATA_BMCMD_START_STOP); } int -ata_dmadone(struct ata_softc *scp) +ata_dmadone(struct ata_channel *ch) { int error; - ATA_OUTB(scp->r_bmio, ATA_BMCMD_PORT, - ATA_INB(scp->r_bmio, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); - scp->flags &= ~ATA_DMA_ACTIVE; - error = ATA_INB(scp->r_bmio, ATA_BMSTAT_PORT); - ATA_OUTB(scp->r_bmio, ATA_BMSTAT_PORT, + ATA_OUTB(ch->r_bmio, ATA_BMCMD_PORT, + ATA_INB(ch->r_bmio, ATA_BMCMD_PORT) & ~ATA_BMCMD_START_STOP); + ch->flags &= ~ATA_DMA_ACTIVE; + error = ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT); + ATA_OUTB(ch->r_bmio, ATA_BMSTAT_PORT, error | ATA_BMSTAT_INTERRUPT | ATA_BMSTAT_ERROR); return error & ATA_BMSTAT_MASK; } int -ata_dmastatus(struct ata_softc *scp) +ata_dmastatus(struct ata_channel *ch) { - return ATA_INB(scp->r_bmio, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; + return ATA_INB(ch->r_bmio, ATA_BMSTAT_PORT) & ATA_BMSTAT_MASK; } static void -cyrix_timing(struct ata_softc *scp, int devno, int mode) +cyrix_timing(struct ata_channel *ch, int devno, int mode) { u_int32_t reg20 = 0x0000e132; u_int32_t reg24 = 0x00017771; @@ -1139,12 +1135,12 @@ cyrix_timing(struct ata_softc *scp, int devno, int mode) case ATA_WDMA2: reg24 = 0x00002020; break; case ATA_UDMA2: reg24 = 0x00911030; break; } - ATA_OUTL(scp->r_bmio, (devno << 3) + 0x20, reg20); - ATA_OUTL(scp->r_bmio, (devno << 3) + 0x24, reg24); + ATA_OUTL(ch->r_bmio, (devno << 3) + 0x20, reg20); + ATA_OUTL(ch->r_bmio, (devno << 3) + 0x24, reg24); } static void -promise_timing(struct ata_softc *scp, int devno, int mode) +promise_timing(struct ata_channel *ch, int devno, int mode) { u_int32_t timing = 0; struct promise_timing { @@ -1168,17 +1164,17 @@ promise_timing(struct ata_softc *scp, int devno, int mode) t->prefetch = 1; t->errdy = 1; t->syncin = 1; } - switch (scp->chiptype) { + switch (ch->chiptype) { case 0x4d33105a: /* Promise Ultra/Fasttrak 33 */ switch (mode) { default: - case ATA_PIO0: t->pa = 9; t->pb = 19; t->mb = 7; t->mc = 15; break; - case ATA_PIO1: t->pa = 5; t->pb = 12; t->mb = 7; t->mc = 15; break; - case ATA_PIO2: t->pa = 3; t->pb = 8; t->mb = 7; t->mc = 15; break; - case ATA_PIO3: t->pa = 2; t->pb = 6; t->mb = 7; t->mc = 15; break; - case ATA_PIO4: t->pa = 1; t->pb = 4; t->mb = 7; t->mc = 15; break; - case ATA_WDMA2: t->pa = 3; t->pb = 7; t->mb = 3; t->mc = 3; break; - case ATA_UDMA2: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break; + case ATA_PIO0: t->pa = 9; t->pb = 19; t->mb = 7; t->mc = 15; break; + case ATA_PIO1: t->pa = 5; t->pb = 12; t->mb = 7; t->mc = 15; break; + case ATA_PIO2: t->pa = 3; t->pb = 8; t->mb = 7; t->mc = 15; break; + case ATA_PIO3: t->pa = 2; t->pb = 6; t->mb = 7; t->mc = 15; break; + case ATA_PIO4: t->pa = 1; t->pb = 4; t->mb = 7; t->mc = 15; break; + case ATA_WDMA2: t->pa = 3; t->pb = 7; t->mb = 3; t->mc = 3; break; + case ATA_UDMA2: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break; } break; @@ -1187,38 +1183,38 @@ promise_timing(struct ata_softc *scp, int devno, int mode) case 0x0d30105a: /* Promise OEM ATA 100 */ switch (mode) { default: - case ATA_PIO0: t->pa = 15; t->pb = 31; t->mb = 7; t->mc = 15; break; - case ATA_PIO1: t->pa = 10; t->pb = 24; t->mb = 7; t->mc = 15; break; - case ATA_PIO2: t->pa = 6; t->pb = 16; t->mb = 7; t->mc = 15; break; - case ATA_PIO3: t->pa = 4; t->pb = 12; t->mb = 7; t->mc = 15; break; - case ATA_PIO4: t->pa = 2; t->pb = 8; t->mb = 7; t->mc = 15; break; - case ATA_WDMA2: t->pa = 6; t->pb = 14; t->mb = 6; t->mc = 6; break; - case ATA_UDMA2: t->pa = 6; t->pb = 14; t->mb = 2; t->mc = 2; break; - case ATA_UDMA4: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break; - case ATA_UDMA5: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break; + case ATA_PIO0: t->pa = 15; t->pb = 31; t->mb = 7; t->mc = 15; break; + case ATA_PIO1: t->pa = 10; t->pb = 24; t->mb = 7; t->mc = 15; break; + case ATA_PIO2: t->pa = 6; t->pb = 16; t->mb = 7; t->mc = 15; break; + case ATA_PIO3: t->pa = 4; t->pb = 12; t->mb = 7; t->mc = 15; break; + case ATA_PIO4: t->pa = 2; t->pb = 8; t->mb = 7; t->mc = 15; break; + case ATA_WDMA2: t->pa = 6; t->pb = 14; t->mb = 6; t->mc = 6; break; + case ATA_UDMA2: t->pa = 6; t->pb = 14; t->mb = 2; t->mc = 2; break; + case ATA_UDMA4: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break; + case ATA_UDMA5: t->pa = 3; t->pb = 7; t->mb = 1; t->mc = 1; break; } break; } - pci_write_config(device_get_parent(scp->dev), 0x60 + (devno<<2), timing, 4); + pci_write_config(device_get_parent(ch->dev), 0x60 + (devno<<2), timing, 4); } static void -hpt_timing(struct ata_softc *scp, int devno, int mode) +hpt_timing(struct ata_channel *ch, int devno, int mode) { - device_t parent = device_get_parent(scp->dev); + device_t parent = device_get_parent(ch->dev); u_int32_t timing; if (pci_get_revid(parent) >= 0x05) { /* HPT372 */ switch (mode) { - case ATA_PIO0: timing = 0x0d029d5e; break; - case ATA_PIO1: timing = 0x0d029d26; break; - case ATA_PIO2: timing = 0x0c829ca6; break; - case ATA_PIO3: timing = 0x0c829c84; break; - case ATA_PIO4: timing = 0x0c829c62; break; + case ATA_PIO0: timing = 0x0d029d5e; break; + case ATA_PIO1: timing = 0x0d029d26; break; + case ATA_PIO2: timing = 0x0c829ca6; break; + case ATA_PIO3: timing = 0x0c829c84; break; + case ATA_PIO4: timing = 0x0c829c62; break; case ATA_WDMA2: timing = 0x2c829262; break; - case ATA_UDMA2: timing = 0x1c91dc62; break; - case ATA_UDMA4: timing = 0x1c8ddc62; break; - case ATA_UDMA5: timing = 0x1c6ddc62; break; - case ATA_UDMA6: timing = 0x1c81dc62; break; + case ATA_UDMA2: timing = 0x1c91dc62; break; + case ATA_UDMA4: timing = 0x1c8ddc62; break; + case ATA_UDMA5: timing = 0x1c6ddc62; break; + case ATA_UDMA6: timing = 0x1c81dc62; break; default: timing = 0x0d029d5e; } pci_write_config(parent, 0x40 + (devno << 2) , timing, 4); @@ -1231,10 +1227,10 @@ hpt_timing(struct ata_softc *scp, int devno, int mode) case ATA_PIO2: timing = 0x06514e33; break; case ATA_PIO3: timing = 0x06514e22; break; case ATA_PIO4: timing = 0x06514e21; break; - case ATA_WDMA2: timing = 0x26514e21; break; - case ATA_UDMA2: timing = 0x16494e31; break; - case ATA_UDMA4: timing = 0x16454e31; break; - case ATA_UDMA5: timing = 0x16454e31; break; + case ATA_WDMA2: timing = 0x26514e21; break; + case ATA_UDMA2: timing = 0x16494e31; break; + case ATA_UDMA4: timing = 0x16454e31; break; + case ATA_UDMA5: timing = 0x16454e31; break; default: timing = 0x06514e57; } pci_write_config(parent, 0x40 + (devno << 2) , timing, 4); |